mach-smdkv310.c 6.7 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
  2. *
  3. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/serial_core.h>
  11. #include <linux/gpio.h>
  12. #include <linux/mmc/host.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/smsc911x.h>
  15. #include <linux/io.h>
  16. #include <linux/i2c.h>
  17. #include <linux/input.h>
  18. #include <asm/mach/arch.h>
  19. #include <asm/mach-types.h>
  20. #include <plat/regs-serial.h>
  21. #include <plat/regs-srom.h>
  22. #include <plat/exynos4.h>
  23. #include <plat/cpu.h>
  24. #include <plat/devs.h>
  25. #include <plat/keypad.h>
  26. #include <plat/sdhci.h>
  27. #include <plat/iic.h>
  28. #include <plat/pd.h>
  29. #include <mach/map.h>
  30. /* Following are default values for UCON, ULCON and UFCON UART registers */
  31. #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  32. S3C2410_UCON_RXILEVEL | \
  33. S3C2410_UCON_TXIRQMODE | \
  34. S3C2410_UCON_RXIRQMODE | \
  35. S3C2410_UCON_RXFIFO_TOI | \
  36. S3C2443_UCON_RXERR_IRQEN)
  37. #define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
  38. #define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  39. S5PV210_UFCON_TXTRIG4 | \
  40. S5PV210_UFCON_RXTRIG4)
  41. static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  42. [0] = {
  43. .hwport = 0,
  44. .flags = 0,
  45. .ucon = SMDKV310_UCON_DEFAULT,
  46. .ulcon = SMDKV310_ULCON_DEFAULT,
  47. .ufcon = SMDKV310_UFCON_DEFAULT,
  48. },
  49. [1] = {
  50. .hwport = 1,
  51. .flags = 0,
  52. .ucon = SMDKV310_UCON_DEFAULT,
  53. .ulcon = SMDKV310_ULCON_DEFAULT,
  54. .ufcon = SMDKV310_UFCON_DEFAULT,
  55. },
  56. [2] = {
  57. .hwport = 2,
  58. .flags = 0,
  59. .ucon = SMDKV310_UCON_DEFAULT,
  60. .ulcon = SMDKV310_ULCON_DEFAULT,
  61. .ufcon = SMDKV310_UFCON_DEFAULT,
  62. },
  63. [3] = {
  64. .hwport = 3,
  65. .flags = 0,
  66. .ucon = SMDKV310_UCON_DEFAULT,
  67. .ulcon = SMDKV310_ULCON_DEFAULT,
  68. .ufcon = SMDKV310_UFCON_DEFAULT,
  69. },
  70. };
  71. static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  72. .cd_type = S3C_SDHCI_CD_GPIO,
  73. .ext_cd_gpio = EXYNOS4_GPK0(2),
  74. .ext_cd_gpio_invert = 1,
  75. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  76. #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  77. .max_width = 8,
  78. .host_caps = MMC_CAP_8_BIT_DATA,
  79. #endif
  80. };
  81. static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
  82. .cd_type = S3C_SDHCI_CD_GPIO,
  83. .ext_cd_gpio = EXYNOS4_GPK0(2),
  84. .ext_cd_gpio_invert = 1,
  85. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  86. };
  87. static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
  88. .cd_type = S3C_SDHCI_CD_GPIO,
  89. .ext_cd_gpio = EXYNOS4_GPK2(2),
  90. .ext_cd_gpio_invert = 1,
  91. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  92. #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
  93. .max_width = 8,
  94. .host_caps = MMC_CAP_8_BIT_DATA,
  95. #endif
  96. };
  97. static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
  98. .cd_type = S3C_SDHCI_CD_GPIO,
  99. .ext_cd_gpio = EXYNOS4_GPK2(2),
  100. .ext_cd_gpio_invert = 1,
  101. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  102. };
  103. static struct resource smdkv310_smsc911x_resources[] = {
  104. [0] = {
  105. .start = EXYNOS4_PA_SROM_BANK(1),
  106. .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
  107. .flags = IORESOURCE_MEM,
  108. },
  109. [1] = {
  110. .start = IRQ_EINT(5),
  111. .end = IRQ_EINT(5),
  112. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  113. },
  114. };
  115. static struct smsc911x_platform_config smsc9215_config = {
  116. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  117. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  118. .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
  119. .phy_interface = PHY_INTERFACE_MODE_MII,
  120. .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
  121. };
  122. static struct platform_device smdkv310_smsc911x = {
  123. .name = "smsc911x",
  124. .id = -1,
  125. .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
  126. .resource = smdkv310_smsc911x_resources,
  127. .dev = {
  128. .platform_data = &smsc9215_config,
  129. },
  130. };
  131. static uint32_t smdkv310_keymap[] __initdata = {
  132. /* KEY(row, col, keycode) */
  133. KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
  134. KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
  135. KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
  136. KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
  137. };
  138. static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
  139. .keymap = smdkv310_keymap,
  140. .keymap_size = ARRAY_SIZE(smdkv310_keymap),
  141. };
  142. static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
  143. .keymap_data = &smdkv310_keymap_data,
  144. .rows = 2,
  145. .cols = 8,
  146. };
  147. static struct i2c_board_info i2c_devs1[] __initdata = {
  148. {I2C_BOARD_INFO("wm8994", 0x1a),},
  149. };
  150. static struct platform_device *smdkv310_devices[] __initdata = {
  151. &s3c_device_hsmmc0,
  152. &s3c_device_hsmmc1,
  153. &s3c_device_hsmmc2,
  154. &s3c_device_hsmmc3,
  155. &s3c_device_i2c1,
  156. &s3c_device_rtc,
  157. &s3c_device_wdt,
  158. &exynos4_device_ac97,
  159. &exynos4_device_i2s0,
  160. &samsung_device_keypad,
  161. &exynos4_device_pd[PD_MFC],
  162. &exynos4_device_pd[PD_G3D],
  163. &exynos4_device_pd[PD_LCD0],
  164. &exynos4_device_pd[PD_LCD1],
  165. &exynos4_device_pd[PD_CAM],
  166. &exynos4_device_pd[PD_TV],
  167. &exynos4_device_pd[PD_GPS],
  168. &exynos4_device_sysmmu,
  169. &samsung_asoc_dma,
  170. &smdkv310_smsc911x,
  171. };
  172. static void __init smdkv310_smsc911x_init(void)
  173. {
  174. u32 cs1;
  175. /* configure nCS1 width to 16 bits */
  176. cs1 = __raw_readl(S5P_SROM_BW) &
  177. ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
  178. cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
  179. (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
  180. (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
  181. S5P_SROM_BW__NCS1__SHIFT;
  182. __raw_writel(cs1, S5P_SROM_BW);
  183. /* set timing for nCS1 suitable for ethernet chip */
  184. __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
  185. (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
  186. (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
  187. (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
  188. (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
  189. (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
  190. (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
  191. }
  192. static void __init smdkv310_map_io(void)
  193. {
  194. s5p_init_io(NULL, 0, S5P_VA_CHIPID);
  195. s3c24xx_init_clocks(24000000);
  196. s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
  197. }
  198. static void __init smdkv310_machine_init(void)
  199. {
  200. s3c_i2c1_set_platdata(NULL);
  201. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  202. smdkv310_smsc911x_init();
  203. s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
  204. s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
  205. s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
  206. s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
  207. samsung_keypad_set_platdata(&smdkv310_keypad_data);
  208. platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
  209. }
  210. MACHINE_START(SMDKV310, "SMDKV310")
  211. /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
  212. /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
  213. .boot_params = S5P_PA_SDRAM + 0x100,
  214. .init_irq = exynos4_init_irq,
  215. .map_io = smdkv310_map_io,
  216. .init_machine = smdkv310_machine_init,
  217. .timer = &exynos4_timer,
  218. MACHINE_END