fimc-capture.c 46 KB

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  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-core.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "fimc-mdevice.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  31. {
  32. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  33. struct fimc_pipeline *p = &fimc->pipeline;
  34. struct fimc_sensor_info *sensor;
  35. unsigned long flags;
  36. int ret = 0;
  37. if (p->subdevs[IDX_SENSOR] == NULL || ctx == NULL)
  38. return -ENXIO;
  39. if (ctx->s_frame.fmt == NULL)
  40. return -EINVAL;
  41. sensor = v4l2_get_subdev_hostdata(p->subdevs[IDX_SENSOR]);
  42. spin_lock_irqsave(&fimc->slock, flags);
  43. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  44. fimc_set_yuv_order(ctx);
  45. fimc_hw_set_camera_polarity(fimc, sensor->pdata);
  46. fimc_hw_set_camera_type(fimc, sensor->pdata);
  47. fimc_hw_set_camera_source(fimc, sensor->pdata);
  48. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  49. ret = fimc_set_scaler_info(ctx);
  50. if (!ret) {
  51. fimc_hw_set_input_path(ctx);
  52. fimc_hw_set_prescaler(ctx);
  53. fimc_hw_set_mainscaler(ctx);
  54. fimc_hw_set_target_format(ctx);
  55. fimc_hw_set_rotation(ctx);
  56. fimc_hw_set_effect(ctx);
  57. fimc_hw_set_output_path(ctx);
  58. fimc_hw_set_out_dma(ctx);
  59. if (fimc->variant->has_alpha)
  60. fimc_hw_set_rgb_alpha(ctx);
  61. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  62. }
  63. spin_unlock_irqrestore(&fimc->slock, flags);
  64. return ret;
  65. }
  66. /*
  67. * Reinitialize the driver so it is ready to start the streaming again.
  68. * Set fimc->state to indicate stream off and the hardware shut down state.
  69. * If not suspending (@suspend is false), return any buffers to videobuf2.
  70. * Otherwise put any owned buffers onto the pending buffers queue, so they
  71. * can be re-spun when the device is being resumed. Also perform FIMC
  72. * software reset and disable streaming on the whole pipeline if required.
  73. */
  74. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  75. {
  76. struct fimc_vid_cap *cap = &fimc->vid_cap;
  77. struct fimc_vid_buffer *buf;
  78. unsigned long flags;
  79. bool streaming;
  80. spin_lock_irqsave(&fimc->slock, flags);
  81. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  82. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  83. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  84. if (suspend)
  85. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  86. else
  87. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  88. /* Release unused buffers */
  89. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  90. buf = fimc_pending_queue_pop(cap);
  91. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  92. }
  93. /* If suspending put unused buffers onto pending queue */
  94. while (!list_empty(&cap->active_buf_q)) {
  95. buf = fimc_active_queue_pop(cap);
  96. if (suspend)
  97. fimc_pending_queue_add(cap, buf);
  98. else
  99. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  100. }
  101. fimc_hw_reset(fimc);
  102. cap->buf_index = 0;
  103. spin_unlock_irqrestore(&fimc->slock, flags);
  104. if (streaming)
  105. return fimc_pipeline_s_stream(&fimc->pipeline, 0);
  106. else
  107. return 0;
  108. }
  109. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  110. {
  111. unsigned long flags;
  112. if (!fimc_capture_active(fimc))
  113. return 0;
  114. spin_lock_irqsave(&fimc->slock, flags);
  115. set_bit(ST_CAPT_SHUT, &fimc->state);
  116. fimc_deactivate_capture(fimc);
  117. spin_unlock_irqrestore(&fimc->slock, flags);
  118. wait_event_timeout(fimc->irq_queue,
  119. !test_bit(ST_CAPT_SHUT, &fimc->state),
  120. (2*HZ/10)); /* 200 ms */
  121. return fimc_capture_state_cleanup(fimc, suspend);
  122. }
  123. /**
  124. * fimc_capture_config_update - apply the camera interface configuration
  125. *
  126. * To be called from within the interrupt handler with fimc.slock
  127. * spinlock held. It updates the camera pixel crop, rotation and
  128. * image flip in H/W.
  129. */
  130. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  131. {
  132. struct fimc_dev *fimc = ctx->fimc_dev;
  133. int ret;
  134. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  135. ret = fimc_set_scaler_info(ctx);
  136. if (ret)
  137. return ret;
  138. fimc_hw_set_prescaler(ctx);
  139. fimc_hw_set_mainscaler(ctx);
  140. fimc_hw_set_target_format(ctx);
  141. fimc_hw_set_rotation(ctx);
  142. fimc_hw_set_effect(ctx);
  143. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  144. fimc_hw_set_out_dma(ctx);
  145. if (fimc->variant->has_alpha)
  146. fimc_hw_set_rgb_alpha(ctx);
  147. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  148. return ret;
  149. }
  150. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  151. {
  152. struct fimc_vid_cap *cap = &fimc->vid_cap;
  153. struct fimc_vid_buffer *v_buf;
  154. struct timeval *tv;
  155. struct timespec ts;
  156. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  157. wake_up(&fimc->irq_queue);
  158. goto done;
  159. }
  160. if (!list_empty(&cap->active_buf_q) &&
  161. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  162. ktime_get_real_ts(&ts);
  163. v_buf = fimc_active_queue_pop(cap);
  164. tv = &v_buf->vb.v4l2_buf.timestamp;
  165. tv->tv_sec = ts.tv_sec;
  166. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  167. v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
  168. vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
  169. }
  170. if (!list_empty(&cap->pending_buf_q)) {
  171. v_buf = fimc_pending_queue_pop(cap);
  172. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  173. v_buf->index = cap->buf_index;
  174. /* Move the buffer to the capture active queue */
  175. fimc_active_queue_add(cap, v_buf);
  176. dbg("next frame: %d, done frame: %d",
  177. fimc_hw_get_frame_index(fimc), v_buf->index);
  178. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  179. cap->buf_index = 0;
  180. }
  181. if (cap->active_buf_cnt == 0) {
  182. if (deq_buf)
  183. clear_bit(ST_CAPT_RUN, &fimc->state);
  184. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  185. cap->buf_index = 0;
  186. } else {
  187. set_bit(ST_CAPT_RUN, &fimc->state);
  188. }
  189. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  190. fimc_capture_config_update(cap->ctx);
  191. done:
  192. if (cap->active_buf_cnt == 1) {
  193. fimc_deactivate_capture(fimc);
  194. clear_bit(ST_CAPT_STREAM, &fimc->state);
  195. }
  196. dbg("frame: %d, active_buf_cnt: %d",
  197. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  198. }
  199. static int start_streaming(struct vb2_queue *q, unsigned int count)
  200. {
  201. struct fimc_ctx *ctx = q->drv_priv;
  202. struct fimc_dev *fimc = ctx->fimc_dev;
  203. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  204. int min_bufs;
  205. int ret;
  206. vid_cap->frame_count = 0;
  207. ret = fimc_capture_hw_init(fimc);
  208. if (ret) {
  209. fimc_capture_state_cleanup(fimc, false);
  210. return ret;
  211. }
  212. set_bit(ST_CAPT_PEND, &fimc->state);
  213. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  214. if (vid_cap->active_buf_cnt >= min_bufs &&
  215. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  216. fimc_activate_capture(ctx);
  217. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  218. fimc_pipeline_s_stream(&fimc->pipeline, 1);
  219. }
  220. return 0;
  221. }
  222. static int stop_streaming(struct vb2_queue *q)
  223. {
  224. struct fimc_ctx *ctx = q->drv_priv;
  225. struct fimc_dev *fimc = ctx->fimc_dev;
  226. if (!fimc_capture_active(fimc))
  227. return -EINVAL;
  228. return fimc_stop_capture(fimc, false);
  229. }
  230. int fimc_capture_suspend(struct fimc_dev *fimc)
  231. {
  232. bool suspend = fimc_capture_busy(fimc);
  233. int ret = fimc_stop_capture(fimc, suspend);
  234. if (ret)
  235. return ret;
  236. return fimc_pipeline_shutdown(&fimc->pipeline);
  237. }
  238. static void buffer_queue(struct vb2_buffer *vb);
  239. int fimc_capture_resume(struct fimc_dev *fimc)
  240. {
  241. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  242. struct fimc_vid_buffer *buf;
  243. int i;
  244. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  245. return 0;
  246. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  247. vid_cap->buf_index = 0;
  248. fimc_pipeline_initialize(&fimc->pipeline, &vid_cap->vfd.entity,
  249. false);
  250. fimc_capture_hw_init(fimc);
  251. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  252. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  253. if (list_empty(&vid_cap->pending_buf_q))
  254. break;
  255. buf = fimc_pending_queue_pop(vid_cap);
  256. buffer_queue(&buf->vb);
  257. }
  258. return 0;
  259. }
  260. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  261. unsigned int *num_buffers, unsigned int *num_planes,
  262. unsigned int sizes[], void *allocators[])
  263. {
  264. const struct v4l2_pix_format_mplane *pixm = NULL;
  265. struct fimc_ctx *ctx = vq->drv_priv;
  266. struct fimc_frame *frame = &ctx->d_frame;
  267. struct fimc_fmt *fmt = frame->fmt;
  268. unsigned long wh;
  269. int i;
  270. if (pfmt) {
  271. pixm = &pfmt->fmt.pix_mp;
  272. fmt = fimc_find_format(&pixm->pixelformat, NULL,
  273. FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
  274. wh = pixm->width * pixm->height;
  275. } else {
  276. wh = frame->f_width * frame->f_height;
  277. }
  278. if (fmt == NULL)
  279. return -EINVAL;
  280. *num_planes = fmt->memplanes;
  281. for (i = 0; i < fmt->memplanes; i++) {
  282. unsigned int size = (wh * fmt->depth[i]) / 8;
  283. if (pixm)
  284. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  285. else
  286. sizes[i] = max_t(u32, size, frame->payload[i]);
  287. allocators[i] = ctx->fimc_dev->alloc_ctx;
  288. }
  289. return 0;
  290. }
  291. static int buffer_prepare(struct vb2_buffer *vb)
  292. {
  293. struct vb2_queue *vq = vb->vb2_queue;
  294. struct fimc_ctx *ctx = vq->drv_priv;
  295. int i;
  296. if (ctx->d_frame.fmt == NULL)
  297. return -EINVAL;
  298. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  299. unsigned long size = ctx->d_frame.payload[i];
  300. if (vb2_plane_size(vb, i) < size) {
  301. v4l2_err(&ctx->fimc_dev->vid_cap.vfd,
  302. "User buffer too small (%ld < %ld)\n",
  303. vb2_plane_size(vb, i), size);
  304. return -EINVAL;
  305. }
  306. vb2_set_plane_payload(vb, i, size);
  307. }
  308. return 0;
  309. }
  310. static void buffer_queue(struct vb2_buffer *vb)
  311. {
  312. struct fimc_vid_buffer *buf
  313. = container_of(vb, struct fimc_vid_buffer, vb);
  314. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  315. struct fimc_dev *fimc = ctx->fimc_dev;
  316. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  317. unsigned long flags;
  318. int min_bufs;
  319. spin_lock_irqsave(&fimc->slock, flags);
  320. fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
  321. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  322. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  323. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  324. /* Setup the buffer directly for processing. */
  325. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  326. vid_cap->buf_index;
  327. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  328. buf->index = vid_cap->buf_index;
  329. fimc_active_queue_add(vid_cap, buf);
  330. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  331. vid_cap->buf_index = 0;
  332. } else {
  333. fimc_pending_queue_add(vid_cap, buf);
  334. }
  335. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  336. if (vb2_is_streaming(&vid_cap->vbq) &&
  337. vid_cap->active_buf_cnt >= min_bufs &&
  338. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  339. fimc_activate_capture(ctx);
  340. spin_unlock_irqrestore(&fimc->slock, flags);
  341. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  342. fimc_pipeline_s_stream(&fimc->pipeline, 1);
  343. return;
  344. }
  345. spin_unlock_irqrestore(&fimc->slock, flags);
  346. }
  347. static void fimc_lock(struct vb2_queue *vq)
  348. {
  349. struct fimc_ctx *ctx = vb2_get_drv_priv(vq);
  350. mutex_lock(&ctx->fimc_dev->lock);
  351. }
  352. static void fimc_unlock(struct vb2_queue *vq)
  353. {
  354. struct fimc_ctx *ctx = vb2_get_drv_priv(vq);
  355. mutex_unlock(&ctx->fimc_dev->lock);
  356. }
  357. static struct vb2_ops fimc_capture_qops = {
  358. .queue_setup = queue_setup,
  359. .buf_prepare = buffer_prepare,
  360. .buf_queue = buffer_queue,
  361. .wait_prepare = fimc_unlock,
  362. .wait_finish = fimc_lock,
  363. .start_streaming = start_streaming,
  364. .stop_streaming = stop_streaming,
  365. };
  366. /**
  367. * fimc_capture_ctrls_create - initialize the control handler
  368. * Initialize the capture video node control handler and fill it
  369. * with the FIMC controls. Inherit any sensor's controls if the
  370. * 'user_subdev_api' flag is false (default behaviour).
  371. * This function need to be called with the graph mutex held.
  372. */
  373. int fimc_capture_ctrls_create(struct fimc_dev *fimc)
  374. {
  375. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  376. int ret;
  377. if (WARN_ON(vid_cap->ctx == NULL))
  378. return -ENXIO;
  379. if (vid_cap->ctx->ctrls.ready)
  380. return 0;
  381. ret = fimc_ctrls_create(vid_cap->ctx);
  382. if (ret || vid_cap->user_subdev_api || !vid_cap->ctx->ctrls.ready)
  383. return ret;
  384. return v4l2_ctrl_add_handler(&vid_cap->ctx->ctrls.handler,
  385. fimc->pipeline.subdevs[IDX_SENSOR]->ctrl_handler, NULL);
  386. }
  387. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  388. static int fimc_capture_open(struct file *file)
  389. {
  390. struct fimc_dev *fimc = video_drvdata(file);
  391. int ret = -EBUSY;
  392. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  393. if (mutex_lock_interruptible(&fimc->lock))
  394. return -ERESTARTSYS;
  395. if (fimc_m2m_active(fimc))
  396. goto unlock;
  397. set_bit(ST_CAPT_BUSY, &fimc->state);
  398. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  399. if (ret < 0)
  400. goto unlock;
  401. ret = v4l2_fh_open(file);
  402. if (ret) {
  403. pm_runtime_put(&fimc->pdev->dev);
  404. goto unlock;
  405. }
  406. if (++fimc->vid_cap.refcnt == 1) {
  407. ret = fimc_pipeline_initialize(&fimc->pipeline,
  408. &fimc->vid_cap.vfd.entity, true);
  409. if (!ret && !fimc->vid_cap.user_subdev_api)
  410. ret = fimc_capture_set_default_format(fimc);
  411. if (!ret)
  412. ret = fimc_capture_ctrls_create(fimc);
  413. if (ret < 0) {
  414. clear_bit(ST_CAPT_BUSY, &fimc->state);
  415. pm_runtime_put_sync(&fimc->pdev->dev);
  416. fimc->vid_cap.refcnt--;
  417. v4l2_fh_release(file);
  418. }
  419. }
  420. unlock:
  421. mutex_unlock(&fimc->lock);
  422. return ret;
  423. }
  424. static int fimc_capture_close(struct file *file)
  425. {
  426. struct fimc_dev *fimc = video_drvdata(file);
  427. int ret;
  428. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  429. if (mutex_lock_interruptible(&fimc->lock))
  430. return -ERESTARTSYS;
  431. if (--fimc->vid_cap.refcnt == 0) {
  432. clear_bit(ST_CAPT_BUSY, &fimc->state);
  433. fimc_stop_capture(fimc, false);
  434. fimc_pipeline_shutdown(&fimc->pipeline);
  435. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  436. }
  437. pm_runtime_put(&fimc->pdev->dev);
  438. if (fimc->vid_cap.refcnt == 0) {
  439. vb2_queue_release(&fimc->vid_cap.vbq);
  440. fimc_ctrls_delete(fimc->vid_cap.ctx);
  441. }
  442. ret = v4l2_fh_release(file);
  443. mutex_unlock(&fimc->lock);
  444. return ret;
  445. }
  446. static unsigned int fimc_capture_poll(struct file *file,
  447. struct poll_table_struct *wait)
  448. {
  449. struct fimc_dev *fimc = video_drvdata(file);
  450. int ret;
  451. if (mutex_lock_interruptible(&fimc->lock))
  452. return POLL_ERR;
  453. ret = vb2_poll(&fimc->vid_cap.vbq, file, wait);
  454. mutex_unlock(&fimc->lock);
  455. return ret;
  456. }
  457. static int fimc_capture_mmap(struct file *file, struct vm_area_struct *vma)
  458. {
  459. struct fimc_dev *fimc = video_drvdata(file);
  460. int ret;
  461. if (mutex_lock_interruptible(&fimc->lock))
  462. return -ERESTARTSYS;
  463. ret = vb2_mmap(&fimc->vid_cap.vbq, vma);
  464. mutex_unlock(&fimc->lock);
  465. return ret;
  466. }
  467. static const struct v4l2_file_operations fimc_capture_fops = {
  468. .owner = THIS_MODULE,
  469. .open = fimc_capture_open,
  470. .release = fimc_capture_close,
  471. .poll = fimc_capture_poll,
  472. .unlocked_ioctl = video_ioctl2,
  473. .mmap = fimc_capture_mmap,
  474. };
  475. /*
  476. * Format and crop negotiation helpers
  477. */
  478. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  479. u32 *width, u32 *height,
  480. u32 *code, u32 *fourcc, int pad)
  481. {
  482. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  483. struct fimc_dev *fimc = ctx->fimc_dev;
  484. struct fimc_variant *var = fimc->variant;
  485. struct fimc_pix_limit *pl = var->pix_limit;
  486. struct fimc_frame *dst = &ctx->d_frame;
  487. u32 depth, min_w, max_w, min_h, align_h = 3;
  488. u32 mask = FMT_FLAGS_CAM;
  489. struct fimc_fmt *ffmt;
  490. /* Color conversion from/to JPEG is not supported */
  491. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  492. fimc_fmt_is_jpeg(ctx->s_frame.fmt->color))
  493. *code = V4L2_MBUS_FMT_JPEG_1X8;
  494. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad != FIMC_SD_PAD_SINK)
  495. mask |= FMT_FLAGS_M2M;
  496. ffmt = fimc_find_format(fourcc, code, mask, 0);
  497. if (WARN_ON(!ffmt))
  498. return NULL;
  499. if (code)
  500. *code = ffmt->mbus_code;
  501. if (fourcc)
  502. *fourcc = ffmt->fourcc;
  503. if (pad == FIMC_SD_PAD_SINK) {
  504. max_w = fimc_fmt_is_jpeg(ffmt->color) ?
  505. pl->scaler_dis_w : pl->scaler_en_w;
  506. /* Apply the camera input interface pixel constraints */
  507. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  508. height, max_t(u32, *height, 32),
  509. FIMC_CAMIF_MAX_HEIGHT,
  510. fimc_fmt_is_jpeg(ffmt->color) ? 3 : 1,
  511. 0);
  512. return ffmt;
  513. }
  514. /* Can't scale or crop in transparent (JPEG) transfer mode */
  515. if (fimc_fmt_is_jpeg(ffmt->color)) {
  516. *width = ctx->s_frame.f_width;
  517. *height = ctx->s_frame.f_height;
  518. return ffmt;
  519. }
  520. /* Apply the scaler and the output DMA constraints */
  521. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  522. if (ctx->state & FIMC_COMPOSE) {
  523. min_w = dst->offs_h + dst->width;
  524. min_h = dst->offs_v + dst->height;
  525. } else {
  526. min_w = var->min_out_pixsize;
  527. min_h = var->min_out_pixsize;
  528. }
  529. if (var->min_vsize_align == 1 && !rotation)
  530. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  531. depth = fimc_get_format_depth(ffmt);
  532. v4l_bound_align_image(width, min_w, max_w,
  533. ffs(var->min_out_pixsize) - 1,
  534. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  535. align_h,
  536. 64/(ALIGN(depth, 8)));
  537. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  538. pad, code ? *code : 0, *width, *height,
  539. dst->f_width, dst->f_height);
  540. return ffmt;
  541. }
  542. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  543. struct v4l2_rect *r,
  544. int target)
  545. {
  546. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  547. struct fimc_dev *fimc = ctx->fimc_dev;
  548. struct fimc_variant *var = fimc->variant;
  549. struct fimc_pix_limit *pl = var->pix_limit;
  550. struct fimc_frame *sink = &ctx->s_frame;
  551. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  552. u32 align_sz = 0, align_h = 4;
  553. u32 max_sc_h, max_sc_v;
  554. /* In JPEG transparent transfer mode cropping is not supported */
  555. if (fimc_fmt_is_jpeg(ctx->d_frame.fmt->color)) {
  556. r->width = sink->f_width;
  557. r->height = sink->f_height;
  558. r->left = r->top = 0;
  559. return;
  560. }
  561. if (target == V4L2_SEL_TGT_COMPOSE) {
  562. if (ctx->rotation != 90 && ctx->rotation != 270)
  563. align_h = 1;
  564. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  565. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  566. min_sz = var->min_out_pixsize;
  567. } else {
  568. u32 depth = fimc_get_format_depth(sink->fmt);
  569. align_sz = 64/ALIGN(depth, 8);
  570. min_sz = var->min_inp_pixsize;
  571. min_w = min_h = min_sz;
  572. max_sc_h = max_sc_v = 1;
  573. }
  574. /*
  575. * For the compose rectangle the following constraints must be met:
  576. * - it must fit in the sink pad format rectangle (f_width/f_height);
  577. * - maximum downscaling ratio is 64;
  578. * - maximum crop size depends if the rotator is used or not;
  579. * - the sink pad format width/height must be 4 multiple of the
  580. * prescaler ratios determined by sink pad size and source pad crop,
  581. * the prescaler ratio is returned by fimc_get_scaler_factor().
  582. */
  583. max_w = min_t(u32,
  584. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  585. rotate ? sink->f_height : sink->f_width);
  586. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  587. if (target == V4L2_SEL_TGT_COMPOSE) {
  588. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  589. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  590. if (rotate) {
  591. swap(max_sc_h, max_sc_v);
  592. swap(min_w, min_h);
  593. }
  594. }
  595. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  596. &r->height, min_h, max_h, align_h,
  597. align_sz);
  598. /* Adjust left/top if crop/compose rectangle is out of bounds */
  599. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  600. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  601. r->left = round_down(r->left, var->hor_offs_align);
  602. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  603. target, r->left, r->top, r->width, r->height,
  604. sink->f_width, sink->f_height);
  605. }
  606. /*
  607. * The video node ioctl operations
  608. */
  609. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  610. struct v4l2_capability *cap)
  611. {
  612. struct fimc_dev *fimc = video_drvdata(file);
  613. strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1);
  614. strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1);
  615. cap->bus_info[0] = 0;
  616. cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
  617. return 0;
  618. }
  619. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  620. struct v4l2_fmtdesc *f)
  621. {
  622. struct fimc_fmt *fmt;
  623. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  624. f->index);
  625. if (!fmt)
  626. return -EINVAL;
  627. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  628. f->pixelformat = fmt->fourcc;
  629. if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8)
  630. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  631. return 0;
  632. }
  633. /**
  634. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  635. * elements
  636. * @ctx: FIMC capture context
  637. * @tfmt: media bus format to try/set on subdevs
  638. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  639. * @set: true to set format on subdevs, false to try only
  640. */
  641. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  642. struct v4l2_mbus_framefmt *tfmt,
  643. struct fimc_fmt **fmt_id,
  644. bool set)
  645. {
  646. struct fimc_dev *fimc = ctx->fimc_dev;
  647. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  648. struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
  649. struct v4l2_subdev_format sfmt;
  650. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  651. struct fimc_fmt *ffmt = NULL;
  652. int ret, i = 0;
  653. if (WARN_ON(!sd || !tfmt))
  654. return -EINVAL;
  655. memset(&sfmt, 0, sizeof(sfmt));
  656. sfmt.format = *tfmt;
  657. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  658. while (1) {
  659. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  660. FMT_FLAGS_CAM, i++);
  661. if (ffmt == NULL) {
  662. /*
  663. * Notify user-space if common pixel code for
  664. * host and sensor does not exist.
  665. */
  666. return -EINVAL;
  667. }
  668. mf->code = tfmt->code = ffmt->mbus_code;
  669. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  670. if (ret)
  671. return ret;
  672. if (mf->code != tfmt->code) {
  673. mf->code = 0;
  674. continue;
  675. }
  676. if (mf->width != tfmt->width || mf->height != tfmt->height) {
  677. u32 fcc = ffmt->fourcc;
  678. tfmt->width = mf->width;
  679. tfmt->height = mf->height;
  680. ffmt = fimc_capture_try_format(ctx,
  681. &tfmt->width, &tfmt->height,
  682. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  683. if (ffmt && ffmt->mbus_code)
  684. mf->code = ffmt->mbus_code;
  685. if (mf->width != tfmt->width ||
  686. mf->height != tfmt->height)
  687. continue;
  688. tfmt->code = mf->code;
  689. }
  690. if (csis)
  691. ret = v4l2_subdev_call(csis, pad, set_fmt, NULL, &sfmt);
  692. if (mf->code == tfmt->code &&
  693. mf->width == tfmt->width && mf->height == tfmt->height)
  694. break;
  695. }
  696. if (fmt_id && ffmt)
  697. *fmt_id = ffmt;
  698. *tfmt = *mf;
  699. dbg("code: 0x%x, %dx%d, %p", mf->code, mf->width, mf->height, ffmt);
  700. return 0;
  701. }
  702. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  703. struct v4l2_format *f)
  704. {
  705. struct fimc_dev *fimc = video_drvdata(file);
  706. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  707. return fimc_fill_format(&ctx->d_frame, f);
  708. }
  709. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  710. struct v4l2_format *f)
  711. {
  712. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  713. struct fimc_dev *fimc = video_drvdata(file);
  714. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  715. struct v4l2_mbus_framefmt mf;
  716. struct fimc_fmt *ffmt = NULL;
  717. if (pix->pixelformat == V4L2_PIX_FMT_JPEG) {
  718. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  719. NULL, &pix->pixelformat,
  720. FIMC_SD_PAD_SINK);
  721. ctx->s_frame.f_width = pix->width;
  722. ctx->s_frame.f_height = pix->height;
  723. }
  724. ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  725. NULL, &pix->pixelformat,
  726. FIMC_SD_PAD_SOURCE);
  727. if (!ffmt)
  728. return -EINVAL;
  729. if (!fimc->vid_cap.user_subdev_api) {
  730. mf.width = pix->width;
  731. mf.height = pix->height;
  732. mf.code = ffmt->mbus_code;
  733. fimc_md_graph_lock(fimc);
  734. fimc_pipeline_try_format(ctx, &mf, &ffmt, false);
  735. fimc_md_graph_unlock(fimc);
  736. pix->width = mf.width;
  737. pix->height = mf.height;
  738. if (ffmt)
  739. pix->pixelformat = ffmt->fourcc;
  740. }
  741. fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix);
  742. return 0;
  743. }
  744. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx, bool jpeg)
  745. {
  746. ctx->scaler.enabled = !jpeg;
  747. fimc_ctrls_activate(ctx, !jpeg);
  748. if (jpeg)
  749. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  750. else
  751. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  752. }
  753. static int fimc_capture_set_format(struct fimc_dev *fimc, struct v4l2_format *f)
  754. {
  755. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  756. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  757. struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.mf;
  758. struct fimc_frame *ff = &ctx->d_frame;
  759. struct fimc_fmt *s_fmt = NULL;
  760. int ret, i;
  761. if (vb2_is_busy(&fimc->vid_cap.vbq))
  762. return -EBUSY;
  763. /* Pre-configure format at camera interface input, for JPEG only */
  764. if (pix->pixelformat == V4L2_PIX_FMT_JPEG) {
  765. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  766. NULL, &pix->pixelformat,
  767. FIMC_SD_PAD_SINK);
  768. ctx->s_frame.f_width = pix->width;
  769. ctx->s_frame.f_height = pix->height;
  770. }
  771. /* Try the format at the scaler and the DMA output */
  772. ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  773. NULL, &pix->pixelformat,
  774. FIMC_SD_PAD_SOURCE);
  775. if (!ff->fmt)
  776. return -EINVAL;
  777. /* Update RGB Alpha control state and value range */
  778. fimc_alpha_ctrl_update(ctx);
  779. /* Try to match format at the host and the sensor */
  780. if (!fimc->vid_cap.user_subdev_api) {
  781. mf->code = ff->fmt->mbus_code;
  782. mf->width = pix->width;
  783. mf->height = pix->height;
  784. fimc_md_graph_lock(fimc);
  785. ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true);
  786. fimc_md_graph_unlock(fimc);
  787. if (ret)
  788. return ret;
  789. pix->width = mf->width;
  790. pix->height = mf->height;
  791. }
  792. fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix);
  793. for (i = 0; i < ff->fmt->colplanes; i++)
  794. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  795. set_frame_bounds(ff, pix->width, pix->height);
  796. /* Reset the composition rectangle if not yet configured */
  797. if (!(ctx->state & FIMC_COMPOSE))
  798. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  799. fimc_capture_mark_jpeg_xfer(ctx, fimc_fmt_is_jpeg(ff->fmt->color));
  800. /* Reset cropping and set format at the camera interface input */
  801. if (!fimc->vid_cap.user_subdev_api) {
  802. ctx->s_frame.fmt = s_fmt;
  803. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  804. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  805. }
  806. return ret;
  807. }
  808. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  809. struct v4l2_format *f)
  810. {
  811. struct fimc_dev *fimc = video_drvdata(file);
  812. return fimc_capture_set_format(fimc, f);
  813. }
  814. static int fimc_cap_enum_input(struct file *file, void *priv,
  815. struct v4l2_input *i)
  816. {
  817. struct fimc_dev *fimc = video_drvdata(file);
  818. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  819. if (i->index != 0)
  820. return -EINVAL;
  821. i->type = V4L2_INPUT_TYPE_CAMERA;
  822. if (sd)
  823. strlcpy(i->name, sd->name, sizeof(i->name));
  824. return 0;
  825. }
  826. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  827. {
  828. return i == 0 ? i : -EINVAL;
  829. }
  830. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  831. {
  832. *i = 0;
  833. return 0;
  834. }
  835. /**
  836. * fimc_pipeline_validate - check for formats inconsistencies
  837. * between source and sink pad of each link
  838. *
  839. * Return 0 if all formats match or -EPIPE otherwise.
  840. */
  841. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  842. {
  843. struct v4l2_subdev_format sink_fmt, src_fmt;
  844. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  845. struct v4l2_subdev *sd;
  846. struct media_pad *pad;
  847. int ret;
  848. /* Start with the video capture node pad */
  849. pad = media_entity_remote_source(&vid_cap->vd_pad);
  850. if (pad == NULL)
  851. return -EPIPE;
  852. /* FIMC.{N} subdevice */
  853. sd = media_entity_to_v4l2_subdev(pad->entity);
  854. while (1) {
  855. /* Retrieve format at the sink pad */
  856. pad = &sd->entity.pads[0];
  857. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  858. break;
  859. /* Don't call FIMC subdev operation to avoid nested locking */
  860. if (sd == &fimc->vid_cap.subdev) {
  861. struct fimc_frame *ff = &vid_cap->ctx->s_frame;
  862. sink_fmt.format.width = ff->f_width;
  863. sink_fmt.format.height = ff->f_height;
  864. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  865. } else {
  866. sink_fmt.pad = pad->index;
  867. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  868. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  869. if (ret < 0 && ret != -ENOIOCTLCMD)
  870. return -EPIPE;
  871. }
  872. /* Retrieve format at the source pad */
  873. pad = media_entity_remote_source(pad);
  874. if (pad == NULL ||
  875. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  876. break;
  877. sd = media_entity_to_v4l2_subdev(pad->entity);
  878. src_fmt.pad = pad->index;
  879. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  880. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  881. if (ret < 0 && ret != -ENOIOCTLCMD)
  882. return -EPIPE;
  883. if (src_fmt.format.width != sink_fmt.format.width ||
  884. src_fmt.format.height != sink_fmt.format.height ||
  885. src_fmt.format.code != sink_fmt.format.code)
  886. return -EPIPE;
  887. }
  888. return 0;
  889. }
  890. static int fimc_cap_streamon(struct file *file, void *priv,
  891. enum v4l2_buf_type type)
  892. {
  893. struct fimc_dev *fimc = video_drvdata(file);
  894. struct fimc_pipeline *p = &fimc->pipeline;
  895. struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
  896. int ret;
  897. if (fimc_capture_active(fimc))
  898. return -EBUSY;
  899. ret = media_entity_pipeline_start(&sd->entity, p->m_pipeline);
  900. if (ret < 0)
  901. return ret;
  902. if (fimc->vid_cap.user_subdev_api) {
  903. ret = fimc_pipeline_validate(fimc);
  904. if (ret < 0) {
  905. media_entity_pipeline_stop(&sd->entity);
  906. return ret;
  907. }
  908. }
  909. return vb2_streamon(&fimc->vid_cap.vbq, type);
  910. }
  911. static int fimc_cap_streamoff(struct file *file, void *priv,
  912. enum v4l2_buf_type type)
  913. {
  914. struct fimc_dev *fimc = video_drvdata(file);
  915. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  916. int ret;
  917. ret = vb2_streamoff(&fimc->vid_cap.vbq, type);
  918. if (ret == 0)
  919. media_entity_pipeline_stop(&sd->entity);
  920. return ret;
  921. }
  922. static int fimc_cap_reqbufs(struct file *file, void *priv,
  923. struct v4l2_requestbuffers *reqbufs)
  924. {
  925. struct fimc_dev *fimc = video_drvdata(file);
  926. int ret = vb2_reqbufs(&fimc->vid_cap.vbq, reqbufs);
  927. if (!ret)
  928. fimc->vid_cap.reqbufs_count = reqbufs->count;
  929. return ret;
  930. }
  931. static int fimc_cap_querybuf(struct file *file, void *priv,
  932. struct v4l2_buffer *buf)
  933. {
  934. struct fimc_dev *fimc = video_drvdata(file);
  935. return vb2_querybuf(&fimc->vid_cap.vbq, buf);
  936. }
  937. static int fimc_cap_qbuf(struct file *file, void *priv,
  938. struct v4l2_buffer *buf)
  939. {
  940. struct fimc_dev *fimc = video_drvdata(file);
  941. return vb2_qbuf(&fimc->vid_cap.vbq, buf);
  942. }
  943. static int fimc_cap_dqbuf(struct file *file, void *priv,
  944. struct v4l2_buffer *buf)
  945. {
  946. struct fimc_dev *fimc = video_drvdata(file);
  947. return vb2_dqbuf(&fimc->vid_cap.vbq, buf, file->f_flags & O_NONBLOCK);
  948. }
  949. static int fimc_cap_create_bufs(struct file *file, void *priv,
  950. struct v4l2_create_buffers *create)
  951. {
  952. struct fimc_dev *fimc = video_drvdata(file);
  953. return vb2_create_bufs(&fimc->vid_cap.vbq, create);
  954. }
  955. static int fimc_cap_prepare_buf(struct file *file, void *priv,
  956. struct v4l2_buffer *b)
  957. {
  958. struct fimc_dev *fimc = video_drvdata(file);
  959. return vb2_prepare_buf(&fimc->vid_cap.vbq, b);
  960. }
  961. static int fimc_cap_g_selection(struct file *file, void *fh,
  962. struct v4l2_selection *s)
  963. {
  964. struct fimc_dev *fimc = video_drvdata(file);
  965. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  966. struct fimc_frame *f = &ctx->s_frame;
  967. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  968. return -EINVAL;
  969. switch (s->target) {
  970. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  971. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  972. f = &ctx->d_frame;
  973. case V4L2_SEL_TGT_CROP_BOUNDS:
  974. case V4L2_SEL_TGT_CROP_DEFAULT:
  975. s->r.left = 0;
  976. s->r.top = 0;
  977. s->r.width = f->o_width;
  978. s->r.height = f->o_height;
  979. return 0;
  980. case V4L2_SEL_TGT_COMPOSE:
  981. f = &ctx->d_frame;
  982. case V4L2_SEL_TGT_CROP:
  983. s->r.left = f->offs_h;
  984. s->r.top = f->offs_v;
  985. s->r.width = f->width;
  986. s->r.height = f->height;
  987. return 0;
  988. }
  989. return -EINVAL;
  990. }
  991. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  992. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  993. {
  994. if (a->left < b->left || a->top < b->top)
  995. return 0;
  996. if (a->left + a->width > b->left + b->width)
  997. return 0;
  998. if (a->top + a->height > b->top + b->height)
  999. return 0;
  1000. return 1;
  1001. }
  1002. static int fimc_cap_s_selection(struct file *file, void *fh,
  1003. struct v4l2_selection *s)
  1004. {
  1005. struct fimc_dev *fimc = video_drvdata(file);
  1006. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1007. struct v4l2_rect rect = s->r;
  1008. struct fimc_frame *f;
  1009. unsigned long flags;
  1010. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1011. return -EINVAL;
  1012. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1013. f = &ctx->d_frame;
  1014. else if (s->target == V4L2_SEL_TGT_CROP)
  1015. f = &ctx->s_frame;
  1016. else
  1017. return -EINVAL;
  1018. fimc_capture_try_selection(ctx, &rect, s->target);
  1019. if (s->flags & V4L2_SEL_FLAG_LE &&
  1020. !enclosed_rectangle(&rect, &s->r))
  1021. return -ERANGE;
  1022. if (s->flags & V4L2_SEL_FLAG_GE &&
  1023. !enclosed_rectangle(&s->r, &rect))
  1024. return -ERANGE;
  1025. s->r = rect;
  1026. spin_lock_irqsave(&fimc->slock, flags);
  1027. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1028. s->r.height);
  1029. spin_unlock_irqrestore(&fimc->slock, flags);
  1030. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1031. return 0;
  1032. }
  1033. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1034. .vidioc_querycap = fimc_vidioc_querycap_capture,
  1035. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1036. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1037. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1038. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1039. .vidioc_reqbufs = fimc_cap_reqbufs,
  1040. .vidioc_querybuf = fimc_cap_querybuf,
  1041. .vidioc_qbuf = fimc_cap_qbuf,
  1042. .vidioc_dqbuf = fimc_cap_dqbuf,
  1043. .vidioc_prepare_buf = fimc_cap_prepare_buf,
  1044. .vidioc_create_bufs = fimc_cap_create_bufs,
  1045. .vidioc_streamon = fimc_cap_streamon,
  1046. .vidioc_streamoff = fimc_cap_streamoff,
  1047. .vidioc_g_selection = fimc_cap_g_selection,
  1048. .vidioc_s_selection = fimc_cap_s_selection,
  1049. .vidioc_enum_input = fimc_cap_enum_input,
  1050. .vidioc_s_input = fimc_cap_s_input,
  1051. .vidioc_g_input = fimc_cap_g_input,
  1052. };
  1053. /* Capture subdev media entity operations */
  1054. static int fimc_link_setup(struct media_entity *entity,
  1055. const struct media_pad *local,
  1056. const struct media_pad *remote, u32 flags)
  1057. {
  1058. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1059. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1060. if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  1061. return -EINVAL;
  1062. if (WARN_ON(fimc == NULL))
  1063. return 0;
  1064. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1065. local->entity->name, remote->entity->name, flags,
  1066. fimc->vid_cap.input);
  1067. if (flags & MEDIA_LNK_FL_ENABLED) {
  1068. if (fimc->vid_cap.input != 0)
  1069. return -EBUSY;
  1070. fimc->vid_cap.input = sd->grp_id;
  1071. return 0;
  1072. }
  1073. fimc->vid_cap.input = 0;
  1074. return 0;
  1075. }
  1076. static const struct media_entity_operations fimc_sd_media_ops = {
  1077. .link_setup = fimc_link_setup,
  1078. };
  1079. /**
  1080. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1081. * @sd: pointer to a subdev generating the notification
  1082. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1083. * @arg: pointer to an u32 type integer that stores the frame payload value
  1084. *
  1085. * The End Of Frame notification sent by sensor subdev in its still capture
  1086. * mode. If there is only a single VSYNC generated by the sensor at the
  1087. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1088. * (end of frame) interrupt. And this notification is used to complete the
  1089. * frame capture and returning a buffer to user-space. Subdev drivers should
  1090. * call this notification from their last 'End of frame capture' interrupt.
  1091. */
  1092. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1093. void *arg)
  1094. {
  1095. struct fimc_sensor_info *sensor;
  1096. struct fimc_vid_buffer *buf;
  1097. struct fimc_md *fmd;
  1098. struct fimc_dev *fimc;
  1099. unsigned long flags;
  1100. if (sd == NULL)
  1101. return;
  1102. sensor = v4l2_get_subdev_hostdata(sd);
  1103. fmd = entity_to_fimc_mdev(&sd->entity);
  1104. spin_lock_irqsave(&fmd->slock, flags);
  1105. fimc = sensor ? sensor->host : NULL;
  1106. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1107. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1108. unsigned long irq_flags;
  1109. spin_lock_irqsave(&fimc->slock, irq_flags);
  1110. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1111. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1112. struct fimc_vid_buffer, list);
  1113. vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
  1114. }
  1115. fimc_capture_irq_handler(fimc, 1);
  1116. fimc_deactivate_capture(fimc);
  1117. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1118. }
  1119. spin_unlock_irqrestore(&fmd->slock, flags);
  1120. }
  1121. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1122. struct v4l2_subdev_fh *fh,
  1123. struct v4l2_subdev_mbus_code_enum *code)
  1124. {
  1125. struct fimc_fmt *fmt;
  1126. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1127. if (!fmt)
  1128. return -EINVAL;
  1129. code->code = fmt->mbus_code;
  1130. return 0;
  1131. }
  1132. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1133. struct v4l2_subdev_fh *fh,
  1134. struct v4l2_subdev_format *fmt)
  1135. {
  1136. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1137. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1138. struct v4l2_mbus_framefmt *mf;
  1139. struct fimc_frame *ff;
  1140. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1141. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1142. fmt->format = *mf;
  1143. return 0;
  1144. }
  1145. mf = &fmt->format;
  1146. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1147. ff = fmt->pad == FIMC_SD_PAD_SINK ? &ctx->s_frame : &ctx->d_frame;
  1148. mutex_lock(&fimc->lock);
  1149. /* The pixel code is same on both input and output pad */
  1150. if (!WARN_ON(ctx->s_frame.fmt == NULL))
  1151. mf->code = ctx->s_frame.fmt->mbus_code;
  1152. mf->width = ff->f_width;
  1153. mf->height = ff->f_height;
  1154. mutex_unlock(&fimc->lock);
  1155. return 0;
  1156. }
  1157. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1158. struct v4l2_subdev_fh *fh,
  1159. struct v4l2_subdev_format *fmt)
  1160. {
  1161. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1162. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1163. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1164. struct fimc_frame *ff;
  1165. struct fimc_fmt *ffmt;
  1166. dbg("pad%d: code: 0x%x, %dx%d",
  1167. fmt->pad, mf->code, mf->width, mf->height);
  1168. if (fmt->pad == FIMC_SD_PAD_SOURCE &&
  1169. vb2_is_busy(&fimc->vid_cap.vbq))
  1170. return -EBUSY;
  1171. mutex_lock(&fimc->lock);
  1172. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1173. &mf->code, NULL, fmt->pad);
  1174. mutex_unlock(&fimc->lock);
  1175. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1176. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1177. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1178. *mf = fmt->format;
  1179. return 0;
  1180. }
  1181. /* Update RGB Alpha control state and value range */
  1182. fimc_alpha_ctrl_update(ctx);
  1183. fimc_capture_mark_jpeg_xfer(ctx, fimc_fmt_is_jpeg(ffmt->color));
  1184. ff = fmt->pad == FIMC_SD_PAD_SINK ?
  1185. &ctx->s_frame : &ctx->d_frame;
  1186. mutex_lock(&fimc->lock);
  1187. set_frame_bounds(ff, mf->width, mf->height);
  1188. fimc->vid_cap.mf = *mf;
  1189. ff->fmt = ffmt;
  1190. /* Reset the crop rectangle if required. */
  1191. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1192. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1193. if (fmt->pad == FIMC_SD_PAD_SINK)
  1194. ctx->state &= ~FIMC_COMPOSE;
  1195. mutex_unlock(&fimc->lock);
  1196. return 0;
  1197. }
  1198. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1199. struct v4l2_subdev_fh *fh,
  1200. struct v4l2_subdev_selection *sel)
  1201. {
  1202. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1203. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1204. struct fimc_frame *f = &ctx->s_frame;
  1205. struct v4l2_rect *r = &sel->r;
  1206. struct v4l2_rect *try_sel;
  1207. if (sel->pad != FIMC_SD_PAD_SINK)
  1208. return -EINVAL;
  1209. mutex_lock(&fimc->lock);
  1210. switch (sel->target) {
  1211. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1212. f = &ctx->d_frame;
  1213. case V4L2_SEL_TGT_CROP_BOUNDS:
  1214. r->width = f->o_width;
  1215. r->height = f->o_height;
  1216. r->left = 0;
  1217. r->top = 0;
  1218. mutex_unlock(&fimc->lock);
  1219. return 0;
  1220. case V4L2_SEL_TGT_CROP:
  1221. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1222. break;
  1223. case V4L2_SEL_TGT_COMPOSE:
  1224. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1225. f = &ctx->d_frame;
  1226. break;
  1227. default:
  1228. mutex_unlock(&fimc->lock);
  1229. return -EINVAL;
  1230. }
  1231. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1232. sel->r = *try_sel;
  1233. } else {
  1234. r->left = f->offs_h;
  1235. r->top = f->offs_v;
  1236. r->width = f->width;
  1237. r->height = f->height;
  1238. }
  1239. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1240. sel->pad, r->left, r->top, r->width, r->height,
  1241. f->f_width, f->f_height);
  1242. mutex_unlock(&fimc->lock);
  1243. return 0;
  1244. }
  1245. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1246. struct v4l2_subdev_fh *fh,
  1247. struct v4l2_subdev_selection *sel)
  1248. {
  1249. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1250. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1251. struct fimc_frame *f = &ctx->s_frame;
  1252. struct v4l2_rect *r = &sel->r;
  1253. struct v4l2_rect *try_sel;
  1254. unsigned long flags;
  1255. if (sel->pad != FIMC_SD_PAD_SINK)
  1256. return -EINVAL;
  1257. mutex_lock(&fimc->lock);
  1258. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1259. switch (sel->target) {
  1260. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1261. f = &ctx->d_frame;
  1262. case V4L2_SEL_TGT_CROP_BOUNDS:
  1263. r->width = f->o_width;
  1264. r->height = f->o_height;
  1265. r->left = 0;
  1266. r->top = 0;
  1267. mutex_unlock(&fimc->lock);
  1268. return 0;
  1269. case V4L2_SEL_TGT_CROP:
  1270. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1271. break;
  1272. case V4L2_SEL_TGT_COMPOSE:
  1273. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1274. f = &ctx->d_frame;
  1275. break;
  1276. default:
  1277. mutex_unlock(&fimc->lock);
  1278. return -EINVAL;
  1279. }
  1280. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1281. *try_sel = sel->r;
  1282. } else {
  1283. spin_lock_irqsave(&fimc->slock, flags);
  1284. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1285. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1286. spin_unlock_irqrestore(&fimc->slock, flags);
  1287. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1288. ctx->state |= FIMC_COMPOSE;
  1289. }
  1290. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1291. r->width, r->height);
  1292. mutex_unlock(&fimc->lock);
  1293. return 0;
  1294. }
  1295. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1296. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1297. .get_selection = fimc_subdev_get_selection,
  1298. .set_selection = fimc_subdev_set_selection,
  1299. .get_fmt = fimc_subdev_get_fmt,
  1300. .set_fmt = fimc_subdev_set_fmt,
  1301. };
  1302. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1303. .pad = &fimc_subdev_pad_ops,
  1304. };
  1305. /* Set default format at the sensor and host interface */
  1306. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1307. {
  1308. struct v4l2_format fmt = {
  1309. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1310. .fmt.pix_mp = {
  1311. .width = 640,
  1312. .height = 480,
  1313. .pixelformat = V4L2_PIX_FMT_YUYV,
  1314. .field = V4L2_FIELD_NONE,
  1315. .colorspace = V4L2_COLORSPACE_JPEG,
  1316. },
  1317. };
  1318. return fimc_capture_set_format(fimc, &fmt);
  1319. }
  1320. /* fimc->lock must be already initialized */
  1321. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1322. struct v4l2_device *v4l2_dev)
  1323. {
  1324. struct video_device *vfd = &fimc->vid_cap.vfd;
  1325. struct fimc_vid_cap *vid_cap;
  1326. struct fimc_ctx *ctx;
  1327. struct vb2_queue *q;
  1328. int ret = -ENOMEM;
  1329. ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
  1330. if (!ctx)
  1331. return -ENOMEM;
  1332. ctx->fimc_dev = fimc;
  1333. ctx->in_path = FIMC_IO_CAMERA;
  1334. ctx->out_path = FIMC_IO_DMA;
  1335. ctx->state = FIMC_CTX_CAP;
  1336. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1337. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1338. memset(vfd, 0, sizeof(*vfd));
  1339. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1340. vfd->fops = &fimc_capture_fops;
  1341. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1342. vfd->v4l2_dev = v4l2_dev;
  1343. vfd->minor = -1;
  1344. vfd->release = video_device_release_empty;
  1345. vfd->lock = &fimc->lock;
  1346. video_set_drvdata(vfd, fimc);
  1347. vid_cap = &fimc->vid_cap;
  1348. vid_cap->active_buf_cnt = 0;
  1349. vid_cap->reqbufs_count = 0;
  1350. vid_cap->refcnt = 0;
  1351. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1352. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1353. vid_cap->ctx = ctx;
  1354. q = &fimc->vid_cap.vbq;
  1355. memset(q, 0, sizeof(*q));
  1356. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1357. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1358. q->drv_priv = fimc->vid_cap.ctx;
  1359. q->ops = &fimc_capture_qops;
  1360. q->mem_ops = &vb2_dma_contig_memops;
  1361. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1362. vb2_queue_init(q);
  1363. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1364. ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
  1365. if (ret)
  1366. goto err_ent;
  1367. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1368. if (ret)
  1369. goto err_vd;
  1370. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1371. vfd->name, video_device_node_name(vfd));
  1372. vfd->ctrl_handler = &ctx->ctrls.handler;
  1373. return 0;
  1374. err_vd:
  1375. media_entity_cleanup(&vfd->entity);
  1376. err_ent:
  1377. kfree(ctx);
  1378. return ret;
  1379. }
  1380. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1381. {
  1382. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1383. int ret;
  1384. if (fimc == NULL)
  1385. return -ENXIO;
  1386. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1387. if (ret)
  1388. return ret;
  1389. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1390. if (ret)
  1391. fimc_unregister_m2m_device(fimc);
  1392. return ret;
  1393. }
  1394. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1395. {
  1396. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1397. if (fimc == NULL)
  1398. return;
  1399. fimc_unregister_m2m_device(fimc);
  1400. if (video_is_registered(&fimc->vid_cap.vfd)) {
  1401. video_unregister_device(&fimc->vid_cap.vfd);
  1402. media_entity_cleanup(&fimc->vid_cap.vfd.entity);
  1403. }
  1404. kfree(fimc->vid_cap.ctx);
  1405. fimc->vid_cap.ctx = NULL;
  1406. }
  1407. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1408. .registered = fimc_capture_subdev_registered,
  1409. .unregistered = fimc_capture_subdev_unregistered,
  1410. };
  1411. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1412. {
  1413. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1414. int ret;
  1415. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1416. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1417. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->pdev->id);
  1418. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1419. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1420. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1421. fimc->vid_cap.sd_pads, 0);
  1422. if (ret)
  1423. return ret;
  1424. sd->entity.ops = &fimc_sd_media_ops;
  1425. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1426. v4l2_set_subdevdata(sd, fimc);
  1427. return 0;
  1428. }
  1429. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1430. {
  1431. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1432. v4l2_device_unregister_subdev(sd);
  1433. media_entity_cleanup(&sd->entity);
  1434. v4l2_set_subdevdata(sd, NULL);
  1435. }