rtc-ds1307.c 24 KB

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  1. /*
  2. * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
  3. *
  4. * Copyright (C) 2005 James Chapman (ds1337 core)
  5. * Copyright (C) 2006 David Brownell
  6. * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/slab.h>
  15. #include <linux/i2c.h>
  16. #include <linux/string.h>
  17. #include <linux/rtc.h>
  18. #include <linux/bcd.h>
  19. /* We can't determine type by probing, but if we expect pre-Linux code
  20. * to have set the chip up as a clock (turning on the oscillator and
  21. * setting the date and time), Linux can ignore the non-clock features.
  22. * That's a natural job for a factory or repair bench.
  23. */
  24. enum ds_type {
  25. ds_1307,
  26. ds_1337,
  27. ds_1338,
  28. ds_1339,
  29. ds_1340,
  30. ds_1388,
  31. m41t00,
  32. rx_8025,
  33. // rs5c372 too? different address...
  34. };
  35. /* RTC registers don't differ much, except for the century flag */
  36. #define DS1307_REG_SECS 0x00 /* 00-59 */
  37. # define DS1307_BIT_CH 0x80
  38. # define DS1340_BIT_nEOSC 0x80
  39. #define DS1307_REG_MIN 0x01 /* 00-59 */
  40. #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
  41. # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
  42. # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
  43. # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
  44. # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
  45. #define DS1307_REG_WDAY 0x03 /* 01-07 */
  46. #define DS1307_REG_MDAY 0x04 /* 01-31 */
  47. #define DS1307_REG_MONTH 0x05 /* 01-12 */
  48. # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
  49. #define DS1307_REG_YEAR 0x06 /* 00-99 */
  50. /* Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  51. * start at 7, and they differ a LOT. Only control and status matter for
  52. * basic RTC date and time functionality; be careful using them.
  53. */
  54. #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
  55. # define DS1307_BIT_OUT 0x80
  56. # define DS1338_BIT_OSF 0x20
  57. # define DS1307_BIT_SQWE 0x10
  58. # define DS1307_BIT_RS1 0x02
  59. # define DS1307_BIT_RS0 0x01
  60. #define DS1337_REG_CONTROL 0x0e
  61. # define DS1337_BIT_nEOSC 0x80
  62. # define DS1339_BIT_BBSQI 0x20
  63. # define DS1337_BIT_RS2 0x10
  64. # define DS1337_BIT_RS1 0x08
  65. # define DS1337_BIT_INTCN 0x04
  66. # define DS1337_BIT_A2IE 0x02
  67. # define DS1337_BIT_A1IE 0x01
  68. #define DS1340_REG_CONTROL 0x07
  69. # define DS1340_BIT_OUT 0x80
  70. # define DS1340_BIT_FT 0x40
  71. # define DS1340_BIT_CALIB_SIGN 0x20
  72. # define DS1340_M_CALIBRATION 0x1f
  73. #define DS1340_REG_FLAG 0x09
  74. # define DS1340_BIT_OSF 0x80
  75. #define DS1337_REG_STATUS 0x0f
  76. # define DS1337_BIT_OSF 0x80
  77. # define DS1337_BIT_A2I 0x02
  78. # define DS1337_BIT_A1I 0x01
  79. #define DS1339_REG_ALARM1_SECS 0x07
  80. #define DS1339_REG_TRICKLE 0x10
  81. #define RX8025_REG_CTRL1 0x0e
  82. # define RX8025_BIT_2412 0x20
  83. #define RX8025_REG_CTRL2 0x0f
  84. # define RX8025_BIT_PON 0x10
  85. # define RX8025_BIT_VDET 0x40
  86. # define RX8025_BIT_XST 0x20
  87. struct ds1307 {
  88. u8 offset; /* register's offset */
  89. u8 regs[11];
  90. enum ds_type type;
  91. unsigned long flags;
  92. #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
  93. #define HAS_ALARM 1 /* bit 1 == irq claimed */
  94. struct i2c_client *client;
  95. struct rtc_device *rtc;
  96. struct work_struct work;
  97. s32 (*read_block_data)(struct i2c_client *client, u8 command,
  98. u8 length, u8 *values);
  99. s32 (*write_block_data)(struct i2c_client *client, u8 command,
  100. u8 length, const u8 *values);
  101. };
  102. struct chip_desc {
  103. unsigned nvram56:1;
  104. unsigned alarm:1;
  105. };
  106. static const struct chip_desc chips[] = {
  107. [ds_1307] = {
  108. .nvram56 = 1,
  109. },
  110. [ds_1337] = {
  111. .alarm = 1,
  112. },
  113. [ds_1338] = {
  114. .nvram56 = 1,
  115. },
  116. [ds_1339] = {
  117. .alarm = 1,
  118. },
  119. [ds_1340] = {
  120. },
  121. [m41t00] = {
  122. },
  123. [rx_8025] = {
  124. }, };
  125. static const struct i2c_device_id ds1307_id[] = {
  126. { "ds1307", ds_1307 },
  127. { "ds1337", ds_1337 },
  128. { "ds1338", ds_1338 },
  129. { "ds1339", ds_1339 },
  130. { "ds1388", ds_1388 },
  131. { "ds1340", ds_1340 },
  132. { "m41t00", m41t00 },
  133. { "rx8025", rx_8025 },
  134. { }
  135. };
  136. MODULE_DEVICE_TABLE(i2c, ds1307_id);
  137. /*----------------------------------------------------------------------*/
  138. #define BLOCK_DATA_MAX_TRIES 10
  139. static s32 ds1307_read_block_data_once(struct i2c_client *client, u8 command,
  140. u8 length, u8 *values)
  141. {
  142. s32 i, data;
  143. for (i = 0; i < length; i++) {
  144. data = i2c_smbus_read_byte_data(client, command + i);
  145. if (data < 0)
  146. return data;
  147. values[i] = data;
  148. }
  149. return i;
  150. }
  151. static s32 ds1307_read_block_data(struct i2c_client *client, u8 command,
  152. u8 length, u8 *values)
  153. {
  154. u8 oldvalues[I2C_SMBUS_BLOCK_MAX];
  155. s32 ret;
  156. int tries = 0;
  157. dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
  158. ret = ds1307_read_block_data_once(client, command, length, values);
  159. if (ret < 0)
  160. return ret;
  161. do {
  162. if (++tries > BLOCK_DATA_MAX_TRIES) {
  163. dev_err(&client->dev,
  164. "ds1307_read_block_data failed\n");
  165. return -EIO;
  166. }
  167. memcpy(oldvalues, values, length);
  168. ret = ds1307_read_block_data_once(client, command, length,
  169. values);
  170. if (ret < 0)
  171. return ret;
  172. } while (memcmp(oldvalues, values, length));
  173. return length;
  174. }
  175. static s32 ds1307_write_block_data(struct i2c_client *client, u8 command,
  176. u8 length, const u8 *values)
  177. {
  178. u8 currvalues[I2C_SMBUS_BLOCK_MAX];
  179. int tries = 0;
  180. dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
  181. do {
  182. s32 i, ret;
  183. if (++tries > BLOCK_DATA_MAX_TRIES) {
  184. dev_err(&client->dev,
  185. "ds1307_write_block_data failed\n");
  186. return -EIO;
  187. }
  188. for (i = 0; i < length; i++) {
  189. ret = i2c_smbus_write_byte_data(client, command + i,
  190. values[i]);
  191. if (ret < 0)
  192. return ret;
  193. }
  194. ret = ds1307_read_block_data_once(client, command, length,
  195. currvalues);
  196. if (ret < 0)
  197. return ret;
  198. } while (memcmp(currvalues, values, length));
  199. return length;
  200. }
  201. /*----------------------------------------------------------------------*/
  202. /*
  203. * The IRQ logic includes a "real" handler running in IRQ context just
  204. * long enough to schedule this workqueue entry. We need a task context
  205. * to talk to the RTC, since I2C I/O calls require that; and disable the
  206. * IRQ until we clear its status on the chip, so that this handler can
  207. * work with any type of triggering (not just falling edge).
  208. *
  209. * The ds1337 and ds1339 both have two alarms, but we only use the first
  210. * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
  211. * signal; ds1339 chips have only one alarm signal.
  212. */
  213. static void ds1307_work(struct work_struct *work)
  214. {
  215. struct ds1307 *ds1307;
  216. struct i2c_client *client;
  217. struct mutex *lock;
  218. int stat, control;
  219. ds1307 = container_of(work, struct ds1307, work);
  220. client = ds1307->client;
  221. lock = &ds1307->rtc->ops_lock;
  222. mutex_lock(lock);
  223. stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
  224. if (stat < 0)
  225. goto out;
  226. if (stat & DS1337_BIT_A1I) {
  227. stat &= ~DS1337_BIT_A1I;
  228. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
  229. control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  230. if (control < 0)
  231. goto out;
  232. control &= ~DS1337_BIT_A1IE;
  233. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
  234. /* rtc_update_irq() assumes that it is called
  235. * from IRQ-disabled context.
  236. */
  237. local_irq_disable();
  238. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  239. local_irq_enable();
  240. }
  241. out:
  242. if (test_bit(HAS_ALARM, &ds1307->flags))
  243. enable_irq(client->irq);
  244. mutex_unlock(lock);
  245. }
  246. static irqreturn_t ds1307_irq(int irq, void *dev_id)
  247. {
  248. struct i2c_client *client = dev_id;
  249. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  250. disable_irq_nosync(irq);
  251. schedule_work(&ds1307->work);
  252. return IRQ_HANDLED;
  253. }
  254. /*----------------------------------------------------------------------*/
  255. static int ds1307_get_time(struct device *dev, struct rtc_time *t)
  256. {
  257. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  258. int tmp;
  259. /* read the RTC date and time registers all at once */
  260. tmp = ds1307->read_block_data(ds1307->client,
  261. ds1307->offset, 7, ds1307->regs);
  262. if (tmp != 7) {
  263. dev_err(dev, "%s error %d\n", "read", tmp);
  264. return -EIO;
  265. }
  266. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  267. "read",
  268. ds1307->regs[0], ds1307->regs[1],
  269. ds1307->regs[2], ds1307->regs[3],
  270. ds1307->regs[4], ds1307->regs[5],
  271. ds1307->regs[6]);
  272. t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
  273. t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
  274. tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
  275. t->tm_hour = bcd2bin(tmp);
  276. t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
  277. t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
  278. tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
  279. t->tm_mon = bcd2bin(tmp) - 1;
  280. /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
  281. t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
  282. dev_dbg(dev, "%s secs=%d, mins=%d, "
  283. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  284. "read", t->tm_sec, t->tm_min,
  285. t->tm_hour, t->tm_mday,
  286. t->tm_mon, t->tm_year, t->tm_wday);
  287. /* initial clock setting can be undefined */
  288. return rtc_valid_tm(t);
  289. }
  290. static int ds1307_set_time(struct device *dev, struct rtc_time *t)
  291. {
  292. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  293. int result;
  294. int tmp;
  295. u8 *buf = ds1307->regs;
  296. dev_dbg(dev, "%s secs=%d, mins=%d, "
  297. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  298. "write", t->tm_sec, t->tm_min,
  299. t->tm_hour, t->tm_mday,
  300. t->tm_mon, t->tm_year, t->tm_wday);
  301. buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
  302. buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
  303. buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
  304. buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
  305. buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
  306. buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
  307. /* assume 20YY not 19YY */
  308. tmp = t->tm_year - 100;
  309. buf[DS1307_REG_YEAR] = bin2bcd(tmp);
  310. switch (ds1307->type) {
  311. case ds_1337:
  312. case ds_1339:
  313. buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
  314. break;
  315. case ds_1340:
  316. buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
  317. | DS1340_BIT_CENTURY;
  318. break;
  319. default:
  320. break;
  321. }
  322. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  323. "write", buf[0], buf[1], buf[2], buf[3],
  324. buf[4], buf[5], buf[6]);
  325. result = ds1307->write_block_data(ds1307->client,
  326. ds1307->offset, 7, buf);
  327. if (result < 0) {
  328. dev_err(dev, "%s error %d\n", "write", result);
  329. return result;
  330. }
  331. return 0;
  332. }
  333. static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  334. {
  335. struct i2c_client *client = to_i2c_client(dev);
  336. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  337. int ret;
  338. if (!test_bit(HAS_ALARM, &ds1307->flags))
  339. return -EINVAL;
  340. /* read all ALARM1, ALARM2, and status registers at once */
  341. ret = ds1307->read_block_data(client,
  342. DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
  343. if (ret != 9) {
  344. dev_err(dev, "%s error %d\n", "alarm read", ret);
  345. return -EIO;
  346. }
  347. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  348. "alarm read",
  349. ds1307->regs[0], ds1307->regs[1],
  350. ds1307->regs[2], ds1307->regs[3],
  351. ds1307->regs[4], ds1307->regs[5],
  352. ds1307->regs[6], ds1307->regs[7],
  353. ds1307->regs[8]);
  354. /* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
  355. * and that all four fields are checked matches
  356. */
  357. t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
  358. t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
  359. t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
  360. t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
  361. t->time.tm_mon = -1;
  362. t->time.tm_year = -1;
  363. t->time.tm_wday = -1;
  364. t->time.tm_yday = -1;
  365. t->time.tm_isdst = -1;
  366. /* ... and status */
  367. t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
  368. t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
  369. dev_dbg(dev, "%s secs=%d, mins=%d, "
  370. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  371. "alarm read", t->time.tm_sec, t->time.tm_min,
  372. t->time.tm_hour, t->time.tm_mday,
  373. t->enabled, t->pending);
  374. return 0;
  375. }
  376. static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  377. {
  378. struct i2c_client *client = to_i2c_client(dev);
  379. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  380. unsigned char *buf = ds1307->regs;
  381. u8 control, status;
  382. int ret;
  383. if (!test_bit(HAS_ALARM, &ds1307->flags))
  384. return -EINVAL;
  385. dev_dbg(dev, "%s secs=%d, mins=%d, "
  386. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  387. "alarm set", t->time.tm_sec, t->time.tm_min,
  388. t->time.tm_hour, t->time.tm_mday,
  389. t->enabled, t->pending);
  390. /* read current status of both alarms and the chip */
  391. ret = ds1307->read_block_data(client,
  392. DS1339_REG_ALARM1_SECS, 9, buf);
  393. if (ret != 9) {
  394. dev_err(dev, "%s error %d\n", "alarm write", ret);
  395. return -EIO;
  396. }
  397. control = ds1307->regs[7];
  398. status = ds1307->regs[8];
  399. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  400. "alarm set (old status)",
  401. ds1307->regs[0], ds1307->regs[1],
  402. ds1307->regs[2], ds1307->regs[3],
  403. ds1307->regs[4], ds1307->regs[5],
  404. ds1307->regs[6], control, status);
  405. /* set ALARM1, using 24 hour and day-of-month modes */
  406. buf[0] = bin2bcd(t->time.tm_sec);
  407. buf[1] = bin2bcd(t->time.tm_min);
  408. buf[2] = bin2bcd(t->time.tm_hour);
  409. buf[3] = bin2bcd(t->time.tm_mday);
  410. /* set ALARM2 to non-garbage */
  411. buf[4] = 0;
  412. buf[5] = 0;
  413. buf[6] = 0;
  414. /* optionally enable ALARM1 */
  415. buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
  416. if (t->enabled) {
  417. dev_dbg(dev, "alarm IRQ armed\n");
  418. buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
  419. }
  420. buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
  421. ret = ds1307->write_block_data(client,
  422. DS1339_REG_ALARM1_SECS, 9, buf);
  423. if (ret < 0) {
  424. dev_err(dev, "can't set alarm time\n");
  425. return ret;
  426. }
  427. return 0;
  428. }
  429. static int ds1307_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  430. {
  431. struct i2c_client *client = to_i2c_client(dev);
  432. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  433. int ret;
  434. switch (cmd) {
  435. case RTC_AIE_OFF:
  436. if (!test_bit(HAS_ALARM, &ds1307->flags))
  437. return -ENOTTY;
  438. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  439. if (ret < 0)
  440. return ret;
  441. ret &= ~DS1337_BIT_A1IE;
  442. ret = i2c_smbus_write_byte_data(client,
  443. DS1337_REG_CONTROL, ret);
  444. if (ret < 0)
  445. return ret;
  446. break;
  447. case RTC_AIE_ON:
  448. if (!test_bit(HAS_ALARM, &ds1307->flags))
  449. return -ENOTTY;
  450. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  451. if (ret < 0)
  452. return ret;
  453. ret |= DS1337_BIT_A1IE;
  454. ret = i2c_smbus_write_byte_data(client,
  455. DS1337_REG_CONTROL, ret);
  456. if (ret < 0)
  457. return ret;
  458. break;
  459. default:
  460. return -ENOIOCTLCMD;
  461. }
  462. return 0;
  463. }
  464. static const struct rtc_class_ops ds13xx_rtc_ops = {
  465. .read_time = ds1307_get_time,
  466. .set_time = ds1307_set_time,
  467. .read_alarm = ds1337_read_alarm,
  468. .set_alarm = ds1337_set_alarm,
  469. .ioctl = ds1307_ioctl,
  470. };
  471. /*----------------------------------------------------------------------*/
  472. #define NVRAM_SIZE 56
  473. static ssize_t
  474. ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
  475. char *buf, loff_t off, size_t count)
  476. {
  477. struct i2c_client *client;
  478. struct ds1307 *ds1307;
  479. int result;
  480. client = kobj_to_i2c_client(kobj);
  481. ds1307 = i2c_get_clientdata(client);
  482. if (unlikely(off >= NVRAM_SIZE))
  483. return 0;
  484. if ((off + count) > NVRAM_SIZE)
  485. count = NVRAM_SIZE - off;
  486. if (unlikely(!count))
  487. return count;
  488. result = ds1307->read_block_data(client, 8 + off, count, buf);
  489. if (result < 0)
  490. dev_err(&client->dev, "%s error %d\n", "nvram read", result);
  491. return result;
  492. }
  493. static ssize_t
  494. ds1307_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
  495. char *buf, loff_t off, size_t count)
  496. {
  497. struct i2c_client *client;
  498. struct ds1307 *ds1307;
  499. int result;
  500. client = kobj_to_i2c_client(kobj);
  501. ds1307 = i2c_get_clientdata(client);
  502. if (unlikely(off >= NVRAM_SIZE))
  503. return -EFBIG;
  504. if ((off + count) > NVRAM_SIZE)
  505. count = NVRAM_SIZE - off;
  506. if (unlikely(!count))
  507. return count;
  508. result = ds1307->write_block_data(client, 8 + off, count, buf);
  509. if (result < 0) {
  510. dev_err(&client->dev, "%s error %d\n", "nvram write", result);
  511. return result;
  512. }
  513. return count;
  514. }
  515. static struct bin_attribute nvram = {
  516. .attr = {
  517. .name = "nvram",
  518. .mode = S_IRUGO | S_IWUSR,
  519. },
  520. .read = ds1307_nvram_read,
  521. .write = ds1307_nvram_write,
  522. .size = NVRAM_SIZE,
  523. };
  524. /*----------------------------------------------------------------------*/
  525. static struct i2c_driver ds1307_driver;
  526. static int __devinit ds1307_probe(struct i2c_client *client,
  527. const struct i2c_device_id *id)
  528. {
  529. struct ds1307 *ds1307;
  530. int err = -ENODEV;
  531. int tmp;
  532. const struct chip_desc *chip = &chips[id->driver_data];
  533. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  534. int want_irq = false;
  535. unsigned char *buf;
  536. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
  537. && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  538. return -EIO;
  539. if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL)))
  540. return -ENOMEM;
  541. i2c_set_clientdata(client, ds1307);
  542. ds1307->client = client;
  543. ds1307->type = id->driver_data;
  544. ds1307->offset = 0;
  545. buf = ds1307->regs;
  546. if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
  547. ds1307->read_block_data = i2c_smbus_read_i2c_block_data;
  548. ds1307->write_block_data = i2c_smbus_write_i2c_block_data;
  549. } else {
  550. ds1307->read_block_data = ds1307_read_block_data;
  551. ds1307->write_block_data = ds1307_write_block_data;
  552. }
  553. switch (ds1307->type) {
  554. case ds_1337:
  555. case ds_1339:
  556. /* has IRQ? */
  557. if (ds1307->client->irq > 0 && chip->alarm) {
  558. INIT_WORK(&ds1307->work, ds1307_work);
  559. want_irq = true;
  560. }
  561. /* get registers that the "rtc" read below won't read... */
  562. tmp = ds1307->read_block_data(ds1307->client,
  563. DS1337_REG_CONTROL, 2, buf);
  564. if (tmp != 2) {
  565. pr_debug("read error %d\n", tmp);
  566. err = -EIO;
  567. goto exit_free;
  568. }
  569. /* oscillator off? turn it on, so clock can tick. */
  570. if (ds1307->regs[0] & DS1337_BIT_nEOSC)
  571. ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
  572. /* Using IRQ? Disable the square wave and both alarms.
  573. * For ds1339, be sure alarms can trigger when we're
  574. * running on Vbackup (BBSQI); we assume ds1337 will
  575. * ignore that bit
  576. */
  577. if (want_irq) {
  578. ds1307->regs[0] |= DS1337_BIT_INTCN | DS1339_BIT_BBSQI;
  579. ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
  580. }
  581. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
  582. ds1307->regs[0]);
  583. /* oscillator fault? clear flag, and warn */
  584. if (ds1307->regs[1] & DS1337_BIT_OSF) {
  585. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
  586. ds1307->regs[1] & ~DS1337_BIT_OSF);
  587. dev_warn(&client->dev, "SET TIME!\n");
  588. }
  589. break;
  590. case rx_8025:
  591. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  592. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  593. if (tmp != 2) {
  594. pr_debug("read error %d\n", tmp);
  595. err = -EIO;
  596. goto exit_free;
  597. }
  598. /* oscillator off? turn it on, so clock can tick. */
  599. if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
  600. ds1307->regs[1] |= RX8025_BIT_XST;
  601. i2c_smbus_write_byte_data(client,
  602. RX8025_REG_CTRL2 << 4 | 0x08,
  603. ds1307->regs[1]);
  604. dev_warn(&client->dev,
  605. "oscillator stop detected - SET TIME!\n");
  606. }
  607. if (ds1307->regs[1] & RX8025_BIT_PON) {
  608. ds1307->regs[1] &= ~RX8025_BIT_PON;
  609. i2c_smbus_write_byte_data(client,
  610. RX8025_REG_CTRL2 << 4 | 0x08,
  611. ds1307->regs[1]);
  612. dev_warn(&client->dev, "power-on detected\n");
  613. }
  614. if (ds1307->regs[1] & RX8025_BIT_VDET) {
  615. ds1307->regs[1] &= ~RX8025_BIT_VDET;
  616. i2c_smbus_write_byte_data(client,
  617. RX8025_REG_CTRL2 << 4 | 0x08,
  618. ds1307->regs[1]);
  619. dev_warn(&client->dev, "voltage drop detected\n");
  620. }
  621. /* make sure we are running in 24hour mode */
  622. if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
  623. u8 hour;
  624. /* switch to 24 hour mode */
  625. i2c_smbus_write_byte_data(client,
  626. RX8025_REG_CTRL1 << 4 | 0x08,
  627. ds1307->regs[0] |
  628. RX8025_BIT_2412);
  629. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  630. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  631. if (tmp != 2) {
  632. pr_debug("read error %d\n", tmp);
  633. err = -EIO;
  634. goto exit_free;
  635. }
  636. /* correct hour */
  637. hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
  638. if (hour == 12)
  639. hour = 0;
  640. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  641. hour += 12;
  642. i2c_smbus_write_byte_data(client,
  643. DS1307_REG_HOUR << 4 | 0x08,
  644. hour);
  645. }
  646. break;
  647. case ds_1388:
  648. ds1307->offset = 1; /* Seconds starts at 1 */
  649. break;
  650. default:
  651. break;
  652. }
  653. read_rtc:
  654. /* read RTC registers */
  655. tmp = ds1307->read_block_data(ds1307->client, 0, 8, buf);
  656. if (tmp != 8) {
  657. pr_debug("read error %d\n", tmp);
  658. err = -EIO;
  659. goto exit_free;
  660. }
  661. /* minimal sanity checking; some chips (like DS1340) don't
  662. * specify the extra bits as must-be-zero, but there are
  663. * still a few values that are clearly out-of-range.
  664. */
  665. tmp = ds1307->regs[DS1307_REG_SECS];
  666. switch (ds1307->type) {
  667. case ds_1307:
  668. case m41t00:
  669. /* clock halted? turn it on, so clock can tick. */
  670. if (tmp & DS1307_BIT_CH) {
  671. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  672. dev_warn(&client->dev, "SET TIME!\n");
  673. goto read_rtc;
  674. }
  675. break;
  676. case ds_1338:
  677. /* clock halted? turn it on, so clock can tick. */
  678. if (tmp & DS1307_BIT_CH)
  679. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  680. /* oscillator fault? clear flag, and warn */
  681. if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
  682. i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
  683. ds1307->regs[DS1307_REG_CONTROL]
  684. & ~DS1338_BIT_OSF);
  685. dev_warn(&client->dev, "SET TIME!\n");
  686. goto read_rtc;
  687. }
  688. break;
  689. case ds_1340:
  690. /* clock halted? turn it on, so clock can tick. */
  691. if (tmp & DS1340_BIT_nEOSC)
  692. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  693. tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
  694. if (tmp < 0) {
  695. pr_debug("read error %d\n", tmp);
  696. err = -EIO;
  697. goto exit_free;
  698. }
  699. /* oscillator fault? clear flag, and warn */
  700. if (tmp & DS1340_BIT_OSF) {
  701. i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
  702. dev_warn(&client->dev, "SET TIME!\n");
  703. }
  704. break;
  705. case rx_8025:
  706. case ds_1337:
  707. case ds_1339:
  708. case ds_1388:
  709. break;
  710. }
  711. tmp = ds1307->regs[DS1307_REG_HOUR];
  712. switch (ds1307->type) {
  713. case ds_1340:
  714. case m41t00:
  715. /* NOTE: ignores century bits; fix before deploying
  716. * systems that will run through year 2100.
  717. */
  718. break;
  719. case rx_8025:
  720. break;
  721. default:
  722. if (!(tmp & DS1307_BIT_12HR))
  723. break;
  724. /* Be sure we're in 24 hour mode. Multi-master systems
  725. * take note...
  726. */
  727. tmp = bcd2bin(tmp & 0x1f);
  728. if (tmp == 12)
  729. tmp = 0;
  730. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  731. tmp += 12;
  732. i2c_smbus_write_byte_data(client,
  733. DS1307_REG_HOUR,
  734. bin2bcd(tmp));
  735. }
  736. ds1307->rtc = rtc_device_register(client->name, &client->dev,
  737. &ds13xx_rtc_ops, THIS_MODULE);
  738. if (IS_ERR(ds1307->rtc)) {
  739. err = PTR_ERR(ds1307->rtc);
  740. dev_err(&client->dev,
  741. "unable to register the class device\n");
  742. goto exit_free;
  743. }
  744. if (want_irq) {
  745. err = request_irq(client->irq, ds1307_irq, 0,
  746. ds1307->rtc->name, client);
  747. if (err) {
  748. dev_err(&client->dev,
  749. "unable to request IRQ!\n");
  750. goto exit_irq;
  751. }
  752. set_bit(HAS_ALARM, &ds1307->flags);
  753. dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
  754. }
  755. if (chip->nvram56) {
  756. err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
  757. if (err == 0) {
  758. set_bit(HAS_NVRAM, &ds1307->flags);
  759. dev_info(&client->dev, "56 bytes nvram\n");
  760. }
  761. }
  762. return 0;
  763. exit_irq:
  764. if (ds1307->rtc)
  765. rtc_device_unregister(ds1307->rtc);
  766. exit_free:
  767. kfree(ds1307);
  768. return err;
  769. }
  770. static int __devexit ds1307_remove(struct i2c_client *client)
  771. {
  772. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  773. if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
  774. free_irq(client->irq, client);
  775. cancel_work_sync(&ds1307->work);
  776. }
  777. if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
  778. sysfs_remove_bin_file(&client->dev.kobj, &nvram);
  779. rtc_device_unregister(ds1307->rtc);
  780. kfree(ds1307);
  781. return 0;
  782. }
  783. static struct i2c_driver ds1307_driver = {
  784. .driver = {
  785. .name = "rtc-ds1307",
  786. .owner = THIS_MODULE,
  787. },
  788. .probe = ds1307_probe,
  789. .remove = __devexit_p(ds1307_remove),
  790. .id_table = ds1307_id,
  791. };
  792. static int __init ds1307_init(void)
  793. {
  794. return i2c_add_driver(&ds1307_driver);
  795. }
  796. module_init(ds1307_init);
  797. static void __exit ds1307_exit(void)
  798. {
  799. i2c_del_driver(&ds1307_driver);
  800. }
  801. module_exit(ds1307_exit);
  802. MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
  803. MODULE_LICENSE("GPL");