commsup.c 44 KB

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  1. /*
  2. * Adaptec AAC series RAID controller driver
  3. * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com>
  4. *
  5. * based on the old aacraid driver that is..
  6. * Adaptec aacraid device driver for Linux.
  7. *
  8. * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com)
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2, or (at your option)
  13. * any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; see the file COPYING. If not, write to
  22. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. * Module Name:
  25. * commsup.c
  26. *
  27. * Abstract: Contain all routines that are required for FSA host/adapter
  28. * communication.
  29. *
  30. */
  31. #include <linux/kernel.h>
  32. #include <linux/init.h>
  33. #include <linux/types.h>
  34. #include <linux/sched.h>
  35. #include <linux/pci.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/slab.h>
  38. #include <linux/completion.h>
  39. #include <linux/blkdev.h>
  40. #include <linux/delay.h>
  41. #include <linux/kthread.h>
  42. #include <linux/interrupt.h>
  43. #include <scsi/scsi.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_device.h>
  46. #include <scsi/scsi_cmnd.h>
  47. #include <asm/semaphore.h>
  48. #include "aacraid.h"
  49. /**
  50. * fib_map_alloc - allocate the fib objects
  51. * @dev: Adapter to allocate for
  52. *
  53. * Allocate and map the shared PCI space for the FIB blocks used to
  54. * talk to the Adaptec firmware.
  55. */
  56. static int fib_map_alloc(struct aac_dev *dev)
  57. {
  58. dprintk((KERN_INFO
  59. "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n",
  60. dev->pdev, dev->max_fib_size, dev->scsi_host_ptr->can_queue,
  61. AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
  62. if((dev->hw_fib_va = pci_alloc_consistent(dev->pdev, dev->max_fib_size
  63. * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB),
  64. &dev->hw_fib_pa))==NULL)
  65. return -ENOMEM;
  66. return 0;
  67. }
  68. /**
  69. * aac_fib_map_free - free the fib objects
  70. * @dev: Adapter to free
  71. *
  72. * Free the PCI mappings and the memory allocated for FIB blocks
  73. * on this adapter.
  74. */
  75. void aac_fib_map_free(struct aac_dev *dev)
  76. {
  77. pci_free_consistent(dev->pdev, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB), dev->hw_fib_va, dev->hw_fib_pa);
  78. }
  79. /**
  80. * aac_fib_setup - setup the fibs
  81. * @dev: Adapter to set up
  82. *
  83. * Allocate the PCI space for the fibs, map it and then intialise the
  84. * fib area, the unmapped fib data and also the free list
  85. */
  86. int aac_fib_setup(struct aac_dev * dev)
  87. {
  88. struct fib *fibptr;
  89. struct hw_fib *hw_fib;
  90. dma_addr_t hw_fib_pa;
  91. int i;
  92. while (((i = fib_map_alloc(dev)) == -ENOMEM)
  93. && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) {
  94. dev->init->MaxIoCommands = cpu_to_le32((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) >> 1);
  95. dev->scsi_host_ptr->can_queue = le32_to_cpu(dev->init->MaxIoCommands) - AAC_NUM_MGT_FIB;
  96. }
  97. if (i<0)
  98. return -ENOMEM;
  99. hw_fib = dev->hw_fib_va;
  100. hw_fib_pa = dev->hw_fib_pa;
  101. memset(hw_fib, 0, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB));
  102. /*
  103. * Initialise the fibs
  104. */
  105. for (i = 0, fibptr = &dev->fibs[i]; i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); i++, fibptr++)
  106. {
  107. fibptr->dev = dev;
  108. fibptr->hw_fib_va = hw_fib;
  109. fibptr->data = (void *) fibptr->hw_fib_va->data;
  110. fibptr->next = fibptr+1; /* Forward chain the fibs */
  111. init_MUTEX_LOCKED(&fibptr->event_wait);
  112. spin_lock_init(&fibptr->event_lock);
  113. hw_fib->header.XferState = cpu_to_le32(0xffffffff);
  114. hw_fib->header.SenderSize = cpu_to_le16(dev->max_fib_size);
  115. fibptr->hw_fib_pa = hw_fib_pa;
  116. hw_fib = (struct hw_fib *)((unsigned char *)hw_fib + dev->max_fib_size);
  117. hw_fib_pa = hw_fib_pa + dev->max_fib_size;
  118. }
  119. /*
  120. * Add the fib chain to the free list
  121. */
  122. dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL;
  123. /*
  124. * Enable this to debug out of queue space
  125. */
  126. dev->free_fib = &dev->fibs[0];
  127. return 0;
  128. }
  129. /**
  130. * aac_fib_alloc - allocate a fib
  131. * @dev: Adapter to allocate the fib for
  132. *
  133. * Allocate a fib from the adapter fib pool. If the pool is empty we
  134. * return NULL.
  135. */
  136. struct fib *aac_fib_alloc(struct aac_dev *dev)
  137. {
  138. struct fib * fibptr;
  139. unsigned long flags;
  140. spin_lock_irqsave(&dev->fib_lock, flags);
  141. fibptr = dev->free_fib;
  142. if(!fibptr){
  143. spin_unlock_irqrestore(&dev->fib_lock, flags);
  144. return fibptr;
  145. }
  146. dev->free_fib = fibptr->next;
  147. spin_unlock_irqrestore(&dev->fib_lock, flags);
  148. /*
  149. * Set the proper node type code and node byte size
  150. */
  151. fibptr->type = FSAFS_NTC_FIB_CONTEXT;
  152. fibptr->size = sizeof(struct fib);
  153. /*
  154. * Null out fields that depend on being zero at the start of
  155. * each I/O
  156. */
  157. fibptr->hw_fib_va->header.XferState = 0;
  158. fibptr->callback = NULL;
  159. fibptr->callback_data = NULL;
  160. return fibptr;
  161. }
  162. /**
  163. * aac_fib_free - free a fib
  164. * @fibptr: fib to free up
  165. *
  166. * Frees up a fib and places it on the appropriate queue
  167. * (either free or timed out)
  168. */
  169. void aac_fib_free(struct fib *fibptr)
  170. {
  171. unsigned long flags;
  172. spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
  173. if (fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT) {
  174. aac_config.fib_timeouts++;
  175. fibptr->next = fibptr->dev->timeout_fib;
  176. fibptr->dev->timeout_fib = fibptr;
  177. } else {
  178. if (fibptr->hw_fib_va->header.XferState != 0) {
  179. printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n",
  180. (void*)fibptr,
  181. le32_to_cpu(fibptr->hw_fib_va->header.XferState));
  182. }
  183. fibptr->next = fibptr->dev->free_fib;
  184. fibptr->dev->free_fib = fibptr;
  185. }
  186. spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags);
  187. }
  188. /**
  189. * aac_fib_init - initialise a fib
  190. * @fibptr: The fib to initialize
  191. *
  192. * Set up the generic fib fields ready for use
  193. */
  194. void aac_fib_init(struct fib *fibptr)
  195. {
  196. struct hw_fib *hw_fib = fibptr->hw_fib_va;
  197. hw_fib->header.StructType = FIB_MAGIC;
  198. hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size);
  199. hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable);
  200. hw_fib->header.SenderFibAddress = 0; /* Filled in later if needed */
  201. hw_fib->header.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
  202. hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size);
  203. }
  204. /**
  205. * fib_deallocate - deallocate a fib
  206. * @fibptr: fib to deallocate
  207. *
  208. * Will deallocate and return to the free pool the FIB pointed to by the
  209. * caller.
  210. */
  211. static void fib_dealloc(struct fib * fibptr)
  212. {
  213. struct hw_fib *hw_fib = fibptr->hw_fib_va;
  214. BUG_ON(hw_fib->header.StructType != FIB_MAGIC);
  215. hw_fib->header.XferState = 0;
  216. }
  217. /*
  218. * Commuication primitives define and support the queuing method we use to
  219. * support host to adapter commuication. All queue accesses happen through
  220. * these routines and are the only routines which have a knowledge of the
  221. * how these queues are implemented.
  222. */
  223. /**
  224. * aac_get_entry - get a queue entry
  225. * @dev: Adapter
  226. * @qid: Queue Number
  227. * @entry: Entry return
  228. * @index: Index return
  229. * @nonotify: notification control
  230. *
  231. * With a priority the routine returns a queue entry if the queue has free entries. If the queue
  232. * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is
  233. * returned.
  234. */
  235. static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify)
  236. {
  237. struct aac_queue * q;
  238. unsigned long idx;
  239. /*
  240. * All of the queues wrap when they reach the end, so we check
  241. * to see if they have reached the end and if they have we just
  242. * set the index back to zero. This is a wrap. You could or off
  243. * the high bits in all updates but this is a bit faster I think.
  244. */
  245. q = &dev->queues->queue[qid];
  246. idx = *index = le32_to_cpu(*(q->headers.producer));
  247. /* Interrupt Moderation, only interrupt for first two entries */
  248. if (idx != le32_to_cpu(*(q->headers.consumer))) {
  249. if (--idx == 0) {
  250. if (qid == AdapNormCmdQueue)
  251. idx = ADAP_NORM_CMD_ENTRIES;
  252. else
  253. idx = ADAP_NORM_RESP_ENTRIES;
  254. }
  255. if (idx != le32_to_cpu(*(q->headers.consumer)))
  256. *nonotify = 1;
  257. }
  258. if (qid == AdapNormCmdQueue) {
  259. if (*index >= ADAP_NORM_CMD_ENTRIES)
  260. *index = 0; /* Wrap to front of the Producer Queue. */
  261. } else {
  262. if (*index >= ADAP_NORM_RESP_ENTRIES)
  263. *index = 0; /* Wrap to front of the Producer Queue. */
  264. }
  265. if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { /* Queue is full */
  266. printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
  267. qid, q->numpending);
  268. return 0;
  269. } else {
  270. *entry = q->base + *index;
  271. return 1;
  272. }
  273. }
  274. /**
  275. * aac_queue_get - get the next free QE
  276. * @dev: Adapter
  277. * @index: Returned index
  278. * @priority: Priority of fib
  279. * @fib: Fib to associate with the queue entry
  280. * @wait: Wait if queue full
  281. * @fibptr: Driver fib object to go with fib
  282. * @nonotify: Don't notify the adapter
  283. *
  284. * Gets the next free QE off the requested priorty adapter command
  285. * queue and associates the Fib with the QE. The QE represented by
  286. * index is ready to insert on the queue when this routine returns
  287. * success.
  288. */
  289. int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify)
  290. {
  291. struct aac_entry * entry = NULL;
  292. int map = 0;
  293. if (qid == AdapNormCmdQueue) {
  294. /* if no entries wait for some if caller wants to */
  295. while (!aac_get_entry(dev, qid, &entry, index, nonotify))
  296. {
  297. printk(KERN_ERR "GetEntries failed\n");
  298. }
  299. /*
  300. * Setup queue entry with a command, status and fib mapped
  301. */
  302. entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
  303. map = 1;
  304. } else {
  305. while(!aac_get_entry(dev, qid, &entry, index, nonotify))
  306. {
  307. /* if no entries wait for some if caller wants to */
  308. }
  309. /*
  310. * Setup queue entry with command, status and fib mapped
  311. */
  312. entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
  313. entry->addr = hw_fib->header.SenderFibAddress;
  314. /* Restore adapters pointer to the FIB */
  315. hw_fib->header.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */
  316. map = 0;
  317. }
  318. /*
  319. * If MapFib is true than we need to map the Fib and put pointers
  320. * in the queue entry.
  321. */
  322. if (map)
  323. entry->addr = cpu_to_le32(fibptr->hw_fib_pa);
  324. return 0;
  325. }
  326. /*
  327. * Define the highest level of host to adapter communication routines.
  328. * These routines will support host to adapter FS commuication. These
  329. * routines have no knowledge of the commuication method used. This level
  330. * sends and receives FIBs. This level has no knowledge of how these FIBs
  331. * get passed back and forth.
  332. */
  333. /**
  334. * aac_fib_send - send a fib to the adapter
  335. * @command: Command to send
  336. * @fibptr: The fib
  337. * @size: Size of fib data area
  338. * @priority: Priority of Fib
  339. * @wait: Async/sync select
  340. * @reply: True if a reply is wanted
  341. * @callback: Called with reply
  342. * @callback_data: Passed to callback
  343. *
  344. * Sends the requested FIB to the adapter and optionally will wait for a
  345. * response FIB. If the caller does not wish to wait for a response than
  346. * an event to wait on must be supplied. This event will be set when a
  347. * response FIB is received from the adapter.
  348. */
  349. int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
  350. int priority, int wait, int reply, fib_callback callback,
  351. void *callback_data)
  352. {
  353. struct aac_dev * dev = fibptr->dev;
  354. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  355. unsigned long flags = 0;
  356. unsigned long qflags;
  357. if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
  358. return -EBUSY;
  359. /*
  360. * There are 5 cases with the wait and reponse requested flags.
  361. * The only invalid cases are if the caller requests to wait and
  362. * does not request a response and if the caller does not want a
  363. * response and the Fib is not allocated from pool. If a response
  364. * is not requesed the Fib will just be deallocaed by the DPC
  365. * routine when the response comes back from the adapter. No
  366. * further processing will be done besides deleting the Fib. We
  367. * will have a debug mode where the adapter can notify the host
  368. * it had a problem and the host can log that fact.
  369. */
  370. if (wait && !reply) {
  371. return -EINVAL;
  372. } else if (!wait && reply) {
  373. hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected);
  374. FIB_COUNTER_INCREMENT(aac_config.AsyncSent);
  375. } else if (!wait && !reply) {
  376. hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected);
  377. FIB_COUNTER_INCREMENT(aac_config.NoResponseSent);
  378. } else if (wait && reply) {
  379. hw_fib->header.XferState |= cpu_to_le32(ResponseExpected);
  380. FIB_COUNTER_INCREMENT(aac_config.NormalSent);
  381. }
  382. /*
  383. * Map the fib into 32bits by using the fib number
  384. */
  385. hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2);
  386. hw_fib->header.SenderData = (u32)(fibptr - dev->fibs);
  387. /*
  388. * Set FIB state to indicate where it came from and if we want a
  389. * response from the adapter. Also load the command from the
  390. * caller.
  391. *
  392. * Map the hw fib pointer as a 32bit value
  393. */
  394. hw_fib->header.Command = cpu_to_le16(command);
  395. hw_fib->header.XferState |= cpu_to_le32(SentFromHost);
  396. fibptr->hw_fib_va->header.Flags = 0; /* 0 the flags field - internal only*/
  397. /*
  398. * Set the size of the Fib we want to send to the adapter
  399. */
  400. hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size);
  401. if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) {
  402. return -EMSGSIZE;
  403. }
  404. /*
  405. * Get a queue entry connect the FIB to it and send an notify
  406. * the adapter a command is ready.
  407. */
  408. hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
  409. /*
  410. * Fill in the Callback and CallbackContext if we are not
  411. * going to wait.
  412. */
  413. if (!wait) {
  414. fibptr->callback = callback;
  415. fibptr->callback_data = callback_data;
  416. }
  417. fibptr->done = 0;
  418. fibptr->flags = 0;
  419. FIB_COUNTER_INCREMENT(aac_config.FibsSent);
  420. dprintk((KERN_DEBUG "Fib contents:.\n"));
  421. dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command)));
  422. dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command)));
  423. dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState)));
  424. dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va));
  425. dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
  426. dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
  427. if (!dev->queues)
  428. return -EBUSY;
  429. if(wait)
  430. spin_lock_irqsave(&fibptr->event_lock, flags);
  431. aac_adapter_deliver(fibptr);
  432. /*
  433. * If the caller wanted us to wait for response wait now.
  434. */
  435. if (wait) {
  436. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  437. /* Only set for first known interruptable command */
  438. if (wait < 0) {
  439. /*
  440. * *VERY* Dangerous to time out a command, the
  441. * assumption is made that we have no hope of
  442. * functioning because an interrupt routing or other
  443. * hardware failure has occurred.
  444. */
  445. unsigned long count = 36000000L; /* 3 minutes */
  446. while (down_trylock(&fibptr->event_wait)) {
  447. int blink;
  448. if (--count == 0) {
  449. struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue];
  450. spin_lock_irqsave(q->lock, qflags);
  451. q->numpending--;
  452. spin_unlock_irqrestore(q->lock, qflags);
  453. if (wait == -1) {
  454. printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n"
  455. "Usually a result of a PCI interrupt routing problem;\n"
  456. "update mother board BIOS or consider utilizing one of\n"
  457. "the SAFE mode kernel options (acpi, apic etc)\n");
  458. }
  459. return -ETIMEDOUT;
  460. }
  461. if ((blink = aac_adapter_check_health(dev)) > 0) {
  462. if (wait == -1) {
  463. printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n"
  464. "Usually a result of a serious unrecoverable hardware problem\n",
  465. blink);
  466. }
  467. return -EFAULT;
  468. }
  469. udelay(5);
  470. }
  471. } else
  472. (void)down_interruptible(&fibptr->event_wait);
  473. spin_lock_irqsave(&fibptr->event_lock, flags);
  474. if (fibptr->done == 0) {
  475. fibptr->done = 2; /* Tell interrupt we aborted */
  476. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  477. return -EINTR;
  478. }
  479. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  480. BUG_ON(fibptr->done == 0);
  481. if((fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)){
  482. return -ETIMEDOUT;
  483. } else {
  484. return 0;
  485. }
  486. }
  487. /*
  488. * If the user does not want a response than return success otherwise
  489. * return pending
  490. */
  491. if (reply)
  492. return -EINPROGRESS;
  493. else
  494. return 0;
  495. }
  496. /**
  497. * aac_consumer_get - get the top of the queue
  498. * @dev: Adapter
  499. * @q: Queue
  500. * @entry: Return entry
  501. *
  502. * Will return a pointer to the entry on the top of the queue requested that
  503. * we are a consumer of, and return the address of the queue entry. It does
  504. * not change the state of the queue.
  505. */
  506. int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry)
  507. {
  508. u32 index;
  509. int status;
  510. if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) {
  511. status = 0;
  512. } else {
  513. /*
  514. * The consumer index must be wrapped if we have reached
  515. * the end of the queue, else we just use the entry
  516. * pointed to by the header index
  517. */
  518. if (le32_to_cpu(*q->headers.consumer) >= q->entries)
  519. index = 0;
  520. else
  521. index = le32_to_cpu(*q->headers.consumer);
  522. *entry = q->base + index;
  523. status = 1;
  524. }
  525. return(status);
  526. }
  527. /**
  528. * aac_consumer_free - free consumer entry
  529. * @dev: Adapter
  530. * @q: Queue
  531. * @qid: Queue ident
  532. *
  533. * Frees up the current top of the queue we are a consumer of. If the
  534. * queue was full notify the producer that the queue is no longer full.
  535. */
  536. void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
  537. {
  538. int wasfull = 0;
  539. u32 notify;
  540. if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer))
  541. wasfull = 1;
  542. if (le32_to_cpu(*q->headers.consumer) >= q->entries)
  543. *q->headers.consumer = cpu_to_le32(1);
  544. else
  545. *q->headers.consumer = cpu_to_le32(le32_to_cpu(*q->headers.consumer)+1);
  546. if (wasfull) {
  547. switch (qid) {
  548. case HostNormCmdQueue:
  549. notify = HostNormCmdNotFull;
  550. break;
  551. case HostNormRespQueue:
  552. notify = HostNormRespNotFull;
  553. break;
  554. default:
  555. BUG();
  556. return;
  557. }
  558. aac_adapter_notify(dev, notify);
  559. }
  560. }
  561. /**
  562. * aac_fib_adapter_complete - complete adapter issued fib
  563. * @fibptr: fib to complete
  564. * @size: size of fib
  565. *
  566. * Will do all necessary work to complete a FIB that was sent from
  567. * the adapter.
  568. */
  569. int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
  570. {
  571. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  572. struct aac_dev * dev = fibptr->dev;
  573. struct aac_queue * q;
  574. unsigned long nointr = 0;
  575. unsigned long qflags;
  576. if (hw_fib->header.XferState == 0) {
  577. if (dev->comm_interface == AAC_COMM_MESSAGE)
  578. kfree (hw_fib);
  579. return 0;
  580. }
  581. /*
  582. * If we plan to do anything check the structure type first.
  583. */
  584. if ( hw_fib->header.StructType != FIB_MAGIC ) {
  585. if (dev->comm_interface == AAC_COMM_MESSAGE)
  586. kfree (hw_fib);
  587. return -EINVAL;
  588. }
  589. /*
  590. * This block handles the case where the adapter had sent us a
  591. * command and we have finished processing the command. We
  592. * call completeFib when we are done processing the command
  593. * and want to send a response back to the adapter. This will
  594. * send the completed cdb to the adapter.
  595. */
  596. if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
  597. if (dev->comm_interface == AAC_COMM_MESSAGE) {
  598. kfree (hw_fib);
  599. } else {
  600. u32 index;
  601. hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
  602. if (size) {
  603. size += sizeof(struct aac_fibhdr);
  604. if (size > le16_to_cpu(hw_fib->header.SenderSize))
  605. return -EMSGSIZE;
  606. hw_fib->header.Size = cpu_to_le16(size);
  607. }
  608. q = &dev->queues->queue[AdapNormRespQueue];
  609. spin_lock_irqsave(q->lock, qflags);
  610. aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr);
  611. *(q->headers.producer) = cpu_to_le32(index + 1);
  612. spin_unlock_irqrestore(q->lock, qflags);
  613. if (!(nointr & (int)aac_config.irq_mod))
  614. aac_adapter_notify(dev, AdapNormRespQueue);
  615. }
  616. }
  617. else
  618. {
  619. printk(KERN_WARNING "aac_fib_adapter_complete: Unknown xferstate detected.\n");
  620. BUG();
  621. }
  622. return 0;
  623. }
  624. /**
  625. * aac_fib_complete - fib completion handler
  626. * @fib: FIB to complete
  627. *
  628. * Will do all necessary work to complete a FIB.
  629. */
  630. int aac_fib_complete(struct fib *fibptr)
  631. {
  632. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  633. /*
  634. * Check for a fib which has already been completed
  635. */
  636. if (hw_fib->header.XferState == 0)
  637. return 0;
  638. /*
  639. * If we plan to do anything check the structure type first.
  640. */
  641. if (hw_fib->header.StructType != FIB_MAGIC)
  642. return -EINVAL;
  643. /*
  644. * This block completes a cdb which orginated on the host and we
  645. * just need to deallocate the cdb or reinit it. At this point the
  646. * command is complete that we had sent to the adapter and this
  647. * cdb could be reused.
  648. */
  649. if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
  650. (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
  651. {
  652. fib_dealloc(fibptr);
  653. }
  654. else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost))
  655. {
  656. /*
  657. * This handles the case when the host has aborted the I/O
  658. * to the adapter because the adapter is not responding
  659. */
  660. fib_dealloc(fibptr);
  661. } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) {
  662. fib_dealloc(fibptr);
  663. } else {
  664. BUG();
  665. }
  666. return 0;
  667. }
  668. /**
  669. * aac_printf - handle printf from firmware
  670. * @dev: Adapter
  671. * @val: Message info
  672. *
  673. * Print a message passed to us by the controller firmware on the
  674. * Adaptec board
  675. */
  676. void aac_printf(struct aac_dev *dev, u32 val)
  677. {
  678. char *cp = dev->printfbuf;
  679. if (dev->printf_enabled)
  680. {
  681. int length = val & 0xffff;
  682. int level = (val >> 16) & 0xffff;
  683. /*
  684. * The size of the printfbuf is set in port.c
  685. * There is no variable or define for it
  686. */
  687. if (length > 255)
  688. length = 255;
  689. if (cp[length] != 0)
  690. cp[length] = 0;
  691. if (level == LOG_AAC_HIGH_ERROR)
  692. printk(KERN_WARNING "%s:%s", dev->name, cp);
  693. else
  694. printk(KERN_INFO "%s:%s", dev->name, cp);
  695. }
  696. memset(cp, 0, 256);
  697. }
  698. /**
  699. * aac_handle_aif - Handle a message from the firmware
  700. * @dev: Which adapter this fib is from
  701. * @fibptr: Pointer to fibptr from adapter
  702. *
  703. * This routine handles a driver notify fib from the adapter and
  704. * dispatches it to the appropriate routine for handling.
  705. */
  706. #define AIF_SNIFF_TIMEOUT (30*HZ)
  707. static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
  708. {
  709. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  710. struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
  711. u32 container;
  712. struct scsi_device *device;
  713. enum {
  714. NOTHING,
  715. DELETE,
  716. ADD,
  717. CHANGE
  718. } device_config_needed;
  719. /* Sniff for container changes */
  720. if (!dev || !dev->fsa_dev)
  721. return;
  722. container = (u32)-1;
  723. /*
  724. * We have set this up to try and minimize the number of
  725. * re-configures that take place. As a result of this when
  726. * certain AIF's come in we will set a flag waiting for another
  727. * type of AIF before setting the re-config flag.
  728. */
  729. switch (le32_to_cpu(aifcmd->command)) {
  730. case AifCmdDriverNotify:
  731. switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) {
  732. /*
  733. * Morph or Expand complete
  734. */
  735. case AifDenMorphComplete:
  736. case AifDenVolumeExtendComplete:
  737. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  738. if (container >= dev->maximum_num_containers)
  739. break;
  740. /*
  741. * Find the scsi_device associated with the SCSI
  742. * address. Make sure we have the right array, and if
  743. * so set the flag to initiate a new re-config once we
  744. * see an AifEnConfigChange AIF come through.
  745. */
  746. if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
  747. device = scsi_device_lookup(dev->scsi_host_ptr,
  748. CONTAINER_TO_CHANNEL(container),
  749. CONTAINER_TO_ID(container),
  750. CONTAINER_TO_LUN(container));
  751. if (device) {
  752. dev->fsa_dev[container].config_needed = CHANGE;
  753. dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
  754. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  755. scsi_device_put(device);
  756. }
  757. }
  758. }
  759. /*
  760. * If we are waiting on something and this happens to be
  761. * that thing then set the re-configure flag.
  762. */
  763. if (container != (u32)-1) {
  764. if (container >= dev->maximum_num_containers)
  765. break;
  766. if ((dev->fsa_dev[container].config_waiting_on ==
  767. le32_to_cpu(*(u32 *)aifcmd->data)) &&
  768. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  769. dev->fsa_dev[container].config_waiting_on = 0;
  770. } else for (container = 0;
  771. container < dev->maximum_num_containers; ++container) {
  772. if ((dev->fsa_dev[container].config_waiting_on ==
  773. le32_to_cpu(*(u32 *)aifcmd->data)) &&
  774. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  775. dev->fsa_dev[container].config_waiting_on = 0;
  776. }
  777. break;
  778. case AifCmdEventNotify:
  779. switch (le32_to_cpu(((u32 *)aifcmd->data)[0])) {
  780. /*
  781. * Add an Array.
  782. */
  783. case AifEnAddContainer:
  784. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  785. if (container >= dev->maximum_num_containers)
  786. break;
  787. dev->fsa_dev[container].config_needed = ADD;
  788. dev->fsa_dev[container].config_waiting_on =
  789. AifEnConfigChange;
  790. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  791. break;
  792. /*
  793. * Delete an Array.
  794. */
  795. case AifEnDeleteContainer:
  796. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  797. if (container >= dev->maximum_num_containers)
  798. break;
  799. dev->fsa_dev[container].config_needed = DELETE;
  800. dev->fsa_dev[container].config_waiting_on =
  801. AifEnConfigChange;
  802. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  803. break;
  804. /*
  805. * Container change detected. If we currently are not
  806. * waiting on something else, setup to wait on a Config Change.
  807. */
  808. case AifEnContainerChange:
  809. container = le32_to_cpu(((u32 *)aifcmd->data)[1]);
  810. if (container >= dev->maximum_num_containers)
  811. break;
  812. if (dev->fsa_dev[container].config_waiting_on &&
  813. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  814. break;
  815. dev->fsa_dev[container].config_needed = CHANGE;
  816. dev->fsa_dev[container].config_waiting_on =
  817. AifEnConfigChange;
  818. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  819. break;
  820. case AifEnConfigChange:
  821. break;
  822. }
  823. /*
  824. * If we are waiting on something and this happens to be
  825. * that thing then set the re-configure flag.
  826. */
  827. if (container != (u32)-1) {
  828. if (container >= dev->maximum_num_containers)
  829. break;
  830. if ((dev->fsa_dev[container].config_waiting_on ==
  831. le32_to_cpu(*(u32 *)aifcmd->data)) &&
  832. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  833. dev->fsa_dev[container].config_waiting_on = 0;
  834. } else for (container = 0;
  835. container < dev->maximum_num_containers; ++container) {
  836. if ((dev->fsa_dev[container].config_waiting_on ==
  837. le32_to_cpu(*(u32 *)aifcmd->data)) &&
  838. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  839. dev->fsa_dev[container].config_waiting_on = 0;
  840. }
  841. break;
  842. case AifCmdJobProgress:
  843. /*
  844. * These are job progress AIF's. When a Clear is being
  845. * done on a container it is initially created then hidden from
  846. * the OS. When the clear completes we don't get a config
  847. * change so we monitor the job status complete on a clear then
  848. * wait for a container change.
  849. */
  850. if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero))
  851. && ((((u32 *)aifcmd->data)[6] == ((u32 *)aifcmd->data)[5])
  852. || (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess)))) {
  853. for (container = 0;
  854. container < dev->maximum_num_containers;
  855. ++container) {
  856. /*
  857. * Stomp on all config sequencing for all
  858. * containers?
  859. */
  860. dev->fsa_dev[container].config_waiting_on =
  861. AifEnContainerChange;
  862. dev->fsa_dev[container].config_needed = ADD;
  863. dev->fsa_dev[container].config_waiting_stamp =
  864. jiffies;
  865. }
  866. }
  867. if ((((u32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero))
  868. && (((u32 *)aifcmd->data)[6] == 0)
  869. && (((u32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning))) {
  870. for (container = 0;
  871. container < dev->maximum_num_containers;
  872. ++container) {
  873. /*
  874. * Stomp on all config sequencing for all
  875. * containers?
  876. */
  877. dev->fsa_dev[container].config_waiting_on =
  878. AifEnContainerChange;
  879. dev->fsa_dev[container].config_needed = DELETE;
  880. dev->fsa_dev[container].config_waiting_stamp =
  881. jiffies;
  882. }
  883. }
  884. break;
  885. }
  886. device_config_needed = NOTHING;
  887. for (container = 0; container < dev->maximum_num_containers;
  888. ++container) {
  889. if ((dev->fsa_dev[container].config_waiting_on == 0) &&
  890. (dev->fsa_dev[container].config_needed != NOTHING) &&
  891. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) {
  892. device_config_needed =
  893. dev->fsa_dev[container].config_needed;
  894. dev->fsa_dev[container].config_needed = NOTHING;
  895. break;
  896. }
  897. }
  898. if (device_config_needed == NOTHING)
  899. return;
  900. /*
  901. * If we decided that a re-configuration needs to be done,
  902. * schedule it here on the way out the door, please close the door
  903. * behind you.
  904. */
  905. /*
  906. * Find the scsi_device associated with the SCSI address,
  907. * and mark it as changed, invalidating the cache. This deals
  908. * with changes to existing device IDs.
  909. */
  910. if (!dev || !dev->scsi_host_ptr)
  911. return;
  912. /*
  913. * force reload of disk info via aac_probe_container
  914. */
  915. if ((device_config_needed == CHANGE)
  916. && (dev->fsa_dev[container].valid == 1))
  917. dev->fsa_dev[container].valid = 2;
  918. if ((device_config_needed == CHANGE) ||
  919. (device_config_needed == ADD))
  920. aac_probe_container(dev, container);
  921. device = scsi_device_lookup(dev->scsi_host_ptr,
  922. CONTAINER_TO_CHANNEL(container),
  923. CONTAINER_TO_ID(container),
  924. CONTAINER_TO_LUN(container));
  925. if (device) {
  926. switch (device_config_needed) {
  927. case DELETE:
  928. case CHANGE:
  929. scsi_rescan_device(&device->sdev_gendev);
  930. default:
  931. break;
  932. }
  933. scsi_device_put(device);
  934. }
  935. if (device_config_needed == ADD) {
  936. scsi_add_device(dev->scsi_host_ptr,
  937. CONTAINER_TO_CHANNEL(container),
  938. CONTAINER_TO_ID(container),
  939. CONTAINER_TO_LUN(container));
  940. }
  941. }
  942. static int _aac_reset_adapter(struct aac_dev *aac)
  943. {
  944. int index, quirks;
  945. int retval;
  946. struct Scsi_Host *host;
  947. struct scsi_device *dev;
  948. struct scsi_cmnd *command;
  949. struct scsi_cmnd *command_list;
  950. /*
  951. * Assumptions:
  952. * - host is locked.
  953. * - in_reset is asserted, so no new i/o is getting to the
  954. * card.
  955. * - The card is dead.
  956. */
  957. host = aac->scsi_host_ptr;
  958. scsi_block_requests(host);
  959. aac_adapter_disable_int(aac);
  960. spin_unlock_irq(host->host_lock);
  961. kthread_stop(aac->thread);
  962. /*
  963. * If a positive health, means in a known DEAD PANIC
  964. * state and the adapter could be reset to `try again'.
  965. */
  966. retval = aac_adapter_restart(aac, aac_adapter_check_health(aac));
  967. if (retval)
  968. goto out;
  969. /*
  970. * Loop through the fibs, close the synchronous FIBS
  971. */
  972. for (retval = 1, index = 0; index < (aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); index++) {
  973. struct fib *fib = &aac->fibs[index];
  974. if (!(fib->hw_fib_va->header.XferState & cpu_to_le32(NoResponseExpected | Async)) &&
  975. (fib->hw_fib_va->header.XferState & cpu_to_le32(ResponseExpected))) {
  976. unsigned long flagv;
  977. spin_lock_irqsave(&fib->event_lock, flagv);
  978. up(&fib->event_wait);
  979. spin_unlock_irqrestore(&fib->event_lock, flagv);
  980. schedule();
  981. retval = 0;
  982. }
  983. }
  984. /* Give some extra time for ioctls to complete. */
  985. if (retval == 0)
  986. ssleep(2);
  987. index = aac->cardtype;
  988. /*
  989. * Re-initialize the adapter, first free resources, then carefully
  990. * apply the initialization sequence to come back again. Only risk
  991. * is a change in Firmware dropping cache, it is assumed the caller
  992. * will ensure that i/o is queisced and the card is flushed in that
  993. * case.
  994. */
  995. aac_fib_map_free(aac);
  996. aac->hw_fib_va = NULL;
  997. aac->hw_fib_pa = 0;
  998. pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr, aac->comm_phys);
  999. aac->comm_addr = NULL;
  1000. aac->comm_phys = 0;
  1001. kfree(aac->queues);
  1002. aac->queues = NULL;
  1003. free_irq(aac->pdev->irq, aac);
  1004. kfree(aac->fsa_dev);
  1005. aac->fsa_dev = NULL;
  1006. if (aac_get_driver_ident(index)->quirks & AAC_QUIRK_31BIT) {
  1007. if (((retval = pci_set_dma_mask(aac->pdev, DMA_32BIT_MASK))) ||
  1008. ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_32BIT_MASK))))
  1009. goto out;
  1010. } else {
  1011. if (((retval = pci_set_dma_mask(aac->pdev, 0x7FFFFFFFULL))) ||
  1012. ((retval = pci_set_consistent_dma_mask(aac->pdev, 0x7FFFFFFFULL))))
  1013. goto out;
  1014. }
  1015. if ((retval = (*(aac_get_driver_ident(index)->init))(aac)))
  1016. goto out;
  1017. if (aac_get_driver_ident(index)->quirks & AAC_QUIRK_31BIT)
  1018. if ((retval = pci_set_dma_mask(aac->pdev, DMA_32BIT_MASK)))
  1019. goto out;
  1020. aac->thread = kthread_run(aac_command_thread, aac, aac->name);
  1021. if (IS_ERR(aac->thread)) {
  1022. retval = PTR_ERR(aac->thread);
  1023. goto out;
  1024. }
  1025. (void)aac_get_adapter_info(aac);
  1026. quirks = aac_get_driver_ident(index)->quirks;
  1027. if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) {
  1028. host->sg_tablesize = 34;
  1029. host->max_sectors = (host->sg_tablesize * 8) + 112;
  1030. }
  1031. if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) {
  1032. host->sg_tablesize = 17;
  1033. host->max_sectors = (host->sg_tablesize * 8) + 112;
  1034. }
  1035. aac_get_config_status(aac, 1);
  1036. aac_get_containers(aac);
  1037. /*
  1038. * This is where the assumption that the Adapter is quiesced
  1039. * is important.
  1040. */
  1041. command_list = NULL;
  1042. __shost_for_each_device(dev, host) {
  1043. unsigned long flags;
  1044. spin_lock_irqsave(&dev->list_lock, flags);
  1045. list_for_each_entry(command, &dev->cmd_list, list)
  1046. if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
  1047. command->SCp.buffer = (struct scatterlist *)command_list;
  1048. command_list = command;
  1049. }
  1050. spin_unlock_irqrestore(&dev->list_lock, flags);
  1051. }
  1052. while ((command = command_list)) {
  1053. command_list = (struct scsi_cmnd *)command->SCp.buffer;
  1054. command->SCp.buffer = NULL;
  1055. command->result = DID_OK << 16
  1056. | COMMAND_COMPLETE << 8
  1057. | SAM_STAT_TASK_SET_FULL;
  1058. command->SCp.phase = AAC_OWNER_ERROR_HANDLER;
  1059. command->scsi_done(command);
  1060. }
  1061. retval = 0;
  1062. out:
  1063. aac->in_reset = 0;
  1064. scsi_unblock_requests(host);
  1065. spin_lock_irq(host->host_lock);
  1066. return retval;
  1067. }
  1068. int aac_check_health(struct aac_dev * aac)
  1069. {
  1070. int BlinkLED;
  1071. unsigned long time_now, flagv = 0;
  1072. struct list_head * entry;
  1073. struct Scsi_Host * host;
  1074. /* Extending the scope of fib_lock slightly to protect aac->in_reset */
  1075. if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
  1076. return 0;
  1077. if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) {
  1078. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1079. return 0; /* OK */
  1080. }
  1081. aac->in_reset = 1;
  1082. /* Fake up an AIF:
  1083. * aac_aifcmd.command = AifCmdEventNotify = 1
  1084. * aac_aifcmd.seqnum = 0xFFFFFFFF
  1085. * aac_aifcmd.data[0] = AifEnExpEvent = 23
  1086. * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3
  1087. * aac.aifcmd.data[2] = AifHighPriority = 3
  1088. * aac.aifcmd.data[3] = BlinkLED
  1089. */
  1090. time_now = jiffies/HZ;
  1091. entry = aac->fib_list.next;
  1092. /*
  1093. * For each Context that is on the
  1094. * fibctxList, make a copy of the
  1095. * fib, and then set the event to wake up the
  1096. * thread that is waiting for it.
  1097. */
  1098. while (entry != &aac->fib_list) {
  1099. /*
  1100. * Extract the fibctx
  1101. */
  1102. struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next);
  1103. struct hw_fib * hw_fib;
  1104. struct fib * fib;
  1105. /*
  1106. * Check if the queue is getting
  1107. * backlogged
  1108. */
  1109. if (fibctx->count > 20) {
  1110. /*
  1111. * It's *not* jiffies folks,
  1112. * but jiffies / HZ, so do not
  1113. * panic ...
  1114. */
  1115. u32 time_last = fibctx->jiffies;
  1116. /*
  1117. * Has it been > 2 minutes
  1118. * since the last read off
  1119. * the queue?
  1120. */
  1121. if ((time_now - time_last) > aif_timeout) {
  1122. entry = entry->next;
  1123. aac_close_fib_context(aac, fibctx);
  1124. continue;
  1125. }
  1126. }
  1127. /*
  1128. * Warning: no sleep allowed while
  1129. * holding spinlock
  1130. */
  1131. hw_fib = kmalloc(sizeof(struct hw_fib), GFP_ATOMIC);
  1132. fib = kmalloc(sizeof(struct fib), GFP_ATOMIC);
  1133. if (fib && hw_fib) {
  1134. struct aac_aifcmd * aif;
  1135. memset(hw_fib, 0, sizeof(struct hw_fib));
  1136. memset(fib, 0, sizeof(struct fib));
  1137. fib->hw_fib_va = hw_fib;
  1138. fib->dev = aac;
  1139. aac_fib_init(fib);
  1140. fib->type = FSAFS_NTC_FIB_CONTEXT;
  1141. fib->size = sizeof (struct fib);
  1142. fib->data = hw_fib->data;
  1143. aif = (struct aac_aifcmd *)hw_fib->data;
  1144. aif->command = cpu_to_le32(AifCmdEventNotify);
  1145. aif->seqnum = cpu_to_le32(0xFFFFFFFF);
  1146. aif->data[0] = cpu_to_le32(AifEnExpEvent);
  1147. aif->data[1] = cpu_to_le32(AifExeFirmwarePanic);
  1148. aif->data[2] = cpu_to_le32(AifHighPriority);
  1149. aif->data[3] = cpu_to_le32(BlinkLED);
  1150. /*
  1151. * Put the FIB onto the
  1152. * fibctx's fibs
  1153. */
  1154. list_add_tail(&fib->fiblink, &fibctx->fib_list);
  1155. fibctx->count++;
  1156. /*
  1157. * Set the event to wake up the
  1158. * thread that will waiting.
  1159. */
  1160. up(&fibctx->wait_sem);
  1161. } else {
  1162. printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
  1163. kfree(fib);
  1164. kfree(hw_fib);
  1165. }
  1166. entry = entry->next;
  1167. }
  1168. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1169. if (BlinkLED < 0) {
  1170. printk(KERN_ERR "%s: Host adapter dead %d\n", aac->name, BlinkLED);
  1171. goto out;
  1172. }
  1173. printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED);
  1174. host = aac->scsi_host_ptr;
  1175. spin_lock_irqsave(host->host_lock, flagv);
  1176. BlinkLED = _aac_reset_adapter(aac);
  1177. spin_unlock_irqrestore(host->host_lock, flagv);
  1178. return BlinkLED;
  1179. out:
  1180. aac->in_reset = 0;
  1181. return BlinkLED;
  1182. }
  1183. /**
  1184. * aac_command_thread - command processing thread
  1185. * @dev: Adapter to monitor
  1186. *
  1187. * Waits on the commandready event in it's queue. When the event gets set
  1188. * it will pull FIBs off it's queue. It will continue to pull FIBs off
  1189. * until the queue is empty. When the queue is empty it will wait for
  1190. * more FIBs.
  1191. */
  1192. int aac_command_thread(void *data)
  1193. {
  1194. struct aac_dev *dev = data;
  1195. struct hw_fib *hw_fib, *hw_newfib;
  1196. struct fib *fib, *newfib;
  1197. struct aac_fib_context *fibctx;
  1198. unsigned long flags;
  1199. DECLARE_WAITQUEUE(wait, current);
  1200. /*
  1201. * We can only have one thread per adapter for AIF's.
  1202. */
  1203. if (dev->aif_thread)
  1204. return -EINVAL;
  1205. /*
  1206. * Let the DPC know it has a place to send the AIF's to.
  1207. */
  1208. dev->aif_thread = 1;
  1209. add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
  1210. set_current_state(TASK_INTERRUPTIBLE);
  1211. dprintk ((KERN_INFO "aac_command_thread start\n"));
  1212. while(1)
  1213. {
  1214. spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1215. while(!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
  1216. struct list_head *entry;
  1217. struct aac_aifcmd * aifcmd;
  1218. set_current_state(TASK_RUNNING);
  1219. entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
  1220. list_del(entry);
  1221. spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1222. fib = list_entry(entry, struct fib, fiblink);
  1223. /*
  1224. * We will process the FIB here or pass it to a
  1225. * worker thread that is TBD. We Really can't
  1226. * do anything at this point since we don't have
  1227. * anything defined for this thread to do.
  1228. */
  1229. hw_fib = fib->hw_fib_va;
  1230. memset(fib, 0, sizeof(struct fib));
  1231. fib->type = FSAFS_NTC_FIB_CONTEXT;
  1232. fib->size = sizeof( struct fib );
  1233. fib->hw_fib_va = hw_fib;
  1234. fib->data = hw_fib->data;
  1235. fib->dev = dev;
  1236. /*
  1237. * We only handle AifRequest fibs from the adapter.
  1238. */
  1239. aifcmd = (struct aac_aifcmd *) hw_fib->data;
  1240. if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
  1241. /* Handle Driver Notify Events */
  1242. aac_handle_aif(dev, fib);
  1243. *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
  1244. aac_fib_adapter_complete(fib, (u16)sizeof(u32));
  1245. } else {
  1246. struct list_head *entry;
  1247. /* The u32 here is important and intended. We are using
  1248. 32bit wrapping time to fit the adapter field */
  1249. u32 time_now, time_last;
  1250. unsigned long flagv;
  1251. unsigned num;
  1252. struct hw_fib ** hw_fib_pool, ** hw_fib_p;
  1253. struct fib ** fib_pool, ** fib_p;
  1254. /* Sniff events */
  1255. if ((aifcmd->command ==
  1256. cpu_to_le32(AifCmdEventNotify)) ||
  1257. (aifcmd->command ==
  1258. cpu_to_le32(AifCmdJobProgress))) {
  1259. aac_handle_aif(dev, fib);
  1260. }
  1261. time_now = jiffies/HZ;
  1262. /*
  1263. * Warning: no sleep allowed while
  1264. * holding spinlock. We take the estimate
  1265. * and pre-allocate a set of fibs outside the
  1266. * lock.
  1267. */
  1268. num = le32_to_cpu(dev->init->AdapterFibsSize)
  1269. / sizeof(struct hw_fib); /* some extra */
  1270. spin_lock_irqsave(&dev->fib_lock, flagv);
  1271. entry = dev->fib_list.next;
  1272. while (entry != &dev->fib_list) {
  1273. entry = entry->next;
  1274. ++num;
  1275. }
  1276. spin_unlock_irqrestore(&dev->fib_lock, flagv);
  1277. hw_fib_pool = NULL;
  1278. fib_pool = NULL;
  1279. if (num
  1280. && ((hw_fib_pool = kmalloc(sizeof(struct hw_fib *) * num, GFP_KERNEL)))
  1281. && ((fib_pool = kmalloc(sizeof(struct fib *) * num, GFP_KERNEL)))) {
  1282. hw_fib_p = hw_fib_pool;
  1283. fib_p = fib_pool;
  1284. while (hw_fib_p < &hw_fib_pool[num]) {
  1285. if (!(*(hw_fib_p++) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL))) {
  1286. --hw_fib_p;
  1287. break;
  1288. }
  1289. if (!(*(fib_p++) = kmalloc(sizeof(struct fib), GFP_KERNEL))) {
  1290. kfree(*(--hw_fib_p));
  1291. break;
  1292. }
  1293. }
  1294. if ((num = hw_fib_p - hw_fib_pool) == 0) {
  1295. kfree(fib_pool);
  1296. fib_pool = NULL;
  1297. kfree(hw_fib_pool);
  1298. hw_fib_pool = NULL;
  1299. }
  1300. } else {
  1301. kfree(hw_fib_pool);
  1302. hw_fib_pool = NULL;
  1303. }
  1304. spin_lock_irqsave(&dev->fib_lock, flagv);
  1305. entry = dev->fib_list.next;
  1306. /*
  1307. * For each Context that is on the
  1308. * fibctxList, make a copy of the
  1309. * fib, and then set the event to wake up the
  1310. * thread that is waiting for it.
  1311. */
  1312. hw_fib_p = hw_fib_pool;
  1313. fib_p = fib_pool;
  1314. while (entry != &dev->fib_list) {
  1315. /*
  1316. * Extract the fibctx
  1317. */
  1318. fibctx = list_entry(entry, struct aac_fib_context, next);
  1319. /*
  1320. * Check if the queue is getting
  1321. * backlogged
  1322. */
  1323. if (fibctx->count > 20)
  1324. {
  1325. /*
  1326. * It's *not* jiffies folks,
  1327. * but jiffies / HZ so do not
  1328. * panic ...
  1329. */
  1330. time_last = fibctx->jiffies;
  1331. /*
  1332. * Has it been > 2 minutes
  1333. * since the last read off
  1334. * the queue?
  1335. */
  1336. if ((time_now - time_last) > aif_timeout) {
  1337. entry = entry->next;
  1338. aac_close_fib_context(dev, fibctx);
  1339. continue;
  1340. }
  1341. }
  1342. /*
  1343. * Warning: no sleep allowed while
  1344. * holding spinlock
  1345. */
  1346. if (hw_fib_p < &hw_fib_pool[num]) {
  1347. hw_newfib = *hw_fib_p;
  1348. *(hw_fib_p++) = NULL;
  1349. newfib = *fib_p;
  1350. *(fib_p++) = NULL;
  1351. /*
  1352. * Make the copy of the FIB
  1353. */
  1354. memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib));
  1355. memcpy(newfib, fib, sizeof(struct fib));
  1356. newfib->hw_fib_va = hw_newfib;
  1357. /*
  1358. * Put the FIB onto the
  1359. * fibctx's fibs
  1360. */
  1361. list_add_tail(&newfib->fiblink, &fibctx->fib_list);
  1362. fibctx->count++;
  1363. /*
  1364. * Set the event to wake up the
  1365. * thread that is waiting.
  1366. */
  1367. up(&fibctx->wait_sem);
  1368. } else {
  1369. printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
  1370. }
  1371. entry = entry->next;
  1372. }
  1373. /*
  1374. * Set the status of this FIB
  1375. */
  1376. *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
  1377. aac_fib_adapter_complete(fib, sizeof(u32));
  1378. spin_unlock_irqrestore(&dev->fib_lock, flagv);
  1379. /* Free up the remaining resources */
  1380. hw_fib_p = hw_fib_pool;
  1381. fib_p = fib_pool;
  1382. while (hw_fib_p < &hw_fib_pool[num]) {
  1383. kfree(*hw_fib_p);
  1384. kfree(*fib_p);
  1385. ++fib_p;
  1386. ++hw_fib_p;
  1387. }
  1388. kfree(hw_fib_pool);
  1389. kfree(fib_pool);
  1390. }
  1391. kfree(fib);
  1392. spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1393. }
  1394. /*
  1395. * There are no more AIF's
  1396. */
  1397. spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1398. schedule();
  1399. if (kthread_should_stop())
  1400. break;
  1401. set_current_state(TASK_INTERRUPTIBLE);
  1402. }
  1403. if (dev->queues)
  1404. remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
  1405. dev->aif_thread = 0;
  1406. return 0;
  1407. }