nouveau_drm.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782
  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <subdev/device.h>
  32. #include <subdev/vm.h>
  33. #include <engine/disp.h>
  34. #include "nouveau_drm.h"
  35. #include "nouveau_irq.h"
  36. #include "nouveau_dma.h"
  37. #include "nouveau_ttm.h"
  38. #include "nouveau_gem.h"
  39. #include "nouveau_agp.h"
  40. #include "nouveau_vga.h"
  41. #include "nouveau_pm.h"
  42. #include "nouveau_acpi.h"
  43. #include "nouveau_bios.h"
  44. #include "nouveau_ioctl.h"
  45. #include "nouveau_abi16.h"
  46. #include "nouveau_fbcon.h"
  47. #include "nouveau_fence.h"
  48. #include "nouveau_debugfs.h"
  49. MODULE_PARM_DESC(config, "option string to pass to driver core");
  50. static char *nouveau_config;
  51. module_param_named(config, nouveau_config, charp, 0400);
  52. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  53. static char *nouveau_debug;
  54. module_param_named(debug, nouveau_debug, charp, 0400);
  55. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  56. static int nouveau_noaccel = 0;
  57. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  58. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  59. "0 = disabled, 1 = enabled, 2 = headless)");
  60. int nouveau_modeset = -1;
  61. module_param_named(modeset, nouveau_modeset, int, 0400);
  62. static struct drm_driver driver;
  63. static int
  64. nouveau_drm_vblank_enable(struct drm_device *dev, int head)
  65. {
  66. struct nouveau_drm *drm = nouveau_drm(dev);
  67. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  68. nouveau_event_get(pdisp->vblank, head, &drm->vblank);
  69. return 0;
  70. }
  71. static void
  72. nouveau_drm_vblank_disable(struct drm_device *dev, int head)
  73. {
  74. struct nouveau_drm *drm = nouveau_drm(dev);
  75. struct nouveau_disp *pdisp = nouveau_disp(drm->device);
  76. nouveau_event_put(pdisp->vblank, head, &drm->vblank);
  77. }
  78. static int
  79. nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head)
  80. {
  81. struct nouveau_drm *drm =
  82. container_of(event, struct nouveau_drm, vblank);
  83. drm_handle_vblank(drm->dev, head);
  84. return NVKM_EVENT_KEEP;
  85. }
  86. static u64
  87. nouveau_name(struct pci_dev *pdev)
  88. {
  89. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  90. name |= pdev->bus->number << 16;
  91. name |= PCI_SLOT(pdev->devfn) << 8;
  92. return name | PCI_FUNC(pdev->devfn);
  93. }
  94. static int
  95. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  96. int size, void **pcli)
  97. {
  98. struct nouveau_cli *cli;
  99. int ret;
  100. *pcli = NULL;
  101. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  102. nouveau_debug, size, pcli);
  103. cli = *pcli;
  104. if (ret) {
  105. if (cli)
  106. nouveau_client_destroy(&cli->base);
  107. *pcli = NULL;
  108. return ret;
  109. }
  110. mutex_init(&cli->mutex);
  111. return 0;
  112. }
  113. static void
  114. nouveau_cli_destroy(struct nouveau_cli *cli)
  115. {
  116. struct nouveau_object *client = nv_object(cli);
  117. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  118. nouveau_client_fini(&cli->base, false);
  119. atomic_set(&client->refcount, 1);
  120. nouveau_object_ref(NULL, &client);
  121. }
  122. static void
  123. nouveau_accel_fini(struct nouveau_drm *drm)
  124. {
  125. nouveau_gpuobj_ref(NULL, &drm->notify);
  126. nouveau_channel_del(&drm->channel);
  127. nouveau_channel_del(&drm->cechan);
  128. if (drm->fence)
  129. nouveau_fence(drm)->dtor(drm);
  130. }
  131. static void
  132. nouveau_accel_init(struct nouveau_drm *drm)
  133. {
  134. struct nouveau_device *device = nv_device(drm->device);
  135. struct nouveau_object *object;
  136. u32 arg0, arg1;
  137. int ret;
  138. if (nouveau_noaccel)
  139. return;
  140. /* initialise synchronisation routines */
  141. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  142. else if (device->chipset < 0x17) ret = nv10_fence_create(drm);
  143. else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
  144. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  145. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  146. else ret = nvc0_fence_create(drm);
  147. if (ret) {
  148. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  149. nouveau_accel_fini(drm);
  150. return;
  151. }
  152. if (device->card_type >= NV_E0) {
  153. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  154. NVDRM_CHAN + 1,
  155. NVE0_CHANNEL_IND_ENGINE_CE0 |
  156. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  157. &drm->cechan);
  158. if (ret)
  159. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  160. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  161. arg1 = 1;
  162. } else {
  163. arg0 = NvDmaFB;
  164. arg1 = NvDmaTT;
  165. }
  166. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  167. arg0, arg1, &drm->channel);
  168. if (ret) {
  169. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  170. nouveau_accel_fini(drm);
  171. return;
  172. }
  173. if (device->card_type < NV_C0) {
  174. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  175. &drm->notify);
  176. if (ret) {
  177. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  178. nouveau_accel_fini(drm);
  179. return;
  180. }
  181. ret = nouveau_object_new(nv_object(drm),
  182. drm->channel->handle, NvNotify0,
  183. 0x003d, &(struct nv_dma_class) {
  184. .flags = NV_DMA_TARGET_VRAM |
  185. NV_DMA_ACCESS_RDWR,
  186. .start = drm->notify->addr,
  187. .limit = drm->notify->addr + 31
  188. }, sizeof(struct nv_dma_class),
  189. &object);
  190. if (ret) {
  191. nouveau_accel_fini(drm);
  192. return;
  193. }
  194. }
  195. nouveau_bo_move_init(drm);
  196. }
  197. static int nouveau_drm_probe(struct pci_dev *pdev,
  198. const struct pci_device_id *pent)
  199. {
  200. struct nouveau_device *device;
  201. struct apertures_struct *aper;
  202. bool boot = false;
  203. int ret;
  204. /* remove conflicting drivers (vesafb, efifb etc) */
  205. aper = alloc_apertures(3);
  206. if (!aper)
  207. return -ENOMEM;
  208. aper->ranges[0].base = pci_resource_start(pdev, 1);
  209. aper->ranges[0].size = pci_resource_len(pdev, 1);
  210. aper->count = 1;
  211. if (pci_resource_len(pdev, 2)) {
  212. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  213. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  214. aper->count++;
  215. }
  216. if (pci_resource_len(pdev, 3)) {
  217. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  218. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  219. aper->count++;
  220. }
  221. #ifdef CONFIG_X86
  222. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  223. #endif
  224. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  225. kfree(aper);
  226. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  227. nouveau_config, nouveau_debug, &device);
  228. if (ret)
  229. return ret;
  230. pci_set_master(pdev);
  231. ret = drm_get_pci_dev(pdev, pent, &driver);
  232. if (ret) {
  233. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  234. return ret;
  235. }
  236. return 0;
  237. }
  238. static int
  239. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  240. {
  241. struct pci_dev *pdev = dev->pdev;
  242. struct nouveau_device *device;
  243. struct nouveau_drm *drm;
  244. int ret;
  245. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  246. if (ret)
  247. return ret;
  248. dev->dev_private = drm;
  249. drm->dev = dev;
  250. drm->vblank.func = nouveau_drm_vblank_handler;
  251. INIT_LIST_HEAD(&drm->clients);
  252. spin_lock_init(&drm->tile.lock);
  253. /* make sure AGP controller is in a consistent state before we
  254. * (possibly) execute vbios init tables (see nouveau_agp.h)
  255. */
  256. if (drm_pci_device_is_agp(dev) && dev->agp) {
  257. /* dummy device object, doesn't init anything, but allows
  258. * agp code access to registers
  259. */
  260. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  261. NVDRM_DEVICE, 0x0080,
  262. &(struct nv_device_class) {
  263. .device = ~0,
  264. .disable =
  265. ~(NV_DEVICE_DISABLE_MMIO |
  266. NV_DEVICE_DISABLE_IDENTIFY),
  267. .debug0 = ~0,
  268. }, sizeof(struct nv_device_class),
  269. &drm->device);
  270. if (ret)
  271. goto fail_device;
  272. nouveau_agp_reset(drm);
  273. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  274. }
  275. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  276. 0x0080, &(struct nv_device_class) {
  277. .device = ~0,
  278. .disable = 0,
  279. .debug0 = 0,
  280. }, sizeof(struct nv_device_class),
  281. &drm->device);
  282. if (ret)
  283. goto fail_device;
  284. /* workaround an odd issue on nvc1 by disabling the device's
  285. * nosnoop capability. hopefully won't cause issues until a
  286. * better fix is found - assuming there is one...
  287. */
  288. device = nv_device(drm->device);
  289. if (nv_device(drm->device)->chipset == 0xc1)
  290. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  291. nouveau_vga_init(drm);
  292. nouveau_agp_init(drm);
  293. if (device->card_type >= NV_50) {
  294. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  295. 0x1000, &drm->client.base.vm);
  296. if (ret)
  297. goto fail_device;
  298. }
  299. ret = nouveau_ttm_init(drm);
  300. if (ret)
  301. goto fail_ttm;
  302. ret = nouveau_bios_init(dev);
  303. if (ret)
  304. goto fail_bios;
  305. ret = nouveau_irq_init(dev);
  306. if (ret)
  307. goto fail_irq;
  308. ret = nouveau_display_create(dev);
  309. if (ret)
  310. goto fail_dispctor;
  311. if (dev->mode_config.num_crtc) {
  312. ret = nouveau_display_init(dev);
  313. if (ret)
  314. goto fail_dispinit;
  315. }
  316. nouveau_pm_init(dev);
  317. nouveau_accel_init(drm);
  318. nouveau_fbcon_init(dev);
  319. return 0;
  320. fail_dispinit:
  321. nouveau_display_destroy(dev);
  322. fail_dispctor:
  323. nouveau_irq_fini(dev);
  324. fail_irq:
  325. nouveau_bios_takedown(dev);
  326. fail_bios:
  327. nouveau_ttm_fini(drm);
  328. fail_ttm:
  329. nouveau_agp_fini(drm);
  330. nouveau_vga_fini(drm);
  331. fail_device:
  332. nouveau_cli_destroy(&drm->client);
  333. return ret;
  334. }
  335. static int
  336. nouveau_drm_unload(struct drm_device *dev)
  337. {
  338. struct nouveau_drm *drm = nouveau_drm(dev);
  339. nouveau_fbcon_fini(dev);
  340. nouveau_accel_fini(drm);
  341. nouveau_pm_fini(dev);
  342. if (dev->mode_config.num_crtc)
  343. nouveau_display_fini(dev);
  344. nouveau_display_destroy(dev);
  345. nouveau_irq_fini(dev);
  346. nouveau_bios_takedown(dev);
  347. nouveau_ttm_fini(drm);
  348. nouveau_agp_fini(drm);
  349. nouveau_vga_fini(drm);
  350. nouveau_cli_destroy(&drm->client);
  351. return 0;
  352. }
  353. static void
  354. nouveau_drm_remove(struct pci_dev *pdev)
  355. {
  356. struct drm_device *dev = pci_get_drvdata(pdev);
  357. struct nouveau_drm *drm = nouveau_drm(dev);
  358. struct nouveau_object *device;
  359. device = drm->client.base.device;
  360. drm_put_dev(dev);
  361. nouveau_object_ref(NULL, &device);
  362. nouveau_object_debug();
  363. }
  364. static int
  365. nouveau_do_suspend(struct drm_device *dev)
  366. {
  367. struct nouveau_drm *drm = nouveau_drm(dev);
  368. struct nouveau_cli *cli;
  369. int ret;
  370. if (dev->mode_config.num_crtc) {
  371. NV_INFO(drm, "suspending fbcon...\n");
  372. nouveau_fbcon_set_suspend(dev, 1);
  373. NV_INFO(drm, "suspending display...\n");
  374. ret = nouveau_display_suspend(dev);
  375. if (ret)
  376. return ret;
  377. }
  378. NV_INFO(drm, "evicting buffers...\n");
  379. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  380. if (drm->fence && nouveau_fence(drm)->suspend) {
  381. if (!nouveau_fence(drm)->suspend(drm))
  382. return -ENOMEM;
  383. }
  384. NV_INFO(drm, "suspending client object trees...\n");
  385. list_for_each_entry(cli, &drm->clients, head) {
  386. ret = nouveau_client_fini(&cli->base, true);
  387. if (ret)
  388. goto fail_client;
  389. }
  390. ret = nouveau_client_fini(&drm->client.base, true);
  391. if (ret)
  392. goto fail_client;
  393. nouveau_agp_fini(drm);
  394. return 0;
  395. fail_client:
  396. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  397. nouveau_client_init(&cli->base);
  398. }
  399. if (dev->mode_config.num_crtc) {
  400. NV_INFO(drm, "resuming display...\n");
  401. nouveau_display_resume(dev);
  402. }
  403. return ret;
  404. }
  405. int nouveau_pmops_suspend(struct device *dev)
  406. {
  407. struct pci_dev *pdev = to_pci_dev(dev);
  408. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  409. int ret;
  410. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  411. return 0;
  412. ret = nouveau_do_suspend(drm_dev);
  413. if (ret)
  414. return ret;
  415. pci_save_state(pdev);
  416. pci_disable_device(pdev);
  417. pci_set_power_state(pdev, PCI_D3hot);
  418. return 0;
  419. }
  420. static int
  421. nouveau_do_resume(struct drm_device *dev)
  422. {
  423. struct nouveau_drm *drm = nouveau_drm(dev);
  424. struct nouveau_cli *cli;
  425. NV_INFO(drm, "re-enabling device...\n");
  426. nouveau_agp_reset(drm);
  427. NV_INFO(drm, "resuming client object trees...\n");
  428. nouveau_client_init(&drm->client.base);
  429. nouveau_agp_init(drm);
  430. list_for_each_entry(cli, &drm->clients, head) {
  431. nouveau_client_init(&cli->base);
  432. }
  433. if (drm->fence && nouveau_fence(drm)->resume)
  434. nouveau_fence(drm)->resume(drm);
  435. nouveau_run_vbios_init(dev);
  436. nouveau_irq_postinstall(dev);
  437. nouveau_pm_resume(dev);
  438. if (dev->mode_config.num_crtc) {
  439. NV_INFO(drm, "resuming display...\n");
  440. nouveau_display_resume(dev);
  441. }
  442. return 0;
  443. }
  444. int nouveau_pmops_resume(struct device *dev)
  445. {
  446. struct pci_dev *pdev = to_pci_dev(dev);
  447. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  448. int ret;
  449. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  450. return 0;
  451. pci_set_power_state(pdev, PCI_D0);
  452. pci_restore_state(pdev);
  453. ret = pci_enable_device(pdev);
  454. if (ret)
  455. return ret;
  456. pci_set_master(pdev);
  457. return nouveau_do_resume(drm_dev);
  458. }
  459. static int nouveau_pmops_freeze(struct device *dev)
  460. {
  461. struct pci_dev *pdev = to_pci_dev(dev);
  462. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  463. return nouveau_do_suspend(drm_dev);
  464. }
  465. static int nouveau_pmops_thaw(struct device *dev)
  466. {
  467. struct pci_dev *pdev = to_pci_dev(dev);
  468. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  469. return nouveau_do_resume(drm_dev);
  470. }
  471. static int
  472. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  473. {
  474. struct pci_dev *pdev = dev->pdev;
  475. struct nouveau_drm *drm = nouveau_drm(dev);
  476. struct nouveau_cli *cli;
  477. char name[32], tmpname[TASK_COMM_LEN];
  478. int ret;
  479. get_task_comm(tmpname, current);
  480. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  481. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  482. if (ret)
  483. return ret;
  484. if (nv_device(drm->device)->card_type >= NV_50) {
  485. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  486. 0x1000, &cli->base.vm);
  487. if (ret) {
  488. nouveau_cli_destroy(cli);
  489. return ret;
  490. }
  491. }
  492. fpriv->driver_priv = cli;
  493. mutex_lock(&drm->client.mutex);
  494. list_add(&cli->head, &drm->clients);
  495. mutex_unlock(&drm->client.mutex);
  496. return 0;
  497. }
  498. static void
  499. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  500. {
  501. struct nouveau_cli *cli = nouveau_cli(fpriv);
  502. struct nouveau_drm *drm = nouveau_drm(dev);
  503. if (cli->abi16)
  504. nouveau_abi16_fini(cli->abi16);
  505. mutex_lock(&drm->client.mutex);
  506. list_del(&cli->head);
  507. mutex_unlock(&drm->client.mutex);
  508. }
  509. static void
  510. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  511. {
  512. struct nouveau_cli *cli = nouveau_cli(fpriv);
  513. nouveau_cli_destroy(cli);
  514. }
  515. static struct drm_ioctl_desc
  516. nouveau_ioctls[] = {
  517. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  518. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  519. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  520. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  521. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  522. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  523. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  524. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  525. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  526. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  527. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  528. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  529. };
  530. static const struct file_operations
  531. nouveau_driver_fops = {
  532. .owner = THIS_MODULE,
  533. .open = drm_open,
  534. .release = drm_release,
  535. .unlocked_ioctl = drm_ioctl,
  536. .mmap = nouveau_ttm_mmap,
  537. .poll = drm_poll,
  538. .fasync = drm_fasync,
  539. .read = drm_read,
  540. #if defined(CONFIG_COMPAT)
  541. .compat_ioctl = nouveau_compat_ioctl,
  542. #endif
  543. .llseek = noop_llseek,
  544. };
  545. static struct drm_driver
  546. driver = {
  547. .driver_features =
  548. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  549. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  550. DRIVER_MODESET | DRIVER_PRIME,
  551. .load = nouveau_drm_load,
  552. .unload = nouveau_drm_unload,
  553. .open = nouveau_drm_open,
  554. .preclose = nouveau_drm_preclose,
  555. .postclose = nouveau_drm_postclose,
  556. .lastclose = nouveau_vga_lastclose,
  557. #if defined(CONFIG_DEBUG_FS)
  558. .debugfs_init = nouveau_debugfs_init,
  559. .debugfs_cleanup = nouveau_debugfs_takedown,
  560. #endif
  561. .irq_preinstall = nouveau_irq_preinstall,
  562. .irq_postinstall = nouveau_irq_postinstall,
  563. .irq_uninstall = nouveau_irq_uninstall,
  564. .irq_handler = nouveau_irq_handler,
  565. .get_vblank_counter = drm_vblank_count,
  566. .enable_vblank = nouveau_drm_vblank_enable,
  567. .disable_vblank = nouveau_drm_vblank_disable,
  568. .ioctls = nouveau_ioctls,
  569. .fops = &nouveau_driver_fops,
  570. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  571. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  572. .gem_prime_export = nouveau_gem_prime_export,
  573. .gem_prime_import = nouveau_gem_prime_import,
  574. .gem_init_object = nouveau_gem_object_new,
  575. .gem_free_object = nouveau_gem_object_del,
  576. .gem_open_object = nouveau_gem_object_open,
  577. .gem_close_object = nouveau_gem_object_close,
  578. .dumb_create = nouveau_display_dumb_create,
  579. .dumb_map_offset = nouveau_display_dumb_map_offset,
  580. .dumb_destroy = nouveau_display_dumb_destroy,
  581. .name = DRIVER_NAME,
  582. .desc = DRIVER_DESC,
  583. #ifdef GIT_REVISION
  584. .date = GIT_REVISION,
  585. #else
  586. .date = DRIVER_DATE,
  587. #endif
  588. .major = DRIVER_MAJOR,
  589. .minor = DRIVER_MINOR,
  590. .patchlevel = DRIVER_PATCHLEVEL,
  591. };
  592. static struct pci_device_id
  593. nouveau_drm_pci_table[] = {
  594. {
  595. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  596. .class = PCI_BASE_CLASS_DISPLAY << 16,
  597. .class_mask = 0xff << 16,
  598. },
  599. {
  600. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  601. .class = PCI_BASE_CLASS_DISPLAY << 16,
  602. .class_mask = 0xff << 16,
  603. },
  604. {}
  605. };
  606. static const struct dev_pm_ops nouveau_pm_ops = {
  607. .suspend = nouveau_pmops_suspend,
  608. .resume = nouveau_pmops_resume,
  609. .freeze = nouveau_pmops_freeze,
  610. .thaw = nouveau_pmops_thaw,
  611. .poweroff = nouveau_pmops_freeze,
  612. .restore = nouveau_pmops_resume,
  613. };
  614. static struct pci_driver
  615. nouveau_drm_pci_driver = {
  616. .name = "nouveau",
  617. .id_table = nouveau_drm_pci_table,
  618. .probe = nouveau_drm_probe,
  619. .remove = nouveau_drm_remove,
  620. .driver.pm = &nouveau_pm_ops,
  621. };
  622. static int __init
  623. nouveau_drm_init(void)
  624. {
  625. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  626. if (nouveau_modeset == -1) {
  627. #ifdef CONFIG_VGA_CONSOLE
  628. if (vgacon_text_force())
  629. nouveau_modeset = 0;
  630. #endif
  631. }
  632. if (!nouveau_modeset)
  633. return 0;
  634. nouveau_register_dsm_handler();
  635. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  636. }
  637. static void __exit
  638. nouveau_drm_exit(void)
  639. {
  640. if (!nouveau_modeset)
  641. return;
  642. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  643. nouveau_unregister_dsm_handler();
  644. }
  645. module_init(nouveau_drm_init);
  646. module_exit(nouveau_drm_exit);
  647. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  648. MODULE_AUTHOR(DRIVER_AUTHOR);
  649. MODULE_DESCRIPTION(DRIVER_DESC);
  650. MODULE_LICENSE("GPL and additional rights");