iwl-eeprom.h 16 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2008 Intel Corporation. All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22. * USA
  23. *
  24. * The full GNU General Public License is included in this distribution
  25. * in the file called LICENSE.GPL.
  26. *
  27. * Contact Information:
  28. * Tomas Winkler <tomas.winkler@intel.com>
  29. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30. *
  31. * BSD LICENSE
  32. *
  33. * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved.
  34. * All rights reserved.
  35. *
  36. * Redistribution and use in source and binary forms, with or without
  37. * modification, are permitted provided that the following conditions
  38. * are met:
  39. *
  40. * * Redistributions of source code must retain the above copyright
  41. * notice, this list of conditions and the following disclaimer.
  42. * * Redistributions in binary form must reproduce the above copyright
  43. * notice, this list of conditions and the following disclaimer in
  44. * the documentation and/or other materials provided with the
  45. * distribution.
  46. * * Neither the name Intel Corporation nor the names of its
  47. * contributors may be used to endorse or promote products derived
  48. * from this software without specific prior written permission.
  49. *
  50. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61. *****************************************************************************/
  62. #ifndef __iwl_eeprom_h__
  63. #define __iwl_eeprom_h__
  64. struct iwl_priv;
  65. /*
  66. * EEPROM access time values:
  67. *
  68. * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG,
  69. * then clearing (with subsequent read/modify/write) CSR_EEPROM_REG bit
  70. * CSR_EEPROM_REG_BIT_CMD (0x2).
  71. * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1).
  72. * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
  73. * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
  74. */
  75. #define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
  76. #define IWL_EEPROM_ACCESS_DELAY 10 /* uSec */
  77. #define IWL_EEPROM_SEM_TIMEOUT 10 /* milliseconds */
  78. #define IWL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
  79. /*
  80. * Regulatory channel usage flags in EEPROM struct iwl4965_eeprom_channel.flags.
  81. *
  82. * IBSS and/or AP operation is allowed *only* on those channels with
  83. * (VALID && IBSS && ACTIVE && !RADAR). This restriction is in place because
  84. * RADAR detection is not supported by the 4965 driver, but is a
  85. * requirement for establishing a new network for legal operation on channels
  86. * requiring RADAR detection or restricting ACTIVE scanning.
  87. *
  88. * NOTE: "WIDE" flag does not indicate anything about "FAT" 40 MHz channels.
  89. * It only indicates that 20 MHz channel use is supported; FAT channel
  90. * usage is indicated by a separate set of regulatory flags for each
  91. * FAT channel pair.
  92. *
  93. * NOTE: Using a channel inappropriately will result in a uCode error!
  94. */
  95. #define IWL_NUM_TX_CALIB_GROUPS 5
  96. enum {
  97. EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */
  98. EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
  99. /* Bit 2 Reserved */
  100. EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */
  101. EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */
  102. EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */
  103. /* Bit 6 Reserved (was Narrow Channel) */
  104. EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */
  105. };
  106. /* SKU Capabilities */
  107. #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
  108. #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
  109. /* *regulatory* channel data format in eeprom, one for each channel.
  110. * There are separate entries for FAT (40 MHz) vs. normal (20 MHz) channels. */
  111. struct iwl_eeprom_channel {
  112. u8 flags; /* EEPROM_CHANNEL_* flags copied from EEPROM */
  113. s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */
  114. } __attribute__ ((packed));
  115. /* 4965 has two radio transmitters (and 3 radio receivers) */
  116. #define EEPROM_TX_POWER_TX_CHAINS (2)
  117. /* 4965 has room for up to 8 sets of txpower calibration data */
  118. #define EEPROM_TX_POWER_BANDS (8)
  119. /* 4965 factory calibration measures txpower gain settings for
  120. * each of 3 target output levels */
  121. #define EEPROM_TX_POWER_MEASUREMENTS (3)
  122. /* 4965 Specific */
  123. /* 4965 driver does not work with txpower calibration version < 5 */
  124. #define EEPROM_4965_TX_POWER_VERSION (5)
  125. #define EEPROM_4965_EEPROM_VERSION (0x2f)
  126. #define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */
  127. #define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */
  128. #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */
  129. #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */
  130. /* 5000 Specific */
  131. #define EEPROM_5000_TX_POWER_VERSION (4)
  132. #define EEPROM_5000_EEPROM_VERSION (0x11A)
  133. /*5000 calibrations */
  134. #define EEPROM_5000_CALIB_ALL (INDIRECT_ADDRESS | INDIRECT_CALIBRATION)
  135. #define EEPROM_5000_XTAL ((2*0x128) | EEPROM_5000_CALIB_ALL)
  136. #define EEPROM_5000_TEMPERATURE ((2*0x12A) | EEPROM_5000_CALIB_ALL)
  137. /* 5000 links */
  138. #define EEPROM_5000_LINK_HOST (2*0x64)
  139. #define EEPROM_5000_LINK_GENERAL (2*0x65)
  140. #define EEPROM_5000_LINK_REGULATORY (2*0x66)
  141. #define EEPROM_5000_LINK_CALIBRATION (2*0x67)
  142. #define EEPROM_5000_LINK_PROCESS_ADJST (2*0x68)
  143. #define EEPROM_5000_LINK_OTHERS (2*0x69)
  144. /* 5000 regulatory - indirect access */
  145. #define EEPROM_5000_REG_SKU_ID ((0x02)\
  146. | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 4 bytes */
  147. #define EEPROM_5000_REG_BAND_1_CHANNELS ((0x08)\
  148. | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 28 bytes */
  149. #define EEPROM_5000_REG_BAND_2_CHANNELS ((0x26)\
  150. | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 26 bytes */
  151. #define EEPROM_5000_REG_BAND_3_CHANNELS ((0x42)\
  152. | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
  153. #define EEPROM_5000_REG_BAND_4_CHANNELS ((0x5C)\
  154. | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
  155. #define EEPROM_5000_REG_BAND_5_CHANNELS ((0x74)\
  156. | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 12 bytes */
  157. #define EEPROM_5000_REG_BAND_24_FAT_CHANNELS ((0x82)\
  158. | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 14 bytes */
  159. #define EEPROM_5000_REG_BAND_52_FAT_CHANNELS ((0x92)\
  160. | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
  161. /* 5050 Specific */
  162. #define EEPROM_5050_TX_POWER_VERSION (4)
  163. #define EEPROM_5050_EEPROM_VERSION (0x21E)
  164. /* 2.4 GHz */
  165. extern const u8 iwl_eeprom_band_1[14];
  166. /*
  167. * factory calibration data for one txpower level, on one channel,
  168. * measured on one of the 2 tx chains (radio transmitter and associated
  169. * antenna). EEPROM contains:
  170. *
  171. * 1) Temperature (degrees Celsius) of device when measurement was made.
  172. *
  173. * 2) Gain table index used to achieve the target measurement power.
  174. * This refers to the "well-known" gain tables (see iwl-4965-hw.h).
  175. *
  176. * 3) Actual measured output power, in half-dBm ("34" = 17 dBm).
  177. *
  178. * 4) RF power amplifier detector level measurement (not used).
  179. */
  180. struct iwl_eeprom_calib_measure {
  181. u8 temperature; /* Device temperature (Celsius) */
  182. u8 gain_idx; /* Index into gain table */
  183. u8 actual_pow; /* Measured RF output power, half-dBm */
  184. s8 pa_det; /* Power amp detector level (not used) */
  185. } __attribute__ ((packed));
  186. /*
  187. * measurement set for one channel. EEPROM contains:
  188. *
  189. * 1) Channel number measured
  190. *
  191. * 2) Measurements for each of 3 power levels for each of 2 radio transmitters
  192. * (a.k.a. "tx chains") (6 measurements altogether)
  193. */
  194. struct iwl_eeprom_calib_ch_info {
  195. u8 ch_num;
  196. struct iwl_eeprom_calib_measure
  197. measurements[EEPROM_TX_POWER_TX_CHAINS]
  198. [EEPROM_TX_POWER_MEASUREMENTS];
  199. } __attribute__ ((packed));
  200. /*
  201. * txpower subband info.
  202. *
  203. * For each frequency subband, EEPROM contains the following:
  204. *
  205. * 1) First and last channels within range of the subband. "0" values
  206. * indicate that this sample set is not being used.
  207. *
  208. * 2) Sample measurement sets for 2 channels close to the range endpoints.
  209. */
  210. struct iwl_eeprom_calib_subband_info {
  211. u8 ch_from; /* channel number of lowest channel in subband */
  212. u8 ch_to; /* channel number of highest channel in subband */
  213. struct iwl_eeprom_calib_ch_info ch1;
  214. struct iwl_eeprom_calib_ch_info ch2;
  215. } __attribute__ ((packed));
  216. /*
  217. * txpower calibration info. EEPROM contains:
  218. *
  219. * 1) Factory-measured saturation power levels (maximum levels at which
  220. * tx power amplifier can output a signal without too much distortion).
  221. * There is one level for 2.4 GHz band and one for 5 GHz band. These
  222. * values apply to all channels within each of the bands.
  223. *
  224. * 2) Factory-measured power supply voltage level. This is assumed to be
  225. * constant (i.e. same value applies to all channels/bands) while the
  226. * factory measurements are being made.
  227. *
  228. * 3) Up to 8 sets of factory-measured txpower calibration values.
  229. * These are for different frequency ranges, since txpower gain
  230. * characteristics of the analog radio circuitry vary with frequency.
  231. *
  232. * Not all sets need to be filled with data;
  233. * struct iwl_eeprom_calib_subband_info contains range of channels
  234. * (0 if unused) for each set of data.
  235. */
  236. struct iwl_eeprom_calib_info {
  237. u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */
  238. u8 saturation_power52; /* half-dBm */
  239. s16 voltage; /* signed */
  240. struct iwl_eeprom_calib_subband_info
  241. band_info[EEPROM_TX_POWER_BANDS];
  242. } __attribute__ ((packed));
  243. #define ADDRESS_MSK 0x0000FFFF
  244. #define INDIRECT_TYPE_MSK 0x000F0000
  245. #define INDIRECT_HOST 0x00010000
  246. #define INDIRECT_GENERAL 0x00020000
  247. #define INDIRECT_REGULATORY 0x00030000
  248. #define INDIRECT_CALIBRATION 0x00040000
  249. #define INDIRECT_PROCESS_ADJST 0x00050000
  250. #define INDIRECT_OTHERS 0x00060000
  251. #define INDIRECT_ADDRESS 0x00100000
  252. /* General */
  253. #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
  254. #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
  255. #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
  256. #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
  257. #define EEPROM_VERSION (2*0x44) /* 2 bytes */
  258. #define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */
  259. #define EEPROM_LEDS_MODE (2*0x45+1) /* 1 bytes */
  260. #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
  261. #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
  262. #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */
  263. #define EEPROM_3945_M_VERSION (2*0x4A) /* 1 bytes */
  264. #define EEPROM_ANTENNA_SWITCH_TYPE (2*0x4A+1) /* 1 bytes */
  265. /* The following masks are to be applied on EEPROM_RADIO_CONFIG */
  266. #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */
  267. #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */
  268. #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */
  269. #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */
  270. #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */
  271. #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
  272. #define EEPROM_3945_RF_CFG_TYPE_MAX 0x0
  273. #define EEPROM_4965_RF_CFG_TYPE_MAX 0x1
  274. #define EEPROM_5000_RF_CFG_TYPE_MAX 0x3
  275. /*
  276. * Per-channel regulatory data.
  277. *
  278. * Each channel that *might* be supported by iwl has a fixed location
  279. * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
  280. * txpower (MSB).
  281. *
  282. * Entries immediately below are for 20 MHz channel width. FAT (40 MHz)
  283. * channels (only for 4965, not supported by 3945) appear later in the EEPROM.
  284. *
  285. * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  286. */
  287. #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */
  288. #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */
  289. #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */
  290. /*
  291. * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
  292. * 5.0 GHz channels 7, 8, 11, 12, 16
  293. * (4915-5080MHz) (none of these is ever supported)
  294. */
  295. #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */
  296. #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */
  297. /*
  298. * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  299. * (5170-5320MHz)
  300. */
  301. #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */
  302. #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */
  303. /*
  304. * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  305. * (5500-5700MHz)
  306. */
  307. #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */
  308. #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */
  309. /*
  310. * 5.7 GHz channels 145, 149, 153, 157, 161, 165
  311. * (5725-5825MHz)
  312. */
  313. #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */
  314. #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */
  315. /*
  316. * 2.4 GHz FAT channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11)
  317. *
  318. * The channel listed is the center of the lower 20 MHz half of the channel.
  319. * The overall center frequency is actually 2 channels (10 MHz) above that,
  320. * and the upper half of each FAT channel is centered 4 channels (20 MHz) away
  321. * from the lower half; e.g. the upper half of FAT channel 1 is channel 5,
  322. * and the overall FAT channel width centers on channel 3.
  323. *
  324. * NOTE: The RXON command uses 20 MHz channel numbers to specify the
  325. * control channel to which to tune. RXON also specifies whether the
  326. * control channel is the upper or lower half of a FAT channel.
  327. *
  328. * NOTE: 4965 does not support FAT channels on 2.4 GHz.
  329. */
  330. #define EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS (2*0xA0) /* 14 bytes */
  331. /*
  332. * 5.2 GHz FAT channels 36 (40), 44 (48), 52 (56), 60 (64),
  333. * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161)
  334. */
  335. #define EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS (2*0xA8) /* 22 bytes */
  336. struct iwl_eeprom_ops {
  337. const u32 regulatory_bands[7];
  338. int (*verify_signature) (struct iwl_priv *priv);
  339. int (*acquire_semaphore) (struct iwl_priv *priv);
  340. void (*release_semaphore) (struct iwl_priv *priv);
  341. u16 (*calib_version) (struct iwl_priv *priv);
  342. const u8* (*query_addr) (const struct iwl_priv *priv, size_t offset);
  343. };
  344. void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac);
  345. int iwl_eeprom_init(struct iwl_priv *priv);
  346. void iwl_eeprom_free(struct iwl_priv *priv);
  347. int iwl_eeprom_check_version(struct iwl_priv *priv);
  348. const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset);
  349. u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset);
  350. int iwlcore_eeprom_verify_signature(struct iwl_priv *priv);
  351. int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv);
  352. void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv);
  353. const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset);
  354. int iwl_init_channel_map(struct iwl_priv *priv);
  355. void iwl_free_channel_map(struct iwl_priv *priv);
  356. const struct iwl_channel_info *iwl_get_channel_info(
  357. const struct iwl_priv *priv,
  358. enum ieee80211_band band, u16 channel);
  359. #endif /* __iwl_eeprom_h__ */