cciss.h 6.4 KB

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  1. #ifndef CCISS_H
  2. #define CCISS_H
  3. #include <linux/genhd.h>
  4. #include "cciss_cmd.h"
  5. #define NWD 16
  6. #define NWD_SHIFT 4
  7. #define MAX_PART (1 << NWD_SHIFT)
  8. #define IO_OK 0
  9. #define IO_ERROR 1
  10. #define MAJOR_NR COMPAQ_CISS_MAJOR
  11. struct ctlr_info;
  12. typedef struct ctlr_info ctlr_info_t;
  13. struct access_method {
  14. void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
  15. void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
  16. unsigned long (*fifo_full)(ctlr_info_t *h);
  17. unsigned long (*intr_pending)(ctlr_info_t *h);
  18. unsigned long (*command_completed)(ctlr_info_t *h);
  19. };
  20. typedef struct _drive_info_struct
  21. {
  22. __u32 LunID;
  23. int usage_count;
  24. struct request_queue *queue;
  25. sector_t nr_blocks;
  26. int block_size;
  27. int heads;
  28. int sectors;
  29. int cylinders;
  30. int raid_level; /* set to -1 to indicate that
  31. * the drive is not in use/configured
  32. */
  33. int busy_configuring; /*This is set when the drive is being removed
  34. *to prevent it from being opened or it's queue
  35. *from being started.
  36. */
  37. } drive_info_struct;
  38. struct ctlr_info
  39. {
  40. int ctlr;
  41. char devname[8];
  42. char *product_name;
  43. char firm_ver[4]; // Firmware version
  44. struct pci_dev *pdev;
  45. __u32 board_id;
  46. void __iomem *vaddr;
  47. unsigned long paddr;
  48. unsigned long io_mem_addr;
  49. unsigned long io_mem_length;
  50. CfgTable_struct __iomem *cfgtable;
  51. unsigned int intr;
  52. int interrupts_enabled;
  53. int major;
  54. int max_commands;
  55. int commands_outstanding;
  56. int max_outstanding; /* Debug */
  57. int num_luns;
  58. int highest_lun;
  59. int usage_count; /* number of opens all all minor devices */
  60. // information about each logical volume
  61. drive_info_struct drv[CISS_MAX_LUN];
  62. struct access_method access;
  63. /* queue and queue Info */
  64. CommandList_struct *reqQ;
  65. CommandList_struct *cmpQ;
  66. unsigned int Qdepth;
  67. unsigned int maxQsinceinit;
  68. unsigned int maxSG;
  69. spinlock_t lock;
  70. //* pointers to command and error info pool */
  71. CommandList_struct *cmd_pool;
  72. dma_addr_t cmd_pool_dhandle;
  73. ErrorInfo_struct *errinfo_pool;
  74. dma_addr_t errinfo_pool_dhandle;
  75. unsigned long *cmd_pool_bits;
  76. int nr_allocs;
  77. int nr_frees;
  78. int busy_configuring;
  79. int busy_initializing;
  80. /* This element holds the zero based queue number of the last
  81. * queue to be started. It is used for fairness.
  82. */
  83. int next_to_run;
  84. // Disk structures we need to pass back
  85. struct gendisk *gendisk[NWD];
  86. #ifdef CONFIG_CISS_SCSI_TAPE
  87. void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
  88. #endif
  89. unsigned char alive;
  90. };
  91. /* Defining the diffent access_menthods */
  92. /*
  93. * Memory mapped FIFO interface (SMART 53xx cards)
  94. */
  95. #define SA5_DOORBELL 0x20
  96. #define SA5_REQUEST_PORT_OFFSET 0x40
  97. #define SA5_REPLY_INTR_MASK_OFFSET 0x34
  98. #define SA5_REPLY_PORT_OFFSET 0x44
  99. #define SA5_INTR_STATUS 0x30
  100. #define SA5_SCRATCHPAD_OFFSET 0xB0
  101. #define SA5_CTCFG_OFFSET 0xB4
  102. #define SA5_CTMEM_OFFSET 0xB8
  103. #define SA5_INTR_OFF 0x08
  104. #define SA5B_INTR_OFF 0x04
  105. #define SA5_INTR_PENDING 0x08
  106. #define SA5B_INTR_PENDING 0x04
  107. #define FIFO_EMPTY 0xffffffff
  108. #define CCISS_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
  109. #define CISS_ERROR_BIT 0x02
  110. #define CCISS_INTR_ON 1
  111. #define CCISS_INTR_OFF 0
  112. /*
  113. Send the command to the hardware
  114. */
  115. static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c)
  116. {
  117. #ifdef CCISS_DEBUG
  118. printk("Sending %x - down to controller\n", c->busaddr );
  119. #endif /* CCISS_DEBUG */
  120. writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
  121. h->commands_outstanding++;
  122. if ( h->commands_outstanding > h->max_outstanding)
  123. h->max_outstanding = h->commands_outstanding;
  124. }
  125. /*
  126. * This card is the opposite of the other cards.
  127. * 0 turns interrupts on...
  128. * 0x08 turns them off...
  129. */
  130. static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
  131. {
  132. if (val)
  133. { /* Turn interrupts on */
  134. h->interrupts_enabled = 1;
  135. writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  136. } else /* Turn them off */
  137. {
  138. h->interrupts_enabled = 0;
  139. writel( SA5_INTR_OFF,
  140. h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  141. }
  142. }
  143. /*
  144. * This card is the opposite of the other cards.
  145. * 0 turns interrupts on...
  146. * 0x04 turns them off...
  147. */
  148. static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
  149. {
  150. if (val)
  151. { /* Turn interrupts on */
  152. h->interrupts_enabled = 1;
  153. writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  154. } else /* Turn them off */
  155. {
  156. h->interrupts_enabled = 0;
  157. writel( SA5B_INTR_OFF,
  158. h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  159. }
  160. }
  161. /*
  162. * Returns true if fifo is full.
  163. *
  164. */
  165. static unsigned long SA5_fifo_full(ctlr_info_t *h)
  166. {
  167. if( h->commands_outstanding >= h->max_commands)
  168. return(1);
  169. else
  170. return(0);
  171. }
  172. /*
  173. * returns value read from hardware.
  174. * returns FIFO_EMPTY if there is nothing to read
  175. */
  176. static unsigned long SA5_completed(ctlr_info_t *h)
  177. {
  178. unsigned long register_value
  179. = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
  180. if(register_value != FIFO_EMPTY)
  181. {
  182. h->commands_outstanding--;
  183. #ifdef CCISS_DEBUG
  184. printk("cciss: Read %lx back from board\n", register_value);
  185. #endif /* CCISS_DEBUG */
  186. }
  187. #ifdef CCISS_DEBUG
  188. else
  189. {
  190. printk("cciss: FIFO Empty read\n");
  191. }
  192. #endif
  193. return ( register_value);
  194. }
  195. /*
  196. * Returns true if an interrupt is pending..
  197. */
  198. static unsigned long SA5_intr_pending(ctlr_info_t *h)
  199. {
  200. unsigned long register_value =
  201. readl(h->vaddr + SA5_INTR_STATUS);
  202. #ifdef CCISS_DEBUG
  203. printk("cciss: intr_pending %lx\n", register_value);
  204. #endif /* CCISS_DEBUG */
  205. if( register_value & SA5_INTR_PENDING)
  206. return 1;
  207. return 0 ;
  208. }
  209. /*
  210. * Returns true if an interrupt is pending..
  211. */
  212. static unsigned long SA5B_intr_pending(ctlr_info_t *h)
  213. {
  214. unsigned long register_value =
  215. readl(h->vaddr + SA5_INTR_STATUS);
  216. #ifdef CCISS_DEBUG
  217. printk("cciss: intr_pending %lx\n", register_value);
  218. #endif /* CCISS_DEBUG */
  219. if( register_value & SA5B_INTR_PENDING)
  220. return 1;
  221. return 0 ;
  222. }
  223. static struct access_method SA5_access = {
  224. SA5_submit_command,
  225. SA5_intr_mask,
  226. SA5_fifo_full,
  227. SA5_intr_pending,
  228. SA5_completed,
  229. };
  230. static struct access_method SA5B_access = {
  231. SA5_submit_command,
  232. SA5B_intr_mask,
  233. SA5_fifo_full,
  234. SA5B_intr_pending,
  235. SA5_completed,
  236. };
  237. struct board_type {
  238. __u32 board_id;
  239. char *product_name;
  240. struct access_method *access;
  241. };
  242. #define CCISS_LOCK(i) (&hba[i]->lock)
  243. #endif /* CCISS_H */