board_setup.c 3.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112
  1. /*
  2. * Copyright 2000-2003, 2008 MontaVista Software Inc.
  3. * Author: MontaVista Software, Inc. <source@mvista.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  13. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  14. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  16. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  18. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 675 Mass Ave, Cambridge, MA 02139, USA.
  24. */
  25. #include <linux/gpio.h>
  26. #include <linux/init.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/delay.h>
  29. #include <linux/pm.h>
  30. #include <asm/reboot.h>
  31. #include <asm/mach-au1x00/au1000.h>
  32. #include <prom.h>
  33. static void xxs1500_reset(char *c)
  34. {
  35. /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
  36. au_writel(0x00000000, 0xAE00001C);
  37. }
  38. static void xxs1500_power_off(void)
  39. {
  40. printk(KERN_ALERT "It's now safe to remove power\n");
  41. while (1)
  42. asm volatile (".set mips3 ; wait ; .set mips1");
  43. }
  44. void __init board_setup(void)
  45. {
  46. u32 pin_func;
  47. #ifdef CONFIG_SERIAL_8250_CONSOLE
  48. char *argptr;
  49. argptr = prom_getcmdline();
  50. argptr = strstr(argptr, "console=");
  51. if (argptr == NULL) {
  52. argptr = prom_getcmdline();
  53. strcat(argptr, " console=ttyS0,115200");
  54. }
  55. #endif
  56. pm_power_off = xxs1500_power_off;
  57. _machine_halt = xxs1500_power_off;
  58. _machine_restart = xxs1500_reset;
  59. alchemy_gpio1_input_enable();
  60. alchemy_gpio2_enable();
  61. /* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
  62. pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
  63. pin_func |= SYS_PF_UR3;
  64. au_writel(pin_func, SYS_PINFUNC);
  65. /* Enable UART */
  66. au_writel(0x01, UART3_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
  67. mdelay(10);
  68. au_writel(0x03, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
  69. mdelay(10);
  70. /* Enable DTR = USB power up */
  71. au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */
  72. #ifdef CONFIG_PCI
  73. #if defined(__MIPSEB__)
  74. au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
  75. #else
  76. au_writel(0xf, Au1500_PCI_CFG);
  77. #endif
  78. #endif
  79. }
  80. static int __init xxs1500_init_irq(void)
  81. {
  82. set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);
  83. set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);
  84. set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);
  85. set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);
  86. set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);
  87. set_irq_type(AU1500_GPIO207_INT, IRQF_TRIGGER_LOW);
  88. set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW);
  89. set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW);
  90. set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW);
  91. set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW);
  92. set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* CF irq */
  93. set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW);
  94. return 0;
  95. }
  96. arch_initcall(xxs1500_init_irq);