ehci-hub.c 29 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI Root Hub ... the nonsharable stuff
  22. *
  23. * Registers don't need cpu_to_le32, that happens transparently
  24. */
  25. /*-------------------------------------------------------------------------*/
  26. #include <linux/usb/otg.h>
  27. #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
  28. #ifdef CONFIG_PM
  29. static int ehci_hub_control(
  30. struct usb_hcd *hcd,
  31. u16 typeReq,
  32. u16 wValue,
  33. u16 wIndex,
  34. char *buf,
  35. u16 wLength
  36. );
  37. /* After a power loss, ports that were owned by the companion must be
  38. * reset so that the companion can still own them.
  39. */
  40. static void ehci_handover_companion_ports(struct ehci_hcd *ehci)
  41. {
  42. u32 __iomem *reg;
  43. u32 status;
  44. int port;
  45. __le32 buf;
  46. struct usb_hcd *hcd = ehci_to_hcd(ehci);
  47. if (!ehci->owned_ports)
  48. return;
  49. /* Give the connections some time to appear */
  50. msleep(20);
  51. port = HCS_N_PORTS(ehci->hcs_params);
  52. while (port--) {
  53. if (test_bit(port, &ehci->owned_ports)) {
  54. reg = &ehci->regs->port_status[port];
  55. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  56. /* Port already owned by companion? */
  57. if (status & PORT_OWNER)
  58. clear_bit(port, &ehci->owned_ports);
  59. else if (test_bit(port, &ehci->companion_ports))
  60. ehci_writel(ehci, status & ~PORT_PE, reg);
  61. else
  62. ehci_hub_control(hcd, SetPortFeature,
  63. USB_PORT_FEAT_RESET, port + 1,
  64. NULL, 0);
  65. }
  66. }
  67. if (!ehci->owned_ports)
  68. return;
  69. msleep(90); /* Wait for resets to complete */
  70. port = HCS_N_PORTS(ehci->hcs_params);
  71. while (port--) {
  72. if (test_bit(port, &ehci->owned_ports)) {
  73. ehci_hub_control(hcd, GetPortStatus,
  74. 0, port + 1,
  75. (char *) &buf, sizeof(buf));
  76. /* The companion should now own the port,
  77. * but if something went wrong the port must not
  78. * remain enabled.
  79. */
  80. reg = &ehci->regs->port_status[port];
  81. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  82. if (status & PORT_OWNER)
  83. ehci_writel(ehci, status | PORT_CSC, reg);
  84. else {
  85. ehci_dbg(ehci, "failed handover port %d: %x\n",
  86. port + 1, status);
  87. ehci_writel(ehci, status & ~PORT_PE, reg);
  88. }
  89. }
  90. }
  91. ehci->owned_ports = 0;
  92. }
  93. static int ehci_port_change(struct ehci_hcd *ehci)
  94. {
  95. int i = HCS_N_PORTS(ehci->hcs_params);
  96. /* First check if the controller indicates a change event */
  97. if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD)
  98. return 1;
  99. /*
  100. * Not all controllers appear to update this while going from D3 to D0,
  101. * so check the individual port status registers as well
  102. */
  103. while (i--)
  104. if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC)
  105. return 1;
  106. return 0;
  107. }
  108. static void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
  109. bool suspending, bool do_wakeup)
  110. {
  111. int port;
  112. u32 temp;
  113. unsigned long flags;
  114. /* If remote wakeup is enabled for the root hub but disabled
  115. * for the controller, we must adjust all the port wakeup flags
  116. * when the controller is suspended or resumed. In all other
  117. * cases they don't need to be changed.
  118. */
  119. if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup)
  120. return;
  121. spin_lock_irqsave(&ehci->lock, flags);
  122. /* clear phy low-power mode before changing wakeup flags */
  123. if (ehci->has_hostpc) {
  124. port = HCS_N_PORTS(ehci->hcs_params);
  125. while (port--) {
  126. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  127. temp = ehci_readl(ehci, hostpc_reg);
  128. ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg);
  129. }
  130. spin_unlock_irqrestore(&ehci->lock, flags);
  131. msleep(5);
  132. spin_lock_irqsave(&ehci->lock, flags);
  133. }
  134. port = HCS_N_PORTS(ehci->hcs_params);
  135. while (port--) {
  136. u32 __iomem *reg = &ehci->regs->port_status[port];
  137. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  138. u32 t2 = t1 & ~PORT_WAKE_BITS;
  139. /* If we are suspending the controller, clear the flags.
  140. * If we are resuming the controller, set the wakeup flags.
  141. */
  142. if (!suspending) {
  143. if (t1 & PORT_CONNECT)
  144. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  145. else
  146. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  147. }
  148. ehci_vdbg(ehci, "port %d, %08x -> %08x\n",
  149. port + 1, t1, t2);
  150. ehci_writel(ehci, t2, reg);
  151. }
  152. /* enter phy low-power mode again */
  153. if (ehci->has_hostpc) {
  154. port = HCS_N_PORTS(ehci->hcs_params);
  155. while (port--) {
  156. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  157. temp = ehci_readl(ehci, hostpc_reg);
  158. ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg);
  159. }
  160. }
  161. /* Does the root hub have a port wakeup pending? */
  162. if (!suspending && ehci_port_change(ehci))
  163. usb_hcd_resume_root_hub(ehci_to_hcd(ehci));
  164. spin_unlock_irqrestore(&ehci->lock, flags);
  165. }
  166. static int ehci_bus_suspend (struct usb_hcd *hcd)
  167. {
  168. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  169. int port;
  170. int mask;
  171. int changed;
  172. ehci_dbg(ehci, "suspend root hub\n");
  173. if (time_before (jiffies, ehci->next_statechange))
  174. msleep(5);
  175. del_timer_sync(&ehci->watchdog);
  176. spin_lock_irq (&ehci->lock);
  177. /* Once the controller is stopped, port resumes that are already
  178. * in progress won't complete. Hence if remote wakeup is enabled
  179. * for the root hub and any ports are in the middle of a resume or
  180. * remote wakeup, we must fail the suspend.
  181. */
  182. if (hcd->self.root_hub->do_remote_wakeup) {
  183. if (ehci->resuming_ports) {
  184. spin_unlock_irq(&ehci->lock);
  185. ehci_dbg(ehci, "suspend failed because a port is resuming\n");
  186. return -EBUSY;
  187. }
  188. }
  189. /* stop schedules, clean any completed work */
  190. ehci_quiesce(ehci);
  191. ehci_work(ehci);
  192. /* Unlike other USB host controller types, EHCI doesn't have
  193. * any notion of "global" or bus-wide suspend. The driver has
  194. * to manually suspend all the active unsuspended ports, and
  195. * then manually resume them in the bus_resume() routine.
  196. */
  197. ehci->bus_suspended = 0;
  198. ehci->owned_ports = 0;
  199. changed = 0;
  200. port = HCS_N_PORTS(ehci->hcs_params);
  201. while (port--) {
  202. u32 __iomem *reg = &ehci->regs->port_status [port];
  203. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  204. u32 t2 = t1 & ~PORT_WAKE_BITS;
  205. /* keep track of which ports we suspend */
  206. if (t1 & PORT_OWNER)
  207. set_bit(port, &ehci->owned_ports);
  208. else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) {
  209. t2 |= PORT_SUSPEND;
  210. set_bit(port, &ehci->bus_suspended);
  211. }
  212. /* enable remote wakeup on all ports, if told to do so */
  213. if (hcd->self.root_hub->do_remote_wakeup) {
  214. /* only enable appropriate wake bits, otherwise the
  215. * hardware can not go phy low power mode. If a race
  216. * condition happens here(connection change during bits
  217. * set), the port change detection will finally fix it.
  218. */
  219. if (t1 & PORT_CONNECT)
  220. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  221. else
  222. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  223. }
  224. if (t1 != t2) {
  225. ehci_vdbg (ehci, "port %d, %08x -> %08x\n",
  226. port + 1, t1, t2);
  227. ehci_writel(ehci, t2, reg);
  228. changed = 1;
  229. }
  230. }
  231. if (changed && ehci->has_hostpc) {
  232. spin_unlock_irq(&ehci->lock);
  233. msleep(5); /* 5 ms for HCD to enter low-power mode */
  234. spin_lock_irq(&ehci->lock);
  235. port = HCS_N_PORTS(ehci->hcs_params);
  236. while (port--) {
  237. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
  238. u32 t3;
  239. t3 = ehci_readl(ehci, hostpc_reg);
  240. ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg);
  241. t3 = ehci_readl(ehci, hostpc_reg);
  242. ehci_dbg(ehci, "Port %d phy low-power mode %s\n",
  243. port, (t3 & HOSTPC_PHCD) ?
  244. "succeeded" : "failed");
  245. }
  246. }
  247. /* Apparently some devices need a >= 1-uframe delay here */
  248. if (ehci->bus_suspended)
  249. udelay(150);
  250. /* turn off now-idle HC */
  251. ehci_halt (ehci);
  252. ehci->rh_state = EHCI_RH_SUSPENDED;
  253. end_unlink_async(ehci);
  254. unlink_empty_async(ehci);
  255. ehci_handle_intr_unlinks(ehci);
  256. end_free_itds(ehci);
  257. /* allow remote wakeup */
  258. mask = INTR_MASK;
  259. if (!hcd->self.root_hub->do_remote_wakeup)
  260. mask &= ~STS_PCD;
  261. ehci_writel(ehci, mask, &ehci->regs->intr_enable);
  262. ehci_readl(ehci, &ehci->regs->intr_enable);
  263. ehci->next_statechange = jiffies + msecs_to_jiffies(10);
  264. ehci->enabled_hrtimer_events = 0;
  265. ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
  266. spin_unlock_irq (&ehci->lock);
  267. /* ehci_work() may have re-enabled the watchdog timer, which we do not
  268. * want, and so we must delete any pending watchdog timer events.
  269. */
  270. del_timer_sync(&ehci->watchdog);
  271. hrtimer_cancel(&ehci->hrtimer);
  272. return 0;
  273. }
  274. /* caller has locked the root hub, and should reset/reinit on error */
  275. static int ehci_bus_resume (struct usb_hcd *hcd)
  276. {
  277. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  278. u32 temp;
  279. u32 power_okay;
  280. int i;
  281. unsigned long resume_needed = 0;
  282. if (time_before (jiffies, ehci->next_statechange))
  283. msleep(5);
  284. spin_lock_irq (&ehci->lock);
  285. if (!HCD_HW_ACCESSIBLE(hcd)) {
  286. spin_unlock_irq(&ehci->lock);
  287. return -ESHUTDOWN;
  288. }
  289. if (unlikely(ehci->debug)) {
  290. if (!dbgp_reset_prep())
  291. ehci->debug = NULL;
  292. else
  293. dbgp_external_startup();
  294. }
  295. /* Ideally and we've got a real resume here, and no port's power
  296. * was lost. (For PCI, that means Vaux was maintained.) But we
  297. * could instead be restoring a swsusp snapshot -- so that BIOS was
  298. * the last user of the controller, not reset/pm hardware keeping
  299. * state we gave to it.
  300. */
  301. power_okay = ehci_readl(ehci, &ehci->regs->intr_enable);
  302. ehci_dbg(ehci, "resume root hub%s\n",
  303. power_okay ? "" : " after power loss");
  304. /* at least some APM implementations will try to deliver
  305. * IRQs right away, so delay them until we're ready.
  306. */
  307. ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  308. /* re-init operational registers */
  309. ehci_writel(ehci, 0, &ehci->regs->segment);
  310. ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
  311. ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next);
  312. /* restore CMD_RUN, framelist size, and irq threshold */
  313. ehci->command |= CMD_RUN;
  314. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  315. ehci->rh_state = EHCI_RH_RUNNING;
  316. /* Some controller/firmware combinations need a delay during which
  317. * they set up the port statuses. See Bugzilla #8190. */
  318. spin_unlock_irq(&ehci->lock);
  319. msleep(8);
  320. spin_lock_irq(&ehci->lock);
  321. /* clear phy low-power mode before resume */
  322. if (ehci->bus_suspended && ehci->has_hostpc) {
  323. i = HCS_N_PORTS(ehci->hcs_params);
  324. while (i--) {
  325. if (test_bit(i, &ehci->bus_suspended)) {
  326. u32 __iomem *hostpc_reg =
  327. &ehci->regs->hostpc[i];
  328. temp = ehci_readl(ehci, hostpc_reg);
  329. ehci_writel(ehci, temp & ~HOSTPC_PHCD,
  330. hostpc_reg);
  331. }
  332. }
  333. spin_unlock_irq(&ehci->lock);
  334. msleep(5);
  335. spin_lock_irq(&ehci->lock);
  336. }
  337. /* manually resume the ports we suspended during bus_suspend() */
  338. i = HCS_N_PORTS (ehci->hcs_params);
  339. while (i--) {
  340. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  341. temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
  342. if (test_bit(i, &ehci->bus_suspended) &&
  343. (temp & PORT_SUSPEND)) {
  344. temp |= PORT_RESUME;
  345. set_bit(i, &resume_needed);
  346. }
  347. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  348. }
  349. /* msleep for 20ms only if code is trying to resume port */
  350. if (resume_needed) {
  351. spin_unlock_irq(&ehci->lock);
  352. msleep(20);
  353. spin_lock_irq(&ehci->lock);
  354. }
  355. i = HCS_N_PORTS (ehci->hcs_params);
  356. while (i--) {
  357. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  358. if (test_bit(i, &resume_needed)) {
  359. temp &= ~(PORT_RWC_BITS | PORT_RESUME);
  360. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  361. ehci_vdbg (ehci, "resumed port %d\n", i + 1);
  362. }
  363. }
  364. ehci->next_statechange = jiffies + msecs_to_jiffies(5);
  365. /* Now we can safely re-enable irqs */
  366. ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
  367. (void) ehci_readl(ehci, &ehci->regs->intr_enable);
  368. spin_unlock_irq (&ehci->lock);
  369. ehci_handover_companion_ports(ehci);
  370. return 0;
  371. }
  372. #else
  373. #define ehci_bus_suspend NULL
  374. #define ehci_bus_resume NULL
  375. #endif /* CONFIG_PM */
  376. /*-------------------------------------------------------------------------*/
  377. /*
  378. * Sets the owner of a port
  379. */
  380. static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner)
  381. {
  382. u32 __iomem *status_reg;
  383. u32 port_status;
  384. int try;
  385. status_reg = &ehci->regs->port_status[portnum];
  386. /*
  387. * The controller won't set the OWNER bit if the port is
  388. * enabled, so this loop will sometimes require at least two
  389. * iterations: one to disable the port and one to set OWNER.
  390. */
  391. for (try = 4; try > 0; --try) {
  392. spin_lock_irq(&ehci->lock);
  393. port_status = ehci_readl(ehci, status_reg);
  394. if ((port_status & PORT_OWNER) == new_owner
  395. || (port_status & (PORT_OWNER | PORT_CONNECT))
  396. == 0)
  397. try = 0;
  398. else {
  399. port_status ^= PORT_OWNER;
  400. port_status &= ~(PORT_PE | PORT_RWC_BITS);
  401. ehci_writel(ehci, port_status, status_reg);
  402. }
  403. spin_unlock_irq(&ehci->lock);
  404. if (try > 1)
  405. msleep(5);
  406. }
  407. }
  408. /*-------------------------------------------------------------------------*/
  409. static int check_reset_complete (
  410. struct ehci_hcd *ehci,
  411. int index,
  412. u32 __iomem *status_reg,
  413. int port_status
  414. ) {
  415. if (!(port_status & PORT_CONNECT))
  416. return port_status;
  417. /* if reset finished and it's still not enabled -- handoff */
  418. if (!(port_status & PORT_PE)) {
  419. /* with integrated TT, there's nobody to hand it to! */
  420. if (ehci_is_TDI(ehci)) {
  421. ehci_dbg (ehci,
  422. "Failed to enable port %d on root hub TT\n",
  423. index+1);
  424. return port_status;
  425. }
  426. ehci_dbg (ehci, "port %d full speed --> companion\n",
  427. index + 1);
  428. // what happens if HCS_N_CC(params) == 0 ?
  429. port_status |= PORT_OWNER;
  430. port_status &= ~PORT_RWC_BITS;
  431. ehci_writel(ehci, port_status, status_reg);
  432. /* ensure 440EPX ohci controller state is operational */
  433. if (ehci->has_amcc_usb23)
  434. set_ohci_hcfs(ehci, 1);
  435. } else {
  436. ehci_dbg(ehci, "port %d reset complete, port enabled\n",
  437. index + 1);
  438. /* ensure 440EPx ohci controller state is suspended */
  439. if (ehci->has_amcc_usb23)
  440. set_ohci_hcfs(ehci, 0);
  441. }
  442. return port_status;
  443. }
  444. /*-------------------------------------------------------------------------*/
  445. /* build "status change" packet (one or two bytes) from HC registers */
  446. static int
  447. ehci_hub_status_data (struct usb_hcd *hcd, char *buf)
  448. {
  449. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  450. u32 temp, status;
  451. u32 mask;
  452. int ports, i, retval = 1;
  453. unsigned long flags;
  454. u32 ppcd = 0;
  455. /* init status to no-changes */
  456. buf [0] = 0;
  457. ports = HCS_N_PORTS (ehci->hcs_params);
  458. if (ports > 7) {
  459. buf [1] = 0;
  460. retval++;
  461. }
  462. /* Inform the core about resumes-in-progress by returning
  463. * a non-zero value even if there are no status changes.
  464. */
  465. status = ehci->resuming_ports;
  466. /* Some boards (mostly VIA?) report bogus overcurrent indications,
  467. * causing massive log spam unless we completely ignore them. It
  468. * may be relevant that VIA VT8235 controllers, where PORT_POWER is
  469. * always set, seem to clear PORT_OCC and PORT_CSC when writing to
  470. * PORT_POWER; that's surprising, but maybe within-spec.
  471. */
  472. if (!ignore_oc)
  473. mask = PORT_CSC | PORT_PEC | PORT_OCC;
  474. else
  475. mask = PORT_CSC | PORT_PEC;
  476. // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND
  477. /* no hub change reports (bit 0) for now (power, ...) */
  478. /* port N changes (bit N)? */
  479. spin_lock_irqsave (&ehci->lock, flags);
  480. /* get per-port change detect bits */
  481. if (ehci->has_ppcd)
  482. ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16;
  483. for (i = 0; i < ports; i++) {
  484. /* leverage per-port change bits feature */
  485. if (ehci->has_ppcd && !(ppcd & (1 << i)))
  486. continue;
  487. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  488. /*
  489. * Return status information even for ports with OWNER set.
  490. * Otherwise khubd wouldn't see the disconnect event when a
  491. * high-speed device is switched over to the companion
  492. * controller by the user.
  493. */
  494. if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend)
  495. || (ehci->reset_done[i] && time_after_eq(
  496. jiffies, ehci->reset_done[i]))) {
  497. if (i < 7)
  498. buf [0] |= 1 << (i + 1);
  499. else
  500. buf [1] |= 1 << (i - 7);
  501. status = STS_PCD;
  502. }
  503. }
  504. /* FIXME autosuspend idle root hubs */
  505. spin_unlock_irqrestore (&ehci->lock, flags);
  506. return status ? retval : 0;
  507. }
  508. /*-------------------------------------------------------------------------*/
  509. static void
  510. ehci_hub_descriptor (
  511. struct ehci_hcd *ehci,
  512. struct usb_hub_descriptor *desc
  513. ) {
  514. int ports = HCS_N_PORTS (ehci->hcs_params);
  515. u16 temp;
  516. desc->bDescriptorType = 0x29;
  517. desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */
  518. desc->bHubContrCurrent = 0;
  519. desc->bNbrPorts = ports;
  520. temp = 1 + (ports / 8);
  521. desc->bDescLength = 7 + 2 * temp;
  522. /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
  523. memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
  524. memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
  525. temp = 0x0008; /* per-port overcurrent reporting */
  526. if (HCS_PPC (ehci->hcs_params))
  527. temp |= 0x0001; /* per-port power control */
  528. else
  529. temp |= 0x0002; /* no power switching */
  530. #if 0
  531. // re-enable when we support USB_PORT_FEAT_INDICATOR below.
  532. if (HCS_INDICATOR (ehci->hcs_params))
  533. temp |= 0x0080; /* per-port indicators (LEDs) */
  534. #endif
  535. desc->wHubCharacteristics = cpu_to_le16(temp);
  536. }
  537. /*-------------------------------------------------------------------------*/
  538. static int ehci_hub_control (
  539. struct usb_hcd *hcd,
  540. u16 typeReq,
  541. u16 wValue,
  542. u16 wIndex,
  543. char *buf,
  544. u16 wLength
  545. ) {
  546. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  547. int ports = HCS_N_PORTS (ehci->hcs_params);
  548. u32 __iomem *status_reg = &ehci->regs->port_status[
  549. (wIndex & 0xff) - 1];
  550. u32 __iomem *hostpc_reg = &ehci->regs->hostpc[(wIndex & 0xff) - 1];
  551. u32 temp, temp1, status;
  552. unsigned long flags;
  553. int retval = 0;
  554. unsigned selector;
  555. /*
  556. * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
  557. * HCS_INDICATOR may say we can change LEDs to off/amber/green.
  558. * (track current state ourselves) ... blink for diagnostics,
  559. * power, "this is the one", etc. EHCI spec supports this.
  560. */
  561. spin_lock_irqsave (&ehci->lock, flags);
  562. switch (typeReq) {
  563. case ClearHubFeature:
  564. switch (wValue) {
  565. case C_HUB_LOCAL_POWER:
  566. case C_HUB_OVER_CURRENT:
  567. /* no hub-wide feature/status flags */
  568. break;
  569. default:
  570. goto error;
  571. }
  572. break;
  573. case ClearPortFeature:
  574. if (!wIndex || wIndex > ports)
  575. goto error;
  576. wIndex--;
  577. temp = ehci_readl(ehci, status_reg);
  578. temp &= ~PORT_RWC_BITS;
  579. /*
  580. * Even if OWNER is set, so the port is owned by the
  581. * companion controller, khubd needs to be able to clear
  582. * the port-change status bits (especially
  583. * USB_PORT_STAT_C_CONNECTION).
  584. */
  585. switch (wValue) {
  586. case USB_PORT_FEAT_ENABLE:
  587. ehci_writel(ehci, temp & ~PORT_PE, status_reg);
  588. break;
  589. case USB_PORT_FEAT_C_ENABLE:
  590. ehci_writel(ehci, temp | PORT_PEC, status_reg);
  591. break;
  592. case USB_PORT_FEAT_SUSPEND:
  593. if (temp & PORT_RESET)
  594. goto error;
  595. if (ehci->no_selective_suspend)
  596. break;
  597. #ifdef CONFIG_USB_OTG
  598. if ((hcd->self.otg_port == (wIndex + 1))
  599. && hcd->self.b_hnp_enable) {
  600. otg_start_hnp(hcd->phy->otg);
  601. break;
  602. }
  603. #endif
  604. if (!(temp & PORT_SUSPEND))
  605. break;
  606. if ((temp & PORT_PE) == 0)
  607. goto error;
  608. /* clear phy low-power mode before resume */
  609. if (ehci->has_hostpc) {
  610. temp1 = ehci_readl(ehci, hostpc_reg);
  611. ehci_writel(ehci, temp1 & ~HOSTPC_PHCD,
  612. hostpc_reg);
  613. spin_unlock_irqrestore(&ehci->lock, flags);
  614. msleep(5);/* wait to leave low-power mode */
  615. spin_lock_irqsave(&ehci->lock, flags);
  616. }
  617. /* resume signaling for 20 msec */
  618. temp &= ~PORT_WAKE_BITS;
  619. ehci_writel(ehci, temp | PORT_RESUME, status_reg);
  620. ehci->reset_done[wIndex] = jiffies
  621. + msecs_to_jiffies(20);
  622. break;
  623. case USB_PORT_FEAT_C_SUSPEND:
  624. clear_bit(wIndex, &ehci->port_c_suspend);
  625. break;
  626. case USB_PORT_FEAT_POWER:
  627. if (HCS_PPC (ehci->hcs_params))
  628. ehci_writel(ehci, temp & ~PORT_POWER,
  629. status_reg);
  630. break;
  631. case USB_PORT_FEAT_C_CONNECTION:
  632. if (ehci->has_lpm) {
  633. /* clear PORTSC bits on disconnect */
  634. temp &= ~PORT_LPM;
  635. temp &= ~PORT_DEV_ADDR;
  636. }
  637. ehci_writel(ehci, temp | PORT_CSC, status_reg);
  638. break;
  639. case USB_PORT_FEAT_C_OVER_CURRENT:
  640. ehci_writel(ehci, temp | PORT_OCC, status_reg);
  641. break;
  642. case USB_PORT_FEAT_C_RESET:
  643. /* GetPortStatus clears reset */
  644. break;
  645. default:
  646. goto error;
  647. }
  648. ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
  649. break;
  650. case GetHubDescriptor:
  651. ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *)
  652. buf);
  653. break;
  654. case GetHubStatus:
  655. /* no hub-wide feature/status flags */
  656. memset (buf, 0, 4);
  657. //cpu_to_le32s ((u32 *) buf);
  658. break;
  659. case GetPortStatus:
  660. if (!wIndex || wIndex > ports)
  661. goto error;
  662. wIndex--;
  663. status = 0;
  664. temp = ehci_readl(ehci, status_reg);
  665. // wPortChange bits
  666. if (temp & PORT_CSC)
  667. status |= USB_PORT_STAT_C_CONNECTION << 16;
  668. if (temp & PORT_PEC)
  669. status |= USB_PORT_STAT_C_ENABLE << 16;
  670. if ((temp & PORT_OCC) && !ignore_oc){
  671. status |= USB_PORT_STAT_C_OVERCURRENT << 16;
  672. /*
  673. * Hubs should disable port power on over-current.
  674. * However, not all EHCI implementations do this
  675. * automatically, even if they _do_ support per-port
  676. * power switching; they're allowed to just limit the
  677. * current. khubd will turn the power back on.
  678. */
  679. if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) {
  680. ehci_writel(ehci,
  681. temp & ~(PORT_RWC_BITS | PORT_POWER),
  682. status_reg);
  683. temp = ehci_readl(ehci, status_reg);
  684. }
  685. }
  686. /* whoever resumes must GetPortStatus to complete it!! */
  687. if (temp & PORT_RESUME) {
  688. /* Remote Wakeup received? */
  689. if (!ehci->reset_done[wIndex]) {
  690. /* resume signaling for 20 msec */
  691. ehci->reset_done[wIndex] = jiffies
  692. + msecs_to_jiffies(20);
  693. /* check the port again */
  694. mod_timer(&ehci_to_hcd(ehci)->rh_timer,
  695. ehci->reset_done[wIndex]);
  696. }
  697. /* resume completed? */
  698. else if (time_after_eq(jiffies,
  699. ehci->reset_done[wIndex])) {
  700. clear_bit(wIndex, &ehci->suspended_ports);
  701. set_bit(wIndex, &ehci->port_c_suspend);
  702. ehci->reset_done[wIndex] = 0;
  703. /* stop resume signaling */
  704. temp = ehci_readl(ehci, status_reg);
  705. ehci_writel(ehci,
  706. temp & ~(PORT_RWC_BITS | PORT_RESUME),
  707. status_reg);
  708. clear_bit(wIndex, &ehci->resuming_ports);
  709. retval = handshake(ehci, status_reg,
  710. PORT_RESUME, 0, 2000 /* 2msec */);
  711. if (retval != 0) {
  712. ehci_err(ehci,
  713. "port %d resume error %d\n",
  714. wIndex + 1, retval);
  715. goto error;
  716. }
  717. temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
  718. }
  719. }
  720. /* whoever resets must GetPortStatus to complete it!! */
  721. if ((temp & PORT_RESET)
  722. && time_after_eq(jiffies,
  723. ehci->reset_done[wIndex])) {
  724. status |= USB_PORT_STAT_C_RESET << 16;
  725. ehci->reset_done [wIndex] = 0;
  726. clear_bit(wIndex, &ehci->resuming_ports);
  727. /* force reset to complete */
  728. ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET),
  729. status_reg);
  730. /* REVISIT: some hardware needs 550+ usec to clear
  731. * this bit; seems too long to spin routinely...
  732. */
  733. retval = handshake(ehci, status_reg,
  734. PORT_RESET, 0, 1000);
  735. if (retval != 0) {
  736. ehci_err (ehci, "port %d reset error %d\n",
  737. wIndex + 1, retval);
  738. goto error;
  739. }
  740. /* see what we found out */
  741. temp = check_reset_complete (ehci, wIndex, status_reg,
  742. ehci_readl(ehci, status_reg));
  743. }
  744. if (!(temp & (PORT_RESUME|PORT_RESET))) {
  745. ehci->reset_done[wIndex] = 0;
  746. clear_bit(wIndex, &ehci->resuming_ports);
  747. }
  748. /* transfer dedicated ports to the companion hc */
  749. if ((temp & PORT_CONNECT) &&
  750. test_bit(wIndex, &ehci->companion_ports)) {
  751. temp &= ~PORT_RWC_BITS;
  752. temp |= PORT_OWNER;
  753. ehci_writel(ehci, temp, status_reg);
  754. ehci_dbg(ehci, "port %d --> companion\n", wIndex + 1);
  755. temp = ehci_readl(ehci, status_reg);
  756. }
  757. /*
  758. * Even if OWNER is set, there's no harm letting khubd
  759. * see the wPortStatus values (they should all be 0 except
  760. * for PORT_POWER anyway).
  761. */
  762. if (temp & PORT_CONNECT) {
  763. status |= USB_PORT_STAT_CONNECTION;
  764. // status may be from integrated TT
  765. if (ehci->has_hostpc) {
  766. temp1 = ehci_readl(ehci, hostpc_reg);
  767. status |= ehci_port_speed(ehci, temp1);
  768. } else
  769. status |= ehci_port_speed(ehci, temp);
  770. }
  771. if (temp & PORT_PE)
  772. status |= USB_PORT_STAT_ENABLE;
  773. /* maybe the port was unsuspended without our knowledge */
  774. if (temp & (PORT_SUSPEND|PORT_RESUME)) {
  775. status |= USB_PORT_STAT_SUSPEND;
  776. } else if (test_bit(wIndex, &ehci->suspended_ports)) {
  777. clear_bit(wIndex, &ehci->suspended_ports);
  778. clear_bit(wIndex, &ehci->resuming_ports);
  779. ehci->reset_done[wIndex] = 0;
  780. if (temp & PORT_PE)
  781. set_bit(wIndex, &ehci->port_c_suspend);
  782. }
  783. if (temp & PORT_OC)
  784. status |= USB_PORT_STAT_OVERCURRENT;
  785. if (temp & PORT_RESET)
  786. status |= USB_PORT_STAT_RESET;
  787. if (temp & PORT_POWER)
  788. status |= USB_PORT_STAT_POWER;
  789. if (test_bit(wIndex, &ehci->port_c_suspend))
  790. status |= USB_PORT_STAT_C_SUSPEND << 16;
  791. #ifndef VERBOSE_DEBUG
  792. if (status & ~0xffff) /* only if wPortChange is interesting */
  793. #endif
  794. dbg_port (ehci, "GetStatus", wIndex + 1, temp);
  795. put_unaligned_le32(status, buf);
  796. break;
  797. case SetHubFeature:
  798. switch (wValue) {
  799. case C_HUB_LOCAL_POWER:
  800. case C_HUB_OVER_CURRENT:
  801. /* no hub-wide feature/status flags */
  802. break;
  803. default:
  804. goto error;
  805. }
  806. break;
  807. case SetPortFeature:
  808. selector = wIndex >> 8;
  809. wIndex &= 0xff;
  810. if (unlikely(ehci->debug)) {
  811. /* If the debug port is active any port
  812. * feature requests should get denied */
  813. if (wIndex == HCS_DEBUG_PORT(ehci->hcs_params) &&
  814. (readl(&ehci->debug->control) & DBGP_ENABLED)) {
  815. retval = -ENODEV;
  816. goto error_exit;
  817. }
  818. }
  819. if (!wIndex || wIndex > ports)
  820. goto error;
  821. wIndex--;
  822. temp = ehci_readl(ehci, status_reg);
  823. if (temp & PORT_OWNER)
  824. break;
  825. temp &= ~PORT_RWC_BITS;
  826. switch (wValue) {
  827. case USB_PORT_FEAT_SUSPEND:
  828. if (ehci->no_selective_suspend)
  829. break;
  830. if ((temp & PORT_PE) == 0
  831. || (temp & PORT_RESET) != 0)
  832. goto error;
  833. /* After above check the port must be connected.
  834. * Set appropriate bit thus could put phy into low power
  835. * mode if we have hostpc feature
  836. */
  837. temp &= ~PORT_WKCONN_E;
  838. temp |= PORT_WKDISC_E | PORT_WKOC_E;
  839. ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
  840. if (ehci->has_hostpc) {
  841. spin_unlock_irqrestore(&ehci->lock, flags);
  842. msleep(5);/* 5ms for HCD enter low pwr mode */
  843. spin_lock_irqsave(&ehci->lock, flags);
  844. temp1 = ehci_readl(ehci, hostpc_reg);
  845. ehci_writel(ehci, temp1 | HOSTPC_PHCD,
  846. hostpc_reg);
  847. temp1 = ehci_readl(ehci, hostpc_reg);
  848. ehci_dbg(ehci, "Port%d phy low pwr mode %s\n",
  849. wIndex, (temp1 & HOSTPC_PHCD) ?
  850. "succeeded" : "failed");
  851. }
  852. set_bit(wIndex, &ehci->suspended_ports);
  853. break;
  854. case USB_PORT_FEAT_POWER:
  855. if (HCS_PPC (ehci->hcs_params))
  856. ehci_writel(ehci, temp | PORT_POWER,
  857. status_reg);
  858. break;
  859. case USB_PORT_FEAT_RESET:
  860. if (temp & PORT_RESUME)
  861. goto error;
  862. /* line status bits may report this as low speed,
  863. * which can be fine if this root hub has a
  864. * transaction translator built in.
  865. */
  866. if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
  867. && !ehci_is_TDI(ehci)
  868. && PORT_USB11 (temp)) {
  869. ehci_dbg (ehci,
  870. "port %d low speed --> companion\n",
  871. wIndex + 1);
  872. temp |= PORT_OWNER;
  873. } else {
  874. ehci_vdbg (ehci, "port %d reset\n", wIndex + 1);
  875. temp |= PORT_RESET;
  876. temp &= ~PORT_PE;
  877. /*
  878. * caller must wait, then call GetPortStatus
  879. * usb 2.0 spec says 50 ms resets on root
  880. */
  881. ehci->reset_done [wIndex] = jiffies
  882. + msecs_to_jiffies (50);
  883. }
  884. ehci_writel(ehci, temp, status_reg);
  885. break;
  886. /* For downstream facing ports (these): one hub port is put
  887. * into test mode according to USB2 11.24.2.13, then the hub
  888. * must be reset (which for root hub now means rmmod+modprobe,
  889. * or else system reboot). See EHCI 2.3.9 and 4.14 for info
  890. * about the EHCI-specific stuff.
  891. */
  892. case USB_PORT_FEAT_TEST:
  893. if (!selector || selector > 5)
  894. goto error;
  895. ehci_quiesce(ehci);
  896. /* Put all enabled ports into suspend */
  897. while (ports--) {
  898. u32 __iomem *sreg =
  899. &ehci->regs->port_status[ports];
  900. temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS;
  901. if (temp & PORT_PE)
  902. ehci_writel(ehci, temp | PORT_SUSPEND,
  903. sreg);
  904. }
  905. ehci_halt(ehci);
  906. temp = ehci_readl(ehci, status_reg);
  907. temp |= selector << 16;
  908. ehci_writel(ehci, temp, status_reg);
  909. break;
  910. default:
  911. goto error;
  912. }
  913. ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
  914. break;
  915. default:
  916. error:
  917. /* "stall" on error */
  918. retval = -EPIPE;
  919. }
  920. error_exit:
  921. spin_unlock_irqrestore (&ehci->lock, flags);
  922. return retval;
  923. }
  924. static void __maybe_unused ehci_relinquish_port(struct usb_hcd *hcd,
  925. int portnum)
  926. {
  927. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  928. if (ehci_is_TDI(ehci))
  929. return;
  930. set_owner(ehci, --portnum, PORT_OWNER);
  931. }
  932. static int __maybe_unused ehci_port_handed_over(struct usb_hcd *hcd,
  933. int portnum)
  934. {
  935. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  936. u32 __iomem *reg;
  937. if (ehci_is_TDI(ehci))
  938. return 0;
  939. reg = &ehci->regs->port_status[portnum - 1];
  940. return ehci_readl(ehci, reg) & PORT_OWNER;
  941. }