iwl-core.c 81 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <net/mac80211.h>
  34. #include "iwl-eeprom.h"
  35. #include "iwl-dev.h" /* FIXME: remove */
  36. #include "iwl-debug.h"
  37. #include "iwl-core.h"
  38. #include "iwl-io.h"
  39. #include "iwl-power.h"
  40. #include "iwl-sta.h"
  41. #include "iwl-helpers.h"
  42. MODULE_DESCRIPTION("iwl core");
  43. MODULE_VERSION(IWLWIFI_VERSION);
  44. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  45. MODULE_LICENSE("GPL");
  46. /*
  47. * set bt_coex_active to true, uCode will do kill/defer
  48. * every time the priority line is asserted (BT is sending signals on the
  49. * priority line in the PCIx).
  50. * set bt_coex_active to false, uCode will ignore the BT activity and
  51. * perform the normal operation
  52. *
  53. * User might experience transmit issue on some platform due to WiFi/BT
  54. * co-exist problem. The possible behaviors are:
  55. * Able to scan and finding all the available AP
  56. * Not able to associate with any AP
  57. * On those platforms, WiFi communication can be restored by set
  58. * "bt_coex_active" module parameter to "false"
  59. *
  60. * default: bt_coex_active = true (BT_COEX_ENABLE)
  61. */
  62. static bool bt_coex_active = true;
  63. module_param(bt_coex_active, bool, S_IRUGO);
  64. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  65. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  66. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  67. IWL_RATE_SISO_##s##M_PLCP, \
  68. IWL_RATE_MIMO2_##s##M_PLCP,\
  69. IWL_RATE_MIMO3_##s##M_PLCP,\
  70. IWL_RATE_##r##M_IEEE, \
  71. IWL_RATE_##ip##M_INDEX, \
  72. IWL_RATE_##in##M_INDEX, \
  73. IWL_RATE_##rp##M_INDEX, \
  74. IWL_RATE_##rn##M_INDEX, \
  75. IWL_RATE_##pp##M_INDEX, \
  76. IWL_RATE_##np##M_INDEX }
  77. u32 iwl_debug_level;
  78. EXPORT_SYMBOL(iwl_debug_level);
  79. /*
  80. * Parameter order:
  81. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  82. *
  83. * If there isn't a valid next or previous rate then INV is used which
  84. * maps to IWL_RATE_INVALID
  85. *
  86. */
  87. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  88. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  89. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  90. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  91. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  92. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  93. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  94. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  95. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  96. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  97. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  98. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  99. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  100. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  101. /* FIXME:RS: ^^ should be INV (legacy) */
  102. };
  103. EXPORT_SYMBOL(iwl_rates);
  104. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  105. {
  106. int idx = 0;
  107. /* HT rate format */
  108. if (rate_n_flags & RATE_MCS_HT_MSK) {
  109. idx = (rate_n_flags & 0xff);
  110. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  111. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  112. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  113. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  114. idx += IWL_FIRST_OFDM_RATE;
  115. /* skip 9M not supported in ht*/
  116. if (idx >= IWL_RATE_9M_INDEX)
  117. idx += 1;
  118. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  119. return idx;
  120. /* legacy rate format, search for match in table */
  121. } else {
  122. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  123. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  124. return idx;
  125. }
  126. return -1;
  127. }
  128. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  129. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  130. {
  131. int i;
  132. u8 ind = ant;
  133. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  134. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  135. if (priv->hw_params.valid_tx_ant & BIT(ind))
  136. return ind;
  137. }
  138. return ant;
  139. }
  140. EXPORT_SYMBOL(iwl_toggle_tx_ant);
  141. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  142. EXPORT_SYMBOL(iwl_bcast_addr);
  143. /* This function both allocates and initializes hw and priv. */
  144. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  145. struct ieee80211_ops *hw_ops)
  146. {
  147. struct iwl_priv *priv;
  148. /* mac80211 allocates memory for this device instance, including
  149. * space for this driver's private structure */
  150. struct ieee80211_hw *hw =
  151. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  152. if (hw == NULL) {
  153. printk(KERN_ERR "%s: Can not allocate network device\n",
  154. cfg->name);
  155. goto out;
  156. }
  157. priv = hw->priv;
  158. priv->hw = hw;
  159. out:
  160. return hw;
  161. }
  162. EXPORT_SYMBOL(iwl_alloc_all);
  163. void iwl_hw_detect(struct iwl_priv *priv)
  164. {
  165. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  166. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  167. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  168. }
  169. EXPORT_SYMBOL(iwl_hw_detect);
  170. /*
  171. * QoS support
  172. */
  173. static void iwl_update_qos(struct iwl_priv *priv)
  174. {
  175. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  176. return;
  177. priv->qos_data.def_qos_parm.qos_flags = 0;
  178. if (priv->qos_data.qos_active)
  179. priv->qos_data.def_qos_parm.qos_flags |=
  180. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  181. if (priv->current_ht_config.is_ht)
  182. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  183. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  184. priv->qos_data.qos_active,
  185. priv->qos_data.def_qos_parm.qos_flags);
  186. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  187. sizeof(struct iwl_qosparam_cmd),
  188. &priv->qos_data.def_qos_parm, NULL);
  189. }
  190. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  191. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  192. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  193. struct ieee80211_sta_ht_cap *ht_info,
  194. enum ieee80211_band band)
  195. {
  196. u16 max_bit_rate = 0;
  197. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  198. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  199. ht_info->cap = 0;
  200. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  201. ht_info->ht_supported = true;
  202. if (priv->cfg->ht_greenfield_support)
  203. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  204. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  205. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  206. if (priv->hw_params.ht40_channel & BIT(band)) {
  207. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  208. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  209. ht_info->mcs.rx_mask[4] = 0x01;
  210. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  211. }
  212. if (priv->cfg->mod_params->amsdu_size_8K)
  213. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  214. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  215. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  216. ht_info->mcs.rx_mask[0] = 0xFF;
  217. if (rx_chains_num >= 2)
  218. ht_info->mcs.rx_mask[1] = 0xFF;
  219. if (rx_chains_num >= 3)
  220. ht_info->mcs.rx_mask[2] = 0xFF;
  221. /* Highest supported Rx data rate */
  222. max_bit_rate *= rx_chains_num;
  223. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  224. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  225. /* Tx MCS capabilities */
  226. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  227. if (tx_chains_num != rx_chains_num) {
  228. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  229. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  230. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  231. }
  232. }
  233. /**
  234. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  235. */
  236. int iwlcore_init_geos(struct iwl_priv *priv)
  237. {
  238. struct iwl_channel_info *ch;
  239. struct ieee80211_supported_band *sband;
  240. struct ieee80211_channel *channels;
  241. struct ieee80211_channel *geo_ch;
  242. struct ieee80211_rate *rates;
  243. int i = 0;
  244. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  245. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  246. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  247. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  248. return 0;
  249. }
  250. channels = kzalloc(sizeof(struct ieee80211_channel) *
  251. priv->channel_count, GFP_KERNEL);
  252. if (!channels)
  253. return -ENOMEM;
  254. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  255. GFP_KERNEL);
  256. if (!rates) {
  257. kfree(channels);
  258. return -ENOMEM;
  259. }
  260. /* 5.2GHz channels start after the 2.4GHz channels */
  261. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  262. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  263. /* just OFDM */
  264. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  265. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  266. if (priv->cfg->sku & IWL_SKU_N)
  267. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  268. IEEE80211_BAND_5GHZ);
  269. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  270. sband->channels = channels;
  271. /* OFDM & CCK */
  272. sband->bitrates = rates;
  273. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  274. if (priv->cfg->sku & IWL_SKU_N)
  275. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  276. IEEE80211_BAND_2GHZ);
  277. priv->ieee_channels = channels;
  278. priv->ieee_rates = rates;
  279. for (i = 0; i < priv->channel_count; i++) {
  280. ch = &priv->channel_info[i];
  281. /* FIXME: might be removed if scan is OK */
  282. if (!is_channel_valid(ch))
  283. continue;
  284. if (is_channel_a_band(ch))
  285. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  286. else
  287. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  288. geo_ch = &sband->channels[sband->n_channels++];
  289. geo_ch->center_freq =
  290. ieee80211_channel_to_frequency(ch->channel);
  291. geo_ch->max_power = ch->max_power_avg;
  292. geo_ch->max_antenna_gain = 0xff;
  293. geo_ch->hw_value = ch->channel;
  294. if (is_channel_valid(ch)) {
  295. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  296. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  297. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  298. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  299. if (ch->flags & EEPROM_CHANNEL_RADAR)
  300. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  301. geo_ch->flags |= ch->ht40_extension_channel;
  302. if (ch->max_power_avg > priv->tx_power_device_lmt)
  303. priv->tx_power_device_lmt = ch->max_power_avg;
  304. } else {
  305. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  306. }
  307. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  308. ch->channel, geo_ch->center_freq,
  309. is_channel_a_band(ch) ? "5.2" : "2.4",
  310. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  311. "restricted" : "valid",
  312. geo_ch->flags);
  313. }
  314. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  315. priv->cfg->sku & IWL_SKU_A) {
  316. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  317. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  318. priv->pci_dev->device,
  319. priv->pci_dev->subsystem_device);
  320. priv->cfg->sku &= ~IWL_SKU_A;
  321. }
  322. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  323. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  324. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  325. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  326. return 0;
  327. }
  328. EXPORT_SYMBOL(iwlcore_init_geos);
  329. /*
  330. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  331. */
  332. void iwlcore_free_geos(struct iwl_priv *priv)
  333. {
  334. kfree(priv->ieee_channels);
  335. kfree(priv->ieee_rates);
  336. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  337. }
  338. EXPORT_SYMBOL(iwlcore_free_geos);
  339. /*
  340. * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
  341. * function.
  342. */
  343. void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
  344. __le32 *tx_flags)
  345. {
  346. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  347. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  348. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  349. } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  350. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  351. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  352. }
  353. }
  354. EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
  355. static bool is_single_rx_stream(struct iwl_priv *priv)
  356. {
  357. return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
  358. priv->current_ht_config.single_chain_sufficient;
  359. }
  360. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  361. enum ieee80211_band band,
  362. u16 channel, u8 extension_chan_offset)
  363. {
  364. const struct iwl_channel_info *ch_info;
  365. ch_info = iwl_get_channel_info(priv, band, channel);
  366. if (!is_channel_valid(ch_info))
  367. return 0;
  368. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  369. return !(ch_info->ht40_extension_channel &
  370. IEEE80211_CHAN_NO_HT40PLUS);
  371. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  372. return !(ch_info->ht40_extension_channel &
  373. IEEE80211_CHAN_NO_HT40MINUS);
  374. return 0;
  375. }
  376. u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  377. struct ieee80211_sta_ht_cap *sta_ht_inf)
  378. {
  379. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  380. if (!ht_conf->is_ht || !ht_conf->is_40mhz)
  381. return 0;
  382. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  383. * the bit will not set if it is pure 40MHz case
  384. */
  385. if (sta_ht_inf) {
  386. if (!sta_ht_inf->ht_supported)
  387. return 0;
  388. }
  389. #ifdef CONFIG_IWLWIFI_DEBUG
  390. if (priv->disable_ht40)
  391. return 0;
  392. #endif
  393. return iwl_is_channel_extension(priv, priv->band,
  394. le16_to_cpu(priv->staging_rxon.channel),
  395. ht_conf->extension_chan_offset);
  396. }
  397. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  398. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  399. {
  400. u16 new_val = 0;
  401. u16 beacon_factor = 0;
  402. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  403. new_val = beacon_val / beacon_factor;
  404. if (!new_val)
  405. new_val = max_beacon_val;
  406. return new_val;
  407. }
  408. void iwl_setup_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
  409. {
  410. u64 tsf;
  411. s32 interval_tm, rem;
  412. unsigned long flags;
  413. struct ieee80211_conf *conf = NULL;
  414. u16 beacon_int;
  415. conf = ieee80211_get_hw_conf(priv->hw);
  416. spin_lock_irqsave(&priv->lock, flags);
  417. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  418. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  419. beacon_int = vif->bss_conf.beacon_int;
  420. if (vif->type == NL80211_IFTYPE_ADHOC) {
  421. /* TODO: we need to get atim_window from upper stack
  422. * for now we set to 0 */
  423. priv->rxon_timing.atim_window = 0;
  424. } else {
  425. priv->rxon_timing.atim_window = 0;
  426. }
  427. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  428. priv->hw_params.max_beacon_itrvl * 1024);
  429. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  430. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  431. interval_tm = beacon_int * 1024;
  432. rem = do_div(tsf, interval_tm);
  433. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  434. spin_unlock_irqrestore(&priv->lock, flags);
  435. IWL_DEBUG_ASSOC(priv,
  436. "beacon interval %d beacon timer %d beacon tim %d\n",
  437. le16_to_cpu(priv->rxon_timing.beacon_interval),
  438. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  439. le16_to_cpu(priv->rxon_timing.atim_window));
  440. }
  441. EXPORT_SYMBOL(iwl_setup_rxon_timing);
  442. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  443. {
  444. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  445. if (hw_decrypt)
  446. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  447. else
  448. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  449. }
  450. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  451. /**
  452. * iwl_check_rxon_cmd - validate RXON structure is valid
  453. *
  454. * NOTE: This is really only useful during development and can eventually
  455. * be #ifdef'd out once the driver is stable and folks aren't actively
  456. * making changes
  457. */
  458. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  459. {
  460. int error = 0;
  461. int counter = 1;
  462. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  463. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  464. error |= le32_to_cpu(rxon->flags &
  465. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  466. RXON_FLG_RADAR_DETECT_MSK));
  467. if (error)
  468. IWL_WARN(priv, "check 24G fields %d | %d\n",
  469. counter++, error);
  470. } else {
  471. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  472. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  473. if (error)
  474. IWL_WARN(priv, "check 52 fields %d | %d\n",
  475. counter++, error);
  476. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  477. if (error)
  478. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  479. counter++, error);
  480. }
  481. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  482. if (error)
  483. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  484. /* make sure basic rates 6Mbps and 1Mbps are supported */
  485. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  486. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  487. if (error)
  488. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  489. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  490. if (error)
  491. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  492. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  493. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  494. if (error)
  495. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  496. counter++, error);
  497. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  498. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  499. if (error)
  500. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  501. counter++, error);
  502. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  503. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  504. if (error)
  505. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  506. counter++, error);
  507. if (error)
  508. IWL_WARN(priv, "Tuning to channel %d\n",
  509. le16_to_cpu(rxon->channel));
  510. if (error) {
  511. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  512. return -1;
  513. }
  514. return 0;
  515. }
  516. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  517. /**
  518. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  519. * @priv: staging_rxon is compared to active_rxon
  520. *
  521. * If the RXON structure is changing enough to require a new tune,
  522. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  523. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  524. */
  525. int iwl_full_rxon_required(struct iwl_priv *priv)
  526. {
  527. /* These items are only settable from the full RXON command */
  528. if (!(iwl_is_associated(priv)) ||
  529. compare_ether_addr(priv->staging_rxon.bssid_addr,
  530. priv->active_rxon.bssid_addr) ||
  531. compare_ether_addr(priv->staging_rxon.node_addr,
  532. priv->active_rxon.node_addr) ||
  533. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  534. priv->active_rxon.wlap_bssid_addr) ||
  535. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  536. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  537. (priv->staging_rxon.air_propagation !=
  538. priv->active_rxon.air_propagation) ||
  539. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  540. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  541. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  542. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  543. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  544. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  545. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  546. return 1;
  547. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  548. * be updated with the RXON_ASSOC command -- however only some
  549. * flag transitions are allowed using RXON_ASSOC */
  550. /* Check if we are not switching bands */
  551. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  552. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  553. return 1;
  554. /* Check if we are switching association toggle */
  555. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  556. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  557. return 1;
  558. return 0;
  559. }
  560. EXPORT_SYMBOL(iwl_full_rxon_required);
  561. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  562. {
  563. /*
  564. * Assign the lowest rate -- should really get this from
  565. * the beacon skb from mac80211.
  566. */
  567. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  568. return IWL_RATE_1M_PLCP;
  569. else
  570. return IWL_RATE_6M_PLCP;
  571. }
  572. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  573. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  574. {
  575. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  576. if (!ht_conf->is_ht) {
  577. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  578. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  579. RXON_FLG_HT40_PROT_MSK |
  580. RXON_FLG_HT_PROT_MSK);
  581. return;
  582. }
  583. /* FIXME: if the definition of ht_protection changed, the "translation"
  584. * will be needed for rxon->flags
  585. */
  586. rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  587. /* Set up channel bandwidth:
  588. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  589. /* clear the HT channel mode before set the mode */
  590. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  591. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  592. if (iwl_is_ht40_tx_allowed(priv, NULL)) {
  593. /* pure ht40 */
  594. if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  595. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  596. /* Note: control channel is opposite of extension channel */
  597. switch (ht_conf->extension_chan_offset) {
  598. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  599. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  600. break;
  601. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  602. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  603. break;
  604. }
  605. } else {
  606. /* Note: control channel is opposite of extension channel */
  607. switch (ht_conf->extension_chan_offset) {
  608. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  609. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  610. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  611. break;
  612. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  613. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  614. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  615. break;
  616. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  617. default:
  618. /* channel location only valid if in Mixed mode */
  619. IWL_ERR(priv, "invalid extension channel offset\n");
  620. break;
  621. }
  622. }
  623. } else {
  624. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  625. }
  626. if (priv->cfg->ops->hcmd->set_rxon_chain)
  627. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  628. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  629. "extension channel offset 0x%x\n",
  630. le32_to_cpu(rxon->flags), ht_conf->ht_protection,
  631. ht_conf->extension_chan_offset);
  632. }
  633. EXPORT_SYMBOL(iwl_set_rxon_ht);
  634. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  635. #define IWL_NUM_RX_CHAINS_SINGLE 2
  636. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  637. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  638. /*
  639. * Determine how many receiver/antenna chains to use.
  640. *
  641. * More provides better reception via diversity. Fewer saves power
  642. * at the expense of throughput, but only when not in powersave to
  643. * start with.
  644. *
  645. * MIMO (dual stream) requires at least 2, but works better with 3.
  646. * This does not determine *which* chains to use, just how many.
  647. */
  648. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  649. {
  650. /* # of Rx chains to use when expecting MIMO. */
  651. if (is_single_rx_stream(priv))
  652. return IWL_NUM_RX_CHAINS_SINGLE;
  653. else
  654. return IWL_NUM_RX_CHAINS_MULTIPLE;
  655. }
  656. /*
  657. * When we are in power saving mode, unless device support spatial
  658. * multiplexing power save, use the active count for rx chain count.
  659. */
  660. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  661. {
  662. /* # Rx chains when idling, depending on SMPS mode */
  663. switch (priv->current_ht_config.smps) {
  664. case IEEE80211_SMPS_STATIC:
  665. case IEEE80211_SMPS_DYNAMIC:
  666. return IWL_NUM_IDLE_CHAINS_SINGLE;
  667. case IEEE80211_SMPS_OFF:
  668. return active_cnt;
  669. default:
  670. WARN(1, "invalid SMPS mode %d",
  671. priv->current_ht_config.smps);
  672. return active_cnt;
  673. }
  674. }
  675. /* up to 4 chains */
  676. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  677. {
  678. u8 res;
  679. res = (chain_bitmap & BIT(0)) >> 0;
  680. res += (chain_bitmap & BIT(1)) >> 1;
  681. res += (chain_bitmap & BIT(2)) >> 2;
  682. res += (chain_bitmap & BIT(3)) >> 3;
  683. return res;
  684. }
  685. /**
  686. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  687. *
  688. * Selects how many and which Rx receivers/antennas/chains to use.
  689. * This should not be used for scan command ... it puts data in wrong place.
  690. */
  691. void iwl_set_rxon_chain(struct iwl_priv *priv)
  692. {
  693. bool is_single = is_single_rx_stream(priv);
  694. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  695. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  696. u32 active_chains;
  697. u16 rx_chain;
  698. /* Tell uCode which antennas are actually connected.
  699. * Before first association, we assume all antennas are connected.
  700. * Just after first association, iwl_chain_noise_calibration()
  701. * checks which antennas actually *are* connected. */
  702. if (priv->chain_noise_data.active_chains)
  703. active_chains = priv->chain_noise_data.active_chains;
  704. else
  705. active_chains = priv->hw_params.valid_rx_ant;
  706. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  707. /* How many receivers should we use? */
  708. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  709. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  710. /* correct rx chain count according hw settings
  711. * and chain noise calibration
  712. */
  713. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  714. if (valid_rx_cnt < active_rx_cnt)
  715. active_rx_cnt = valid_rx_cnt;
  716. if (valid_rx_cnt < idle_rx_cnt)
  717. idle_rx_cnt = valid_rx_cnt;
  718. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  719. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  720. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  721. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  722. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  723. else
  724. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  725. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  726. priv->staging_rxon.rx_chain,
  727. active_rx_cnt, idle_rx_cnt);
  728. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  729. active_rx_cnt < idle_rx_cnt);
  730. }
  731. EXPORT_SYMBOL(iwl_set_rxon_chain);
  732. /* Return valid channel */
  733. u8 iwl_get_single_channel_number(struct iwl_priv *priv,
  734. enum ieee80211_band band)
  735. {
  736. const struct iwl_channel_info *ch_info;
  737. int i;
  738. u8 channel = 0;
  739. /* only scan single channel, good enough to reset the RF */
  740. /* pick the first valid not in-use channel */
  741. if (band == IEEE80211_BAND_5GHZ) {
  742. for (i = 14; i < priv->channel_count; i++) {
  743. if (priv->channel_info[i].channel !=
  744. le16_to_cpu(priv->staging_rxon.channel)) {
  745. channel = priv->channel_info[i].channel;
  746. ch_info = iwl_get_channel_info(priv,
  747. band, channel);
  748. if (is_channel_valid(ch_info))
  749. break;
  750. }
  751. }
  752. } else {
  753. for (i = 0; i < 14; i++) {
  754. if (priv->channel_info[i].channel !=
  755. le16_to_cpu(priv->staging_rxon.channel)) {
  756. channel =
  757. priv->channel_info[i].channel;
  758. ch_info = iwl_get_channel_info(priv,
  759. band, channel);
  760. if (is_channel_valid(ch_info))
  761. break;
  762. }
  763. }
  764. }
  765. return channel;
  766. }
  767. EXPORT_SYMBOL(iwl_get_single_channel_number);
  768. /**
  769. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  770. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  771. * @channel: Any channel valid for the requested phymode
  772. * In addition to setting the staging RXON, priv->phymode is also set.
  773. *
  774. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  775. * in the staging RXON flag structure based on the phymode
  776. */
  777. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  778. {
  779. enum ieee80211_band band = ch->band;
  780. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  781. if (!iwl_get_channel_info(priv, band, channel)) {
  782. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  783. channel, band);
  784. return -EINVAL;
  785. }
  786. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  787. (priv->band == band))
  788. return 0;
  789. priv->staging_rxon.channel = cpu_to_le16(channel);
  790. if (band == IEEE80211_BAND_5GHZ)
  791. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  792. else
  793. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  794. priv->band = band;
  795. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  796. return 0;
  797. }
  798. EXPORT_SYMBOL(iwl_set_rxon_channel);
  799. static void iwl_set_flags_for_band(struct iwl_priv *priv,
  800. enum ieee80211_band band,
  801. struct ieee80211_vif *vif)
  802. {
  803. if (band == IEEE80211_BAND_5GHZ) {
  804. priv->staging_rxon.flags &=
  805. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  806. | RXON_FLG_CCK_MSK);
  807. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  808. } else {
  809. /* Copied from iwl_post_associate() */
  810. if (vif && vif->bss_conf.assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  811. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  812. else
  813. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  814. if (vif && vif->type == NL80211_IFTYPE_ADHOC)
  815. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  816. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  817. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  818. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  819. }
  820. }
  821. /*
  822. * initialize rxon structure with default values from eeprom
  823. */
  824. void iwl_connection_init_rx_config(struct iwl_priv *priv,
  825. struct ieee80211_vif *vif)
  826. {
  827. const struct iwl_channel_info *ch_info;
  828. enum nl80211_iftype type = NL80211_IFTYPE_STATION;
  829. if (vif)
  830. type = vif->type;
  831. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  832. switch (type) {
  833. case NL80211_IFTYPE_AP:
  834. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  835. break;
  836. case NL80211_IFTYPE_STATION:
  837. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  838. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  839. break;
  840. case NL80211_IFTYPE_ADHOC:
  841. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  842. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  843. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  844. RXON_FILTER_ACCEPT_GRP_MSK;
  845. break;
  846. default:
  847. IWL_ERR(priv, "Unsupported interface type %d\n", type);
  848. break;
  849. }
  850. #if 0
  851. /* TODO: Figure out when short_preamble would be set and cache from
  852. * that */
  853. if (!hw_to_local(priv->hw)->short_preamble)
  854. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  855. else
  856. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  857. #endif
  858. ch_info = iwl_get_channel_info(priv, priv->band,
  859. le16_to_cpu(priv->active_rxon.channel));
  860. if (!ch_info)
  861. ch_info = &priv->channel_info[0];
  862. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  863. priv->band = ch_info->band;
  864. iwl_set_flags_for_band(priv, priv->band, vif);
  865. priv->staging_rxon.ofdm_basic_rates =
  866. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  867. priv->staging_rxon.cck_basic_rates =
  868. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  869. /* clear both MIX and PURE40 mode flag */
  870. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  871. RXON_FLG_CHANNEL_MODE_PURE_40);
  872. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  873. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  874. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  875. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  876. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  877. }
  878. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  879. static void iwl_set_rate(struct iwl_priv *priv)
  880. {
  881. const struct ieee80211_supported_band *hw = NULL;
  882. struct ieee80211_rate *rate;
  883. int i;
  884. hw = iwl_get_hw_mode(priv, priv->band);
  885. if (!hw) {
  886. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  887. return;
  888. }
  889. priv->active_rate = 0;
  890. for (i = 0; i < hw->n_bitrates; i++) {
  891. rate = &(hw->bitrates[i]);
  892. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  893. priv->active_rate |= (1 << rate->hw_value);
  894. }
  895. IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
  896. priv->staging_rxon.cck_basic_rates =
  897. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  898. priv->staging_rxon.ofdm_basic_rates =
  899. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  900. }
  901. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  902. {
  903. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  904. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  905. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  906. if (priv->switch_rxon.switch_in_progress) {
  907. if (!le32_to_cpu(csa->status) &&
  908. (csa->channel == priv->switch_rxon.channel)) {
  909. rxon->channel = csa->channel;
  910. priv->staging_rxon.channel = csa->channel;
  911. IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
  912. le16_to_cpu(csa->channel));
  913. } else
  914. IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
  915. le16_to_cpu(csa->channel));
  916. priv->switch_rxon.switch_in_progress = false;
  917. }
  918. }
  919. EXPORT_SYMBOL(iwl_rx_csa);
  920. #ifdef CONFIG_IWLWIFI_DEBUG
  921. void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  922. {
  923. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  924. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  925. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  926. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  927. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  928. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  929. le32_to_cpu(rxon->filter_flags));
  930. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  931. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  932. rxon->ofdm_basic_rates);
  933. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  934. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  935. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  936. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  937. }
  938. EXPORT_SYMBOL(iwl_print_rx_config_cmd);
  939. #endif
  940. /**
  941. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  942. */
  943. void iwl_irq_handle_error(struct iwl_priv *priv)
  944. {
  945. /* Set the FW error flag -- cleared on iwl_down */
  946. set_bit(STATUS_FW_ERROR, &priv->status);
  947. /* Cancel currently queued command. */
  948. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  949. IWL_ERR(priv, "Loaded firmware version: %s\n",
  950. priv->hw->wiphy->fw_version);
  951. priv->cfg->ops->lib->dump_nic_error_log(priv);
  952. if (priv->cfg->ops->lib->dump_csr)
  953. priv->cfg->ops->lib->dump_csr(priv);
  954. if (priv->cfg->ops->lib->dump_fh)
  955. priv->cfg->ops->lib->dump_fh(priv, NULL, false);
  956. priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
  957. #ifdef CONFIG_IWLWIFI_DEBUG
  958. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
  959. iwl_print_rx_config_cmd(priv);
  960. #endif
  961. wake_up_interruptible(&priv->wait_command_queue);
  962. /* Keep the restart process from trying to send host
  963. * commands by clearing the INIT status bit */
  964. clear_bit(STATUS_READY, &priv->status);
  965. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  966. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  967. "Restarting adapter due to uCode error.\n");
  968. if (priv->cfg->mod_params->restart_fw)
  969. queue_work(priv->workqueue, &priv->restart);
  970. }
  971. }
  972. EXPORT_SYMBOL(iwl_irq_handle_error);
  973. static int iwl_apm_stop_master(struct iwl_priv *priv)
  974. {
  975. int ret = 0;
  976. /* stop device's busmaster DMA activity */
  977. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  978. ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  979. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  980. if (ret)
  981. IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
  982. IWL_DEBUG_INFO(priv, "stop master\n");
  983. return ret;
  984. }
  985. void iwl_apm_stop(struct iwl_priv *priv)
  986. {
  987. IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
  988. /* Stop device's DMA activity */
  989. iwl_apm_stop_master(priv);
  990. /* Reset the entire device */
  991. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  992. udelay(10);
  993. /*
  994. * Clear "initialization complete" bit to move adapter from
  995. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  996. */
  997. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  998. }
  999. EXPORT_SYMBOL(iwl_apm_stop);
  1000. /*
  1001. * Start up NIC's basic functionality after it has been reset
  1002. * (e.g. after platform boot, or shutdown via iwl_apm_stop())
  1003. * NOTE: This does not load uCode nor start the embedded processor
  1004. */
  1005. int iwl_apm_init(struct iwl_priv *priv)
  1006. {
  1007. int ret = 0;
  1008. u16 lctl;
  1009. IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
  1010. /*
  1011. * Use "set_bit" below rather than "write", to preserve any hardware
  1012. * bits already set by default after reset.
  1013. */
  1014. /* Disable L0S exit timer (platform NMI Work/Around) */
  1015. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  1016. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  1017. /*
  1018. * Disable L0s without affecting L1;
  1019. * don't wait for ICH L0s (ICH bug W/A)
  1020. */
  1021. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  1022. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  1023. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  1024. iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  1025. /*
  1026. * Enable HAP INTA (interrupt from management bus) to
  1027. * wake device's PCI Express link L1a -> L0s
  1028. * NOTE: This is no-op for 3945 (non-existant bit)
  1029. */
  1030. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1031. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  1032. /*
  1033. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  1034. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  1035. * If so (likely), disable L0S, so device moves directly L0->L1;
  1036. * costs negligible amount of power savings.
  1037. * If not (unlikely), enable L0S, so there is at least some
  1038. * power savings, even without L1.
  1039. */
  1040. if (priv->cfg->set_l0s) {
  1041. lctl = iwl_pcie_link_ctl(priv);
  1042. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  1043. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  1044. /* L1-ASPM enabled; disable(!) L0S */
  1045. iwl_set_bit(priv, CSR_GIO_REG,
  1046. CSR_GIO_REG_VAL_L0S_ENABLED);
  1047. IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
  1048. } else {
  1049. /* L1-ASPM disabled; enable(!) L0S */
  1050. iwl_clear_bit(priv, CSR_GIO_REG,
  1051. CSR_GIO_REG_VAL_L0S_ENABLED);
  1052. IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
  1053. }
  1054. }
  1055. /* Configure analog phase-lock-loop before activating to D0A */
  1056. if (priv->cfg->pll_cfg_val)
  1057. iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
  1058. /*
  1059. * Set "initialization complete" bit to move adapter from
  1060. * D0U* --> D0A* (powered-up active) state.
  1061. */
  1062. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  1063. /*
  1064. * Wait for clock stabilization; once stabilized, access to
  1065. * device-internal resources is supported, e.g. iwl_write_prph()
  1066. * and accesses to uCode SRAM.
  1067. */
  1068. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  1069. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  1070. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  1071. if (ret < 0) {
  1072. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  1073. goto out;
  1074. }
  1075. /*
  1076. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  1077. * BSM (Boostrap State Machine) is only in 3945 and 4965;
  1078. * later devices (i.e. 5000 and later) have non-volatile SRAM,
  1079. * and don't need BSM to restore data after power-saving sleep.
  1080. *
  1081. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  1082. * do not disable clocks. This preserves any hardware bits already
  1083. * set by default in "CLK_CTRL_REG" after reset.
  1084. */
  1085. if (priv->cfg->use_bsm)
  1086. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1087. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  1088. else
  1089. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1090. APMG_CLK_VAL_DMA_CLK_RQT);
  1091. udelay(20);
  1092. /* Disable L1-Active */
  1093. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  1094. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  1095. out:
  1096. return ret;
  1097. }
  1098. EXPORT_SYMBOL(iwl_apm_init);
  1099. void iwl_configure_filter(struct ieee80211_hw *hw,
  1100. unsigned int changed_flags,
  1101. unsigned int *total_flags,
  1102. u64 multicast)
  1103. {
  1104. struct iwl_priv *priv = hw->priv;
  1105. __le32 filter_or = 0, filter_nand = 0;
  1106. #define CHK(test, flag) do { \
  1107. if (*total_flags & (test)) \
  1108. filter_or |= (flag); \
  1109. else \
  1110. filter_nand |= (flag); \
  1111. } while (0)
  1112. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1113. changed_flags, *total_flags);
  1114. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  1115. CHK(FIF_ALLMULTI, RXON_FILTER_ACCEPT_GRP_MSK);
  1116. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  1117. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  1118. #undef CHK
  1119. mutex_lock(&priv->mutex);
  1120. priv->staging_rxon.filter_flags &= ~filter_nand;
  1121. priv->staging_rxon.filter_flags |= filter_or;
  1122. iwlcore_commit_rxon(priv);
  1123. mutex_unlock(&priv->mutex);
  1124. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1125. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1126. }
  1127. EXPORT_SYMBOL(iwl_configure_filter);
  1128. int iwl_set_hw_params(struct iwl_priv *priv)
  1129. {
  1130. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1131. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1132. if (priv->cfg->mod_params->amsdu_size_8K)
  1133. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
  1134. else
  1135. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
  1136. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  1137. if (priv->cfg->mod_params->disable_11n)
  1138. priv->cfg->sku &= ~IWL_SKU_N;
  1139. /* Device-specific setup */
  1140. return priv->cfg->ops->lib->set_hw_params(priv);
  1141. }
  1142. EXPORT_SYMBOL(iwl_set_hw_params);
  1143. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1144. {
  1145. int ret = 0;
  1146. s8 prev_tx_power = priv->tx_power_user_lmt;
  1147. if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
  1148. IWL_WARN(priv,
  1149. "Requested user TXPOWER %d below lower limit %d.\n",
  1150. tx_power,
  1151. IWLAGN_TX_POWER_TARGET_POWER_MIN);
  1152. return -EINVAL;
  1153. }
  1154. if (tx_power > priv->tx_power_device_lmt) {
  1155. IWL_WARN(priv,
  1156. "Requested user TXPOWER %d above upper limit %d.\n",
  1157. tx_power, priv->tx_power_device_lmt);
  1158. return -EINVAL;
  1159. }
  1160. if (priv->tx_power_user_lmt != tx_power)
  1161. force = true;
  1162. /* if nic is not up don't send command */
  1163. if (iwl_is_ready_rf(priv)) {
  1164. priv->tx_power_user_lmt = tx_power;
  1165. if (force && priv->cfg->ops->lib->send_tx_power)
  1166. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1167. else if (!priv->cfg->ops->lib->send_tx_power)
  1168. ret = -EOPNOTSUPP;
  1169. /*
  1170. * if fail to set tx_power, restore the orig. tx power
  1171. */
  1172. if (ret)
  1173. priv->tx_power_user_lmt = prev_tx_power;
  1174. }
  1175. /*
  1176. * Even this is an async host command, the command
  1177. * will always report success from uCode
  1178. * So once driver can placing the command into the queue
  1179. * successfully, driver can use priv->tx_power_user_lmt
  1180. * to reflect the current tx power
  1181. */
  1182. return ret;
  1183. }
  1184. EXPORT_SYMBOL(iwl_set_tx_power);
  1185. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1186. {
  1187. struct iwl_priv *priv = data;
  1188. u32 inta, inta_mask;
  1189. u32 inta_fh;
  1190. unsigned long flags;
  1191. if (!priv)
  1192. return IRQ_NONE;
  1193. spin_lock_irqsave(&priv->lock, flags);
  1194. /* Disable (but don't clear!) interrupts here to avoid
  1195. * back-to-back ISRs and sporadic interrupts from our NIC.
  1196. * If we have something to service, the tasklet will re-enable ints.
  1197. * If we *don't* have something, we'll re-enable before leaving here. */
  1198. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1199. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1200. /* Discover which interrupts are active/pending */
  1201. inta = iwl_read32(priv, CSR_INT);
  1202. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1203. /* Ignore interrupt if there's nothing in NIC to service.
  1204. * This may be due to IRQ shared with another device,
  1205. * or due to sporadic interrupts thrown from our NIC. */
  1206. if (!inta && !inta_fh) {
  1207. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1208. goto none;
  1209. }
  1210. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1211. /* Hardware disappeared. It might have already raised
  1212. * an interrupt */
  1213. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1214. goto unplugged;
  1215. }
  1216. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1217. inta, inta_mask, inta_fh);
  1218. inta &= ~CSR_INT_BIT_SCD;
  1219. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1220. if (likely(inta || inta_fh))
  1221. tasklet_schedule(&priv->irq_tasklet);
  1222. unplugged:
  1223. spin_unlock_irqrestore(&priv->lock, flags);
  1224. return IRQ_HANDLED;
  1225. none:
  1226. /* re-enable interrupts here since we don't have anything to service. */
  1227. /* only Re-enable if diabled by irq */
  1228. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1229. iwl_enable_interrupts(priv);
  1230. spin_unlock_irqrestore(&priv->lock, flags);
  1231. return IRQ_NONE;
  1232. }
  1233. EXPORT_SYMBOL(iwl_isr_legacy);
  1234. void iwl_send_bt_config(struct iwl_priv *priv)
  1235. {
  1236. struct iwl_bt_cmd bt_cmd = {
  1237. .lead_time = BT_LEAD_TIME_DEF,
  1238. .max_kill = BT_MAX_KILL_DEF,
  1239. .kill_ack_mask = 0,
  1240. .kill_cts_mask = 0,
  1241. };
  1242. if (!bt_coex_active)
  1243. bt_cmd.flags = BT_COEX_DISABLE;
  1244. else
  1245. bt_cmd.flags = BT_COEX_ENABLE;
  1246. IWL_DEBUG_INFO(priv, "BT coex %s\n",
  1247. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  1248. if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1249. sizeof(struct iwl_bt_cmd), &bt_cmd))
  1250. IWL_ERR(priv, "failed to send BT Coex Config\n");
  1251. }
  1252. EXPORT_SYMBOL(iwl_send_bt_config);
  1253. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
  1254. {
  1255. struct iwl_statistics_cmd statistics_cmd = {
  1256. .configuration_flags =
  1257. clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
  1258. };
  1259. if (flags & CMD_ASYNC)
  1260. return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
  1261. sizeof(struct iwl_statistics_cmd),
  1262. &statistics_cmd, NULL);
  1263. else
  1264. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  1265. sizeof(struct iwl_statistics_cmd),
  1266. &statistics_cmd);
  1267. }
  1268. EXPORT_SYMBOL(iwl_send_statistics_request);
  1269. /**
  1270. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1271. * using sample data 100 bytes apart. If these sample points are good,
  1272. * it's a pretty good bet that everything between them is good, too.
  1273. */
  1274. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1275. {
  1276. u32 val;
  1277. int ret = 0;
  1278. u32 errcnt = 0;
  1279. u32 i;
  1280. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1281. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1282. /* read data comes through single port, auto-incr addr */
  1283. /* NOTE: Use the debugless read so we don't flood kernel log
  1284. * if IWL_DL_IO is set */
  1285. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1286. i + IWL49_RTC_INST_LOWER_BOUND);
  1287. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1288. if (val != le32_to_cpu(*image)) {
  1289. ret = -EIO;
  1290. errcnt++;
  1291. if (errcnt >= 3)
  1292. break;
  1293. }
  1294. }
  1295. return ret;
  1296. }
  1297. /**
  1298. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1299. * looking at all data.
  1300. */
  1301. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1302. u32 len)
  1303. {
  1304. u32 val;
  1305. u32 save_len = len;
  1306. int ret = 0;
  1307. u32 errcnt;
  1308. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1309. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1310. IWL49_RTC_INST_LOWER_BOUND);
  1311. errcnt = 0;
  1312. for (; len > 0; len -= sizeof(u32), image++) {
  1313. /* read data comes through single port, auto-incr addr */
  1314. /* NOTE: Use the debugless read so we don't flood kernel log
  1315. * if IWL_DL_IO is set */
  1316. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1317. if (val != le32_to_cpu(*image)) {
  1318. IWL_ERR(priv, "uCode INST section is invalid at "
  1319. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1320. save_len - len, val, le32_to_cpu(*image));
  1321. ret = -EIO;
  1322. errcnt++;
  1323. if (errcnt >= 20)
  1324. break;
  1325. }
  1326. }
  1327. if (!errcnt)
  1328. IWL_DEBUG_INFO(priv,
  1329. "ucode image in INSTRUCTION memory is good\n");
  1330. return ret;
  1331. }
  1332. /**
  1333. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1334. * and verify its contents
  1335. */
  1336. int iwl_verify_ucode(struct iwl_priv *priv)
  1337. {
  1338. __le32 *image;
  1339. u32 len;
  1340. int ret;
  1341. /* Try bootstrap */
  1342. image = (__le32 *)priv->ucode_boot.v_addr;
  1343. len = priv->ucode_boot.len;
  1344. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1345. if (!ret) {
  1346. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1347. return 0;
  1348. }
  1349. /* Try initialize */
  1350. image = (__le32 *)priv->ucode_init.v_addr;
  1351. len = priv->ucode_init.len;
  1352. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1353. if (!ret) {
  1354. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1355. return 0;
  1356. }
  1357. /* Try runtime/protocol */
  1358. image = (__le32 *)priv->ucode_code.v_addr;
  1359. len = priv->ucode_code.len;
  1360. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1361. if (!ret) {
  1362. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1363. return 0;
  1364. }
  1365. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1366. /* Since nothing seems to match, show first several data entries in
  1367. * instruction SRAM, so maybe visual inspection will give a clue.
  1368. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1369. image = (__le32 *)priv->ucode_boot.v_addr;
  1370. len = priv->ucode_boot.len;
  1371. ret = iwl_verify_inst_full(priv, image, len);
  1372. return ret;
  1373. }
  1374. EXPORT_SYMBOL(iwl_verify_ucode);
  1375. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1376. {
  1377. struct iwl_ct_kill_config cmd;
  1378. struct iwl_ct_kill_throttling_config adv_cmd;
  1379. unsigned long flags;
  1380. int ret = 0;
  1381. spin_lock_irqsave(&priv->lock, flags);
  1382. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1383. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1384. spin_unlock_irqrestore(&priv->lock, flags);
  1385. priv->thermal_throttle.ct_kill_toggle = false;
  1386. if (priv->cfg->support_ct_kill_exit) {
  1387. adv_cmd.critical_temperature_enter =
  1388. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1389. adv_cmd.critical_temperature_exit =
  1390. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1391. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1392. sizeof(adv_cmd), &adv_cmd);
  1393. if (ret)
  1394. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1395. else
  1396. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1397. "succeeded, "
  1398. "critical temperature enter is %d,"
  1399. "exit is %d\n",
  1400. priv->hw_params.ct_kill_threshold,
  1401. priv->hw_params.ct_kill_exit_threshold);
  1402. } else {
  1403. cmd.critical_temperature_R =
  1404. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1405. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1406. sizeof(cmd), &cmd);
  1407. if (ret)
  1408. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1409. else
  1410. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1411. "succeeded, "
  1412. "critical temperature is %d\n",
  1413. priv->hw_params.ct_kill_threshold);
  1414. }
  1415. }
  1416. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1417. /*
  1418. * CARD_STATE_CMD
  1419. *
  1420. * Use: Sets the device's internal card state to enable, disable, or halt
  1421. *
  1422. * When in the 'enable' state the card operates as normal.
  1423. * When in the 'disable' state, the card enters into a low power mode.
  1424. * When in the 'halt' state, the card is shut down and must be fully
  1425. * restarted to come back on.
  1426. */
  1427. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1428. {
  1429. struct iwl_host_cmd cmd = {
  1430. .id = REPLY_CARD_STATE_CMD,
  1431. .len = sizeof(u32),
  1432. .data = &flags,
  1433. .flags = meta_flag,
  1434. };
  1435. return iwl_send_cmd(priv, &cmd);
  1436. }
  1437. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1438. struct iwl_rx_mem_buffer *rxb)
  1439. {
  1440. #ifdef CONFIG_IWLWIFI_DEBUG
  1441. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1442. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1443. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1444. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1445. #endif
  1446. }
  1447. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1448. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1449. struct iwl_rx_mem_buffer *rxb)
  1450. {
  1451. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1452. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1453. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1454. "notification for %s:\n", len,
  1455. get_cmd_string(pkt->hdr.cmd));
  1456. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1457. }
  1458. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1459. void iwl_rx_reply_error(struct iwl_priv *priv,
  1460. struct iwl_rx_mem_buffer *rxb)
  1461. {
  1462. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1463. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1464. "seq 0x%04X ser 0x%08X\n",
  1465. le32_to_cpu(pkt->u.err_resp.error_type),
  1466. get_cmd_string(pkt->u.err_resp.cmd_id),
  1467. pkt->u.err_resp.cmd_id,
  1468. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1469. le32_to_cpu(pkt->u.err_resp.error_info));
  1470. }
  1471. EXPORT_SYMBOL(iwl_rx_reply_error);
  1472. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1473. {
  1474. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1475. }
  1476. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1477. const struct ieee80211_tx_queue_params *params)
  1478. {
  1479. struct iwl_priv *priv = hw->priv;
  1480. unsigned long flags;
  1481. int q;
  1482. IWL_DEBUG_MAC80211(priv, "enter\n");
  1483. if (!iwl_is_ready_rf(priv)) {
  1484. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1485. return -EIO;
  1486. }
  1487. if (queue >= AC_NUM) {
  1488. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1489. return 0;
  1490. }
  1491. q = AC_NUM - 1 - queue;
  1492. spin_lock_irqsave(&priv->lock, flags);
  1493. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  1494. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  1495. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1496. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  1497. cpu_to_le16((params->txop * 32));
  1498. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1499. spin_unlock_irqrestore(&priv->lock, flags);
  1500. IWL_DEBUG_MAC80211(priv, "leave\n");
  1501. return 0;
  1502. }
  1503. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1504. static void iwl_ht_conf(struct iwl_priv *priv,
  1505. struct ieee80211_vif *vif)
  1506. {
  1507. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1508. struct ieee80211_sta *sta;
  1509. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1510. IWL_DEBUG_MAC80211(priv, "enter:\n");
  1511. if (!ht_conf->is_ht)
  1512. return;
  1513. ht_conf->ht_protection =
  1514. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1515. ht_conf->non_GF_STA_present =
  1516. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1517. ht_conf->single_chain_sufficient = false;
  1518. switch (vif->type) {
  1519. case NL80211_IFTYPE_STATION:
  1520. rcu_read_lock();
  1521. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  1522. if (sta) {
  1523. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  1524. int maxstreams;
  1525. maxstreams = (ht_cap->mcs.tx_params &
  1526. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  1527. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1528. maxstreams += 1;
  1529. if ((ht_cap->mcs.rx_mask[1] == 0) &&
  1530. (ht_cap->mcs.rx_mask[2] == 0))
  1531. ht_conf->single_chain_sufficient = true;
  1532. if (maxstreams <= 1)
  1533. ht_conf->single_chain_sufficient = true;
  1534. } else {
  1535. /*
  1536. * If at all, this can only happen through a race
  1537. * when the AP disconnects us while we're still
  1538. * setting up the connection, in that case mac80211
  1539. * will soon tell us about that.
  1540. */
  1541. ht_conf->single_chain_sufficient = true;
  1542. }
  1543. rcu_read_unlock();
  1544. break;
  1545. case NL80211_IFTYPE_ADHOC:
  1546. ht_conf->single_chain_sufficient = true;
  1547. break;
  1548. default:
  1549. break;
  1550. }
  1551. IWL_DEBUG_MAC80211(priv, "leave\n");
  1552. }
  1553. static inline void iwl_set_no_assoc(struct iwl_priv *priv)
  1554. {
  1555. iwl_led_disassociate(priv);
  1556. /*
  1557. * inform the ucode that there is no longer an
  1558. * association and that no more packets should be
  1559. * sent
  1560. */
  1561. priv->staging_rxon.filter_flags &=
  1562. ~RXON_FILTER_ASSOC_MSK;
  1563. priv->staging_rxon.assoc_id = 0;
  1564. iwlcore_commit_rxon(priv);
  1565. }
  1566. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  1567. struct ieee80211_vif *vif,
  1568. struct ieee80211_bss_conf *bss_conf,
  1569. u32 changes)
  1570. {
  1571. struct iwl_priv *priv = hw->priv;
  1572. int ret;
  1573. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  1574. if (!iwl_is_alive(priv))
  1575. return;
  1576. mutex_lock(&priv->mutex);
  1577. if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
  1578. dev_kfree_skb(priv->ibss_beacon);
  1579. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  1580. }
  1581. if (changes & BSS_CHANGED_BEACON_INT) {
  1582. /* TODO: in AP mode, do something to make this take effect */
  1583. }
  1584. if (changes & BSS_CHANGED_BSSID) {
  1585. IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
  1586. /*
  1587. * If there is currently a HW scan going on in the
  1588. * background then we need to cancel it else the RXON
  1589. * below/in post_associate will fail.
  1590. */
  1591. if (iwl_scan_cancel_timeout(priv, 100)) {
  1592. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1593. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  1594. mutex_unlock(&priv->mutex);
  1595. return;
  1596. }
  1597. /* mac80211 only sets assoc when in STATION mode */
  1598. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  1599. memcpy(priv->staging_rxon.bssid_addr,
  1600. bss_conf->bssid, ETH_ALEN);
  1601. /* currently needed in a few places */
  1602. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1603. } else {
  1604. priv->staging_rxon.filter_flags &=
  1605. ~RXON_FILTER_ASSOC_MSK;
  1606. }
  1607. }
  1608. /*
  1609. * This needs to be after setting the BSSID in case
  1610. * mac80211 decides to do both changes at once because
  1611. * it will invoke post_associate.
  1612. */
  1613. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1614. changes & BSS_CHANGED_BEACON) {
  1615. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  1616. if (beacon)
  1617. iwl_mac_beacon_update(hw, beacon);
  1618. }
  1619. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  1620. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  1621. bss_conf->use_short_preamble);
  1622. if (bss_conf->use_short_preamble)
  1623. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1624. else
  1625. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1626. }
  1627. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  1628. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  1629. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  1630. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  1631. else
  1632. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  1633. }
  1634. if (changes & BSS_CHANGED_BASIC_RATES) {
  1635. /* XXX use this information
  1636. *
  1637. * To do that, remove code from iwl_set_rate() and put something
  1638. * like this here:
  1639. *
  1640. if (A-band)
  1641. priv->staging_rxon.ofdm_basic_rates =
  1642. bss_conf->basic_rates;
  1643. else
  1644. priv->staging_rxon.ofdm_basic_rates =
  1645. bss_conf->basic_rates >> 4;
  1646. priv->staging_rxon.cck_basic_rates =
  1647. bss_conf->basic_rates & 0xF;
  1648. */
  1649. }
  1650. if (changes & BSS_CHANGED_HT) {
  1651. iwl_ht_conf(priv, vif);
  1652. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1653. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1654. }
  1655. if (changes & BSS_CHANGED_ASSOC) {
  1656. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  1657. if (bss_conf->assoc) {
  1658. priv->timestamp = bss_conf->timestamp;
  1659. iwl_led_associate(priv);
  1660. if (!iwl_is_rfkill(priv))
  1661. priv->cfg->ops->lib->post_associate(priv, vif);
  1662. } else
  1663. iwl_set_no_assoc(priv);
  1664. }
  1665. if (changes && iwl_is_associated(priv) && bss_conf->aid) {
  1666. IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
  1667. changes);
  1668. ret = iwl_send_rxon_assoc(priv);
  1669. if (!ret) {
  1670. /* Sync active_rxon with latest change. */
  1671. memcpy((void *)&priv->active_rxon,
  1672. &priv->staging_rxon,
  1673. sizeof(struct iwl_rxon_cmd));
  1674. }
  1675. }
  1676. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  1677. if (vif->bss_conf.enable_beacon) {
  1678. memcpy(priv->staging_rxon.bssid_addr,
  1679. bss_conf->bssid, ETH_ALEN);
  1680. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1681. iwlcore_config_ap(priv, vif);
  1682. } else
  1683. iwl_set_no_assoc(priv);
  1684. }
  1685. if (changes & BSS_CHANGED_IBSS) {
  1686. ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
  1687. bss_conf->ibss_joined);
  1688. if (ret)
  1689. IWL_ERR(priv, "failed to %s IBSS station %pM\n",
  1690. bss_conf->ibss_joined ? "add" : "remove",
  1691. bss_conf->bssid);
  1692. }
  1693. mutex_unlock(&priv->mutex);
  1694. IWL_DEBUG_MAC80211(priv, "leave\n");
  1695. }
  1696. EXPORT_SYMBOL(iwl_bss_info_changed);
  1697. int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  1698. {
  1699. struct iwl_priv *priv = hw->priv;
  1700. unsigned long flags;
  1701. __le64 timestamp;
  1702. IWL_DEBUG_MAC80211(priv, "enter\n");
  1703. if (!iwl_is_ready_rf(priv)) {
  1704. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1705. return -EIO;
  1706. }
  1707. spin_lock_irqsave(&priv->lock, flags);
  1708. if (priv->ibss_beacon)
  1709. dev_kfree_skb(priv->ibss_beacon);
  1710. priv->ibss_beacon = skb;
  1711. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  1712. priv->timestamp = le64_to_cpu(timestamp);
  1713. IWL_DEBUG_MAC80211(priv, "leave\n");
  1714. spin_unlock_irqrestore(&priv->lock, flags);
  1715. priv->cfg->ops->lib->post_associate(priv, priv->vif);
  1716. return 0;
  1717. }
  1718. EXPORT_SYMBOL(iwl_mac_beacon_update);
  1719. static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
  1720. {
  1721. iwl_connection_init_rx_config(priv, vif);
  1722. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1723. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1724. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1725. return iwlcore_commit_rxon(priv);
  1726. }
  1727. int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1728. {
  1729. struct iwl_priv *priv = hw->priv;
  1730. int err = 0;
  1731. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
  1732. mutex_lock(&priv->mutex);
  1733. if (WARN_ON(!iwl_is_ready_rf(priv))) {
  1734. err = -EINVAL;
  1735. goto out;
  1736. }
  1737. if (priv->vif) {
  1738. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  1739. err = -EOPNOTSUPP;
  1740. goto out;
  1741. }
  1742. priv->vif = vif;
  1743. priv->iw_mode = vif->type;
  1744. IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
  1745. memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
  1746. err = iwl_set_mode(priv, vif);
  1747. if (err)
  1748. goto out_err;
  1749. goto out;
  1750. out_err:
  1751. priv->vif = NULL;
  1752. priv->iw_mode = NL80211_IFTYPE_STATION;
  1753. out:
  1754. mutex_unlock(&priv->mutex);
  1755. IWL_DEBUG_MAC80211(priv, "leave\n");
  1756. return err;
  1757. }
  1758. EXPORT_SYMBOL(iwl_mac_add_interface);
  1759. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  1760. struct ieee80211_vif *vif)
  1761. {
  1762. struct iwl_priv *priv = hw->priv;
  1763. IWL_DEBUG_MAC80211(priv, "enter\n");
  1764. mutex_lock(&priv->mutex);
  1765. if (iwl_is_ready_rf(priv)) {
  1766. iwl_scan_cancel_timeout(priv, 100);
  1767. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1768. iwlcore_commit_rxon(priv);
  1769. }
  1770. if (priv->vif == vif) {
  1771. priv->vif = NULL;
  1772. memset(priv->bssid, 0, ETH_ALEN);
  1773. }
  1774. mutex_unlock(&priv->mutex);
  1775. IWL_DEBUG_MAC80211(priv, "leave\n");
  1776. }
  1777. EXPORT_SYMBOL(iwl_mac_remove_interface);
  1778. /**
  1779. * iwl_mac_config - mac80211 config callback
  1780. */
  1781. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  1782. {
  1783. struct iwl_priv *priv = hw->priv;
  1784. const struct iwl_channel_info *ch_info;
  1785. struct ieee80211_conf *conf = &hw->conf;
  1786. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1787. unsigned long flags = 0;
  1788. int ret = 0;
  1789. u16 ch;
  1790. int scan_active = 0;
  1791. mutex_lock(&priv->mutex);
  1792. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  1793. conf->channel->hw_value, changed);
  1794. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  1795. test_bit(STATUS_SCANNING, &priv->status))) {
  1796. scan_active = 1;
  1797. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  1798. }
  1799. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  1800. IEEE80211_CONF_CHANGE_CHANNEL)) {
  1801. /* mac80211 uses static for non-HT which is what we want */
  1802. priv->current_ht_config.smps = conf->smps_mode;
  1803. /*
  1804. * Recalculate chain counts.
  1805. *
  1806. * If monitor mode is enabled then mac80211 will
  1807. * set up the SM PS mode to OFF if an HT channel is
  1808. * configured.
  1809. */
  1810. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1811. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1812. }
  1813. /* during scanning mac80211 will delay channel setting until
  1814. * scan finish with changed = 0
  1815. */
  1816. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  1817. if (scan_active)
  1818. goto set_ch_out;
  1819. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  1820. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  1821. if (!is_channel_valid(ch_info)) {
  1822. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  1823. ret = -EINVAL;
  1824. goto set_ch_out;
  1825. }
  1826. spin_lock_irqsave(&priv->lock, flags);
  1827. /* Configure HT40 channels */
  1828. ht_conf->is_ht = conf_is_ht(conf);
  1829. if (ht_conf->is_ht) {
  1830. if (conf_is_ht40_minus(conf)) {
  1831. ht_conf->extension_chan_offset =
  1832. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  1833. ht_conf->is_40mhz = true;
  1834. } else if (conf_is_ht40_plus(conf)) {
  1835. ht_conf->extension_chan_offset =
  1836. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  1837. ht_conf->is_40mhz = true;
  1838. } else {
  1839. ht_conf->extension_chan_offset =
  1840. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  1841. ht_conf->is_40mhz = false;
  1842. }
  1843. } else
  1844. ht_conf->is_40mhz = false;
  1845. /* Default to no protection. Protection mode will later be set
  1846. * from BSS config in iwl_ht_conf */
  1847. ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  1848. /* if we are switching from ht to 2.4 clear flags
  1849. * from any ht related info since 2.4 does not
  1850. * support ht */
  1851. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  1852. priv->staging_rxon.flags = 0;
  1853. iwl_set_rxon_channel(priv, conf->channel);
  1854. iwl_set_rxon_ht(priv, ht_conf);
  1855. iwl_set_flags_for_band(priv, conf->channel->band, priv->vif);
  1856. spin_unlock_irqrestore(&priv->lock, flags);
  1857. if (iwl_is_associated(priv) &&
  1858. (le16_to_cpu(priv->active_rxon.channel) != ch) &&
  1859. priv->cfg->ops->lib->set_channel_switch) {
  1860. iwl_set_rate(priv);
  1861. /*
  1862. * at this point, staging_rxon has the
  1863. * configuration for channel switch
  1864. */
  1865. ret = priv->cfg->ops->lib->set_channel_switch(priv,
  1866. ch);
  1867. if (!ret) {
  1868. iwl_print_rx_config_cmd(priv);
  1869. goto out;
  1870. }
  1871. priv->switch_rxon.switch_in_progress = false;
  1872. }
  1873. set_ch_out:
  1874. /* The list of supported rates and rate mask can be different
  1875. * for each band; since the band may have changed, reset
  1876. * the rate mask to what mac80211 lists */
  1877. iwl_set_rate(priv);
  1878. }
  1879. if (changed & (IEEE80211_CONF_CHANGE_PS |
  1880. IEEE80211_CONF_CHANGE_IDLE)) {
  1881. ret = iwl_power_update_mode(priv, false);
  1882. if (ret)
  1883. IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
  1884. }
  1885. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1886. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  1887. priv->tx_power_user_lmt, conf->power_level);
  1888. iwl_set_tx_power(priv, conf->power_level, false);
  1889. }
  1890. if (changed & IEEE80211_CONF_CHANGE_QOS) {
  1891. bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
  1892. spin_lock_irqsave(&priv->lock, flags);
  1893. priv->qos_data.qos_active = qos_active;
  1894. iwl_update_qos(priv);
  1895. spin_unlock_irqrestore(&priv->lock, flags);
  1896. }
  1897. if (!iwl_is_ready(priv)) {
  1898. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  1899. goto out;
  1900. }
  1901. if (scan_active)
  1902. goto out;
  1903. if (memcmp(&priv->active_rxon,
  1904. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  1905. iwlcore_commit_rxon(priv);
  1906. else
  1907. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  1908. out:
  1909. IWL_DEBUG_MAC80211(priv, "leave\n");
  1910. mutex_unlock(&priv->mutex);
  1911. return ret;
  1912. }
  1913. EXPORT_SYMBOL(iwl_mac_config);
  1914. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  1915. {
  1916. struct iwl_priv *priv = hw->priv;
  1917. unsigned long flags;
  1918. mutex_lock(&priv->mutex);
  1919. IWL_DEBUG_MAC80211(priv, "enter\n");
  1920. spin_lock_irqsave(&priv->lock, flags);
  1921. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
  1922. spin_unlock_irqrestore(&priv->lock, flags);
  1923. spin_lock_irqsave(&priv->lock, flags);
  1924. /* new association get rid of ibss beacon skb */
  1925. if (priv->ibss_beacon)
  1926. dev_kfree_skb(priv->ibss_beacon);
  1927. priv->ibss_beacon = NULL;
  1928. priv->timestamp = 0;
  1929. spin_unlock_irqrestore(&priv->lock, flags);
  1930. if (!iwl_is_ready_rf(priv)) {
  1931. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  1932. mutex_unlock(&priv->mutex);
  1933. return;
  1934. }
  1935. /* we are restarting association process
  1936. * clear RXON_FILTER_ASSOC_MSK bit
  1937. */
  1938. iwl_scan_cancel_timeout(priv, 100);
  1939. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1940. iwlcore_commit_rxon(priv);
  1941. iwl_set_rate(priv);
  1942. mutex_unlock(&priv->mutex);
  1943. IWL_DEBUG_MAC80211(priv, "leave\n");
  1944. }
  1945. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  1946. int iwl_alloc_txq_mem(struct iwl_priv *priv)
  1947. {
  1948. if (!priv->txq)
  1949. priv->txq = kzalloc(
  1950. sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
  1951. GFP_KERNEL);
  1952. if (!priv->txq) {
  1953. IWL_ERR(priv, "Not enough memory for txq\n");
  1954. return -ENOMEM;
  1955. }
  1956. return 0;
  1957. }
  1958. EXPORT_SYMBOL(iwl_alloc_txq_mem);
  1959. void iwl_free_txq_mem(struct iwl_priv *priv)
  1960. {
  1961. kfree(priv->txq);
  1962. priv->txq = NULL;
  1963. }
  1964. EXPORT_SYMBOL(iwl_free_txq_mem);
  1965. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1966. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  1967. void iwl_reset_traffic_log(struct iwl_priv *priv)
  1968. {
  1969. priv->tx_traffic_idx = 0;
  1970. priv->rx_traffic_idx = 0;
  1971. if (priv->tx_traffic)
  1972. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1973. if (priv->rx_traffic)
  1974. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1975. }
  1976. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  1977. {
  1978. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  1979. if (iwl_debug_level & IWL_DL_TX) {
  1980. if (!priv->tx_traffic) {
  1981. priv->tx_traffic =
  1982. kzalloc(traffic_size, GFP_KERNEL);
  1983. if (!priv->tx_traffic)
  1984. return -ENOMEM;
  1985. }
  1986. }
  1987. if (iwl_debug_level & IWL_DL_RX) {
  1988. if (!priv->rx_traffic) {
  1989. priv->rx_traffic =
  1990. kzalloc(traffic_size, GFP_KERNEL);
  1991. if (!priv->rx_traffic)
  1992. return -ENOMEM;
  1993. }
  1994. }
  1995. iwl_reset_traffic_log(priv);
  1996. return 0;
  1997. }
  1998. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  1999. void iwl_free_traffic_mem(struct iwl_priv *priv)
  2000. {
  2001. kfree(priv->tx_traffic);
  2002. priv->tx_traffic = NULL;
  2003. kfree(priv->rx_traffic);
  2004. priv->rx_traffic = NULL;
  2005. }
  2006. EXPORT_SYMBOL(iwl_free_traffic_mem);
  2007. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  2008. u16 length, struct ieee80211_hdr *header)
  2009. {
  2010. __le16 fc;
  2011. u16 len;
  2012. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  2013. return;
  2014. if (!priv->tx_traffic)
  2015. return;
  2016. fc = header->frame_control;
  2017. if (ieee80211_is_data(fc)) {
  2018. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2019. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2020. memcpy((priv->tx_traffic +
  2021. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2022. header, len);
  2023. priv->tx_traffic_idx =
  2024. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2025. }
  2026. }
  2027. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  2028. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  2029. u16 length, struct ieee80211_hdr *header)
  2030. {
  2031. __le16 fc;
  2032. u16 len;
  2033. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  2034. return;
  2035. if (!priv->rx_traffic)
  2036. return;
  2037. fc = header->frame_control;
  2038. if (ieee80211_is_data(fc)) {
  2039. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2040. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2041. memcpy((priv->rx_traffic +
  2042. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2043. header, len);
  2044. priv->rx_traffic_idx =
  2045. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2046. }
  2047. }
  2048. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  2049. const char *get_mgmt_string(int cmd)
  2050. {
  2051. switch (cmd) {
  2052. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  2053. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  2054. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  2055. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  2056. IWL_CMD(MANAGEMENT_PROBE_REQ);
  2057. IWL_CMD(MANAGEMENT_PROBE_RESP);
  2058. IWL_CMD(MANAGEMENT_BEACON);
  2059. IWL_CMD(MANAGEMENT_ATIM);
  2060. IWL_CMD(MANAGEMENT_DISASSOC);
  2061. IWL_CMD(MANAGEMENT_AUTH);
  2062. IWL_CMD(MANAGEMENT_DEAUTH);
  2063. IWL_CMD(MANAGEMENT_ACTION);
  2064. default:
  2065. return "UNKNOWN";
  2066. }
  2067. }
  2068. const char *get_ctrl_string(int cmd)
  2069. {
  2070. switch (cmd) {
  2071. IWL_CMD(CONTROL_BACK_REQ);
  2072. IWL_CMD(CONTROL_BACK);
  2073. IWL_CMD(CONTROL_PSPOLL);
  2074. IWL_CMD(CONTROL_RTS);
  2075. IWL_CMD(CONTROL_CTS);
  2076. IWL_CMD(CONTROL_ACK);
  2077. IWL_CMD(CONTROL_CFEND);
  2078. IWL_CMD(CONTROL_CFENDACK);
  2079. default:
  2080. return "UNKNOWN";
  2081. }
  2082. }
  2083. void iwl_clear_traffic_stats(struct iwl_priv *priv)
  2084. {
  2085. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  2086. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  2087. priv->led_tpt = 0;
  2088. }
  2089. /*
  2090. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  2091. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  2092. * Use debugFs to display the rx/rx_statistics
  2093. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  2094. * information will be recorded, but DATA pkt still will be recorded
  2095. * for the reason of iwl_led.c need to control the led blinking based on
  2096. * number of tx and rx data.
  2097. *
  2098. */
  2099. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  2100. {
  2101. struct traffic_stats *stats;
  2102. if (is_tx)
  2103. stats = &priv->tx_stats;
  2104. else
  2105. stats = &priv->rx_stats;
  2106. if (ieee80211_is_mgmt(fc)) {
  2107. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2108. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2109. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  2110. break;
  2111. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  2112. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  2113. break;
  2114. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2115. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  2116. break;
  2117. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  2118. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  2119. break;
  2120. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  2121. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  2122. break;
  2123. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  2124. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  2125. break;
  2126. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  2127. stats->mgmt[MANAGEMENT_BEACON]++;
  2128. break;
  2129. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  2130. stats->mgmt[MANAGEMENT_ATIM]++;
  2131. break;
  2132. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  2133. stats->mgmt[MANAGEMENT_DISASSOC]++;
  2134. break;
  2135. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2136. stats->mgmt[MANAGEMENT_AUTH]++;
  2137. break;
  2138. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2139. stats->mgmt[MANAGEMENT_DEAUTH]++;
  2140. break;
  2141. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  2142. stats->mgmt[MANAGEMENT_ACTION]++;
  2143. break;
  2144. }
  2145. } else if (ieee80211_is_ctl(fc)) {
  2146. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2147. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  2148. stats->ctrl[CONTROL_BACK_REQ]++;
  2149. break;
  2150. case cpu_to_le16(IEEE80211_STYPE_BACK):
  2151. stats->ctrl[CONTROL_BACK]++;
  2152. break;
  2153. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  2154. stats->ctrl[CONTROL_PSPOLL]++;
  2155. break;
  2156. case cpu_to_le16(IEEE80211_STYPE_RTS):
  2157. stats->ctrl[CONTROL_RTS]++;
  2158. break;
  2159. case cpu_to_le16(IEEE80211_STYPE_CTS):
  2160. stats->ctrl[CONTROL_CTS]++;
  2161. break;
  2162. case cpu_to_le16(IEEE80211_STYPE_ACK):
  2163. stats->ctrl[CONTROL_ACK]++;
  2164. break;
  2165. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  2166. stats->ctrl[CONTROL_CFEND]++;
  2167. break;
  2168. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  2169. stats->ctrl[CONTROL_CFENDACK]++;
  2170. break;
  2171. }
  2172. } else {
  2173. /* data */
  2174. stats->data_cnt++;
  2175. stats->data_bytes += len;
  2176. }
  2177. iwl_leds_background(priv);
  2178. }
  2179. EXPORT_SYMBOL(iwl_update_stats);
  2180. #endif
  2181. const static char *get_csr_string(int cmd)
  2182. {
  2183. switch (cmd) {
  2184. IWL_CMD(CSR_HW_IF_CONFIG_REG);
  2185. IWL_CMD(CSR_INT_COALESCING);
  2186. IWL_CMD(CSR_INT);
  2187. IWL_CMD(CSR_INT_MASK);
  2188. IWL_CMD(CSR_FH_INT_STATUS);
  2189. IWL_CMD(CSR_GPIO_IN);
  2190. IWL_CMD(CSR_RESET);
  2191. IWL_CMD(CSR_GP_CNTRL);
  2192. IWL_CMD(CSR_HW_REV);
  2193. IWL_CMD(CSR_EEPROM_REG);
  2194. IWL_CMD(CSR_EEPROM_GP);
  2195. IWL_CMD(CSR_OTP_GP_REG);
  2196. IWL_CMD(CSR_GIO_REG);
  2197. IWL_CMD(CSR_GP_UCODE_REG);
  2198. IWL_CMD(CSR_GP_DRIVER_REG);
  2199. IWL_CMD(CSR_UCODE_DRV_GP1);
  2200. IWL_CMD(CSR_UCODE_DRV_GP2);
  2201. IWL_CMD(CSR_LED_REG);
  2202. IWL_CMD(CSR_DRAM_INT_TBL_REG);
  2203. IWL_CMD(CSR_GIO_CHICKEN_BITS);
  2204. IWL_CMD(CSR_ANA_PLL_CFG);
  2205. IWL_CMD(CSR_HW_REV_WA_REG);
  2206. IWL_CMD(CSR_DBG_HPET_MEM_REG);
  2207. default:
  2208. return "UNKNOWN";
  2209. }
  2210. }
  2211. void iwl_dump_csr(struct iwl_priv *priv)
  2212. {
  2213. int i;
  2214. u32 csr_tbl[] = {
  2215. CSR_HW_IF_CONFIG_REG,
  2216. CSR_INT_COALESCING,
  2217. CSR_INT,
  2218. CSR_INT_MASK,
  2219. CSR_FH_INT_STATUS,
  2220. CSR_GPIO_IN,
  2221. CSR_RESET,
  2222. CSR_GP_CNTRL,
  2223. CSR_HW_REV,
  2224. CSR_EEPROM_REG,
  2225. CSR_EEPROM_GP,
  2226. CSR_OTP_GP_REG,
  2227. CSR_GIO_REG,
  2228. CSR_GP_UCODE_REG,
  2229. CSR_GP_DRIVER_REG,
  2230. CSR_UCODE_DRV_GP1,
  2231. CSR_UCODE_DRV_GP2,
  2232. CSR_LED_REG,
  2233. CSR_DRAM_INT_TBL_REG,
  2234. CSR_GIO_CHICKEN_BITS,
  2235. CSR_ANA_PLL_CFG,
  2236. CSR_HW_REV_WA_REG,
  2237. CSR_DBG_HPET_MEM_REG
  2238. };
  2239. IWL_ERR(priv, "CSR values:\n");
  2240. IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
  2241. "CSR_INT_PERIODIC_REG)\n");
  2242. for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
  2243. IWL_ERR(priv, " %25s: 0X%08x\n",
  2244. get_csr_string(csr_tbl[i]),
  2245. iwl_read32(priv, csr_tbl[i]));
  2246. }
  2247. }
  2248. EXPORT_SYMBOL(iwl_dump_csr);
  2249. const static char *get_fh_string(int cmd)
  2250. {
  2251. switch (cmd) {
  2252. IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
  2253. IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
  2254. IWL_CMD(FH_RSCSR_CHNL0_WPTR);
  2255. IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
  2256. IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
  2257. IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
  2258. IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
  2259. IWL_CMD(FH_TSSR_TX_STATUS_REG);
  2260. IWL_CMD(FH_TSSR_TX_ERROR_REG);
  2261. default:
  2262. return "UNKNOWN";
  2263. }
  2264. }
  2265. int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
  2266. {
  2267. int i;
  2268. #ifdef CONFIG_IWLWIFI_DEBUG
  2269. int pos = 0;
  2270. size_t bufsz = 0;
  2271. #endif
  2272. u32 fh_tbl[] = {
  2273. FH_RSCSR_CHNL0_STTS_WPTR_REG,
  2274. FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  2275. FH_RSCSR_CHNL0_WPTR,
  2276. FH_MEM_RCSR_CHNL0_CONFIG_REG,
  2277. FH_MEM_RSSR_SHARED_CTRL_REG,
  2278. FH_MEM_RSSR_RX_STATUS_REG,
  2279. FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
  2280. FH_TSSR_TX_STATUS_REG,
  2281. FH_TSSR_TX_ERROR_REG
  2282. };
  2283. #ifdef CONFIG_IWLWIFI_DEBUG
  2284. if (display) {
  2285. bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
  2286. *buf = kmalloc(bufsz, GFP_KERNEL);
  2287. if (!*buf)
  2288. return -ENOMEM;
  2289. pos += scnprintf(*buf + pos, bufsz - pos,
  2290. "FH register values:\n");
  2291. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2292. pos += scnprintf(*buf + pos, bufsz - pos,
  2293. " %34s: 0X%08x\n",
  2294. get_fh_string(fh_tbl[i]),
  2295. iwl_read_direct32(priv, fh_tbl[i]));
  2296. }
  2297. return pos;
  2298. }
  2299. #endif
  2300. IWL_ERR(priv, "FH register values:\n");
  2301. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2302. IWL_ERR(priv, " %34s: 0X%08x\n",
  2303. get_fh_string(fh_tbl[i]),
  2304. iwl_read_direct32(priv, fh_tbl[i]));
  2305. }
  2306. return 0;
  2307. }
  2308. EXPORT_SYMBOL(iwl_dump_fh);
  2309. static void iwl_force_rf_reset(struct iwl_priv *priv)
  2310. {
  2311. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2312. return;
  2313. if (!iwl_is_associated(priv)) {
  2314. IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
  2315. return;
  2316. }
  2317. /*
  2318. * There is no easy and better way to force reset the radio,
  2319. * the only known method is switching channel which will force to
  2320. * reset and tune the radio.
  2321. * Use internal short scan (single channel) operation to should
  2322. * achieve this objective.
  2323. * Driver should reset the radio when number of consecutive missed
  2324. * beacon, or any other uCode error condition detected.
  2325. */
  2326. IWL_DEBUG_INFO(priv, "perform radio reset.\n");
  2327. iwl_internal_short_hw_scan(priv);
  2328. }
  2329. int iwl_force_reset(struct iwl_priv *priv, int mode)
  2330. {
  2331. struct iwl_force_reset *force_reset;
  2332. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2333. return -EINVAL;
  2334. if (mode >= IWL_MAX_FORCE_RESET) {
  2335. IWL_DEBUG_INFO(priv, "invalid reset request.\n");
  2336. return -EINVAL;
  2337. }
  2338. force_reset = &priv->force_reset[mode];
  2339. force_reset->reset_request_count++;
  2340. if (force_reset->last_force_reset_jiffies &&
  2341. time_after(force_reset->last_force_reset_jiffies +
  2342. force_reset->reset_duration, jiffies)) {
  2343. IWL_DEBUG_INFO(priv, "force reset rejected\n");
  2344. force_reset->reset_reject_count++;
  2345. return -EAGAIN;
  2346. }
  2347. force_reset->reset_success_count++;
  2348. force_reset->last_force_reset_jiffies = jiffies;
  2349. IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
  2350. switch (mode) {
  2351. case IWL_RF_RESET:
  2352. iwl_force_rf_reset(priv);
  2353. break;
  2354. case IWL_FW_RESET:
  2355. IWL_ERR(priv, "On demand firmware reload\n");
  2356. /* Set the FW error flag -- cleared on iwl_down */
  2357. set_bit(STATUS_FW_ERROR, &priv->status);
  2358. wake_up_interruptible(&priv->wait_command_queue);
  2359. /*
  2360. * Keep the restart process from trying to send host
  2361. * commands by clearing the INIT status bit
  2362. */
  2363. clear_bit(STATUS_READY, &priv->status);
  2364. queue_work(priv->workqueue, &priv->restart);
  2365. break;
  2366. }
  2367. return 0;
  2368. }
  2369. EXPORT_SYMBOL(iwl_force_reset);
  2370. /**
  2371. * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
  2372. *
  2373. * During normal condition (no queue is stuck), the timer is continually set to
  2374. * execute every monitor_recover_period milliseconds after the last timer
  2375. * expired. When the queue read_ptr is at the same place, the timer is
  2376. * shorten to 100mSecs. This is
  2377. * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
  2378. * 2) to detect the stuck queues quicker before the station and AP can
  2379. * disassociate each other.
  2380. *
  2381. * This function monitors all the tx queues and recover from it if any
  2382. * of the queues are stuck.
  2383. * 1. It first check the cmd queue for stuck conditions. If it is stuck,
  2384. * it will recover by resetting the firmware and return.
  2385. * 2. Then, it checks for station association. If it associates it will check
  2386. * other queues. If any queue is stuck, it will recover by resetting
  2387. * the firmware.
  2388. * Note: It the number of times the queue read_ptr to be at the same place to
  2389. * be MAX_REPEAT+1 in order to consider to be stuck.
  2390. */
  2391. /*
  2392. * The maximum number of times the read pointer of the tx queue at the
  2393. * same place without considering to be stuck.
  2394. */
  2395. #define MAX_REPEAT (2)
  2396. static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
  2397. {
  2398. struct iwl_tx_queue *txq;
  2399. struct iwl_queue *q;
  2400. txq = &priv->txq[cnt];
  2401. q = &txq->q;
  2402. /* queue is empty, skip */
  2403. if (q->read_ptr != q->write_ptr) {
  2404. if (q->read_ptr == q->last_read_ptr) {
  2405. /* a queue has not been read from last time */
  2406. if (q->repeat_same_read_ptr > MAX_REPEAT) {
  2407. IWL_ERR(priv,
  2408. "queue %d stuck %d time. Fw reload.\n",
  2409. q->id, q->repeat_same_read_ptr);
  2410. q->repeat_same_read_ptr = 0;
  2411. iwl_force_reset(priv, IWL_FW_RESET);
  2412. } else {
  2413. q->repeat_same_read_ptr++;
  2414. IWL_DEBUG_RADIO(priv,
  2415. "queue %d, not read %d time\n",
  2416. q->id,
  2417. q->repeat_same_read_ptr);
  2418. mod_timer(&priv->monitor_recover, jiffies +
  2419. msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
  2420. }
  2421. return 1;
  2422. } else {
  2423. q->last_read_ptr = q->read_ptr;
  2424. q->repeat_same_read_ptr = 0;
  2425. }
  2426. }
  2427. return 0;
  2428. }
  2429. void iwl_bg_monitor_recover(unsigned long data)
  2430. {
  2431. struct iwl_priv *priv = (struct iwl_priv *)data;
  2432. int cnt;
  2433. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2434. return;
  2435. /* monitor and check for stuck cmd queue */
  2436. if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
  2437. return;
  2438. /* monitor and check for other stuck queues */
  2439. if (iwl_is_associated(priv)) {
  2440. for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
  2441. /* skip as we already checked the command queue */
  2442. if (cnt == IWL_CMD_QUEUE_NUM)
  2443. continue;
  2444. if (iwl_check_stuck_queue(priv, cnt))
  2445. return;
  2446. }
  2447. }
  2448. /*
  2449. * Reschedule the timer to occur in
  2450. * priv->cfg->monitor_recover_period
  2451. */
  2452. mod_timer(&priv->monitor_recover,
  2453. jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
  2454. }
  2455. EXPORT_SYMBOL(iwl_bg_monitor_recover);
  2456. #ifdef CONFIG_PM
  2457. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2458. {
  2459. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2460. /*
  2461. * This function is called when system goes into suspend state
  2462. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2463. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2464. * it will not call apm_ops.stop() to stop the DMA operation.
  2465. * Calling apm_ops.stop here to make sure we stop the DMA.
  2466. */
  2467. priv->cfg->ops->lib->apm_ops.stop(priv);
  2468. pci_save_state(pdev);
  2469. pci_disable_device(pdev);
  2470. pci_set_power_state(pdev, PCI_D3hot);
  2471. return 0;
  2472. }
  2473. EXPORT_SYMBOL(iwl_pci_suspend);
  2474. int iwl_pci_resume(struct pci_dev *pdev)
  2475. {
  2476. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2477. int ret;
  2478. /*
  2479. * We disable the RETRY_TIMEOUT register (0x41) to keep
  2480. * PCI Tx retries from interfering with C3 CPU state.
  2481. */
  2482. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  2483. pci_set_power_state(pdev, PCI_D0);
  2484. ret = pci_enable_device(pdev);
  2485. if (ret)
  2486. return ret;
  2487. pci_restore_state(pdev);
  2488. iwl_enable_interrupts(priv);
  2489. return 0;
  2490. }
  2491. EXPORT_SYMBOL(iwl_pci_resume);
  2492. #endif /* CONFIG_PM */