entry.S 4.8 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
  7. * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
  8. * Copyright (C) 2001 MIPS Technologies, Inc.
  9. */
  10. #include <asm/asm.h>
  11. #include <asm/asmmacro.h>
  12. #include <asm/regdef.h>
  13. #include <asm/mipsregs.h>
  14. #include <asm/stackframe.h>
  15. #include <asm/isadep.h>
  16. #include <asm/thread_info.h>
  17. #include <asm/war.h>
  18. #ifdef CONFIG_MIPS_MT_SMTC
  19. #include <asm/mipsmtregs.h>
  20. #endif
  21. #ifndef CONFIG_PREEMPT
  22. #define resume_kernel restore_all
  23. #else
  24. #define __ret_from_irq ret_from_exception
  25. #endif
  26. .text
  27. .align 5
  28. #ifndef CONFIG_PREEMPT
  29. FEXPORT(ret_from_exception)
  30. local_irq_disable # preempt stop
  31. b __ret_from_irq
  32. #endif
  33. FEXPORT(ret_from_irq)
  34. LONG_S s0, TI_REGS($28)
  35. FEXPORT(__ret_from_irq)
  36. /*
  37. * We can be coming here from a syscall done in the kernel space,
  38. * e.g. a failed kernel_execve().
  39. */
  40. resume_userspace_check:
  41. LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
  42. andi t0, t0, KU_USER
  43. beqz t0, resume_kernel
  44. resume_userspace:
  45. local_irq_disable # make sure we dont miss an
  46. # interrupt setting need_resched
  47. # between sampling and return
  48. LONG_L a2, TI_FLAGS($28) # current->work
  49. andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
  50. bnez t0, work_pending
  51. j restore_all
  52. #ifdef CONFIG_PREEMPT
  53. resume_kernel:
  54. local_irq_disable
  55. lw t0, TI_PRE_COUNT($28)
  56. bnez t0, restore_all
  57. need_resched:
  58. LONG_L t0, TI_FLAGS($28)
  59. andi t1, t0, _TIF_NEED_RESCHED
  60. beqz t1, restore_all
  61. LONG_L t0, PT_STATUS(sp) # Interrupts off?
  62. andi t0, 1
  63. beqz t0, restore_all
  64. jal preempt_schedule_irq
  65. b need_resched
  66. #endif
  67. FEXPORT(ret_from_fork)
  68. jal schedule_tail # a0 = struct task_struct *prev
  69. FEXPORT(syscall_exit)
  70. local_irq_disable # make sure need_resched and
  71. # signals dont change between
  72. # sampling and return
  73. LONG_L a2, TI_FLAGS($28) # current->work
  74. li t0, _TIF_ALLWORK_MASK
  75. and t0, a2, t0
  76. bnez t0, syscall_exit_work
  77. restore_all: # restore full frame
  78. #ifdef CONFIG_MIPS_MT_SMTC
  79. #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
  80. /* Re-arm any temporarily masked interrupts not explicitly "acked" */
  81. mfc0 v0, CP0_TCSTATUS
  82. ori v1, v0, TCSTATUS_IXMT
  83. mtc0 v1, CP0_TCSTATUS
  84. andi v0, TCSTATUS_IXMT
  85. _ehb
  86. mfc0 t0, CP0_TCCONTEXT
  87. DMT 9 # dmt t1
  88. jal mips_ihb
  89. mfc0 t2, CP0_STATUS
  90. andi t3, t0, 0xff00
  91. or t2, t2, t3
  92. mtc0 t2, CP0_STATUS
  93. _ehb
  94. andi t1, t1, VPECONTROL_TE
  95. beqz t1, 1f
  96. EMT
  97. 1:
  98. mfc0 v1, CP0_TCSTATUS
  99. /* We set IXMT above, XOR should clear it here */
  100. xori v1, v1, TCSTATUS_IXMT
  101. or v1, v0, v1
  102. mtc0 v1, CP0_TCSTATUS
  103. _ehb
  104. xor t0, t0, t3
  105. mtc0 t0, CP0_TCCONTEXT
  106. #endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
  107. /* Detect and execute deferred IPI "interrupts" */
  108. LONG_L s0, TI_REGS($28)
  109. LONG_S sp, TI_REGS($28)
  110. jal deferred_smtc_ipi
  111. LONG_S s0, TI_REGS($28)
  112. #endif /* CONFIG_MIPS_MT_SMTC */
  113. .set noat
  114. RESTORE_TEMP
  115. RESTORE_AT
  116. RESTORE_STATIC
  117. restore_partial: # restore partial frame
  118. #ifdef CONFIG_TRACE_IRQFLAGS
  119. SAVE_STATIC
  120. SAVE_AT
  121. SAVE_TEMP
  122. LONG_L v0, PT_STATUS(sp)
  123. #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
  124. and v0, ST0_IEP
  125. #else
  126. and v0, ST0_IE
  127. #endif
  128. beqz v0, 1f
  129. jal trace_hardirqs_on
  130. b 2f
  131. 1: jal trace_hardirqs_off
  132. 2:
  133. RESTORE_TEMP
  134. RESTORE_AT
  135. RESTORE_STATIC
  136. #endif
  137. RESTORE_SOME
  138. RESTORE_SP_AND_RET
  139. .set at
  140. work_pending:
  141. andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
  142. beqz t0, work_notifysig
  143. work_resched:
  144. jal schedule
  145. local_irq_disable # make sure need_resched and
  146. # signals dont change between
  147. # sampling and return
  148. LONG_L a2, TI_FLAGS($28)
  149. andi t0, a2, _TIF_WORK_MASK # is there any work to be done
  150. # other than syscall tracing?
  151. beqz t0, restore_all
  152. andi t0, a2, _TIF_NEED_RESCHED
  153. bnez t0, work_resched
  154. work_notifysig: # deal with pending signals and
  155. # notify-resume requests
  156. move a0, sp
  157. li a1, 0
  158. jal do_notify_resume # a2 already loaded
  159. j resume_userspace_check
  160. FEXPORT(syscall_exit_partial)
  161. local_irq_disable # make sure need_resched doesn't
  162. # change between and return
  163. LONG_L a2, TI_FLAGS($28) # current->work
  164. li t0, _TIF_ALLWORK_MASK
  165. and t0, a2
  166. beqz t0, restore_partial
  167. SAVE_STATIC
  168. syscall_exit_work:
  169. LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
  170. andi t0, t0, KU_USER
  171. beqz t0, resume_kernel
  172. li t0, _TIF_WORK_SYSCALL_EXIT
  173. and t0, a2 # a2 is preloaded with TI_FLAGS
  174. beqz t0, work_pending # trace bit set?
  175. local_irq_enable # could let syscall_trace_leave()
  176. # call schedule() instead
  177. move a0, sp
  178. jal syscall_trace_leave
  179. b resume_userspace
  180. #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT)
  181. /*
  182. * MIPS32R2 Instruction Hazard Barrier - must be called
  183. *
  184. * For C code use the inline version named instruction_hazard().
  185. */
  186. LEAF(mips_ihb)
  187. .set mips32r2
  188. jr.hb ra
  189. nop
  190. END(mips_ihb)
  191. #endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */