3945-mac.c 106 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "commands.h"
  49. #include "common.h"
  50. #include "3945.h"
  51. #include "iwl-spectrum.h"
  52. /*
  53. * module name, copyright, version, etc.
  54. */
  55. #define DRV_DESCRIPTION \
  56. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  57. #ifdef CONFIG_IWLEGACY_DEBUG
  58. #define VD "d"
  59. #else
  60. #define VD
  61. #endif
  62. /*
  63. * add "s" to indicate spectrum measurement included.
  64. * we add it here to be consistent with previous releases in which
  65. * this was configurable.
  66. */
  67. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  68. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  69. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  70. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  71. MODULE_VERSION(DRV_VERSION);
  72. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  73. MODULE_LICENSE("GPL");
  74. /* module parameters */
  75. struct il_mod_params il3945_mod_params = {
  76. .sw_crypto = 1,
  77. .restart_fw = 1,
  78. .disable_hw_scan = 1,
  79. /* the rest are 0 by default */
  80. };
  81. /**
  82. * il3945_get_antenna_flags - Get antenna flags for RXON command
  83. * @il: eeprom and antenna fields are used to determine antenna flags
  84. *
  85. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  86. * il3945_mod_params.antenna specifies the antenna diversity mode:
  87. *
  88. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  89. * IL_ANTENNA_MAIN - Force MAIN antenna
  90. * IL_ANTENNA_AUX - Force AUX antenna
  91. */
  92. __le32
  93. il3945_get_antenna_flags(const struct il_priv *il)
  94. {
  95. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  96. switch (il3945_mod_params.antenna) {
  97. case IL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IL_ERR("Bad antenna selector value (0x%x)\n",
  110. il3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int
  114. il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  115. struct ieee80211_key_conf *keyconf, u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == il->hw_params.bcast_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&il->sta_lock, flags);
  128. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  129. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
  131. memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
  132. if ((il->stations[sta_id].sta.key.
  133. key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
  134. il->stations[sta_id].sta.key.key_offset =
  135. il_get_free_ucode_key_idx(il);
  136. /* else, we are overriding an existing key => no need to allocated room
  137. * in uCode. */
  138. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  139. "no space for a new key");
  140. il->stations[sta_id].sta.key.key_flags = key_flags;
  141. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  142. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  143. D_INFO("hwcrypto: modify ucode station key info\n");
  144. ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
  145. spin_unlock_irqrestore(&il->sta_lock, flags);
  146. return ret;
  147. }
  148. static int
  149. il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  150. struct ieee80211_key_conf *keyconf, u8 sta_id)
  151. {
  152. return -EOPNOTSUPP;
  153. }
  154. static int
  155. il3945_set_wep_dynamic_key_info(struct il_priv *il,
  156. struct ieee80211_key_conf *keyconf, u8 sta_id)
  157. {
  158. return -EOPNOTSUPP;
  159. }
  160. static int
  161. il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  162. {
  163. unsigned long flags;
  164. struct il_addsta_cmd sta_cmd;
  165. spin_lock_irqsave(&il->sta_lock, flags);
  166. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  167. memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
  168. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  169. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  170. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  171. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  172. sizeof(struct il_addsta_cmd));
  173. spin_unlock_irqrestore(&il->sta_lock, flags);
  174. D_INFO("hwcrypto: clear ucode station key info\n");
  175. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  176. }
  177. static int
  178. il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
  179. u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->cipher) {
  184. case WLAN_CIPHER_SUITE_CCMP:
  185. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  186. break;
  187. case WLAN_CIPHER_SUITE_TKIP:
  188. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  189. break;
  190. case WLAN_CIPHER_SUITE_WEP40:
  191. case WLAN_CIPHER_SUITE_WEP104:
  192. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  193. break;
  194. default:
  195. IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
  196. ret = -EINVAL;
  197. }
  198. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
  200. return ret;
  201. }
  202. static int
  203. il3945_remove_static_key(struct il_priv *il)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int
  209. il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
  210. {
  211. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  212. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  213. return -EOPNOTSUPP;
  214. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  215. return -EINVAL;
  216. }
  217. static void
  218. il3945_clear_free_frames(struct il_priv *il)
  219. {
  220. struct list_head *element;
  221. D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
  222. while (!list_empty(&il->free_frames)) {
  223. element = il->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct il3945_frame, list));
  226. il->frames_count--;
  227. }
  228. if (il->frames_count) {
  229. IL_WARN("%d frames still in use. Did we lose one?\n",
  230. il->frames_count);
  231. il->frames_count = 0;
  232. }
  233. }
  234. static struct il3945_frame *
  235. il3945_get_free_frame(struct il_priv *il)
  236. {
  237. struct il3945_frame *frame;
  238. struct list_head *element;
  239. if (list_empty(&il->free_frames)) {
  240. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  241. if (!frame) {
  242. IL_ERR("Could not allocate frame!\n");
  243. return NULL;
  244. }
  245. il->frames_count++;
  246. return frame;
  247. }
  248. element = il->free_frames.next;
  249. list_del(element);
  250. return list_entry(element, struct il3945_frame, list);
  251. }
  252. static void
  253. il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  254. {
  255. memset(frame, 0, sizeof(*frame));
  256. list_add(&frame->list, &il->free_frames);
  257. }
  258. unsigned int
  259. il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
  260. int left)
  261. {
  262. if (!il_is_associated(il) || !il->beacon_skb)
  263. return 0;
  264. if (il->beacon_skb->len > left)
  265. return 0;
  266. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  267. return il->beacon_skb->len;
  268. }
  269. static int
  270. il3945_send_beacon_cmd(struct il_priv *il)
  271. {
  272. struct il3945_frame *frame;
  273. unsigned int frame_size;
  274. int rc;
  275. u8 rate;
  276. frame = il3945_get_free_frame(il);
  277. if (!frame) {
  278. IL_ERR("Could not obtain free frame buffer for beacon "
  279. "command.\n");
  280. return -ENOMEM;
  281. }
  282. rate = il_get_lowest_plcp(il);
  283. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  284. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
  285. il3945_free_frame(il, frame);
  286. return rc;
  287. }
  288. static void
  289. il3945_unset_hw_params(struct il_priv *il)
  290. {
  291. if (il->_3945.shared_virt)
  292. dma_free_coherent(&il->pci_dev->dev,
  293. sizeof(struct il3945_shared),
  294. il->_3945.shared_virt, il->_3945.shared_phys);
  295. }
  296. static void
  297. il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
  298. struct il_device_cmd *cmd,
  299. struct sk_buff *skb_frag, int sta_id)
  300. {
  301. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  302. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  303. tx_cmd->sec_ctl = 0;
  304. switch (keyinfo->cipher) {
  305. case WLAN_CIPHER_SUITE_CCMP:
  306. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  307. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  308. D_TX("tx_cmd with AES hwcrypto\n");
  309. break;
  310. case WLAN_CIPHER_SUITE_TKIP:
  311. break;
  312. case WLAN_CIPHER_SUITE_WEP104:
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. /* fall through */
  315. case WLAN_CIPHER_SUITE_WEP40:
  316. tx_cmd->sec_ctl |=
  317. TX_CMD_SEC_WEP | (info->control.hw_key->
  318. hw_key_idx & TX_CMD_SEC_MSK) <<
  319. TX_CMD_SEC_SHIFT;
  320. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  321. D_TX("Configuring packet for WEP encryption " "with key %d\n",
  322. info->control.hw_key->hw_key_idx);
  323. break;
  324. default:
  325. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  326. break;
  327. }
  328. }
  329. /*
  330. * handle build C_TX command notification.
  331. */
  332. static void
  333. il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
  334. struct ieee80211_tx_info *info,
  335. struct ieee80211_hdr *hdr, u8 std_id)
  336. {
  337. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  338. __le32 tx_flags = tx_cmd->tx_flags;
  339. __le16 fc = hdr->frame_control;
  340. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  341. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  342. tx_flags |= TX_CMD_FLG_ACK_MSK;
  343. if (ieee80211_is_mgmt(fc))
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. if (ieee80211_is_probe_resp(fc) &&
  346. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  347. tx_flags |= TX_CMD_FLG_TSF_MSK;
  348. } else {
  349. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  350. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  351. }
  352. tx_cmd->sta_id = std_id;
  353. if (ieee80211_has_morefrags(fc))
  354. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  355. if (ieee80211_is_data_qos(fc)) {
  356. u8 *qc = ieee80211_get_qos_ctl(hdr);
  357. tx_cmd->tid_tspec = qc[0] & 0xf;
  358. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  359. } else {
  360. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  361. }
  362. il_tx_cmd_protection(il, info, fc, &tx_flags);
  363. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  364. if (ieee80211_is_mgmt(fc)) {
  365. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  366. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  367. else
  368. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  369. } else {
  370. tx_cmd->timeout.pm_frame_timeout = 0;
  371. }
  372. tx_cmd->driver_txop = 0;
  373. tx_cmd->tx_flags = tx_flags;
  374. tx_cmd->next_frame_len = 0;
  375. }
  376. /*
  377. * start C_TX command process
  378. */
  379. static int
  380. il3945_tx_skb(struct il_priv *il,
  381. struct ieee80211_sta *sta,
  382. struct sk_buff *skb)
  383. {
  384. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  385. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  386. struct il3945_tx_cmd *tx_cmd;
  387. struct il_tx_queue *txq = NULL;
  388. struct il_queue *q = NULL;
  389. struct il_device_cmd *out_cmd;
  390. struct il_cmd_meta *out_meta;
  391. dma_addr_t phys_addr;
  392. dma_addr_t txcmd_phys;
  393. int txq_id = skb_get_queue_mapping(skb);
  394. u16 len, idx, hdr_len;
  395. u8 id;
  396. u8 unicast;
  397. u8 sta_id;
  398. u8 tid = 0;
  399. __le16 fc;
  400. u8 wait_write_ptr = 0;
  401. unsigned long flags;
  402. spin_lock_irqsave(&il->lock, flags);
  403. if (il_is_rfkill(il)) {
  404. D_DROP("Dropping - RF KILL\n");
  405. goto drop_unlock;
  406. }
  407. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
  408. IL_INVALID_RATE) {
  409. IL_ERR("ERROR: No TX rate available.\n");
  410. goto drop_unlock;
  411. }
  412. unicast = !is_multicast_ether_addr(hdr->addr1);
  413. id = 0;
  414. fc = hdr->frame_control;
  415. #ifdef CONFIG_IWLEGACY_DEBUG
  416. if (ieee80211_is_auth(fc))
  417. D_TX("Sending AUTH frame\n");
  418. else if (ieee80211_is_assoc_req(fc))
  419. D_TX("Sending ASSOC frame\n");
  420. else if (ieee80211_is_reassoc_req(fc))
  421. D_TX("Sending REASSOC frame\n");
  422. #endif
  423. spin_unlock_irqrestore(&il->lock, flags);
  424. hdr_len = ieee80211_hdrlen(fc);
  425. /* Find idx into station table for destination station */
  426. sta_id = il_sta_id_or_broadcast(il, sta);
  427. if (sta_id == IL_INVALID_STATION) {
  428. D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
  429. goto drop;
  430. }
  431. D_RATE("station Id %d\n", sta_id);
  432. if (ieee80211_is_data_qos(fc)) {
  433. u8 *qc = ieee80211_get_qos_ctl(hdr);
  434. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  435. if (unlikely(tid >= MAX_TID_COUNT))
  436. goto drop;
  437. }
  438. /* Descriptor for chosen Tx queue */
  439. txq = &il->txq[txq_id];
  440. q = &txq->q;
  441. if ((il_queue_space(q) < q->high_mark))
  442. goto drop;
  443. spin_lock_irqsave(&il->lock, flags);
  444. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  445. txq->skbs[q->write_ptr] = skb;
  446. /* Init first empty entry in queue's array of Tx/cmd buffers */
  447. out_cmd = txq->cmd[idx];
  448. out_meta = &txq->meta[idx];
  449. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  450. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  451. memset(tx_cmd, 0, sizeof(*tx_cmd));
  452. /*
  453. * Set up the Tx-command (not MAC!) header.
  454. * Store the chosen Tx queue and TFD idx within the sequence field;
  455. * after Tx, uCode's Tx response will return this value so driver can
  456. * locate the frame within the tx queue and do post-tx processing.
  457. */
  458. out_cmd->hdr.cmd = C_TX;
  459. out_cmd->hdr.sequence =
  460. cpu_to_le16((u16)
  461. (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
  462. /* Copy MAC header from skb into command buffer */
  463. memcpy(tx_cmd->hdr, hdr, hdr_len);
  464. if (info->control.hw_key)
  465. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  466. /* TODO need this for burst mode later on */
  467. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  468. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
  469. /* Total # bytes to be transmitted */
  470. tx_cmd->len = cpu_to_le16((u16) skb->len);
  471. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  472. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  473. /*
  474. * Use the first empty entry in this queue's command buffer array
  475. * to contain the Tx command and MAC header concatenated together
  476. * (payload data will be in another buffer).
  477. * Size of this varies, due to varying MAC header length.
  478. * If end is not dword aligned, we'll have 2 extra bytes at the end
  479. * of the MAC header (device reads on dword boundaries).
  480. * We'll tell device about this padding later.
  481. */
  482. len =
  483. sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
  484. hdr_len;
  485. len = (len + 3) & ~3;
  486. /* Physical address of this Tx command's header (not MAC header!),
  487. * within command buffer array. */
  488. txcmd_phys =
  489. pci_map_single(il->pci_dev, &out_cmd->hdr, len, PCI_DMA_TODEVICE);
  490. if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys)))
  491. goto drop_unlock;
  492. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  493. * if any (802.11 null frames have no payload). */
  494. len = skb->len - hdr_len;
  495. if (len) {
  496. phys_addr =
  497. pci_map_single(il->pci_dev, skb->data + hdr_len, len,
  498. PCI_DMA_TODEVICE);
  499. if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr)))
  500. goto drop_unlock;
  501. }
  502. /* Add buffer containing Tx command and MAC(!) header to TFD's
  503. * first entry */
  504. il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, len, 1, 0);
  505. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  506. dma_unmap_len_set(out_meta, len, len);
  507. if (len)
  508. il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, len, 0,
  509. U32_PAD(len));
  510. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  511. txq->need_update = 1;
  512. } else {
  513. wait_write_ptr = 1;
  514. txq->need_update = 0;
  515. }
  516. il_update_stats(il, true, fc, skb->len);
  517. D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
  518. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  519. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  520. il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
  521. ieee80211_hdrlen(fc));
  522. /* Tell device the write idx *just past* this latest filled TFD */
  523. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  524. il_txq_update_write_ptr(il, txq);
  525. spin_unlock_irqrestore(&il->lock, flags);
  526. if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
  527. if (wait_write_ptr) {
  528. spin_lock_irqsave(&il->lock, flags);
  529. txq->need_update = 1;
  530. il_txq_update_write_ptr(il, txq);
  531. spin_unlock_irqrestore(&il->lock, flags);
  532. }
  533. il_stop_queue(il, txq);
  534. }
  535. return 0;
  536. drop_unlock:
  537. spin_unlock_irqrestore(&il->lock, flags);
  538. drop:
  539. return -1;
  540. }
  541. static int
  542. il3945_get_measurement(struct il_priv *il,
  543. struct ieee80211_measurement_params *params, u8 type)
  544. {
  545. struct il_spectrum_cmd spectrum;
  546. struct il_rx_pkt *pkt;
  547. struct il_host_cmd cmd = {
  548. .id = C_SPECTRUM_MEASUREMENT,
  549. .data = (void *)&spectrum,
  550. .flags = CMD_WANT_SKB,
  551. };
  552. u32 add_time = le64_to_cpu(params->start_time);
  553. int rc;
  554. int spectrum_resp_status;
  555. int duration = le16_to_cpu(params->duration);
  556. if (il_is_associated(il))
  557. add_time =
  558. il_usecs_to_beacons(il,
  559. le64_to_cpu(params->start_time) -
  560. il->_3945.last_tsf,
  561. le16_to_cpu(il->timing.beacon_interval));
  562. memset(&spectrum, 0, sizeof(spectrum));
  563. spectrum.channel_count = cpu_to_le16(1);
  564. spectrum.flags =
  565. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  566. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  567. cmd.len = sizeof(spectrum);
  568. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  569. if (il_is_associated(il))
  570. spectrum.start_time =
  571. il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
  572. le16_to_cpu(il->timing.beacon_interval));
  573. else
  574. spectrum.start_time = 0;
  575. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  576. spectrum.channels[0].channel = params->channel;
  577. spectrum.channels[0].type = type;
  578. if (il->active.flags & RXON_FLG_BAND_24G_MSK)
  579. spectrum.flags |=
  580. RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  581. RXON_FLG_TGG_PROTECT_MSK;
  582. rc = il_send_cmd_sync(il, &cmd);
  583. if (rc)
  584. return rc;
  585. pkt = (struct il_rx_pkt *)cmd.reply_page;
  586. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  587. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  588. rc = -EIO;
  589. }
  590. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  591. switch (spectrum_resp_status) {
  592. case 0: /* Command will be handled */
  593. if (pkt->u.spectrum.id != 0xff) {
  594. D_INFO("Replaced existing measurement: %d\n",
  595. pkt->u.spectrum.id);
  596. il->measurement_status &= ~MEASUREMENT_READY;
  597. }
  598. il->measurement_status |= MEASUREMENT_ACTIVE;
  599. rc = 0;
  600. break;
  601. case 1: /* Command will not be handled */
  602. rc = -EAGAIN;
  603. break;
  604. }
  605. il_free_pages(il, cmd.reply_page);
  606. return rc;
  607. }
  608. static void
  609. il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
  610. {
  611. struct il_rx_pkt *pkt = rxb_addr(rxb);
  612. struct il_alive_resp *palive;
  613. struct delayed_work *pwork;
  614. palive = &pkt->u.alive_frame;
  615. D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
  616. palive->is_valid, palive->ver_type, palive->ver_subtype);
  617. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  618. D_INFO("Initialization Alive received.\n");
  619. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  620. sizeof(struct il_alive_resp));
  621. pwork = &il->init_alive_start;
  622. } else {
  623. D_INFO("Runtime Alive received.\n");
  624. memcpy(&il->card_alive, &pkt->u.alive_frame,
  625. sizeof(struct il_alive_resp));
  626. pwork = &il->alive_start;
  627. il3945_disable_events(il);
  628. }
  629. /* We delay the ALIVE response by 5ms to
  630. * give the HW RF Kill time to activate... */
  631. if (palive->is_valid == UCODE_VALID_OK)
  632. queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
  633. else
  634. IL_WARN("uCode did not respond OK.\n");
  635. }
  636. static void
  637. il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
  638. {
  639. #ifdef CONFIG_IWLEGACY_DEBUG
  640. struct il_rx_pkt *pkt = rxb_addr(rxb);
  641. #endif
  642. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  643. }
  644. static void
  645. il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
  646. {
  647. struct il_rx_pkt *pkt = rxb_addr(rxb);
  648. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  649. #ifdef CONFIG_IWLEGACY_DEBUG
  650. u8 rate = beacon->beacon_notify_hdr.rate;
  651. D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
  652. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  653. beacon->beacon_notify_hdr.failure_frame,
  654. le32_to_cpu(beacon->ibss_mgr_status),
  655. le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
  656. #endif
  657. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  658. }
  659. /* Handle notification from uCode that card's power state is changing
  660. * due to software, hardware, or critical temperature RFKILL */
  661. static void
  662. il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
  663. {
  664. struct il_rx_pkt *pkt = rxb_addr(rxb);
  665. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  666. unsigned long status = il->status;
  667. IL_WARN("Card state received: HW:%s SW:%s\n",
  668. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  669. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  670. _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  671. if (flags & HW_CARD_DISABLED)
  672. set_bit(S_RFKILL, &il->status);
  673. else
  674. clear_bit(S_RFKILL, &il->status);
  675. il_scan_cancel(il);
  676. if ((test_bit(S_RFKILL, &status) !=
  677. test_bit(S_RFKILL, &il->status)))
  678. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  679. test_bit(S_RFKILL, &il->status));
  680. else
  681. wake_up(&il->wait_command_queue);
  682. }
  683. /**
  684. * il3945_setup_handlers - Initialize Rx handler callbacks
  685. *
  686. * Setup the RX handlers for each of the reply types sent from the uCode
  687. * to the host.
  688. *
  689. * This function chains into the hardware specific files for them to setup
  690. * any hardware specific handlers as well.
  691. */
  692. static void
  693. il3945_setup_handlers(struct il_priv *il)
  694. {
  695. il->handlers[N_ALIVE] = il3945_hdl_alive;
  696. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  697. il->handlers[N_ERROR] = il_hdl_error;
  698. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  699. il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
  700. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  701. il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
  702. il->handlers[N_BEACON] = il3945_hdl_beacon;
  703. /*
  704. * The same handler is used for both the REPLY to a discrete
  705. * stats request from the host as well as for the periodic
  706. * stats notifications (after received beacons) from the uCode.
  707. */
  708. il->handlers[C_STATS] = il3945_hdl_c_stats;
  709. il->handlers[N_STATS] = il3945_hdl_stats;
  710. il_setup_rx_scan_handlers(il);
  711. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  712. /* Set up hardware specific Rx handlers */
  713. il3945_hw_handler_setup(il);
  714. }
  715. /************************** RX-FUNCTIONS ****************************/
  716. /*
  717. * Rx theory of operation
  718. *
  719. * The host allocates 32 DMA target addresses and passes the host address
  720. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  721. * 0 to 31
  722. *
  723. * Rx Queue Indexes
  724. * The host/firmware share two idx registers for managing the Rx buffers.
  725. *
  726. * The READ idx maps to the first position that the firmware may be writing
  727. * to -- the driver can read up to (but not including) this position and get
  728. * good data.
  729. * The READ idx is managed by the firmware once the card is enabled.
  730. *
  731. * The WRITE idx maps to the last position the driver has read from -- the
  732. * position preceding WRITE is the last slot the firmware can place a packet.
  733. *
  734. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  735. * WRITE = READ.
  736. *
  737. * During initialization, the host sets up the READ queue position to the first
  738. * IDX position, and WRITE to the last (READ - 1 wrapped)
  739. *
  740. * When the firmware places a packet in a buffer, it will advance the READ idx
  741. * and fire the RX interrupt. The driver can then query the READ idx and
  742. * process as many packets as possible, moving the WRITE idx forward as it
  743. * resets the Rx queue buffers with new memory.
  744. *
  745. * The management in the driver is as follows:
  746. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  747. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  748. * to replenish the iwl->rxq->rx_free.
  749. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  750. * iwl->rxq is replenished and the READ IDX is updated (updating the
  751. * 'processed' and 'read' driver idxes as well)
  752. * + A received packet is processed and handed to the kernel network stack,
  753. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  754. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  755. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  756. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  757. * were enough free buffers and RX_STALLED is set it is cleared.
  758. *
  759. *
  760. * Driver sequence:
  761. *
  762. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  763. * il3945_rx_queue_restock
  764. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  765. * queue, updates firmware pointers, and updates
  766. * the WRITE idx. If insufficient rx_free buffers
  767. * are available, schedules il3945_rx_replenish
  768. *
  769. * -- enable interrupts --
  770. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  771. * READ IDX, detaching the SKB from the pool.
  772. * Moves the packet buffer from queue to rx_used.
  773. * Calls il3945_rx_queue_restock to refill any empty
  774. * slots.
  775. * ...
  776. *
  777. */
  778. /**
  779. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  780. */
  781. static inline __le32
  782. il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
  783. {
  784. return cpu_to_le32((u32) dma_addr);
  785. }
  786. /**
  787. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  788. *
  789. * If there are slots in the RX queue that need to be restocked,
  790. * and we have free pre-allocated buffers, fill the ranks as much
  791. * as we can, pulling from rx_free.
  792. *
  793. * This moves the 'write' idx forward to catch up with 'processed', and
  794. * also updates the memory address in the firmware to reference the new
  795. * target buffer.
  796. */
  797. static void
  798. il3945_rx_queue_restock(struct il_priv *il)
  799. {
  800. struct il_rx_queue *rxq = &il->rxq;
  801. struct list_head *element;
  802. struct il_rx_buf *rxb;
  803. unsigned long flags;
  804. int write;
  805. spin_lock_irqsave(&rxq->lock, flags);
  806. write = rxq->write & ~0x7;
  807. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  808. /* Get next free Rx buffer, remove from free list */
  809. element = rxq->rx_free.next;
  810. rxb = list_entry(element, struct il_rx_buf, list);
  811. list_del(element);
  812. /* Point to Rx buffer via next RBD in circular buffer */
  813. rxq->bd[rxq->write] =
  814. il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  815. rxq->queue[rxq->write] = rxb;
  816. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  817. rxq->free_count--;
  818. }
  819. spin_unlock_irqrestore(&rxq->lock, flags);
  820. /* If the pre-allocated buffer pool is dropping low, schedule to
  821. * refill it */
  822. if (rxq->free_count <= RX_LOW_WATERMARK)
  823. queue_work(il->workqueue, &il->rx_replenish);
  824. /* If we've added more space for the firmware to place data, tell it.
  825. * Increment device's write pointer in multiples of 8. */
  826. if (rxq->write_actual != (rxq->write & ~0x7) ||
  827. abs(rxq->write - rxq->read) > 7) {
  828. spin_lock_irqsave(&rxq->lock, flags);
  829. rxq->need_update = 1;
  830. spin_unlock_irqrestore(&rxq->lock, flags);
  831. il_rx_queue_update_write_ptr(il, rxq);
  832. }
  833. }
  834. /**
  835. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  836. *
  837. * When moving to rx_free an SKB is allocated for the slot.
  838. *
  839. * Also restock the Rx queue via il3945_rx_queue_restock.
  840. * This is called as a scheduled work item (except for during initialization)
  841. */
  842. static void
  843. il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  844. {
  845. struct il_rx_queue *rxq = &il->rxq;
  846. struct list_head *element;
  847. struct il_rx_buf *rxb;
  848. struct page *page;
  849. dma_addr_t page_dma;
  850. unsigned long flags;
  851. gfp_t gfp_mask = priority;
  852. while (1) {
  853. spin_lock_irqsave(&rxq->lock, flags);
  854. if (list_empty(&rxq->rx_used)) {
  855. spin_unlock_irqrestore(&rxq->lock, flags);
  856. return;
  857. }
  858. spin_unlock_irqrestore(&rxq->lock, flags);
  859. if (rxq->free_count > RX_LOW_WATERMARK)
  860. gfp_mask |= __GFP_NOWARN;
  861. if (il->hw_params.rx_page_order > 0)
  862. gfp_mask |= __GFP_COMP;
  863. /* Alloc a new receive buffer */
  864. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  865. if (!page) {
  866. if (net_ratelimit())
  867. D_INFO("Failed to allocate SKB buffer.\n");
  868. if (rxq->free_count <= RX_LOW_WATERMARK &&
  869. net_ratelimit())
  870. IL_ERR("Failed to allocate SKB buffer with %0x."
  871. "Only %u free buffers remaining.\n",
  872. priority, rxq->free_count);
  873. /* We don't reschedule replenish work here -- we will
  874. * call the restock method and if it still needs
  875. * more buffers it will schedule replenish */
  876. break;
  877. }
  878. /* Get physical address of RB/SKB */
  879. page_dma =
  880. pci_map_page(il->pci_dev, page, 0,
  881. PAGE_SIZE << il->hw_params.rx_page_order,
  882. PCI_DMA_FROMDEVICE);
  883. if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) {
  884. __free_pages(page, il->hw_params.rx_page_order);
  885. break;
  886. }
  887. spin_lock_irqsave(&rxq->lock, flags);
  888. if (list_empty(&rxq->rx_used)) {
  889. spin_unlock_irqrestore(&rxq->lock, flags);
  890. pci_unmap_page(il->pci_dev, page_dma,
  891. PAGE_SIZE << il->hw_params.rx_page_order,
  892. PCI_DMA_FROMDEVICE);
  893. __free_pages(page, il->hw_params.rx_page_order);
  894. return;
  895. }
  896. element = rxq->rx_used.next;
  897. rxb = list_entry(element, struct il_rx_buf, list);
  898. list_del(element);
  899. rxb->page = page;
  900. rxb->page_dma = page_dma;
  901. list_add_tail(&rxb->list, &rxq->rx_free);
  902. rxq->free_count++;
  903. il->alloc_rxb_page++;
  904. spin_unlock_irqrestore(&rxq->lock, flags);
  905. }
  906. }
  907. void
  908. il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  909. {
  910. unsigned long flags;
  911. int i;
  912. spin_lock_irqsave(&rxq->lock, flags);
  913. INIT_LIST_HEAD(&rxq->rx_free);
  914. INIT_LIST_HEAD(&rxq->rx_used);
  915. /* Fill the rx_used queue with _all_ of the Rx buffers */
  916. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  917. /* In the reset function, these buffers may have been allocated
  918. * to an SKB, so we need to unmap and free potential storage */
  919. if (rxq->pool[i].page != NULL) {
  920. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  921. PAGE_SIZE << il->hw_params.rx_page_order,
  922. PCI_DMA_FROMDEVICE);
  923. __il_free_pages(il, rxq->pool[i].page);
  924. rxq->pool[i].page = NULL;
  925. }
  926. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  927. }
  928. /* Set us so that we have processed and used all buffers, but have
  929. * not restocked the Rx queue with fresh buffers */
  930. rxq->read = rxq->write = 0;
  931. rxq->write_actual = 0;
  932. rxq->free_count = 0;
  933. spin_unlock_irqrestore(&rxq->lock, flags);
  934. }
  935. void
  936. il3945_rx_replenish(void *data)
  937. {
  938. struct il_priv *il = data;
  939. unsigned long flags;
  940. il3945_rx_allocate(il, GFP_KERNEL);
  941. spin_lock_irqsave(&il->lock, flags);
  942. il3945_rx_queue_restock(il);
  943. spin_unlock_irqrestore(&il->lock, flags);
  944. }
  945. static void
  946. il3945_rx_replenish_now(struct il_priv *il)
  947. {
  948. il3945_rx_allocate(il, GFP_ATOMIC);
  949. il3945_rx_queue_restock(il);
  950. }
  951. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  952. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  953. * This free routine walks the list of POOL entries and if SKB is set to
  954. * non NULL it is unmapped and freed
  955. */
  956. static void
  957. il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  958. {
  959. int i;
  960. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  961. if (rxq->pool[i].page != NULL) {
  962. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  963. PAGE_SIZE << il->hw_params.rx_page_order,
  964. PCI_DMA_FROMDEVICE);
  965. __il_free_pages(il, rxq->pool[i].page);
  966. rxq->pool[i].page = NULL;
  967. }
  968. }
  969. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  970. rxq->bd_dma);
  971. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  972. rxq->rb_stts, rxq->rb_stts_dma);
  973. rxq->bd = NULL;
  974. rxq->rb_stts = NULL;
  975. }
  976. /* Convert linear signal-to-noise ratio into dB */
  977. static u8 ratio2dB[100] = {
  978. /* 0 1 2 3 4 5 6 7 8 9 */
  979. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  980. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  981. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  982. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  983. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  984. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  985. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  986. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  987. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  988. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  989. };
  990. /* Calculates a relative dB value from a ratio of linear
  991. * (i.e. not dB) signal levels.
  992. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  993. int
  994. il3945_calc_db_from_ratio(int sig_ratio)
  995. {
  996. /* 1000:1 or higher just report as 60 dB */
  997. if (sig_ratio >= 1000)
  998. return 60;
  999. /* 100:1 or higher, divide by 10 and use table,
  1000. * add 20 dB to make up for divide by 10 */
  1001. if (sig_ratio >= 100)
  1002. return 20 + (int)ratio2dB[sig_ratio / 10];
  1003. /* We shouldn't see this */
  1004. if (sig_ratio < 1)
  1005. return 0;
  1006. /* Use table for ratios 1:1 - 99:1 */
  1007. return (int)ratio2dB[sig_ratio];
  1008. }
  1009. /**
  1010. * il3945_rx_handle - Main entry function for receiving responses from uCode
  1011. *
  1012. * Uses the il->handlers callback function array to invoke
  1013. * the appropriate handlers, including command responses,
  1014. * frame-received notifications, and other notifications.
  1015. */
  1016. static void
  1017. il3945_rx_handle(struct il_priv *il)
  1018. {
  1019. struct il_rx_buf *rxb;
  1020. struct il_rx_pkt *pkt;
  1021. struct il_rx_queue *rxq = &il->rxq;
  1022. u32 r, i;
  1023. int reclaim;
  1024. unsigned long flags;
  1025. u8 fill_rx = 0;
  1026. u32 count = 8;
  1027. int total_empty = 0;
  1028. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1029. * buffer that the driver may process (last buffer filled by ucode). */
  1030. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1031. i = rxq->read;
  1032. /* calculate total frames need to be restock after handling RX */
  1033. total_empty = r - rxq->write_actual;
  1034. if (total_empty < 0)
  1035. total_empty += RX_QUEUE_SIZE;
  1036. if (total_empty > (RX_QUEUE_SIZE / 2))
  1037. fill_rx = 1;
  1038. /* Rx interrupt, but nothing sent from uCode */
  1039. if (i == r)
  1040. D_RX("r = %d, i = %d\n", r, i);
  1041. while (i != r) {
  1042. int len;
  1043. rxb = rxq->queue[i];
  1044. /* If an RXB doesn't have a Rx queue slot associated with it,
  1045. * then a bug has been introduced in the queue refilling
  1046. * routines -- catch it here */
  1047. BUG_ON(rxb == NULL);
  1048. rxq->queue[i] = NULL;
  1049. pci_unmap_page(il->pci_dev, rxb->page_dma,
  1050. PAGE_SIZE << il->hw_params.rx_page_order,
  1051. PCI_DMA_FROMDEVICE);
  1052. pkt = rxb_addr(rxb);
  1053. len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  1054. len += sizeof(u32); /* account for status word */
  1055. /* Reclaim a command buffer only if this packet is a response
  1056. * to a (driver-originated) command.
  1057. * If the packet (e.g. Rx frame) originated from uCode,
  1058. * there is no command buffer to reclaim.
  1059. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1060. * but apparently a few don't get set; catch them here. */
  1061. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1062. pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX;
  1063. /* Based on type of command response or notification,
  1064. * handle those that need handling via function in
  1065. * handlers table. See il3945_setup_handlers() */
  1066. if (il->handlers[pkt->hdr.cmd]) {
  1067. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1068. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1069. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1070. il->handlers[pkt->hdr.cmd] (il, rxb);
  1071. } else {
  1072. /* No handling needed */
  1073. D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
  1074. i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1075. }
  1076. /*
  1077. * XXX: After here, we should always check rxb->page
  1078. * against NULL before touching it or its virtual
  1079. * memory (pkt). Because some handler might have
  1080. * already taken or freed the pages.
  1081. */
  1082. if (reclaim) {
  1083. /* Invoke any callbacks, transfer the buffer to caller,
  1084. * and fire off the (possibly) blocking il_send_cmd()
  1085. * as we reclaim the driver command queue */
  1086. if (rxb->page)
  1087. il_tx_cmd_complete(il, rxb);
  1088. else
  1089. IL_WARN("Claim null rxb?\n");
  1090. }
  1091. /* Reuse the page if possible. For notification packets and
  1092. * SKBs that fail to Rx correctly, add them back into the
  1093. * rx_free list for reuse later. */
  1094. spin_lock_irqsave(&rxq->lock, flags);
  1095. if (rxb->page != NULL) {
  1096. rxb->page_dma =
  1097. pci_map_page(il->pci_dev, rxb->page, 0,
  1098. PAGE_SIZE << il->hw_params.
  1099. rx_page_order, PCI_DMA_FROMDEVICE);
  1100. if (unlikely(pci_dma_mapping_error(il->pci_dev,
  1101. rxb->page_dma))) {
  1102. __il_free_pages(il, rxb->page);
  1103. rxb->page = NULL;
  1104. list_add_tail(&rxb->list, &rxq->rx_used);
  1105. } else {
  1106. list_add_tail(&rxb->list, &rxq->rx_free);
  1107. rxq->free_count++;
  1108. }
  1109. } else
  1110. list_add_tail(&rxb->list, &rxq->rx_used);
  1111. spin_unlock_irqrestore(&rxq->lock, flags);
  1112. i = (i + 1) & RX_QUEUE_MASK;
  1113. /* If there are a lot of unused frames,
  1114. * restock the Rx queue so ucode won't assert. */
  1115. if (fill_rx) {
  1116. count++;
  1117. if (count >= 8) {
  1118. rxq->read = i;
  1119. il3945_rx_replenish_now(il);
  1120. count = 0;
  1121. }
  1122. }
  1123. }
  1124. /* Backtrack one entry */
  1125. rxq->read = i;
  1126. if (fill_rx)
  1127. il3945_rx_replenish_now(il);
  1128. else
  1129. il3945_rx_queue_restock(il);
  1130. }
  1131. /* call this function to flush any scheduled tasklet */
  1132. static inline void
  1133. il3945_synchronize_irq(struct il_priv *il)
  1134. {
  1135. /* wait to make sure we flush pending tasklet */
  1136. synchronize_irq(il->pci_dev->irq);
  1137. tasklet_kill(&il->irq_tasklet);
  1138. }
  1139. static const char *
  1140. il3945_desc_lookup(int i)
  1141. {
  1142. switch (i) {
  1143. case 1:
  1144. return "FAIL";
  1145. case 2:
  1146. return "BAD_PARAM";
  1147. case 3:
  1148. return "BAD_CHECKSUM";
  1149. case 4:
  1150. return "NMI_INTERRUPT";
  1151. case 5:
  1152. return "SYSASSERT";
  1153. case 6:
  1154. return "FATAL_ERROR";
  1155. }
  1156. return "UNKNOWN";
  1157. }
  1158. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1159. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1160. void
  1161. il3945_dump_nic_error_log(struct il_priv *il)
  1162. {
  1163. u32 i;
  1164. u32 desc, time, count, base, data1;
  1165. u32 blink1, blink2, ilink1, ilink2;
  1166. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1167. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1168. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1169. return;
  1170. }
  1171. count = il_read_targ_mem(il, base);
  1172. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1173. IL_ERR("Start IWL Error Log Dump:\n");
  1174. IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
  1175. }
  1176. IL_ERR("Desc Time asrtPC blink2 "
  1177. "ilink1 nmiPC Line\n");
  1178. for (i = ERROR_START_OFFSET;
  1179. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1180. i += ERROR_ELEM_SIZE) {
  1181. desc = il_read_targ_mem(il, base + i);
  1182. time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1183. blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1184. blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1185. ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1186. ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1187. data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1188. IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1189. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1190. ilink1, ilink2, data1);
  1191. }
  1192. }
  1193. static void
  1194. il3945_irq_tasklet(struct il_priv *il)
  1195. {
  1196. u32 inta, handled = 0;
  1197. u32 inta_fh;
  1198. unsigned long flags;
  1199. #ifdef CONFIG_IWLEGACY_DEBUG
  1200. u32 inta_mask;
  1201. #endif
  1202. spin_lock_irqsave(&il->lock, flags);
  1203. /* Ack/clear/reset pending uCode interrupts.
  1204. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1205. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1206. inta = _il_rd(il, CSR_INT);
  1207. _il_wr(il, CSR_INT, inta);
  1208. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1209. * Any new interrupts that happen after this, either while we're
  1210. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1211. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1212. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1213. #ifdef CONFIG_IWLEGACY_DEBUG
  1214. if (il_get_debug_level(il) & IL_DL_ISR) {
  1215. /* just for debug */
  1216. inta_mask = _il_rd(il, CSR_INT_MASK);
  1217. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
  1218. inta_mask, inta_fh);
  1219. }
  1220. #endif
  1221. spin_unlock_irqrestore(&il->lock, flags);
  1222. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1223. * atomic, make sure that inta covers all the interrupts that
  1224. * we've discovered, even if FH interrupt came in just after
  1225. * reading CSR_INT. */
  1226. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1227. inta |= CSR_INT_BIT_FH_RX;
  1228. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1229. inta |= CSR_INT_BIT_FH_TX;
  1230. /* Now service all interrupt bits discovered above. */
  1231. if (inta & CSR_INT_BIT_HW_ERR) {
  1232. IL_ERR("Hardware error detected. Restarting.\n");
  1233. /* Tell the device to stop sending interrupts */
  1234. il_disable_interrupts(il);
  1235. il->isr_stats.hw++;
  1236. il_irq_handle_error(il);
  1237. handled |= CSR_INT_BIT_HW_ERR;
  1238. return;
  1239. }
  1240. #ifdef CONFIG_IWLEGACY_DEBUG
  1241. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1242. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1243. if (inta & CSR_INT_BIT_SCD) {
  1244. D_ISR("Scheduler finished to transmit "
  1245. "the frame/frames.\n");
  1246. il->isr_stats.sch++;
  1247. }
  1248. /* Alive notification via Rx interrupt will do the real work */
  1249. if (inta & CSR_INT_BIT_ALIVE) {
  1250. D_ISR("Alive interrupt\n");
  1251. il->isr_stats.alive++;
  1252. }
  1253. }
  1254. #endif
  1255. /* Safely ignore these bits for debug checks below */
  1256. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1257. /* Error detected by uCode */
  1258. if (inta & CSR_INT_BIT_SW_ERR) {
  1259. IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
  1260. inta);
  1261. il->isr_stats.sw++;
  1262. il_irq_handle_error(il);
  1263. handled |= CSR_INT_BIT_SW_ERR;
  1264. }
  1265. /* uCode wakes up after power-down sleep */
  1266. if (inta & CSR_INT_BIT_WAKEUP) {
  1267. D_ISR("Wakeup interrupt\n");
  1268. il_rx_queue_update_write_ptr(il, &il->rxq);
  1269. il_txq_update_write_ptr(il, &il->txq[0]);
  1270. il_txq_update_write_ptr(il, &il->txq[1]);
  1271. il_txq_update_write_ptr(il, &il->txq[2]);
  1272. il_txq_update_write_ptr(il, &il->txq[3]);
  1273. il_txq_update_write_ptr(il, &il->txq[4]);
  1274. il_txq_update_write_ptr(il, &il->txq[5]);
  1275. il->isr_stats.wakeup++;
  1276. handled |= CSR_INT_BIT_WAKEUP;
  1277. }
  1278. /* All uCode command responses, including Tx command responses,
  1279. * Rx "responses" (frame-received notification), and other
  1280. * notifications from uCode come through here*/
  1281. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1282. il3945_rx_handle(il);
  1283. il->isr_stats.rx++;
  1284. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1285. }
  1286. if (inta & CSR_INT_BIT_FH_TX) {
  1287. D_ISR("Tx interrupt\n");
  1288. il->isr_stats.tx++;
  1289. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1290. il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
  1291. handled |= CSR_INT_BIT_FH_TX;
  1292. }
  1293. if (inta & ~handled) {
  1294. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1295. il->isr_stats.unhandled++;
  1296. }
  1297. if (inta & ~il->inta_mask) {
  1298. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1299. inta & ~il->inta_mask);
  1300. IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
  1301. }
  1302. /* Re-enable all interrupts */
  1303. /* only Re-enable if disabled by irq */
  1304. if (test_bit(S_INT_ENABLED, &il->status))
  1305. il_enable_interrupts(il);
  1306. #ifdef CONFIG_IWLEGACY_DEBUG
  1307. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1308. inta = _il_rd(il, CSR_INT);
  1309. inta_mask = _il_rd(il, CSR_INT_MASK);
  1310. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1311. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1312. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1313. }
  1314. #endif
  1315. }
  1316. static int
  1317. il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band,
  1318. u8 is_active, u8 n_probes,
  1319. struct il3945_scan_channel *scan_ch,
  1320. struct ieee80211_vif *vif)
  1321. {
  1322. struct ieee80211_channel *chan;
  1323. const struct ieee80211_supported_band *sband;
  1324. const struct il_channel_info *ch_info;
  1325. u16 passive_dwell = 0;
  1326. u16 active_dwell = 0;
  1327. int added, i;
  1328. sband = il_get_hw_mode(il, band);
  1329. if (!sband)
  1330. return 0;
  1331. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1332. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1333. if (passive_dwell <= active_dwell)
  1334. passive_dwell = active_dwell + 1;
  1335. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1336. chan = il->scan_request->channels[i];
  1337. if (chan->band != band)
  1338. continue;
  1339. scan_ch->channel = chan->hw_value;
  1340. ch_info = il_get_channel_info(il, band, scan_ch->channel);
  1341. if (!il_is_channel_valid(ch_info)) {
  1342. D_SCAN("Channel %d is INVALID for this band.\n",
  1343. scan_ch->channel);
  1344. continue;
  1345. }
  1346. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1347. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1348. /* If passive , set up for auto-switch
  1349. * and use long active_dwell time.
  1350. */
  1351. if (!is_active || il_is_channel_passive(ch_info) ||
  1352. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1353. scan_ch->type = 0; /* passive */
  1354. if (IL_UCODE_API(il->ucode_ver) == 1)
  1355. scan_ch->active_dwell =
  1356. cpu_to_le16(passive_dwell - 1);
  1357. } else {
  1358. scan_ch->type = 1; /* active */
  1359. }
  1360. /* Set direct probe bits. These may be used both for active
  1361. * scan channels (probes gets sent right away),
  1362. * or for passive channels (probes get se sent only after
  1363. * hearing clear Rx packet).*/
  1364. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1365. if (n_probes)
  1366. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1367. } else {
  1368. /* uCode v1 does not allow setting direct probe bits on
  1369. * passive channel. */
  1370. if ((scan_ch->type & 1) && n_probes)
  1371. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1372. }
  1373. /* Set txpower levels to defaults */
  1374. scan_ch->tpc.dsp_atten = 110;
  1375. /* scan_pwr_info->tpc.dsp_atten; */
  1376. /*scan_pwr_info->tpc.tx_gain; */
  1377. if (band == IEEE80211_BAND_5GHZ)
  1378. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1379. else {
  1380. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1381. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1382. * power level:
  1383. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1384. */
  1385. }
  1386. D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
  1387. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1388. (scan_ch->type & 1) ? active_dwell : passive_dwell);
  1389. scan_ch++;
  1390. added++;
  1391. }
  1392. D_SCAN("total channels to scan %d\n", added);
  1393. return added;
  1394. }
  1395. static void
  1396. il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
  1397. {
  1398. int i;
  1399. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1400. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1401. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1402. rates[i].hw_value_short = i;
  1403. rates[i].flags = 0;
  1404. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1405. /*
  1406. * If CCK != 1M then set short preamble rate flag.
  1407. */
  1408. rates[i].flags |=
  1409. (il3945_rates[i].plcp ==
  1410. 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1411. }
  1412. }
  1413. }
  1414. /******************************************************************************
  1415. *
  1416. * uCode download functions
  1417. *
  1418. ******************************************************************************/
  1419. static void
  1420. il3945_dealloc_ucode_pci(struct il_priv *il)
  1421. {
  1422. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1423. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1424. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1425. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1426. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1427. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1428. }
  1429. /**
  1430. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1431. * looking at all data.
  1432. */
  1433. static int
  1434. il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  1435. {
  1436. u32 val;
  1437. u32 save_len = len;
  1438. int rc = 0;
  1439. u32 errcnt;
  1440. D_INFO("ucode inst image size is %u\n", len);
  1441. il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
  1442. errcnt = 0;
  1443. for (; len > 0; len -= sizeof(u32), image++) {
  1444. /* read data comes through single port, auto-incr addr */
  1445. /* NOTE: Use the debugless read so we don't flood kernel log
  1446. * if IL_DL_IO is set */
  1447. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1448. if (val != le32_to_cpu(*image)) {
  1449. IL_ERR("uCode INST section is invalid at "
  1450. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1451. save_len - len, val, le32_to_cpu(*image));
  1452. rc = -EIO;
  1453. errcnt++;
  1454. if (errcnt >= 20)
  1455. break;
  1456. }
  1457. }
  1458. if (!errcnt)
  1459. D_INFO("ucode image in INSTRUCTION memory is good\n");
  1460. return rc;
  1461. }
  1462. /**
  1463. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1464. * using sample data 100 bytes apart. If these sample points are good,
  1465. * it's a pretty good bet that everything between them is good, too.
  1466. */
  1467. static int
  1468. il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  1469. {
  1470. u32 val;
  1471. int rc = 0;
  1472. u32 errcnt = 0;
  1473. u32 i;
  1474. D_INFO("ucode inst image size is %u\n", len);
  1475. for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  1476. /* read data comes through single port, auto-incr addr */
  1477. /* NOTE: Use the debugless read so we don't flood kernel log
  1478. * if IL_DL_IO is set */
  1479. il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
  1480. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1481. if (val != le32_to_cpu(*image)) {
  1482. #if 0 /* Enable this if you want to see details */
  1483. IL_ERR("uCode INST section is invalid at "
  1484. "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
  1485. *image);
  1486. #endif
  1487. rc = -EIO;
  1488. errcnt++;
  1489. if (errcnt >= 3)
  1490. break;
  1491. }
  1492. }
  1493. return rc;
  1494. }
  1495. /**
  1496. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1497. * and verify its contents
  1498. */
  1499. static int
  1500. il3945_verify_ucode(struct il_priv *il)
  1501. {
  1502. __le32 *image;
  1503. u32 len;
  1504. int rc = 0;
  1505. /* Try bootstrap */
  1506. image = (__le32 *) il->ucode_boot.v_addr;
  1507. len = il->ucode_boot.len;
  1508. rc = il3945_verify_inst_sparse(il, image, len);
  1509. if (rc == 0) {
  1510. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1511. return 0;
  1512. }
  1513. /* Try initialize */
  1514. image = (__le32 *) il->ucode_init.v_addr;
  1515. len = il->ucode_init.len;
  1516. rc = il3945_verify_inst_sparse(il, image, len);
  1517. if (rc == 0) {
  1518. D_INFO("Initialize uCode is good in inst SRAM\n");
  1519. return 0;
  1520. }
  1521. /* Try runtime/protocol */
  1522. image = (__le32 *) il->ucode_code.v_addr;
  1523. len = il->ucode_code.len;
  1524. rc = il3945_verify_inst_sparse(il, image, len);
  1525. if (rc == 0) {
  1526. D_INFO("Runtime uCode is good in inst SRAM\n");
  1527. return 0;
  1528. }
  1529. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1530. /* Since nothing seems to match, show first several data entries in
  1531. * instruction SRAM, so maybe visual inspection will give a clue.
  1532. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1533. image = (__le32 *) il->ucode_boot.v_addr;
  1534. len = il->ucode_boot.len;
  1535. rc = il3945_verify_inst_full(il, image, len);
  1536. return rc;
  1537. }
  1538. static void
  1539. il3945_nic_start(struct il_priv *il)
  1540. {
  1541. /* Remove all resets to allow NIC to operate */
  1542. _il_wr(il, CSR_RESET, 0);
  1543. }
  1544. #define IL3945_UCODE_GET(item) \
  1545. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1546. { \
  1547. return le32_to_cpu(ucode->v1.item); \
  1548. }
  1549. static u32
  1550. il3945_ucode_get_header_size(u32 api_ver)
  1551. {
  1552. return 24;
  1553. }
  1554. static u8 *
  1555. il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1556. {
  1557. return (u8 *) ucode->v1.data;
  1558. }
  1559. IL3945_UCODE_GET(inst_size);
  1560. IL3945_UCODE_GET(data_size);
  1561. IL3945_UCODE_GET(init_size);
  1562. IL3945_UCODE_GET(init_data_size);
  1563. IL3945_UCODE_GET(boot_size);
  1564. /**
  1565. * il3945_read_ucode - Read uCode images from disk file.
  1566. *
  1567. * Copy into buffers for card to fetch via bus-mastering
  1568. */
  1569. static int
  1570. il3945_read_ucode(struct il_priv *il)
  1571. {
  1572. const struct il_ucode_header *ucode;
  1573. int ret = -EINVAL, idx;
  1574. const struct firmware *ucode_raw;
  1575. /* firmware file name contains uCode/driver compatibility version */
  1576. const char *name_pre = il->cfg->fw_name_pre;
  1577. const unsigned int api_max = il->cfg->ucode_api_max;
  1578. const unsigned int api_min = il->cfg->ucode_api_min;
  1579. char buf[25];
  1580. u8 *src;
  1581. size_t len;
  1582. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1583. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1584. * request_firmware() is synchronous, file is in memory on return. */
  1585. for (idx = api_max; idx >= api_min; idx--) {
  1586. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1587. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1588. if (ret < 0) {
  1589. IL_ERR("%s firmware file req failed: %d\n", buf, ret);
  1590. if (ret == -ENOENT)
  1591. continue;
  1592. else
  1593. goto error;
  1594. } else {
  1595. if (idx < api_max)
  1596. IL_ERR("Loaded firmware %s, "
  1597. "which is deprecated. "
  1598. " Please use API v%u instead.\n", buf,
  1599. api_max);
  1600. D_INFO("Got firmware '%s' file "
  1601. "(%zd bytes) from disk\n", buf, ucode_raw->size);
  1602. break;
  1603. }
  1604. }
  1605. if (ret < 0)
  1606. goto error;
  1607. /* Make sure that we got at least our header! */
  1608. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1609. IL_ERR("File size way too small!\n");
  1610. ret = -EINVAL;
  1611. goto err_release;
  1612. }
  1613. /* Data from ucode file: header followed by uCode images */
  1614. ucode = (struct il_ucode_header *)ucode_raw->data;
  1615. il->ucode_ver = le32_to_cpu(ucode->ver);
  1616. api_ver = IL_UCODE_API(il->ucode_ver);
  1617. inst_size = il3945_ucode_get_inst_size(ucode);
  1618. data_size = il3945_ucode_get_data_size(ucode);
  1619. init_size = il3945_ucode_get_init_size(ucode);
  1620. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1621. boot_size = il3945_ucode_get_boot_size(ucode);
  1622. src = il3945_ucode_get_data(ucode);
  1623. /* api_ver should match the api version forming part of the
  1624. * firmware filename ... but we don't check for that and only rely
  1625. * on the API version read from firmware header from here on forward */
  1626. if (api_ver < api_min || api_ver > api_max) {
  1627. IL_ERR("Driver unable to support your firmware API. "
  1628. "Driver supports v%u, firmware is v%u.\n", api_max,
  1629. api_ver);
  1630. il->ucode_ver = 0;
  1631. ret = -EINVAL;
  1632. goto err_release;
  1633. }
  1634. if (api_ver != api_max)
  1635. IL_ERR("Firmware has old API version. Expected %u, "
  1636. "got %u. New firmware can be obtained "
  1637. "from http://www.intellinuxwireless.org.\n", api_max,
  1638. api_ver);
  1639. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1640. IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
  1641. IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
  1642. snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
  1643. "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
  1644. IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
  1645. IL_UCODE_SERIAL(il->ucode_ver));
  1646. D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
  1647. D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  1648. D_INFO("f/w package hdr runtime data size = %u\n", data_size);
  1649. D_INFO("f/w package hdr init inst size = %u\n", init_size);
  1650. D_INFO("f/w package hdr init data size = %u\n", init_data_size);
  1651. D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  1652. /* Verify size of file vs. image size info in file's header */
  1653. if (ucode_raw->size !=
  1654. il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
  1655. init_size + init_data_size + boot_size) {
  1656. D_INFO("uCode file size %zd does not match expected size\n",
  1657. ucode_raw->size);
  1658. ret = -EINVAL;
  1659. goto err_release;
  1660. }
  1661. /* Verify that uCode images will fit in card's SRAM */
  1662. if (inst_size > IL39_MAX_INST_SIZE) {
  1663. D_INFO("uCode instr len %d too large to fit in\n", inst_size);
  1664. ret = -EINVAL;
  1665. goto err_release;
  1666. }
  1667. if (data_size > IL39_MAX_DATA_SIZE) {
  1668. D_INFO("uCode data len %d too large to fit in\n", data_size);
  1669. ret = -EINVAL;
  1670. goto err_release;
  1671. }
  1672. if (init_size > IL39_MAX_INST_SIZE) {
  1673. D_INFO("uCode init instr len %d too large to fit in\n",
  1674. init_size);
  1675. ret = -EINVAL;
  1676. goto err_release;
  1677. }
  1678. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1679. D_INFO("uCode init data len %d too large to fit in\n",
  1680. init_data_size);
  1681. ret = -EINVAL;
  1682. goto err_release;
  1683. }
  1684. if (boot_size > IL39_MAX_BSM_SIZE) {
  1685. D_INFO("uCode boot instr len %d too large to fit in\n",
  1686. boot_size);
  1687. ret = -EINVAL;
  1688. goto err_release;
  1689. }
  1690. /* Allocate ucode buffers for card's bus-master loading ... */
  1691. /* Runtime instructions and 2 copies of data:
  1692. * 1) unmodified from disk
  1693. * 2) backup cache for save/restore during power-downs */
  1694. il->ucode_code.len = inst_size;
  1695. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1696. il->ucode_data.len = data_size;
  1697. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1698. il->ucode_data_backup.len = data_size;
  1699. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1700. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1701. !il->ucode_data_backup.v_addr)
  1702. goto err_pci_alloc;
  1703. /* Initialization instructions and data */
  1704. if (init_size && init_data_size) {
  1705. il->ucode_init.len = init_size;
  1706. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1707. il->ucode_init_data.len = init_data_size;
  1708. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1709. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1710. goto err_pci_alloc;
  1711. }
  1712. /* Bootstrap (instructions only, no data) */
  1713. if (boot_size) {
  1714. il->ucode_boot.len = boot_size;
  1715. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1716. if (!il->ucode_boot.v_addr)
  1717. goto err_pci_alloc;
  1718. }
  1719. /* Copy images into buffers for card's bus-master reads ... */
  1720. /* Runtime instructions (first block of data in file) */
  1721. len = inst_size;
  1722. D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
  1723. memcpy(il->ucode_code.v_addr, src, len);
  1724. src += len;
  1725. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1726. il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
  1727. /* Runtime data (2nd block)
  1728. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1729. len = data_size;
  1730. D_INFO("Copying (but not loading) uCode data len %zd\n", len);
  1731. memcpy(il->ucode_data.v_addr, src, len);
  1732. memcpy(il->ucode_data_backup.v_addr, src, len);
  1733. src += len;
  1734. /* Initialization instructions (3rd block) */
  1735. if (init_size) {
  1736. len = init_size;
  1737. D_INFO("Copying (but not loading) init instr len %zd\n", len);
  1738. memcpy(il->ucode_init.v_addr, src, len);
  1739. src += len;
  1740. }
  1741. /* Initialization data (4th block) */
  1742. if (init_data_size) {
  1743. len = init_data_size;
  1744. D_INFO("Copying (but not loading) init data len %zd\n", len);
  1745. memcpy(il->ucode_init_data.v_addr, src, len);
  1746. src += len;
  1747. }
  1748. /* Bootstrap instructions (5th block) */
  1749. len = boot_size;
  1750. D_INFO("Copying (but not loading) boot instr len %zd\n", len);
  1751. memcpy(il->ucode_boot.v_addr, src, len);
  1752. /* We have our copies now, allow OS release its copies */
  1753. release_firmware(ucode_raw);
  1754. return 0;
  1755. err_pci_alloc:
  1756. IL_ERR("failed to allocate pci memory\n");
  1757. ret = -ENOMEM;
  1758. il3945_dealloc_ucode_pci(il);
  1759. err_release:
  1760. release_firmware(ucode_raw);
  1761. error:
  1762. return ret;
  1763. }
  1764. /**
  1765. * il3945_set_ucode_ptrs - Set uCode address location
  1766. *
  1767. * Tell initialization uCode where to find runtime uCode.
  1768. *
  1769. * BSM registers initially contain pointers to initialization uCode.
  1770. * We need to replace them to load runtime uCode inst and data,
  1771. * and to save runtime data when powering down.
  1772. */
  1773. static int
  1774. il3945_set_ucode_ptrs(struct il_priv *il)
  1775. {
  1776. dma_addr_t pinst;
  1777. dma_addr_t pdata;
  1778. /* bits 31:0 for 3945 */
  1779. pinst = il->ucode_code.p_addr;
  1780. pdata = il->ucode_data_backup.p_addr;
  1781. /* Tell bootstrap uCode where to find image to load */
  1782. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1783. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1784. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
  1785. /* Inst byte count must be last to set up, bit 31 signals uCode
  1786. * that all new ptr/size info is in place */
  1787. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1788. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1789. D_INFO("Runtime uCode pointers are set.\n");
  1790. return 0;
  1791. }
  1792. /**
  1793. * il3945_init_alive_start - Called after N_ALIVE notification received
  1794. *
  1795. * Called after N_ALIVE notification received from "initialize" uCode.
  1796. *
  1797. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1798. */
  1799. static void
  1800. il3945_init_alive_start(struct il_priv *il)
  1801. {
  1802. /* Check alive response for "valid" sign from uCode */
  1803. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1804. /* We had an error bringing up the hardware, so take it
  1805. * all the way back down so we can try again */
  1806. D_INFO("Initialize Alive failed.\n");
  1807. goto restart;
  1808. }
  1809. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1810. * This is a paranoid check, because we would not have gotten the
  1811. * "initialize" alive if code weren't properly loaded. */
  1812. if (il3945_verify_ucode(il)) {
  1813. /* Runtime instruction load was bad;
  1814. * take it all the way back down so we can try again */
  1815. D_INFO("Bad \"initialize\" uCode load.\n");
  1816. goto restart;
  1817. }
  1818. /* Send pointers to protocol/runtime uCode image ... init code will
  1819. * load and launch runtime uCode, which will send us another "Alive"
  1820. * notification. */
  1821. D_INFO("Initialization Alive received.\n");
  1822. if (il3945_set_ucode_ptrs(il)) {
  1823. /* Runtime instruction load won't happen;
  1824. * take it all the way back down so we can try again */
  1825. D_INFO("Couldn't set up uCode pointers.\n");
  1826. goto restart;
  1827. }
  1828. return;
  1829. restart:
  1830. queue_work(il->workqueue, &il->restart);
  1831. }
  1832. /**
  1833. * il3945_alive_start - called after N_ALIVE notification received
  1834. * from protocol/runtime uCode (initialization uCode's
  1835. * Alive gets handled by il3945_init_alive_start()).
  1836. */
  1837. static void
  1838. il3945_alive_start(struct il_priv *il)
  1839. {
  1840. int thermal_spin = 0;
  1841. u32 rfkill;
  1842. D_INFO("Runtime Alive received.\n");
  1843. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1844. /* We had an error bringing up the hardware, so take it
  1845. * all the way back down so we can try again */
  1846. D_INFO("Alive failed.\n");
  1847. goto restart;
  1848. }
  1849. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1850. * This is a paranoid check, because we would not have gotten the
  1851. * "runtime" alive if code weren't properly loaded. */
  1852. if (il3945_verify_ucode(il)) {
  1853. /* Runtime instruction load was bad;
  1854. * take it all the way back down so we can try again */
  1855. D_INFO("Bad runtime uCode load.\n");
  1856. goto restart;
  1857. }
  1858. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1859. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1860. if (rfkill & 0x1) {
  1861. clear_bit(S_RFKILL, &il->status);
  1862. /* if RFKILL is not on, then wait for thermal
  1863. * sensor in adapter to kick in */
  1864. while (il3945_hw_get_temperature(il) == 0) {
  1865. thermal_spin++;
  1866. udelay(10);
  1867. }
  1868. if (thermal_spin)
  1869. D_INFO("Thermal calibration took %dus\n",
  1870. thermal_spin * 10);
  1871. } else
  1872. set_bit(S_RFKILL, &il->status);
  1873. /* After the ALIVE response, we can send commands to 3945 uCode */
  1874. set_bit(S_ALIVE, &il->status);
  1875. /* Enable watchdog to monitor the driver tx queues */
  1876. il_setup_watchdog(il);
  1877. if (il_is_rfkill(il))
  1878. return;
  1879. ieee80211_wake_queues(il->hw);
  1880. il->active_rate = RATES_MASK_3945;
  1881. il_power_update_mode(il, true);
  1882. if (il_is_associated(il)) {
  1883. struct il3945_rxon_cmd *active_rxon =
  1884. (struct il3945_rxon_cmd *)(&il->active);
  1885. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1886. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1887. } else {
  1888. /* Initialize our rx_config data */
  1889. il_connection_init_rx_config(il);
  1890. }
  1891. /* Configure Bluetooth device coexistence support */
  1892. il_send_bt_config(il);
  1893. set_bit(S_READY, &il->status);
  1894. /* Configure the adapter for unassociated operation */
  1895. il3945_commit_rxon(il);
  1896. il3945_reg_txpower_periodic(il);
  1897. D_INFO("ALIVE processing complete.\n");
  1898. wake_up(&il->wait_command_queue);
  1899. return;
  1900. restart:
  1901. queue_work(il->workqueue, &il->restart);
  1902. }
  1903. static void il3945_cancel_deferred_work(struct il_priv *il);
  1904. static void
  1905. __il3945_down(struct il_priv *il)
  1906. {
  1907. unsigned long flags;
  1908. int exit_pending;
  1909. D_INFO(DRV_NAME " is going down\n");
  1910. il_scan_cancel_timeout(il, 200);
  1911. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1912. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1913. * to prevent rearm timer */
  1914. del_timer_sync(&il->watchdog);
  1915. /* Station information will now be cleared in device */
  1916. il_clear_ucode_stations(il);
  1917. il_dealloc_bcast_stations(il);
  1918. il_clear_driver_stations(il);
  1919. /* Unblock any waiting calls */
  1920. wake_up_all(&il->wait_command_queue);
  1921. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1922. * exiting the module */
  1923. if (!exit_pending)
  1924. clear_bit(S_EXIT_PENDING, &il->status);
  1925. /* stop and reset the on-board processor */
  1926. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1927. /* tell the device to stop sending interrupts */
  1928. spin_lock_irqsave(&il->lock, flags);
  1929. il_disable_interrupts(il);
  1930. spin_unlock_irqrestore(&il->lock, flags);
  1931. il3945_synchronize_irq(il);
  1932. if (il->mac80211_registered)
  1933. ieee80211_stop_queues(il->hw);
  1934. /* If we have not previously called il3945_init() then
  1935. * clear all bits but the RF Kill bits and return */
  1936. if (!il_is_init(il)) {
  1937. il->status =
  1938. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1939. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1940. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1941. goto exit;
  1942. }
  1943. /* ...otherwise clear out all the status bits but the RF Kill
  1944. * bit and continue taking the NIC down. */
  1945. il->status &=
  1946. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1947. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1948. test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
  1949. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1950. /*
  1951. * We disabled and synchronized interrupt, and priv->mutex is taken, so
  1952. * here is the only thread which will program device registers, but
  1953. * still have lockdep assertions, so we are taking reg_lock.
  1954. */
  1955. spin_lock_irq(&il->reg_lock);
  1956. /* FIXME: il_grab_nic_access if rfkill is off ? */
  1957. il3945_hw_txq_ctx_stop(il);
  1958. il3945_hw_rxq_stop(il);
  1959. /* Power-down device's busmaster DMA clocks */
  1960. _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1961. udelay(5);
  1962. /* Stop the device, and put it in low power state */
  1963. _il_apm_stop(il);
  1964. spin_unlock_irq(&il->reg_lock);
  1965. il3945_hw_txq_ctx_free(il);
  1966. exit:
  1967. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1968. if (il->beacon_skb)
  1969. dev_kfree_skb(il->beacon_skb);
  1970. il->beacon_skb = NULL;
  1971. /* clear out any free frames */
  1972. il3945_clear_free_frames(il);
  1973. }
  1974. static void
  1975. il3945_down(struct il_priv *il)
  1976. {
  1977. mutex_lock(&il->mutex);
  1978. __il3945_down(il);
  1979. mutex_unlock(&il->mutex);
  1980. il3945_cancel_deferred_work(il);
  1981. }
  1982. #define MAX_HW_RESTARTS 5
  1983. static int
  1984. il3945_alloc_bcast_station(struct il_priv *il)
  1985. {
  1986. unsigned long flags;
  1987. u8 sta_id;
  1988. spin_lock_irqsave(&il->sta_lock, flags);
  1989. sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
  1990. if (sta_id == IL_INVALID_STATION) {
  1991. IL_ERR("Unable to prepare broadcast station\n");
  1992. spin_unlock_irqrestore(&il->sta_lock, flags);
  1993. return -EINVAL;
  1994. }
  1995. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  1996. il->stations[sta_id].used |= IL_STA_BCAST;
  1997. spin_unlock_irqrestore(&il->sta_lock, flags);
  1998. return 0;
  1999. }
  2000. static int
  2001. __il3945_up(struct il_priv *il)
  2002. {
  2003. int rc, i;
  2004. rc = il3945_alloc_bcast_station(il);
  2005. if (rc)
  2006. return rc;
  2007. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2008. IL_WARN("Exit pending; will not bring the NIC up\n");
  2009. return -EIO;
  2010. }
  2011. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  2012. IL_ERR("ucode not available for device bring up\n");
  2013. return -EIO;
  2014. }
  2015. /* If platform's RF_KILL switch is NOT set to KILL */
  2016. if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2017. clear_bit(S_RFKILL, &il->status);
  2018. else {
  2019. set_bit(S_RFKILL, &il->status);
  2020. IL_WARN("Radio disabled by HW RF Kill switch\n");
  2021. return -ENODEV;
  2022. }
  2023. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2024. rc = il3945_hw_nic_init(il);
  2025. if (rc) {
  2026. IL_ERR("Unable to int nic\n");
  2027. return rc;
  2028. }
  2029. /* make sure rfkill handshake bits are cleared */
  2030. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2031. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2032. /* clear (again), then enable host interrupts */
  2033. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2034. il_enable_interrupts(il);
  2035. /* really make sure rfkill handshake bits are cleared */
  2036. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2037. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2038. /* Copy original ucode data image from disk into backup cache.
  2039. * This will be used to initialize the on-board processor's
  2040. * data SRAM for a clean start when the runtime program first loads. */
  2041. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2042. il->ucode_data.len);
  2043. /* We return success when we resume from suspend and rf_kill is on. */
  2044. if (test_bit(S_RFKILL, &il->status))
  2045. return 0;
  2046. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2047. /* load bootstrap state machine,
  2048. * load bootstrap program into processor's memory,
  2049. * prepare to load the "initialize" uCode */
  2050. rc = il->ops->load_ucode(il);
  2051. if (rc) {
  2052. IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
  2053. continue;
  2054. }
  2055. /* start card; "initialize" will load runtime ucode */
  2056. il3945_nic_start(il);
  2057. D_INFO(DRV_NAME " is coming up\n");
  2058. return 0;
  2059. }
  2060. set_bit(S_EXIT_PENDING, &il->status);
  2061. __il3945_down(il);
  2062. clear_bit(S_EXIT_PENDING, &il->status);
  2063. /* tried to restart and config the device for as long as our
  2064. * patience could withstand */
  2065. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2066. return -EIO;
  2067. }
  2068. /*****************************************************************************
  2069. *
  2070. * Workqueue callbacks
  2071. *
  2072. *****************************************************************************/
  2073. static void
  2074. il3945_bg_init_alive_start(struct work_struct *data)
  2075. {
  2076. struct il_priv *il =
  2077. container_of(data, struct il_priv, init_alive_start.work);
  2078. mutex_lock(&il->mutex);
  2079. if (test_bit(S_EXIT_PENDING, &il->status))
  2080. goto out;
  2081. il3945_init_alive_start(il);
  2082. out:
  2083. mutex_unlock(&il->mutex);
  2084. }
  2085. static void
  2086. il3945_bg_alive_start(struct work_struct *data)
  2087. {
  2088. struct il_priv *il =
  2089. container_of(data, struct il_priv, alive_start.work);
  2090. mutex_lock(&il->mutex);
  2091. if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
  2092. goto out;
  2093. il3945_alive_start(il);
  2094. out:
  2095. mutex_unlock(&il->mutex);
  2096. }
  2097. /*
  2098. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2099. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2100. * *is* readable even when device has been SW_RESET into low power mode
  2101. * (e.g. during RF KILL).
  2102. */
  2103. static void
  2104. il3945_rfkill_poll(struct work_struct *data)
  2105. {
  2106. struct il_priv *il =
  2107. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2108. bool old_rfkill = test_bit(S_RFKILL, &il->status);
  2109. bool new_rfkill =
  2110. !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2111. if (new_rfkill != old_rfkill) {
  2112. if (new_rfkill)
  2113. set_bit(S_RFKILL, &il->status);
  2114. else
  2115. clear_bit(S_RFKILL, &il->status);
  2116. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2117. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2118. new_rfkill ? "disable radio" : "enable radio");
  2119. }
  2120. /* Keep this running, even if radio now enabled. This will be
  2121. * cancelled in mac_start() if system decides to start again */
  2122. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2123. round_jiffies_relative(2 * HZ));
  2124. }
  2125. int
  2126. il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2127. {
  2128. struct il_host_cmd cmd = {
  2129. .id = C_SCAN,
  2130. .len = sizeof(struct il3945_scan_cmd),
  2131. .flags = CMD_SIZE_HUGE,
  2132. };
  2133. struct il3945_scan_cmd *scan;
  2134. u8 n_probes = 0;
  2135. enum ieee80211_band band;
  2136. bool is_active = false;
  2137. int ret;
  2138. u16 len;
  2139. lockdep_assert_held(&il->mutex);
  2140. if (!il->scan_cmd) {
  2141. il->scan_cmd =
  2142. kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
  2143. GFP_KERNEL);
  2144. if (!il->scan_cmd) {
  2145. D_SCAN("Fail to allocate scan memory\n");
  2146. return -ENOMEM;
  2147. }
  2148. }
  2149. scan = il->scan_cmd;
  2150. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2151. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2152. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2153. if (il_is_associated(il)) {
  2154. u16 interval;
  2155. u32 extra;
  2156. u32 suspend_time = 100;
  2157. u32 scan_suspend_time = 100;
  2158. D_INFO("Scanning while associated...\n");
  2159. interval = vif->bss_conf.beacon_int;
  2160. scan->suspend_time = 0;
  2161. scan->max_out_time = cpu_to_le32(200 * 1024);
  2162. if (!interval)
  2163. interval = suspend_time;
  2164. /*
  2165. * suspend time format:
  2166. * 0-19: beacon interval in usec (time before exec.)
  2167. * 20-23: 0
  2168. * 24-31: number of beacons (suspend between channels)
  2169. */
  2170. extra = (suspend_time / interval) << 24;
  2171. scan_suspend_time =
  2172. 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
  2173. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2174. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2175. scan_suspend_time, interval);
  2176. }
  2177. if (il->scan_request->n_ssids) {
  2178. int i, p = 0;
  2179. D_SCAN("Kicking off active scan\n");
  2180. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2181. /* always does wildcard anyway */
  2182. if (!il->scan_request->ssids[i].ssid_len)
  2183. continue;
  2184. scan->direct_scan[p].id = WLAN_EID_SSID;
  2185. scan->direct_scan[p].len =
  2186. il->scan_request->ssids[i].ssid_len;
  2187. memcpy(scan->direct_scan[p].ssid,
  2188. il->scan_request->ssids[i].ssid,
  2189. il->scan_request->ssids[i].ssid_len);
  2190. n_probes++;
  2191. p++;
  2192. }
  2193. is_active = true;
  2194. } else
  2195. D_SCAN("Kicking off passive scan.\n");
  2196. /* We don't build a direct scan probe request; the uCode will do
  2197. * that based on the direct_mask added to each channel entry */
  2198. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2199. scan->tx_cmd.sta_id = il->hw_params.bcast_id;
  2200. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2201. /* flags + rate selection */
  2202. switch (il->scan_band) {
  2203. case IEEE80211_BAND_2GHZ:
  2204. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2205. scan->tx_cmd.rate = RATE_1M_PLCP;
  2206. band = IEEE80211_BAND_2GHZ;
  2207. break;
  2208. case IEEE80211_BAND_5GHZ:
  2209. scan->tx_cmd.rate = RATE_6M_PLCP;
  2210. band = IEEE80211_BAND_5GHZ;
  2211. break;
  2212. default:
  2213. IL_WARN("Invalid scan band\n");
  2214. return -EIO;
  2215. }
  2216. /*
  2217. * If active scaning is requested but a certain channel is marked
  2218. * passive, we can do active scanning if we detect transmissions. For
  2219. * passive only scanning disable switching to active on any channel.
  2220. */
  2221. scan->good_CRC_th =
  2222. is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
  2223. len =
  2224. il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2225. vif->addr, il->scan_request->ie,
  2226. il->scan_request->ie_len,
  2227. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2228. scan->tx_cmd.len = cpu_to_le16(len);
  2229. /* select Rx antennas */
  2230. scan->flags |= il3945_get_antenna_flags(il);
  2231. scan->channel_count =
  2232. il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2233. (void *)&scan->data[len], vif);
  2234. if (scan->channel_count == 0) {
  2235. D_SCAN("channel count %d\n", scan->channel_count);
  2236. return -EIO;
  2237. }
  2238. cmd.len +=
  2239. le16_to_cpu(scan->tx_cmd.len) +
  2240. scan->channel_count * sizeof(struct il3945_scan_channel);
  2241. cmd.data = scan;
  2242. scan->len = cpu_to_le16(cmd.len);
  2243. set_bit(S_SCAN_HW, &il->status);
  2244. ret = il_send_cmd_sync(il, &cmd);
  2245. if (ret)
  2246. clear_bit(S_SCAN_HW, &il->status);
  2247. return ret;
  2248. }
  2249. void
  2250. il3945_post_scan(struct il_priv *il)
  2251. {
  2252. /*
  2253. * Since setting the RXON may have been deferred while
  2254. * performing the scan, fire one off if needed
  2255. */
  2256. if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
  2257. il3945_commit_rxon(il);
  2258. }
  2259. static void
  2260. il3945_bg_restart(struct work_struct *data)
  2261. {
  2262. struct il_priv *il = container_of(data, struct il_priv, restart);
  2263. if (test_bit(S_EXIT_PENDING, &il->status))
  2264. return;
  2265. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2266. mutex_lock(&il->mutex);
  2267. il->is_open = 0;
  2268. mutex_unlock(&il->mutex);
  2269. il3945_down(il);
  2270. ieee80211_restart_hw(il->hw);
  2271. } else {
  2272. il3945_down(il);
  2273. mutex_lock(&il->mutex);
  2274. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2275. mutex_unlock(&il->mutex);
  2276. return;
  2277. }
  2278. __il3945_up(il);
  2279. mutex_unlock(&il->mutex);
  2280. }
  2281. }
  2282. static void
  2283. il3945_bg_rx_replenish(struct work_struct *data)
  2284. {
  2285. struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
  2286. mutex_lock(&il->mutex);
  2287. if (test_bit(S_EXIT_PENDING, &il->status))
  2288. goto out;
  2289. il3945_rx_replenish(il);
  2290. out:
  2291. mutex_unlock(&il->mutex);
  2292. }
  2293. void
  2294. il3945_post_associate(struct il_priv *il)
  2295. {
  2296. int rc = 0;
  2297. struct ieee80211_conf *conf = NULL;
  2298. if (!il->vif || !il->is_open)
  2299. return;
  2300. D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid,
  2301. il->active.bssid_addr);
  2302. if (test_bit(S_EXIT_PENDING, &il->status))
  2303. return;
  2304. il_scan_cancel_timeout(il, 200);
  2305. conf = &il->hw->conf;
  2306. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2307. il3945_commit_rxon(il);
  2308. rc = il_send_rxon_timing(il);
  2309. if (rc)
  2310. IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
  2311. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2312. il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid);
  2313. D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid,
  2314. il->vif->bss_conf.beacon_int);
  2315. if (il->vif->bss_conf.use_short_preamble)
  2316. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2317. else
  2318. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2319. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2320. if (il->vif->bss_conf.use_short_slot)
  2321. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2322. else
  2323. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2324. }
  2325. il3945_commit_rxon(il);
  2326. switch (il->vif->type) {
  2327. case NL80211_IFTYPE_STATION:
  2328. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2329. break;
  2330. case NL80211_IFTYPE_ADHOC:
  2331. il3945_send_beacon_cmd(il);
  2332. break;
  2333. default:
  2334. IL_ERR("%s Should not be called in %d mode\n", __func__,
  2335. il->vif->type);
  2336. break;
  2337. }
  2338. }
  2339. /*****************************************************************************
  2340. *
  2341. * mac80211 entry point functions
  2342. *
  2343. *****************************************************************************/
  2344. #define UCODE_READY_TIMEOUT (2 * HZ)
  2345. static int
  2346. il3945_mac_start(struct ieee80211_hw *hw)
  2347. {
  2348. struct il_priv *il = hw->priv;
  2349. int ret;
  2350. /* we should be verifying the device is ready to be opened */
  2351. mutex_lock(&il->mutex);
  2352. D_MAC80211("enter\n");
  2353. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2354. * ucode filename and max sizes are card-specific. */
  2355. if (!il->ucode_code.len) {
  2356. ret = il3945_read_ucode(il);
  2357. if (ret) {
  2358. IL_ERR("Could not read microcode: %d\n", ret);
  2359. mutex_unlock(&il->mutex);
  2360. goto out_release_irq;
  2361. }
  2362. }
  2363. ret = __il3945_up(il);
  2364. mutex_unlock(&il->mutex);
  2365. if (ret)
  2366. goto out_release_irq;
  2367. D_INFO("Start UP work.\n");
  2368. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2369. * mac80211 will not be run successfully. */
  2370. ret = wait_event_timeout(il->wait_command_queue,
  2371. test_bit(S_READY, &il->status),
  2372. UCODE_READY_TIMEOUT);
  2373. if (!ret) {
  2374. if (!test_bit(S_READY, &il->status)) {
  2375. IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
  2376. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2377. ret = -ETIMEDOUT;
  2378. goto out_release_irq;
  2379. }
  2380. }
  2381. /* ucode is running and will send rfkill notifications,
  2382. * no need to poll the killswitch state anymore */
  2383. cancel_delayed_work(&il->_3945.rfkill_poll);
  2384. il->is_open = 1;
  2385. D_MAC80211("leave\n");
  2386. return 0;
  2387. out_release_irq:
  2388. il->is_open = 0;
  2389. D_MAC80211("leave - failed\n");
  2390. return ret;
  2391. }
  2392. static void
  2393. il3945_mac_stop(struct ieee80211_hw *hw)
  2394. {
  2395. struct il_priv *il = hw->priv;
  2396. D_MAC80211("enter\n");
  2397. if (!il->is_open) {
  2398. D_MAC80211("leave - skip\n");
  2399. return;
  2400. }
  2401. il->is_open = 0;
  2402. il3945_down(il);
  2403. flush_workqueue(il->workqueue);
  2404. /* start polling the killswitch state again */
  2405. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2406. round_jiffies_relative(2 * HZ));
  2407. D_MAC80211("leave\n");
  2408. }
  2409. static void
  2410. il3945_mac_tx(struct ieee80211_hw *hw,
  2411. struct ieee80211_tx_control *control,
  2412. struct sk_buff *skb)
  2413. {
  2414. struct il_priv *il = hw->priv;
  2415. D_MAC80211("enter\n");
  2416. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2417. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2418. if (il3945_tx_skb(il, control->sta, skb))
  2419. dev_kfree_skb_any(skb);
  2420. D_MAC80211("leave\n");
  2421. }
  2422. void
  2423. il3945_config_ap(struct il_priv *il)
  2424. {
  2425. struct ieee80211_vif *vif = il->vif;
  2426. int rc = 0;
  2427. if (test_bit(S_EXIT_PENDING, &il->status))
  2428. return;
  2429. /* The following should be done only at AP bring up */
  2430. if (!(il_is_associated(il))) {
  2431. /* RXON - unassoc (to set timing command) */
  2432. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2433. il3945_commit_rxon(il);
  2434. /* RXON Timing */
  2435. rc = il_send_rxon_timing(il);
  2436. if (rc)
  2437. IL_WARN("C_RXON_TIMING failed - "
  2438. "Attempting to continue.\n");
  2439. il->staging.assoc_id = 0;
  2440. if (vif->bss_conf.use_short_preamble)
  2441. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2442. else
  2443. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2444. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2445. if (vif->bss_conf.use_short_slot)
  2446. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2447. else
  2448. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2449. }
  2450. /* restore RXON assoc */
  2451. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2452. il3945_commit_rxon(il);
  2453. }
  2454. il3945_send_beacon_cmd(il);
  2455. }
  2456. static int
  2457. il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2458. struct ieee80211_vif *vif, struct ieee80211_sta *sta,
  2459. struct ieee80211_key_conf *key)
  2460. {
  2461. struct il_priv *il = hw->priv;
  2462. int ret = 0;
  2463. u8 sta_id = IL_INVALID_STATION;
  2464. u8 static_key;
  2465. D_MAC80211("enter\n");
  2466. if (il3945_mod_params.sw_crypto) {
  2467. D_MAC80211("leave - hwcrypto disabled\n");
  2468. return -EOPNOTSUPP;
  2469. }
  2470. /*
  2471. * To support IBSS RSN, don't program group keys in IBSS, the
  2472. * hardware will then not attempt to decrypt the frames.
  2473. */
  2474. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2475. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  2476. D_MAC80211("leave - IBSS RSN\n");
  2477. return -EOPNOTSUPP;
  2478. }
  2479. static_key = !il_is_associated(il);
  2480. if (!static_key) {
  2481. sta_id = il_sta_id_or_broadcast(il, sta);
  2482. if (sta_id == IL_INVALID_STATION) {
  2483. D_MAC80211("leave - station not found\n");
  2484. return -EINVAL;
  2485. }
  2486. }
  2487. mutex_lock(&il->mutex);
  2488. il_scan_cancel_timeout(il, 100);
  2489. switch (cmd) {
  2490. case SET_KEY:
  2491. if (static_key)
  2492. ret = il3945_set_static_key(il, key);
  2493. else
  2494. ret = il3945_set_dynamic_key(il, key, sta_id);
  2495. D_MAC80211("enable hwcrypto key\n");
  2496. break;
  2497. case DISABLE_KEY:
  2498. if (static_key)
  2499. ret = il3945_remove_static_key(il);
  2500. else
  2501. ret = il3945_clear_sta_key_info(il, sta_id);
  2502. D_MAC80211("disable hwcrypto key\n");
  2503. break;
  2504. default:
  2505. ret = -EINVAL;
  2506. }
  2507. D_MAC80211("leave ret %d\n", ret);
  2508. mutex_unlock(&il->mutex);
  2509. return ret;
  2510. }
  2511. static int
  2512. il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2513. struct ieee80211_sta *sta)
  2514. {
  2515. struct il_priv *il = hw->priv;
  2516. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2517. int ret;
  2518. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2519. u8 sta_id;
  2520. mutex_lock(&il->mutex);
  2521. D_INFO("station %pM\n", sta->addr);
  2522. sta_priv->common.sta_id = IL_INVALID_STATION;
  2523. ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
  2524. if (ret) {
  2525. IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
  2526. /* Should we return success if return code is EEXIST ? */
  2527. mutex_unlock(&il->mutex);
  2528. return ret;
  2529. }
  2530. sta_priv->common.sta_id = sta_id;
  2531. /* Initialize rate scaling */
  2532. D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
  2533. il3945_rs_rate_init(il, sta, sta_id);
  2534. mutex_unlock(&il->mutex);
  2535. return 0;
  2536. }
  2537. static void
  2538. il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
  2539. unsigned int *total_flags, u64 multicast)
  2540. {
  2541. struct il_priv *il = hw->priv;
  2542. __le32 filter_or = 0, filter_nand = 0;
  2543. #define CHK(test, flag) do { \
  2544. if (*total_flags & (test)) \
  2545. filter_or |= (flag); \
  2546. else \
  2547. filter_nand |= (flag); \
  2548. } while (0)
  2549. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
  2550. *total_flags);
  2551. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2552. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2553. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2554. #undef CHK
  2555. mutex_lock(&il->mutex);
  2556. il->staging.filter_flags &= ~filter_nand;
  2557. il->staging.filter_flags |= filter_or;
  2558. /*
  2559. * Not committing directly because hardware can perform a scan,
  2560. * but even if hw is ready, committing here breaks for some reason,
  2561. * we'll eventually commit the filter flags change anyway.
  2562. */
  2563. mutex_unlock(&il->mutex);
  2564. /*
  2565. * Receiving all multicast frames is always enabled by the
  2566. * default flags setup in il_connection_init_rx_config()
  2567. * since we currently do not support programming multicast
  2568. * filters into the device.
  2569. */
  2570. *total_flags &=
  2571. FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2572. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2573. }
  2574. /*****************************************************************************
  2575. *
  2576. * sysfs attributes
  2577. *
  2578. *****************************************************************************/
  2579. #ifdef CONFIG_IWLEGACY_DEBUG
  2580. /*
  2581. * The following adds a new attribute to the sysfs representation
  2582. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2583. * used for controlling the debug level.
  2584. *
  2585. * See the level definitions in iwl for details.
  2586. *
  2587. * The debug_level being managed using sysfs below is a per device debug
  2588. * level that is used instead of the global debug level if it (the per
  2589. * device debug level) is set.
  2590. */
  2591. static ssize_t
  2592. il3945_show_debug_level(struct device *d, struct device_attribute *attr,
  2593. char *buf)
  2594. {
  2595. struct il_priv *il = dev_get_drvdata(d);
  2596. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2597. }
  2598. static ssize_t
  2599. il3945_store_debug_level(struct device *d, struct device_attribute *attr,
  2600. const char *buf, size_t count)
  2601. {
  2602. struct il_priv *il = dev_get_drvdata(d);
  2603. unsigned long val;
  2604. int ret;
  2605. ret = strict_strtoul(buf, 0, &val);
  2606. if (ret)
  2607. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2608. else
  2609. il->debug_level = val;
  2610. return strnlen(buf, count);
  2611. }
  2612. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level,
  2613. il3945_store_debug_level);
  2614. #endif /* CONFIG_IWLEGACY_DEBUG */
  2615. static ssize_t
  2616. il3945_show_temperature(struct device *d, struct device_attribute *attr,
  2617. char *buf)
  2618. {
  2619. struct il_priv *il = dev_get_drvdata(d);
  2620. if (!il_is_alive(il))
  2621. return -EAGAIN;
  2622. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2623. }
  2624. static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
  2625. static ssize_t
  2626. il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
  2627. {
  2628. struct il_priv *il = dev_get_drvdata(d);
  2629. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2630. }
  2631. static ssize_t
  2632. il3945_store_tx_power(struct device *d, struct device_attribute *attr,
  2633. const char *buf, size_t count)
  2634. {
  2635. struct il_priv *il = dev_get_drvdata(d);
  2636. char *p = (char *)buf;
  2637. u32 val;
  2638. val = simple_strtoul(p, &p, 10);
  2639. if (p == buf)
  2640. IL_INFO(": %s is not in decimal form.\n", buf);
  2641. else
  2642. il3945_hw_reg_set_txpower(il, val);
  2643. return count;
  2644. }
  2645. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power,
  2646. il3945_store_tx_power);
  2647. static ssize_t
  2648. il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
  2649. {
  2650. struct il_priv *il = dev_get_drvdata(d);
  2651. return sprintf(buf, "0x%04X\n", il->active.flags);
  2652. }
  2653. static ssize_t
  2654. il3945_store_flags(struct device *d, struct device_attribute *attr,
  2655. const char *buf, size_t count)
  2656. {
  2657. struct il_priv *il = dev_get_drvdata(d);
  2658. u32 flags = simple_strtoul(buf, NULL, 0);
  2659. mutex_lock(&il->mutex);
  2660. if (le32_to_cpu(il->staging.flags) != flags) {
  2661. /* Cancel any currently running scans... */
  2662. if (il_scan_cancel_timeout(il, 100))
  2663. IL_WARN("Could not cancel scan.\n");
  2664. else {
  2665. D_INFO("Committing rxon.flags = 0x%04X\n", flags);
  2666. il->staging.flags = cpu_to_le32(flags);
  2667. il3945_commit_rxon(il);
  2668. }
  2669. }
  2670. mutex_unlock(&il->mutex);
  2671. return count;
  2672. }
  2673. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags,
  2674. il3945_store_flags);
  2675. static ssize_t
  2676. il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
  2677. char *buf)
  2678. {
  2679. struct il_priv *il = dev_get_drvdata(d);
  2680. return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
  2681. }
  2682. static ssize_t
  2683. il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
  2684. const char *buf, size_t count)
  2685. {
  2686. struct il_priv *il = dev_get_drvdata(d);
  2687. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2688. mutex_lock(&il->mutex);
  2689. if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
  2690. /* Cancel any currently running scans... */
  2691. if (il_scan_cancel_timeout(il, 100))
  2692. IL_WARN("Could not cancel scan.\n");
  2693. else {
  2694. D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
  2695. filter_flags);
  2696. il->staging.filter_flags = cpu_to_le32(filter_flags);
  2697. il3945_commit_rxon(il);
  2698. }
  2699. }
  2700. mutex_unlock(&il->mutex);
  2701. return count;
  2702. }
  2703. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
  2704. il3945_store_filter_flags);
  2705. static ssize_t
  2706. il3945_show_measurement(struct device *d, struct device_attribute *attr,
  2707. char *buf)
  2708. {
  2709. struct il_priv *il = dev_get_drvdata(d);
  2710. struct il_spectrum_notification measure_report;
  2711. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2712. u8 *data = (u8 *) &measure_report;
  2713. unsigned long flags;
  2714. spin_lock_irqsave(&il->lock, flags);
  2715. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2716. spin_unlock_irqrestore(&il->lock, flags);
  2717. return 0;
  2718. }
  2719. memcpy(&measure_report, &il->measure_report, size);
  2720. il->measurement_status = 0;
  2721. spin_unlock_irqrestore(&il->lock, flags);
  2722. while (size && PAGE_SIZE - len) {
  2723. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2724. PAGE_SIZE - len, 1);
  2725. len = strlen(buf);
  2726. if (PAGE_SIZE - len)
  2727. buf[len++] = '\n';
  2728. ofs += 16;
  2729. size -= min(size, 16U);
  2730. }
  2731. return len;
  2732. }
  2733. static ssize_t
  2734. il3945_store_measurement(struct device *d, struct device_attribute *attr,
  2735. const char *buf, size_t count)
  2736. {
  2737. struct il_priv *il = dev_get_drvdata(d);
  2738. struct ieee80211_measurement_params params = {
  2739. .channel = le16_to_cpu(il->active.channel),
  2740. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2741. .duration = cpu_to_le16(1),
  2742. };
  2743. u8 type = IL_MEASURE_BASIC;
  2744. u8 buffer[32];
  2745. u8 channel;
  2746. if (count) {
  2747. char *p = buffer;
  2748. strlcpy(buffer, buf, sizeof(buffer));
  2749. channel = simple_strtoul(p, NULL, 0);
  2750. if (channel)
  2751. params.channel = channel;
  2752. p = buffer;
  2753. while (*p && *p != ' ')
  2754. p++;
  2755. if (*p)
  2756. type = simple_strtoul(p + 1, NULL, 0);
  2757. }
  2758. D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
  2759. type, params.channel, buf);
  2760. il3945_get_measurement(il, &params, type);
  2761. return count;
  2762. }
  2763. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement,
  2764. il3945_store_measurement);
  2765. static ssize_t
  2766. il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
  2767. const char *buf, size_t count)
  2768. {
  2769. struct il_priv *il = dev_get_drvdata(d);
  2770. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2771. if (il->retry_rate <= 0)
  2772. il->retry_rate = 1;
  2773. return count;
  2774. }
  2775. static ssize_t
  2776. il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
  2777. char *buf)
  2778. {
  2779. struct il_priv *il = dev_get_drvdata(d);
  2780. return sprintf(buf, "%d", il->retry_rate);
  2781. }
  2782. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
  2783. il3945_store_retry_rate);
  2784. static ssize_t
  2785. il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
  2786. {
  2787. /* all this shit doesn't belong into sysfs anyway */
  2788. return 0;
  2789. }
  2790. static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
  2791. static ssize_t
  2792. il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
  2793. {
  2794. struct il_priv *il = dev_get_drvdata(d);
  2795. if (!il_is_alive(il))
  2796. return -EAGAIN;
  2797. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2798. }
  2799. static ssize_t
  2800. il3945_store_antenna(struct device *d, struct device_attribute *attr,
  2801. const char *buf, size_t count)
  2802. {
  2803. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2804. int ant;
  2805. if (count == 0)
  2806. return 0;
  2807. if (sscanf(buf, "%1i", &ant) != 1) {
  2808. D_INFO("not in hex or decimal form.\n");
  2809. return count;
  2810. }
  2811. if (ant >= 0 && ant <= 2) {
  2812. D_INFO("Setting antenna select to %d.\n", ant);
  2813. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2814. } else
  2815. D_INFO("Bad antenna select value %d.\n", ant);
  2816. return count;
  2817. }
  2818. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna,
  2819. il3945_store_antenna);
  2820. static ssize_t
  2821. il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
  2822. {
  2823. struct il_priv *il = dev_get_drvdata(d);
  2824. if (!il_is_alive(il))
  2825. return -EAGAIN;
  2826. return sprintf(buf, "0x%08x\n", (int)il->status);
  2827. }
  2828. static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
  2829. static ssize_t
  2830. il3945_dump_error_log(struct device *d, struct device_attribute *attr,
  2831. const char *buf, size_t count)
  2832. {
  2833. struct il_priv *il = dev_get_drvdata(d);
  2834. char *p = (char *)buf;
  2835. if (p[0] == '1')
  2836. il3945_dump_nic_error_log(il);
  2837. return strnlen(buf, count);
  2838. }
  2839. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
  2840. /*****************************************************************************
  2841. *
  2842. * driver setup and tear down
  2843. *
  2844. *****************************************************************************/
  2845. static void
  2846. il3945_setup_deferred_work(struct il_priv *il)
  2847. {
  2848. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2849. init_waitqueue_head(&il->wait_command_queue);
  2850. INIT_WORK(&il->restart, il3945_bg_restart);
  2851. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2852. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2853. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2854. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2855. il_setup_scan_deferred_work(il);
  2856. il3945_hw_setup_deferred_work(il);
  2857. init_timer(&il->watchdog);
  2858. il->watchdog.data = (unsigned long)il;
  2859. il->watchdog.function = il_bg_watchdog;
  2860. tasklet_init(&il->irq_tasklet,
  2861. (void (*)(unsigned long))il3945_irq_tasklet,
  2862. (unsigned long)il);
  2863. }
  2864. static void
  2865. il3945_cancel_deferred_work(struct il_priv *il)
  2866. {
  2867. il3945_hw_cancel_deferred_work(il);
  2868. cancel_delayed_work_sync(&il->init_alive_start);
  2869. cancel_delayed_work(&il->alive_start);
  2870. il_cancel_scan_deferred_work(il);
  2871. }
  2872. static struct attribute *il3945_sysfs_entries[] = {
  2873. &dev_attr_antenna.attr,
  2874. &dev_attr_channels.attr,
  2875. &dev_attr_dump_errors.attr,
  2876. &dev_attr_flags.attr,
  2877. &dev_attr_filter_flags.attr,
  2878. &dev_attr_measurement.attr,
  2879. &dev_attr_retry_rate.attr,
  2880. &dev_attr_status.attr,
  2881. &dev_attr_temperature.attr,
  2882. &dev_attr_tx_power.attr,
  2883. #ifdef CONFIG_IWLEGACY_DEBUG
  2884. &dev_attr_debug_level.attr,
  2885. #endif
  2886. NULL
  2887. };
  2888. static struct attribute_group il3945_attribute_group = {
  2889. .name = NULL, /* put in device directory */
  2890. .attrs = il3945_sysfs_entries,
  2891. };
  2892. struct ieee80211_ops il3945_mac_ops = {
  2893. .tx = il3945_mac_tx,
  2894. .start = il3945_mac_start,
  2895. .stop = il3945_mac_stop,
  2896. .add_interface = il_mac_add_interface,
  2897. .remove_interface = il_mac_remove_interface,
  2898. .change_interface = il_mac_change_interface,
  2899. .config = il_mac_config,
  2900. .configure_filter = il3945_configure_filter,
  2901. .set_key = il3945_mac_set_key,
  2902. .conf_tx = il_mac_conf_tx,
  2903. .reset_tsf = il_mac_reset_tsf,
  2904. .bss_info_changed = il_mac_bss_info_changed,
  2905. .hw_scan = il_mac_hw_scan,
  2906. .sta_add = il3945_mac_sta_add,
  2907. .sta_remove = il_mac_sta_remove,
  2908. .tx_last_beacon = il_mac_tx_last_beacon,
  2909. .flush = il_mac_flush,
  2910. };
  2911. static int
  2912. il3945_init_drv(struct il_priv *il)
  2913. {
  2914. int ret;
  2915. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2916. il->retry_rate = 1;
  2917. il->beacon_skb = NULL;
  2918. spin_lock_init(&il->sta_lock);
  2919. spin_lock_init(&il->hcmd_lock);
  2920. INIT_LIST_HEAD(&il->free_frames);
  2921. mutex_init(&il->mutex);
  2922. il->ieee_channels = NULL;
  2923. il->ieee_rates = NULL;
  2924. il->band = IEEE80211_BAND_2GHZ;
  2925. il->iw_mode = NL80211_IFTYPE_STATION;
  2926. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2927. /* initialize force reset */
  2928. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2929. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2930. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2931. eeprom->version);
  2932. ret = -EINVAL;
  2933. goto err;
  2934. }
  2935. ret = il_init_channel_map(il);
  2936. if (ret) {
  2937. IL_ERR("initializing regulatory failed: %d\n", ret);
  2938. goto err;
  2939. }
  2940. /* Set up txpower settings in driver for all channels */
  2941. if (il3945_txpower_set_from_eeprom(il)) {
  2942. ret = -EIO;
  2943. goto err_free_channel_map;
  2944. }
  2945. ret = il_init_geos(il);
  2946. if (ret) {
  2947. IL_ERR("initializing geos failed: %d\n", ret);
  2948. goto err_free_channel_map;
  2949. }
  2950. il3945_init_hw_rates(il, il->ieee_rates);
  2951. return 0;
  2952. err_free_channel_map:
  2953. il_free_channel_map(il);
  2954. err:
  2955. return ret;
  2956. }
  2957. #define IL3945_MAX_PROBE_REQUEST 200
  2958. static int
  2959. il3945_setup_mac(struct il_priv *il)
  2960. {
  2961. int ret;
  2962. struct ieee80211_hw *hw = il->hw;
  2963. hw->rate_control_algorithm = "iwl-3945-rs";
  2964. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2965. hw->vif_data_size = sizeof(struct il_vif_priv);
  2966. /* Tell mac80211 our characteristics */
  2967. hw->flags = IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_SPECTRUM_MGMT |
  2968. IEEE80211_HW_SUPPORTS_PS | IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  2969. hw->wiphy->interface_modes =
  2970. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
  2971. hw->wiphy->flags |=
  2972. WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2973. WIPHY_FLAG_IBSS_RSN;
  2974. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2975. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2976. /* we create the 802.11 header and a zero-length SSID element */
  2977. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2978. /* Default value; 4 EDCA QOS priorities */
  2979. hw->queues = 4;
  2980. if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
  2981. il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2982. &il->bands[IEEE80211_BAND_2GHZ];
  2983. if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
  2984. il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2985. &il->bands[IEEE80211_BAND_5GHZ];
  2986. il_leds_init(il);
  2987. ret = ieee80211_register_hw(il->hw);
  2988. if (ret) {
  2989. IL_ERR("Failed to register hw (error %d)\n", ret);
  2990. return ret;
  2991. }
  2992. il->mac80211_registered = 1;
  2993. return 0;
  2994. }
  2995. static int
  2996. il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2997. {
  2998. int err = 0;
  2999. struct il_priv *il;
  3000. struct ieee80211_hw *hw;
  3001. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  3002. struct il3945_eeprom *eeprom;
  3003. unsigned long flags;
  3004. /***********************
  3005. * 1. Allocating HW data
  3006. * ********************/
  3007. hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
  3008. if (!hw) {
  3009. err = -ENOMEM;
  3010. goto out;
  3011. }
  3012. il = hw->priv;
  3013. il->hw = hw;
  3014. SET_IEEE80211_DEV(hw, &pdev->dev);
  3015. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  3016. /*
  3017. * Disabling hardware scan means that mac80211 will perform scans
  3018. * "the hard way", rather than using device's scan.
  3019. */
  3020. if (il3945_mod_params.disable_hw_scan) {
  3021. D_INFO("Disabling hw_scan\n");
  3022. il3945_mac_ops.hw_scan = NULL;
  3023. }
  3024. D_INFO("*** LOAD DRIVER ***\n");
  3025. il->cfg = cfg;
  3026. il->ops = &il3945_ops;
  3027. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3028. il->debugfs_ops = &il3945_debugfs_ops;
  3029. #endif
  3030. il->pci_dev = pdev;
  3031. il->inta_mask = CSR_INI_SET_MASK;
  3032. /***************************
  3033. * 2. Initializing PCI bus
  3034. * *************************/
  3035. pci_disable_link_state(pdev,
  3036. PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3037. PCIE_LINK_STATE_CLKPM);
  3038. if (pci_enable_device(pdev)) {
  3039. err = -ENODEV;
  3040. goto out_ieee80211_free_hw;
  3041. }
  3042. pci_set_master(pdev);
  3043. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3044. if (!err)
  3045. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3046. if (err) {
  3047. IL_WARN("No suitable DMA available.\n");
  3048. goto out_pci_disable_device;
  3049. }
  3050. pci_set_drvdata(pdev, il);
  3051. err = pci_request_regions(pdev, DRV_NAME);
  3052. if (err)
  3053. goto out_pci_disable_device;
  3054. /***********************
  3055. * 3. Read REV Register
  3056. * ********************/
  3057. il->hw_base = pci_ioremap_bar(pdev, 0);
  3058. if (!il->hw_base) {
  3059. err = -ENODEV;
  3060. goto out_pci_release_regions;
  3061. }
  3062. D_INFO("pci_resource_len = 0x%08llx\n",
  3063. (unsigned long long)pci_resource_len(pdev, 0));
  3064. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3065. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3066. * PCI Tx retries from interfering with C3 CPU state */
  3067. pci_write_config_byte(pdev, 0x41, 0x00);
  3068. /* these spin locks will be used in apm_init and EEPROM access
  3069. * we should init now
  3070. */
  3071. spin_lock_init(&il->reg_lock);
  3072. spin_lock_init(&il->lock);
  3073. /*
  3074. * stop and reset the on-board processor just in case it is in a
  3075. * strange state ... like being left stranded by a primary kernel
  3076. * and this is now the kdump kernel trying to start up
  3077. */
  3078. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3079. /***********************
  3080. * 4. Read EEPROM
  3081. * ********************/
  3082. /* Read the EEPROM */
  3083. err = il_eeprom_init(il);
  3084. if (err) {
  3085. IL_ERR("Unable to init EEPROM\n");
  3086. goto out_iounmap;
  3087. }
  3088. /* MAC Address location in EEPROM same for 3945/4965 */
  3089. eeprom = (struct il3945_eeprom *)il->eeprom;
  3090. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3091. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3092. /***********************
  3093. * 5. Setup HW Constants
  3094. * ********************/
  3095. /* Device-specific setup */
  3096. if (il3945_hw_set_hw_params(il)) {
  3097. IL_ERR("failed to set hw settings\n");
  3098. goto out_eeprom_free;
  3099. }
  3100. /***********************
  3101. * 6. Setup il
  3102. * ********************/
  3103. err = il3945_init_drv(il);
  3104. if (err) {
  3105. IL_ERR("initializing driver failed\n");
  3106. goto out_unset_hw_params;
  3107. }
  3108. IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
  3109. /***********************
  3110. * 7. Setup Services
  3111. * ********************/
  3112. spin_lock_irqsave(&il->lock, flags);
  3113. il_disable_interrupts(il);
  3114. spin_unlock_irqrestore(&il->lock, flags);
  3115. pci_enable_msi(il->pci_dev);
  3116. err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
  3117. if (err) {
  3118. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3119. goto out_disable_msi;
  3120. }
  3121. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3122. if (err) {
  3123. IL_ERR("failed to create sysfs device attributes\n");
  3124. goto out_release_irq;
  3125. }
  3126. il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3127. il3945_setup_deferred_work(il);
  3128. il3945_setup_handlers(il);
  3129. il_power_initialize(il);
  3130. /*********************************
  3131. * 8. Setup and Register mac80211
  3132. * *******************************/
  3133. il_enable_interrupts(il);
  3134. err = il3945_setup_mac(il);
  3135. if (err)
  3136. goto out_remove_sysfs;
  3137. err = il_dbgfs_register(il, DRV_NAME);
  3138. if (err)
  3139. IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
  3140. err);
  3141. /* Start monitoring the killswitch */
  3142. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
  3143. return 0;
  3144. out_remove_sysfs:
  3145. destroy_workqueue(il->workqueue);
  3146. il->workqueue = NULL;
  3147. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3148. out_release_irq:
  3149. free_irq(il->pci_dev->irq, il);
  3150. out_disable_msi:
  3151. pci_disable_msi(il->pci_dev);
  3152. il_free_geos(il);
  3153. il_free_channel_map(il);
  3154. out_unset_hw_params:
  3155. il3945_unset_hw_params(il);
  3156. out_eeprom_free:
  3157. il_eeprom_free(il);
  3158. out_iounmap:
  3159. iounmap(il->hw_base);
  3160. out_pci_release_regions:
  3161. pci_release_regions(pdev);
  3162. out_pci_disable_device:
  3163. pci_set_drvdata(pdev, NULL);
  3164. pci_disable_device(pdev);
  3165. out_ieee80211_free_hw:
  3166. ieee80211_free_hw(il->hw);
  3167. out:
  3168. return err;
  3169. }
  3170. static void
  3171. il3945_pci_remove(struct pci_dev *pdev)
  3172. {
  3173. struct il_priv *il = pci_get_drvdata(pdev);
  3174. unsigned long flags;
  3175. if (!il)
  3176. return;
  3177. D_INFO("*** UNLOAD DRIVER ***\n");
  3178. il_dbgfs_unregister(il);
  3179. set_bit(S_EXIT_PENDING, &il->status);
  3180. il_leds_exit(il);
  3181. if (il->mac80211_registered) {
  3182. ieee80211_unregister_hw(il->hw);
  3183. il->mac80211_registered = 0;
  3184. } else {
  3185. il3945_down(il);
  3186. }
  3187. /*
  3188. * Make sure device is reset to low power before unloading driver.
  3189. * This may be redundant with il_down(), but there are paths to
  3190. * run il_down() without calling apm_ops.stop(), and there are
  3191. * paths to avoid running il_down() at all before leaving driver.
  3192. * This (inexpensive) call *makes sure* device is reset.
  3193. */
  3194. il_apm_stop(il);
  3195. /* make sure we flush any pending irq or
  3196. * tasklet for the driver
  3197. */
  3198. spin_lock_irqsave(&il->lock, flags);
  3199. il_disable_interrupts(il);
  3200. spin_unlock_irqrestore(&il->lock, flags);
  3201. il3945_synchronize_irq(il);
  3202. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3203. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3204. il3945_dealloc_ucode_pci(il);
  3205. if (il->rxq.bd)
  3206. il3945_rx_queue_free(il, &il->rxq);
  3207. il3945_hw_txq_ctx_free(il);
  3208. il3945_unset_hw_params(il);
  3209. /*netif_stop_queue(dev); */
  3210. flush_workqueue(il->workqueue);
  3211. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3212. * il->workqueue... so we can't take down the workqueue
  3213. * until now... */
  3214. destroy_workqueue(il->workqueue);
  3215. il->workqueue = NULL;
  3216. free_irq(pdev->irq, il);
  3217. pci_disable_msi(pdev);
  3218. iounmap(il->hw_base);
  3219. pci_release_regions(pdev);
  3220. pci_disable_device(pdev);
  3221. pci_set_drvdata(pdev, NULL);
  3222. il_free_channel_map(il);
  3223. il_free_geos(il);
  3224. kfree(il->scan_cmd);
  3225. if (il->beacon_skb)
  3226. dev_kfree_skb(il->beacon_skb);
  3227. ieee80211_free_hw(il->hw);
  3228. }
  3229. /*****************************************************************************
  3230. *
  3231. * driver and module entry point
  3232. *
  3233. *****************************************************************************/
  3234. static struct pci_driver il3945_driver = {
  3235. .name = DRV_NAME,
  3236. .id_table = il3945_hw_card_ids,
  3237. .probe = il3945_pci_probe,
  3238. .remove = il3945_pci_remove,
  3239. .driver.pm = IL_LEGACY_PM_OPS,
  3240. };
  3241. static int __init
  3242. il3945_init(void)
  3243. {
  3244. int ret;
  3245. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3246. pr_info(DRV_COPYRIGHT "\n");
  3247. ret = il3945_rate_control_register();
  3248. if (ret) {
  3249. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3250. return ret;
  3251. }
  3252. ret = pci_register_driver(&il3945_driver);
  3253. if (ret) {
  3254. pr_err("Unable to initialize PCI module\n");
  3255. goto error_register;
  3256. }
  3257. return ret;
  3258. error_register:
  3259. il3945_rate_control_unregister();
  3260. return ret;
  3261. }
  3262. static void __exit
  3263. il3945_exit(void)
  3264. {
  3265. pci_unregister_driver(&il3945_driver);
  3266. il3945_rate_control_unregister();
  3267. }
  3268. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3269. module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
  3270. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3271. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
  3272. MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
  3273. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
  3274. S_IRUGO);
  3275. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3276. #ifdef CONFIG_IWLEGACY_DEBUG
  3277. module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
  3278. MODULE_PARM_DESC(debug, "debug output mask");
  3279. #endif
  3280. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
  3281. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3282. module_exit(il3945_exit);
  3283. module_init(il3945_init);