dma-s3c2410.c 4.4 KB

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  1. /* linux/arch/arm/mach-s3c2410/dma.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 DMA selection
  7. *
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/device.h>
  17. #include <linux/serial_core.h>
  18. #include <mach/map.h>
  19. #include <mach/dma.h>
  20. #include <plat/cpu.h>
  21. #include <plat/dma-s3c24xx.h>
  22. #include <plat/regs-serial.h>
  23. #include <mach/regs-gpio.h>
  24. #include <plat/regs-ac97.h>
  25. #include <plat/regs-dma.h>
  26. #include <mach/regs-lcd.h>
  27. #include <plat/regs-iis.h>
  28. #include <plat/regs-spi.h>
  29. static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
  30. [DMACH_XD0] = {
  31. .name = "xdreq0",
  32. .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
  33. },
  34. [DMACH_XD1] = {
  35. .name = "xdreq1",
  36. .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
  37. },
  38. [DMACH_SDI] = {
  39. .name = "sdi",
  40. .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
  41. .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
  42. .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
  43. },
  44. [DMACH_SPI0] = {
  45. .name = "spi0",
  46. .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
  47. },
  48. [DMACH_SPI1] = {
  49. .name = "spi1",
  50. .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
  51. },
  52. [DMACH_UART0] = {
  53. .name = "uart0",
  54. .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
  55. },
  56. [DMACH_UART1] = {
  57. .name = "uart1",
  58. .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
  59. },
  60. [DMACH_UART2] = {
  61. .name = "uart2",
  62. .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
  63. },
  64. [DMACH_TIMER] = {
  65. .name = "timer",
  66. .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
  67. .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
  68. .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
  69. },
  70. [DMACH_I2S_IN] = {
  71. .name = "i2s-sdi",
  72. .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
  73. .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
  74. },
  75. [DMACH_I2S_OUT] = {
  76. .name = "i2s-sdo",
  77. .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
  78. },
  79. [DMACH_USB_EP1] = {
  80. .name = "usb-ep1",
  81. .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
  82. },
  83. [DMACH_USB_EP2] = {
  84. .name = "usb-ep2",
  85. .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
  86. },
  87. [DMACH_USB_EP3] = {
  88. .name = "usb-ep3",
  89. .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
  90. },
  91. [DMACH_USB_EP4] = {
  92. .name = "usb-ep4",
  93. .channels[3] =S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
  94. },
  95. };
  96. static void s3c2410_dma_select(struct s3c2410_dma_chan *chan,
  97. struct s3c24xx_dma_map *map)
  98. {
  99. chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
  100. }
  101. static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = {
  102. .select = s3c2410_dma_select,
  103. .dcon_mask = 7 << 24,
  104. .map = s3c2410_dma_mappings,
  105. .map_size = ARRAY_SIZE(s3c2410_dma_mappings),
  106. };
  107. static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
  108. .channels = {
  109. [DMACH_SDI] = {
  110. .list = {
  111. [0] = 3 | DMA_CH_VALID,
  112. [1] = 2 | DMA_CH_VALID,
  113. [2] = 0 | DMA_CH_VALID,
  114. },
  115. },
  116. [DMACH_I2S_IN] = {
  117. .list = {
  118. [0] = 1 | DMA_CH_VALID,
  119. [1] = 2 | DMA_CH_VALID,
  120. },
  121. },
  122. },
  123. };
  124. static int __init s3c2410_dma_add(struct device *dev,
  125. struct subsys_interface *sif)
  126. {
  127. s3c2410_dma_init();
  128. s3c24xx_dma_order_set(&s3c2410_dma_order);
  129. return s3c24xx_dma_init_map(&s3c2410_dma_sel);
  130. }
  131. #if defined(CONFIG_CPU_S3C2410)
  132. static struct subsys_interface s3c2410_dma_interface = {
  133. .name = "s3c2410_dma",
  134. .subsys = &s3c2410_subsys,
  135. .add_dev = s3c2410_dma_add,
  136. };
  137. static int __init s3c2410_dma_drvinit(void)
  138. {
  139. return subsys_interface_register(&s3c2410_dma_interface);
  140. }
  141. arch_initcall(s3c2410_dma_drvinit);
  142. static struct subsys_interface s3c2410a_dma_interface = {
  143. .name = "s3c2410a_dma",
  144. .subsys = &s3c2410a_subsys,
  145. .add_dev = s3c2410_dma_add,
  146. };
  147. static int __init s3c2410a_dma_drvinit(void)
  148. {
  149. return subsys_interface_register(&s3c2410a_dma_interface);
  150. }
  151. arch_initcall(s3c2410a_dma_drvinit);
  152. #endif
  153. #if defined(CONFIG_CPU_S3C2442)
  154. /* S3C2442 DMA contains the same selection table as the S3C2410 */
  155. static struct subsys_interface s3c2442_dma_interface = {
  156. .name = "s3c2442_dma",
  157. .subsys = &s3c2442_subsys,
  158. .add_dev = s3c2410_dma_add,
  159. };
  160. static int __init s3c2442_dma_drvinit(void)
  161. {
  162. return subsys_interface_register(&s3c2442_dma_interface);
  163. }
  164. arch_initcall(s3c2442_dma_drvinit);
  165. #endif