kirkwood.dtsi 4.1 KB

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  1. /include/ "skeleton.dtsi"
  2. / {
  3. compatible = "marvell,kirkwood";
  4. interrupt-parent = <&intc>;
  5. aliases {
  6. gpio0 = &gpio0;
  7. gpio1 = &gpio1;
  8. };
  9. intc: interrupt-controller {
  10. compatible = "marvell,orion-intc", "marvell,intc";
  11. interrupt-controller;
  12. #interrupt-cells = <1>;
  13. reg = <0xf1020204 0x04>,
  14. <0xf1020214 0x04>;
  15. };
  16. ocp@f1000000 {
  17. compatible = "simple-bus";
  18. ranges = <0x00000000 0xf1000000 0x4000000
  19. 0xf5000000 0xf5000000 0x0000400>;
  20. #address-cells = <1>;
  21. #size-cells = <1>;
  22. core_clk: core-clocks@10030 {
  23. compatible = "marvell,kirkwood-core-clock";
  24. reg = <0x10030 0x4>;
  25. #clock-cells = <1>;
  26. };
  27. gpio0: gpio@10100 {
  28. compatible = "marvell,orion-gpio";
  29. #gpio-cells = <2>;
  30. gpio-controller;
  31. reg = <0x10100 0x40>;
  32. ngpios = <32>;
  33. interrupt-controller;
  34. #interrupt-cells = <2>;
  35. interrupts = <35>, <36>, <37>, <38>;
  36. clocks = <&gate_clk 7>;
  37. };
  38. gpio1: gpio@10140 {
  39. compatible = "marvell,orion-gpio";
  40. #gpio-cells = <2>;
  41. gpio-controller;
  42. reg = <0x10140 0x40>;
  43. ngpios = <18>;
  44. interrupt-controller;
  45. #interrupt-cells = <2>;
  46. interrupts = <39>, <40>, <41>;
  47. clocks = <&gate_clk 7>;
  48. };
  49. serial@12000 {
  50. compatible = "ns16550a";
  51. reg = <0x12000 0x100>;
  52. reg-shift = <2>;
  53. interrupts = <33>;
  54. clocks = <&gate_clk 7>;
  55. status = "disabled";
  56. };
  57. serial@12100 {
  58. compatible = "ns16550a";
  59. reg = <0x12100 0x100>;
  60. reg-shift = <2>;
  61. interrupts = <34>;
  62. clocks = <&gate_clk 7>;
  63. status = "disabled";
  64. };
  65. rtc@10300 {
  66. compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
  67. reg = <0x10300 0x20>;
  68. interrupts = <53>;
  69. clocks = <&gate_clk 7>;
  70. };
  71. spi@10600 {
  72. compatible = "marvell,orion-spi";
  73. #address-cells = <1>;
  74. #size-cells = <0>;
  75. cell-index = <0>;
  76. interrupts = <23>;
  77. reg = <0x10600 0x28>;
  78. clocks = <&gate_clk 7>;
  79. status = "disabled";
  80. };
  81. gate_clk: clock-gating-control@2011c {
  82. compatible = "marvell,kirkwood-gating-clock";
  83. reg = <0x2011c 0x4>;
  84. clocks = <&core_clk 0>;
  85. #clock-cells = <1>;
  86. };
  87. wdt@20300 {
  88. compatible = "marvell,orion-wdt";
  89. reg = <0x20300 0x28>;
  90. clocks = <&gate_clk 7>;
  91. status = "okay";
  92. };
  93. xor@60800 {
  94. compatible = "marvell,orion-xor";
  95. reg = <0x60800 0x100
  96. 0x60A00 0x100>;
  97. status = "okay";
  98. clocks = <&gate_clk 8>;
  99. xor00 {
  100. interrupts = <5>;
  101. dmacap,memcpy;
  102. dmacap,xor;
  103. };
  104. xor01 {
  105. interrupts = <6>;
  106. dmacap,memcpy;
  107. dmacap,xor;
  108. dmacap,memset;
  109. };
  110. };
  111. xor@60900 {
  112. compatible = "marvell,orion-xor";
  113. reg = <0x60900 0x100
  114. 0xd0B00 0x100>;
  115. status = "okay";
  116. clocks = <&gate_clk 16>;
  117. xor00 {
  118. interrupts = <7>;
  119. dmacap,memcpy;
  120. dmacap,xor;
  121. };
  122. xor01 {
  123. interrupts = <8>;
  124. dmacap,memcpy;
  125. dmacap,xor;
  126. dmacap,memset;
  127. };
  128. };
  129. ehci@50000 {
  130. compatible = "marvell,orion-ehci";
  131. reg = <0x50000 0x1000>;
  132. interrupts = <19>;
  133. clocks = <&gate_clk 3>;
  134. status = "okay";
  135. };
  136. sata@80000 {
  137. compatible = "marvell,orion-sata";
  138. reg = <0x80000 0x5000>;
  139. interrupts = <21>;
  140. clocks = <&gate_clk 14>, <&gate_clk 15>;
  141. clock-names = "0", "1";
  142. status = "disabled";
  143. };
  144. nand@3000000 {
  145. #address-cells = <1>;
  146. #size-cells = <1>;
  147. cle = <0>;
  148. ale = <1>;
  149. bank-width = <1>;
  150. compatible = "marvell,orion-nand";
  151. reg = <0x3000000 0x400>;
  152. chip-delay = <25>;
  153. /* set partition map and/or chip-delay in board dts */
  154. clocks = <&gate_clk 7>;
  155. status = "disabled";
  156. };
  157. i2c@11000 {
  158. compatible = "marvell,mv64xxx-i2c";
  159. reg = <0x11000 0x20>;
  160. #address-cells = <1>;
  161. #size-cells = <0>;
  162. interrupts = <29>;
  163. clock-frequency = <100000>;
  164. clocks = <&gate_clk 7>;
  165. status = "disabled";
  166. };
  167. crypto@30000 {
  168. compatible = "marvell,orion-crypto";
  169. reg = <0x30000 0x10000>,
  170. <0xf5000000 0x800>;
  171. reg-names = "regs", "sram";
  172. interrupts = <22>;
  173. clocks = <&gate_clk 17>;
  174. status = "okay";
  175. };
  176. mvsdio@90000 {
  177. compatible = "marvell,orion-sdio";
  178. reg = <0x90000 0x200>;
  179. interrupts = <28>;
  180. clocks = <&gate_clk 4>;
  181. status = "disabled";
  182. };
  183. };
  184. };