mt9v011.c 17 KB

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  1. /*
  2. * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
  3. *
  4. * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
  5. * This code is placed under the terms of the GNU General Public License v2
  6. */
  7. #include <linux/i2c.h>
  8. #include <linux/slab.h>
  9. #include <linux/videodev2.h>
  10. #include <linux/delay.h>
  11. #include <asm/div64.h>
  12. #include <media/v4l2-device.h>
  13. #include <media/v4l2-chip-ident.h>
  14. #include <media/mt9v011.h>
  15. MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
  16. MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
  17. MODULE_LICENSE("GPL");
  18. static int debug;
  19. module_param(debug, int, 0);
  20. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  21. #define R00_MT9V011_CHIP_VERSION 0x00
  22. #define R01_MT9V011_ROWSTART 0x01
  23. #define R02_MT9V011_COLSTART 0x02
  24. #define R03_MT9V011_HEIGHT 0x03
  25. #define R04_MT9V011_WIDTH 0x04
  26. #define R05_MT9V011_HBLANK 0x05
  27. #define R06_MT9V011_VBLANK 0x06
  28. #define R07_MT9V011_OUT_CTRL 0x07
  29. #define R09_MT9V011_SHUTTER_WIDTH 0x09
  30. #define R0A_MT9V011_CLK_SPEED 0x0a
  31. #define R0B_MT9V011_RESTART 0x0b
  32. #define R0C_MT9V011_SHUTTER_DELAY 0x0c
  33. #define R0D_MT9V011_RESET 0x0d
  34. #define R1E_MT9V011_DIGITAL_ZOOM 0x1e
  35. #define R20_MT9V011_READ_MODE 0x20
  36. #define R2B_MT9V011_GREEN_1_GAIN 0x2b
  37. #define R2C_MT9V011_BLUE_GAIN 0x2c
  38. #define R2D_MT9V011_RED_GAIN 0x2d
  39. #define R2E_MT9V011_GREEN_2_GAIN 0x2e
  40. #define R35_MT9V011_GLOBAL_GAIN 0x35
  41. #define RF1_MT9V011_CHIP_ENABLE 0xf1
  42. #define MT9V011_VERSION 0x8232
  43. #define MT9V011_REV_B_VERSION 0x8243
  44. /* supported controls */
  45. static struct v4l2_queryctrl mt9v011_qctrl[] = {
  46. {
  47. .id = V4L2_CID_GAIN,
  48. .type = V4L2_CTRL_TYPE_INTEGER,
  49. .name = "Gain",
  50. .minimum = 0,
  51. .maximum = (1 << 12) - 1 - 0x0020,
  52. .step = 1,
  53. .default_value = 0x0020,
  54. .flags = 0,
  55. }, {
  56. .id = V4L2_CID_EXPOSURE,
  57. .type = V4L2_CTRL_TYPE_INTEGER,
  58. .name = "Exposure",
  59. .minimum = 0,
  60. .maximum = 2047,
  61. .step = 1,
  62. .default_value = 0x01fc,
  63. .flags = 0,
  64. }, {
  65. .id = V4L2_CID_RED_BALANCE,
  66. .type = V4L2_CTRL_TYPE_INTEGER,
  67. .name = "Red Balance",
  68. .minimum = -1 << 9,
  69. .maximum = (1 << 9) - 1,
  70. .step = 1,
  71. .default_value = 0,
  72. .flags = 0,
  73. }, {
  74. .id = V4L2_CID_BLUE_BALANCE,
  75. .type = V4L2_CTRL_TYPE_INTEGER,
  76. .name = "Blue Balance",
  77. .minimum = -1 << 9,
  78. .maximum = (1 << 9) - 1,
  79. .step = 1,
  80. .default_value = 0,
  81. .flags = 0,
  82. }, {
  83. .id = V4L2_CID_HFLIP,
  84. .type = V4L2_CTRL_TYPE_BOOLEAN,
  85. .name = "Mirror",
  86. .minimum = 0,
  87. .maximum = 1,
  88. .step = 1,
  89. .default_value = 0,
  90. .flags = 0,
  91. }, {
  92. .id = V4L2_CID_VFLIP,
  93. .type = V4L2_CTRL_TYPE_BOOLEAN,
  94. .name = "Vflip",
  95. .minimum = 0,
  96. .maximum = 1,
  97. .step = 1,
  98. .default_value = 0,
  99. .flags = 0,
  100. }, {
  101. }
  102. };
  103. struct mt9v011 {
  104. struct v4l2_subdev sd;
  105. unsigned width, height;
  106. unsigned xtal;
  107. unsigned hflip:1;
  108. unsigned vflip:1;
  109. u16 global_gain, exposure;
  110. s16 red_bal, blue_bal;
  111. };
  112. static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
  113. {
  114. return container_of(sd, struct mt9v011, sd);
  115. }
  116. static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
  117. {
  118. struct i2c_client *c = v4l2_get_subdevdata(sd);
  119. __be16 buffer;
  120. int rc, val;
  121. rc = i2c_master_send(c, &addr, 1);
  122. if (rc != 1)
  123. v4l2_dbg(0, debug, sd,
  124. "i2c i/o error: rc == %d (should be 1)\n", rc);
  125. msleep(10);
  126. rc = i2c_master_recv(c, (char *)&buffer, 2);
  127. if (rc != 2)
  128. v4l2_dbg(0, debug, sd,
  129. "i2c i/o error: rc == %d (should be 2)\n", rc);
  130. val = be16_to_cpu(buffer);
  131. v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
  132. return val;
  133. }
  134. static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
  135. u16 value)
  136. {
  137. struct i2c_client *c = v4l2_get_subdevdata(sd);
  138. unsigned char buffer[3];
  139. int rc;
  140. buffer[0] = addr;
  141. buffer[1] = value >> 8;
  142. buffer[2] = value & 0xff;
  143. v4l2_dbg(2, debug, sd,
  144. "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
  145. rc = i2c_master_send(c, buffer, 3);
  146. if (rc != 3)
  147. v4l2_dbg(0, debug, sd,
  148. "i2c i/o error: rc == %d (should be 3)\n", rc);
  149. }
  150. struct i2c_reg_value {
  151. unsigned char reg;
  152. u16 value;
  153. };
  154. /*
  155. * Values used at the original driver
  156. * Some values are marked as Reserved at the datasheet
  157. */
  158. static const struct i2c_reg_value mt9v011_init_default[] = {
  159. { R0D_MT9V011_RESET, 0x0001 },
  160. { R0D_MT9V011_RESET, 0x0000 },
  161. { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
  162. { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
  163. { R0A_MT9V011_CLK_SPEED, 0x0000 },
  164. { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
  165. { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
  166. };
  167. static u16 calc_mt9v011_gain(s16 lineargain)
  168. {
  169. u16 digitalgain = 0;
  170. u16 analogmult = 0;
  171. u16 analoginit = 0;
  172. if (lineargain < 0)
  173. lineargain = 0;
  174. /* recommended minimum */
  175. lineargain += 0x0020;
  176. if (lineargain > 2047)
  177. lineargain = 2047;
  178. if (lineargain > 1023) {
  179. digitalgain = 3;
  180. analogmult = 3;
  181. analoginit = lineargain / 16;
  182. } else if (lineargain > 511) {
  183. digitalgain = 1;
  184. analogmult = 3;
  185. analoginit = lineargain / 8;
  186. } else if (lineargain > 255) {
  187. analogmult = 3;
  188. analoginit = lineargain / 4;
  189. } else if (lineargain > 127) {
  190. analogmult = 1;
  191. analoginit = lineargain / 2;
  192. } else
  193. analoginit = lineargain;
  194. return analoginit + (analogmult << 7) + (digitalgain << 9);
  195. }
  196. static void set_balance(struct v4l2_subdev *sd)
  197. {
  198. struct mt9v011 *core = to_mt9v011(sd);
  199. u16 green_gain, blue_gain, red_gain;
  200. u16 exposure;
  201. s16 bal;
  202. exposure = core->exposure;
  203. green_gain = calc_mt9v011_gain(core->global_gain);
  204. bal = core->global_gain;
  205. bal += (core->blue_bal * core->global_gain / (1 << 7));
  206. blue_gain = calc_mt9v011_gain(bal);
  207. bal = core->global_gain;
  208. bal += (core->red_bal * core->global_gain / (1 << 7));
  209. red_gain = calc_mt9v011_gain(bal);
  210. mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green_gain);
  211. mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green_gain);
  212. mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
  213. mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
  214. mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure);
  215. }
  216. static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
  217. {
  218. struct mt9v011 *core = to_mt9v011(sd);
  219. unsigned height, width, hblank, vblank, speed;
  220. unsigned row_time, t_time;
  221. u64 frames_per_ms;
  222. unsigned tmp;
  223. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  224. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  225. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  226. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  227. speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
  228. row_time = (width + 113 + hblank) * (speed + 2);
  229. t_time = row_time * (height + vblank + 1);
  230. frames_per_ms = core->xtal * 1000l;
  231. do_div(frames_per_ms, t_time);
  232. tmp = frames_per_ms;
  233. v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
  234. tmp / 1000, tmp % 1000, t_time);
  235. if (numerator && denominator) {
  236. *numerator = 1000;
  237. *denominator = (u32)frames_per_ms;
  238. }
  239. }
  240. static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
  241. {
  242. struct mt9v011 *core = to_mt9v011(sd);
  243. unsigned height, width, hblank, vblank;
  244. unsigned row_time, line_time;
  245. u64 t_time, speed;
  246. /* Avoid bogus calculus */
  247. if (!numerator || !denominator)
  248. return 0;
  249. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  250. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  251. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  252. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  253. row_time = width + 113 + hblank;
  254. line_time = height + vblank + 1;
  255. t_time = core->xtal * ((u64)numerator);
  256. /* round to the closest value */
  257. t_time += denominator / 2;
  258. do_div(t_time, denominator);
  259. speed = t_time;
  260. do_div(speed, row_time * line_time);
  261. /* Avoid having a negative value for speed */
  262. if (speed < 2)
  263. speed = 0;
  264. else
  265. speed -= 2;
  266. /* Avoid speed overflow */
  267. if (speed > 15)
  268. return 15;
  269. return (u16)speed;
  270. }
  271. static void set_res(struct v4l2_subdev *sd)
  272. {
  273. struct mt9v011 *core = to_mt9v011(sd);
  274. unsigned vstart, hstart;
  275. /*
  276. * The mt9v011 doesn't have scaling. So, in order to select the desired
  277. * resolution, we're cropping at the middle of the sensor.
  278. * hblank and vblank should be adjusted, in order to warrant that
  279. * we'll preserve the line timings for 30 fps, no matter what resolution
  280. * is selected.
  281. * NOTE: datasheet says that width (and height) should be filled with
  282. * width-1. However, this doesn't work, since one pixel per line will
  283. * be missing.
  284. */
  285. hstart = 20 + (640 - core->width) / 2;
  286. mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
  287. mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
  288. mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
  289. vstart = 8 + (480 - core->height) / 2;
  290. mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
  291. mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
  292. mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
  293. calc_fps(sd, NULL, NULL);
  294. };
  295. static void set_read_mode(struct v4l2_subdev *sd)
  296. {
  297. struct mt9v011 *core = to_mt9v011(sd);
  298. unsigned mode = 0x1000;
  299. if (core->hflip)
  300. mode |= 0x4000;
  301. if (core->vflip)
  302. mode |= 0x8000;
  303. mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
  304. }
  305. static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
  306. {
  307. int i;
  308. for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
  309. mt9v011_write(sd, mt9v011_init_default[i].reg,
  310. mt9v011_init_default[i].value);
  311. set_balance(sd);
  312. set_res(sd);
  313. set_read_mode(sd);
  314. return 0;
  315. };
  316. static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  317. {
  318. struct mt9v011 *core = to_mt9v011(sd);
  319. v4l2_dbg(1, debug, sd, "g_ctrl called\n");
  320. switch (ctrl->id) {
  321. case V4L2_CID_GAIN:
  322. ctrl->value = core->global_gain;
  323. return 0;
  324. case V4L2_CID_EXPOSURE:
  325. ctrl->value = core->exposure;
  326. return 0;
  327. case V4L2_CID_RED_BALANCE:
  328. ctrl->value = core->red_bal;
  329. return 0;
  330. case V4L2_CID_BLUE_BALANCE:
  331. ctrl->value = core->blue_bal;
  332. return 0;
  333. case V4L2_CID_HFLIP:
  334. ctrl->value = core->hflip ? 1 : 0;
  335. return 0;
  336. case V4L2_CID_VFLIP:
  337. ctrl->value = core->vflip ? 1 : 0;
  338. return 0;
  339. }
  340. return -EINVAL;
  341. }
  342. static int mt9v011_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
  343. {
  344. int i;
  345. v4l2_dbg(1, debug, sd, "queryctrl called\n");
  346. for (i = 0; i < ARRAY_SIZE(mt9v011_qctrl); i++)
  347. if (qc->id && qc->id == mt9v011_qctrl[i].id) {
  348. memcpy(qc, &(mt9v011_qctrl[i]),
  349. sizeof(*qc));
  350. return 0;
  351. }
  352. return -EINVAL;
  353. }
  354. static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  355. {
  356. struct mt9v011 *core = to_mt9v011(sd);
  357. u8 i, n;
  358. n = ARRAY_SIZE(mt9v011_qctrl);
  359. for (i = 0; i < n; i++) {
  360. if (ctrl->id != mt9v011_qctrl[i].id)
  361. continue;
  362. if (ctrl->value < mt9v011_qctrl[i].minimum ||
  363. ctrl->value > mt9v011_qctrl[i].maximum)
  364. return -ERANGE;
  365. v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
  366. ctrl->id, ctrl->value);
  367. break;
  368. }
  369. switch (ctrl->id) {
  370. case V4L2_CID_GAIN:
  371. core->global_gain = ctrl->value;
  372. break;
  373. case V4L2_CID_EXPOSURE:
  374. core->exposure = ctrl->value;
  375. break;
  376. case V4L2_CID_RED_BALANCE:
  377. core->red_bal = ctrl->value;
  378. break;
  379. case V4L2_CID_BLUE_BALANCE:
  380. core->blue_bal = ctrl->value;
  381. break;
  382. case V4L2_CID_HFLIP:
  383. core->hflip = ctrl->value;
  384. set_read_mode(sd);
  385. return 0;
  386. case V4L2_CID_VFLIP:
  387. core->vflip = ctrl->value;
  388. set_read_mode(sd);
  389. return 0;
  390. default:
  391. return -EINVAL;
  392. }
  393. set_balance(sd);
  394. return 0;
  395. }
  396. static int mt9v011_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
  397. enum v4l2_mbus_pixelcode *code)
  398. {
  399. if (index > 0)
  400. return -EINVAL;
  401. *code = V4L2_MBUS_FMT_SGRBG8_1X8;
  402. return 0;
  403. }
  404. static int mt9v011_try_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  405. {
  406. if (fmt->code != V4L2_MBUS_FMT_SGRBG8_1X8)
  407. return -EINVAL;
  408. v4l_bound_align_image(&fmt->width, 48, 639, 1,
  409. &fmt->height, 32, 480, 1, 0);
  410. fmt->field = V4L2_FIELD_NONE;
  411. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  412. return 0;
  413. }
  414. static int mt9v011_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  415. {
  416. struct v4l2_captureparm *cp = &parms->parm.capture;
  417. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  418. return -EINVAL;
  419. memset(cp, 0, sizeof(struct v4l2_captureparm));
  420. cp->capability = V4L2_CAP_TIMEPERFRAME;
  421. calc_fps(sd,
  422. &cp->timeperframe.numerator,
  423. &cp->timeperframe.denominator);
  424. return 0;
  425. }
  426. static int mt9v011_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  427. {
  428. struct v4l2_captureparm *cp = &parms->parm.capture;
  429. struct v4l2_fract *tpf = &cp->timeperframe;
  430. u16 speed;
  431. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  432. return -EINVAL;
  433. if (cp->extendedmode != 0)
  434. return -EINVAL;
  435. speed = calc_speed(sd, tpf->numerator, tpf->denominator);
  436. mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
  437. v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
  438. /* Recalculate and update fps info */
  439. calc_fps(sd, &tpf->numerator, &tpf->denominator);
  440. return 0;
  441. }
  442. static int mt9v011_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  443. {
  444. struct mt9v011 *core = to_mt9v011(sd);
  445. int rc;
  446. rc = mt9v011_try_mbus_fmt(sd, fmt);
  447. if (rc < 0)
  448. return -EINVAL;
  449. core->width = fmt->width;
  450. core->height = fmt->height;
  451. set_res(sd);
  452. return 0;
  453. }
  454. #ifdef CONFIG_VIDEO_ADV_DEBUG
  455. static int mt9v011_g_register(struct v4l2_subdev *sd,
  456. struct v4l2_dbg_register *reg)
  457. {
  458. struct i2c_client *client = v4l2_get_subdevdata(sd);
  459. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  460. return -EINVAL;
  461. if (!capable(CAP_SYS_ADMIN))
  462. return -EPERM;
  463. reg->val = mt9v011_read(sd, reg->reg & 0xff);
  464. reg->size = 2;
  465. return 0;
  466. }
  467. static int mt9v011_s_register(struct v4l2_subdev *sd,
  468. struct v4l2_dbg_register *reg)
  469. {
  470. struct i2c_client *client = v4l2_get_subdevdata(sd);
  471. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  472. return -EINVAL;
  473. if (!capable(CAP_SYS_ADMIN))
  474. return -EPERM;
  475. mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
  476. return 0;
  477. }
  478. #endif
  479. static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
  480. struct v4l2_dbg_chip_ident *chip)
  481. {
  482. u16 version;
  483. struct i2c_client *client = v4l2_get_subdevdata(sd);
  484. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  485. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
  486. version);
  487. }
  488. static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
  489. .queryctrl = mt9v011_queryctrl,
  490. .g_ctrl = mt9v011_g_ctrl,
  491. .s_ctrl = mt9v011_s_ctrl,
  492. .reset = mt9v011_reset,
  493. .g_chip_ident = mt9v011_g_chip_ident,
  494. #ifdef CONFIG_VIDEO_ADV_DEBUG
  495. .g_register = mt9v011_g_register,
  496. .s_register = mt9v011_s_register,
  497. #endif
  498. };
  499. static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
  500. .enum_mbus_fmt = mt9v011_enum_mbus_fmt,
  501. .try_mbus_fmt = mt9v011_try_mbus_fmt,
  502. .s_mbus_fmt = mt9v011_s_mbus_fmt,
  503. .g_parm = mt9v011_g_parm,
  504. .s_parm = mt9v011_s_parm,
  505. };
  506. static const struct v4l2_subdev_ops mt9v011_ops = {
  507. .core = &mt9v011_core_ops,
  508. .video = &mt9v011_video_ops,
  509. };
  510. /****************************************************************************
  511. I2C Client & Driver
  512. ****************************************************************************/
  513. static int mt9v011_probe(struct i2c_client *c,
  514. const struct i2c_device_id *id)
  515. {
  516. u16 version;
  517. struct mt9v011 *core;
  518. struct v4l2_subdev *sd;
  519. /* Check if the adapter supports the needed features */
  520. if (!i2c_check_functionality(c->adapter,
  521. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  522. return -EIO;
  523. core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
  524. if (!core)
  525. return -ENOMEM;
  526. sd = &core->sd;
  527. v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
  528. /* Check if the sensor is really a MT9V011 */
  529. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  530. if ((version != MT9V011_VERSION) &&
  531. (version != MT9V011_REV_B_VERSION)) {
  532. v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
  533. version);
  534. kfree(core);
  535. return -EINVAL;
  536. }
  537. core->global_gain = 0x0024;
  538. core->exposure = 0x01fc;
  539. core->width = 640;
  540. core->height = 480;
  541. core->xtal = 27000000; /* Hz */
  542. if (c->dev.platform_data) {
  543. struct mt9v011_platform_data *pdata = c->dev.platform_data;
  544. core->xtal = pdata->xtal;
  545. v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
  546. core->xtal / 1000000, (core->xtal / 1000) % 1000);
  547. }
  548. v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
  549. c->addr << 1, c->adapter->name, version);
  550. return 0;
  551. }
  552. static int mt9v011_remove(struct i2c_client *c)
  553. {
  554. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  555. v4l2_dbg(1, debug, sd,
  556. "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
  557. c->addr << 1);
  558. v4l2_device_unregister_subdev(sd);
  559. kfree(to_mt9v011(sd));
  560. return 0;
  561. }
  562. /* ----------------------------------------------------------------------- */
  563. static const struct i2c_device_id mt9v011_id[] = {
  564. { "mt9v011", 0 },
  565. { }
  566. };
  567. MODULE_DEVICE_TABLE(i2c, mt9v011_id);
  568. static struct i2c_driver mt9v011_driver = {
  569. .driver = {
  570. .owner = THIS_MODULE,
  571. .name = "mt9v011",
  572. },
  573. .probe = mt9v011_probe,
  574. .remove = mt9v011_remove,
  575. .id_table = mt9v011_id,
  576. };
  577. static __init int init_mt9v011(void)
  578. {
  579. return i2c_add_driver(&mt9v011_driver);
  580. }
  581. static __exit void exit_mt9v011(void)
  582. {
  583. i2c_del_driver(&mt9v011_driver);
  584. }
  585. module_init(init_mt9v011);
  586. module_exit(exit_mt9v011);