dma-mapping.h 11 KB

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  1. /*
  2. * Copyright (C) 2004 IBM
  3. *
  4. * Implements the generic device dma API for powerpc.
  5. * the pci and vio busses
  6. */
  7. #ifndef _ASM_DMA_MAPPING_H
  8. #define _ASM_DMA_MAPPING_H
  9. #ifdef __KERNEL__
  10. #include <linux/types.h>
  11. #include <linux/cache.h>
  12. /* need struct page definitions */
  13. #include <linux/mm.h>
  14. #include <linux/scatterlist.h>
  15. #include <asm/io.h>
  16. #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
  17. #ifdef CONFIG_NOT_COHERENT_CACHE
  18. /*
  19. * DMA-consistent mapping functions for PowerPCs that don't support
  20. * cache snooping. These allocate/free a region of uncached mapped
  21. * memory space for use with DMA devices. Alternatively, you could
  22. * allocate the space "normally" and use the cache management functions
  23. * to ensure it is consistent.
  24. */
  25. extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
  26. extern void __dma_free_coherent(size_t size, void *vaddr);
  27. extern void __dma_sync(void *vaddr, size_t size, int direction);
  28. extern void __dma_sync_page(struct page *page, unsigned long offset,
  29. size_t size, int direction);
  30. #else /* ! CONFIG_NOT_COHERENT_CACHE */
  31. /*
  32. * Cache coherent cores.
  33. */
  34. #define __dma_alloc_coherent(gfp, size, handle) NULL
  35. #define __dma_free_coherent(size, addr) ((void)0)
  36. #define __dma_sync(addr, size, rw) ((void)0)
  37. #define __dma_sync_page(pg, off, sz, rw) ((void)0)
  38. #endif /* ! CONFIG_NOT_COHERENT_CACHE */
  39. #ifdef CONFIG_PPC64
  40. /*
  41. * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
  42. */
  43. struct dma_mapping_ops {
  44. void * (*alloc_coherent)(struct device *dev, size_t size,
  45. dma_addr_t *dma_handle, gfp_t flag);
  46. void (*free_coherent)(struct device *dev, size_t size,
  47. void *vaddr, dma_addr_t dma_handle);
  48. dma_addr_t (*map_single)(struct device *dev, void *ptr,
  49. size_t size, enum dma_data_direction direction);
  50. void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
  51. size_t size, enum dma_data_direction direction);
  52. int (*map_sg)(struct device *dev, struct scatterlist *sg,
  53. int nents, enum dma_data_direction direction);
  54. void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
  55. int nents, enum dma_data_direction direction);
  56. int (*dma_supported)(struct device *dev, u64 mask);
  57. int (*set_dma_mask)(struct device *dev, u64 dma_mask);
  58. };
  59. static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
  60. {
  61. /* We don't handle the NULL dev case for ISA for now. We could
  62. * do it via an out of line call but it is not needed for now. The
  63. * only ISA DMA device we support is the floppy and we have a hack
  64. * in the floppy driver directly to get a device for us.
  65. */
  66. if (unlikely(dev == NULL || dev->archdata.dma_ops == NULL))
  67. return NULL;
  68. return dev->archdata.dma_ops;
  69. }
  70. static inline int dma_supported(struct device *dev, u64 mask)
  71. {
  72. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  73. if (unlikely(dma_ops == NULL))
  74. return 0;
  75. if (dma_ops->dma_supported == NULL)
  76. return 1;
  77. return dma_ops->dma_supported(dev, mask);
  78. }
  79. /* We have our own implementation of pci_set_dma_mask() */
  80. #define HAVE_ARCH_PCI_SET_DMA_MASK
  81. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  82. {
  83. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  84. if (unlikely(dma_ops == NULL))
  85. return -EIO;
  86. if (dma_ops->set_dma_mask != NULL)
  87. return dma_ops->set_dma_mask(dev, dma_mask);
  88. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  89. return -EIO;
  90. *dev->dma_mask = dma_mask;
  91. return 0;
  92. }
  93. static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  94. dma_addr_t *dma_handle, gfp_t flag)
  95. {
  96. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  97. BUG_ON(!dma_ops);
  98. return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
  99. }
  100. static inline void dma_free_coherent(struct device *dev, size_t size,
  101. void *cpu_addr, dma_addr_t dma_handle)
  102. {
  103. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  104. BUG_ON(!dma_ops);
  105. dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
  106. }
  107. static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
  108. size_t size,
  109. enum dma_data_direction direction)
  110. {
  111. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  112. BUG_ON(!dma_ops);
  113. return dma_ops->map_single(dev, cpu_addr, size, direction);
  114. }
  115. static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
  116. size_t size,
  117. enum dma_data_direction direction)
  118. {
  119. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  120. BUG_ON(!dma_ops);
  121. dma_ops->unmap_single(dev, dma_addr, size, direction);
  122. }
  123. static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
  124. unsigned long offset, size_t size,
  125. enum dma_data_direction direction)
  126. {
  127. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  128. BUG_ON(!dma_ops);
  129. return dma_ops->map_single(dev, page_address(page) + offset, size,
  130. direction);
  131. }
  132. static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
  133. size_t size,
  134. enum dma_data_direction direction)
  135. {
  136. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  137. BUG_ON(!dma_ops);
  138. dma_ops->unmap_single(dev, dma_address, size, direction);
  139. }
  140. static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
  141. int nents, enum dma_data_direction direction)
  142. {
  143. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  144. BUG_ON(!dma_ops);
  145. return dma_ops->map_sg(dev, sg, nents, direction);
  146. }
  147. static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  148. int nhwentries,
  149. enum dma_data_direction direction)
  150. {
  151. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  152. BUG_ON(!dma_ops);
  153. dma_ops->unmap_sg(dev, sg, nhwentries, direction);
  154. }
  155. /*
  156. * Available generic sets of operations
  157. */
  158. extern struct dma_mapping_ops dma_iommu_ops;
  159. extern struct dma_mapping_ops dma_direct_ops;
  160. #else /* CONFIG_PPC64 */
  161. #define dma_supported(dev, mask) (1)
  162. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  163. {
  164. if (!dev->dma_mask || !dma_supported(dev, mask))
  165. return -EIO;
  166. *dev->dma_mask = dma_mask;
  167. return 0;
  168. }
  169. static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  170. dma_addr_t * dma_handle,
  171. gfp_t gfp)
  172. {
  173. #ifdef CONFIG_NOT_COHERENT_CACHE
  174. return __dma_alloc_coherent(size, dma_handle, gfp);
  175. #else
  176. void *ret;
  177. /* ignore region specifiers */
  178. gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
  179. if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
  180. gfp |= GFP_DMA;
  181. ret = (void *)__get_free_pages(gfp, get_order(size));
  182. if (ret != NULL) {
  183. memset(ret, 0, size);
  184. *dma_handle = virt_to_bus(ret);
  185. }
  186. return ret;
  187. #endif
  188. }
  189. static inline void
  190. dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  191. dma_addr_t dma_handle)
  192. {
  193. #ifdef CONFIG_NOT_COHERENT_CACHE
  194. __dma_free_coherent(size, vaddr);
  195. #else
  196. free_pages((unsigned long)vaddr, get_order(size));
  197. #endif
  198. }
  199. static inline dma_addr_t
  200. dma_map_single(struct device *dev, void *ptr, size_t size,
  201. enum dma_data_direction direction)
  202. {
  203. BUG_ON(direction == DMA_NONE);
  204. __dma_sync(ptr, size, direction);
  205. return virt_to_bus(ptr);
  206. }
  207. static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
  208. size_t size,
  209. enum dma_data_direction direction)
  210. {
  211. /* We do nothing. */
  212. }
  213. static inline dma_addr_t
  214. dma_map_page(struct device *dev, struct page *page,
  215. unsigned long offset, size_t size,
  216. enum dma_data_direction direction)
  217. {
  218. BUG_ON(direction == DMA_NONE);
  219. __dma_sync_page(page, offset, size, direction);
  220. return page_to_bus(page) + offset;
  221. }
  222. static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
  223. size_t size,
  224. enum dma_data_direction direction)
  225. {
  226. /* We do nothing. */
  227. }
  228. static inline int
  229. dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
  230. enum dma_data_direction direction)
  231. {
  232. struct scatterlist *sg;
  233. int i;
  234. BUG_ON(direction == DMA_NONE);
  235. for_each_sg(sgl, sg, nents, i) {
  236. BUG_ON(!sg_page(sg));
  237. __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
  238. sg->dma_address = page_to_bus(sg_page(sg)) + sg->offset;
  239. }
  240. return nents;
  241. }
  242. static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  243. int nhwentries,
  244. enum dma_data_direction direction)
  245. {
  246. /* We don't do anything here. */
  247. }
  248. #endif /* CONFIG_PPC64 */
  249. static inline void dma_sync_single_for_cpu(struct device *dev,
  250. dma_addr_t dma_handle, size_t size,
  251. enum dma_data_direction direction)
  252. {
  253. BUG_ON(direction == DMA_NONE);
  254. __dma_sync(bus_to_virt(dma_handle), size, direction);
  255. }
  256. static inline void dma_sync_single_for_device(struct device *dev,
  257. dma_addr_t dma_handle, size_t size,
  258. enum dma_data_direction direction)
  259. {
  260. BUG_ON(direction == DMA_NONE);
  261. __dma_sync(bus_to_virt(dma_handle), size, direction);
  262. }
  263. static inline void dma_sync_sg_for_cpu(struct device *dev,
  264. struct scatterlist *sgl, int nents,
  265. enum dma_data_direction direction)
  266. {
  267. struct scatterlist *sg;
  268. int i;
  269. BUG_ON(direction == DMA_NONE);
  270. for_each_sg(sgl, sg, nents, i)
  271. __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
  272. }
  273. static inline void dma_sync_sg_for_device(struct device *dev,
  274. struct scatterlist *sgl, int nents,
  275. enum dma_data_direction direction)
  276. {
  277. struct scatterlist *sg;
  278. int i;
  279. BUG_ON(direction == DMA_NONE);
  280. for_each_sg(sgl, sg, nents, i)
  281. __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction);
  282. }
  283. static inline int dma_mapping_error(dma_addr_t dma_addr)
  284. {
  285. #ifdef CONFIG_PPC64
  286. return (dma_addr == DMA_ERROR_CODE);
  287. #else
  288. return 0;
  289. #endif
  290. }
  291. #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
  292. #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
  293. #ifdef CONFIG_NOT_COHERENT_CACHE
  294. #define dma_is_consistent(d, h) (0)
  295. #else
  296. #define dma_is_consistent(d, h) (1)
  297. #endif
  298. static inline int dma_get_cache_alignment(void)
  299. {
  300. #ifdef CONFIG_PPC64
  301. /* no easy way to get cache size on all processors, so return
  302. * the maximum possible, to be safe */
  303. return (1 << INTERNODE_CACHE_SHIFT);
  304. #else
  305. /*
  306. * Each processor family will define its own L1_CACHE_SHIFT,
  307. * L1_CACHE_BYTES wraps to this, so this is always safe.
  308. */
  309. return L1_CACHE_BYTES;
  310. #endif
  311. }
  312. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  313. dma_addr_t dma_handle, unsigned long offset, size_t size,
  314. enum dma_data_direction direction)
  315. {
  316. /* just sync everything for now */
  317. dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
  318. }
  319. static inline void dma_sync_single_range_for_device(struct device *dev,
  320. dma_addr_t dma_handle, unsigned long offset, size_t size,
  321. enum dma_data_direction direction)
  322. {
  323. /* just sync everything for now */
  324. dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
  325. }
  326. static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  327. enum dma_data_direction direction)
  328. {
  329. BUG_ON(direction == DMA_NONE);
  330. __dma_sync(vaddr, size, (int)direction);
  331. }
  332. #endif /* __KERNEL__ */
  333. #endif /* _ASM_DMA_MAPPING_H */