libata-core.c 128 KB

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  1. /*
  2. * libata-core.c - helper library for ATA
  3. *
  4. * Maintained by: Jeff Garzik <jgarzik@pobox.com>
  5. * Please ALWAYS copy linux-ide@vger.kernel.org
  6. * on emails.
  7. *
  8. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  9. * Copyright 2003-2004 Jeff Garzik
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; see the file COPYING. If not, write to
  24. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. *
  27. * libata documentation is available via 'make {ps|pdf}docs',
  28. * as Documentation/DocBook/libata.*
  29. *
  30. * Hardware documentation available from http://www.t13.org/ and
  31. * http://www.sata-io.org/
  32. *
  33. */
  34. #include <linux/config.h>
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/pci.h>
  38. #include <linux/init.h>
  39. #include <linux/list.h>
  40. #include <linux/mm.h>
  41. #include <linux/highmem.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/blkdev.h>
  44. #include <linux/delay.h>
  45. #include <linux/timer.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/completion.h>
  48. #include <linux/suspend.h>
  49. #include <linux/workqueue.h>
  50. #include <linux/jiffies.h>
  51. #include <linux/scatterlist.h>
  52. #include <scsi/scsi.h>
  53. #include "scsi_priv.h"
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsi_host.h>
  56. #include <linux/libata.h>
  57. #include <asm/io.h>
  58. #include <asm/semaphore.h>
  59. #include <asm/byteorder.h>
  60. #include "libata.h"
  61. static unsigned int ata_dev_init_params(struct ata_port *ap,
  62. struct ata_device *dev,
  63. u16 heads,
  64. u16 sectors);
  65. static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
  66. struct ata_device *dev);
  67. static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
  68. static unsigned int ata_unique_id = 1;
  69. static struct workqueue_struct *ata_wq;
  70. int atapi_enabled = 1;
  71. module_param(atapi_enabled, int, 0444);
  72. MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
  73. int libata_fua = 0;
  74. module_param_named(fua, libata_fua, int, 0444);
  75. MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
  76. MODULE_AUTHOR("Jeff Garzik");
  77. MODULE_DESCRIPTION("Library module for ATA devices");
  78. MODULE_LICENSE("GPL");
  79. MODULE_VERSION(DRV_VERSION);
  80. /**
  81. * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
  82. * @tf: Taskfile to convert
  83. * @fis: Buffer into which data will output
  84. * @pmp: Port multiplier port
  85. *
  86. * Converts a standard ATA taskfile to a Serial ATA
  87. * FIS structure (Register - Host to Device).
  88. *
  89. * LOCKING:
  90. * Inherited from caller.
  91. */
  92. void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
  93. {
  94. fis[0] = 0x27; /* Register - Host to Device FIS */
  95. fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
  96. bit 7 indicates Command FIS */
  97. fis[2] = tf->command;
  98. fis[3] = tf->feature;
  99. fis[4] = tf->lbal;
  100. fis[5] = tf->lbam;
  101. fis[6] = tf->lbah;
  102. fis[7] = tf->device;
  103. fis[8] = tf->hob_lbal;
  104. fis[9] = tf->hob_lbam;
  105. fis[10] = tf->hob_lbah;
  106. fis[11] = tf->hob_feature;
  107. fis[12] = tf->nsect;
  108. fis[13] = tf->hob_nsect;
  109. fis[14] = 0;
  110. fis[15] = tf->ctl;
  111. fis[16] = 0;
  112. fis[17] = 0;
  113. fis[18] = 0;
  114. fis[19] = 0;
  115. }
  116. /**
  117. * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
  118. * @fis: Buffer from which data will be input
  119. * @tf: Taskfile to output
  120. *
  121. * Converts a serial ATA FIS structure to a standard ATA taskfile.
  122. *
  123. * LOCKING:
  124. * Inherited from caller.
  125. */
  126. void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
  127. {
  128. tf->command = fis[2]; /* status */
  129. tf->feature = fis[3]; /* error */
  130. tf->lbal = fis[4];
  131. tf->lbam = fis[5];
  132. tf->lbah = fis[6];
  133. tf->device = fis[7];
  134. tf->hob_lbal = fis[8];
  135. tf->hob_lbam = fis[9];
  136. tf->hob_lbah = fis[10];
  137. tf->nsect = fis[12];
  138. tf->hob_nsect = fis[13];
  139. }
  140. static const u8 ata_rw_cmds[] = {
  141. /* pio multi */
  142. ATA_CMD_READ_MULTI,
  143. ATA_CMD_WRITE_MULTI,
  144. ATA_CMD_READ_MULTI_EXT,
  145. ATA_CMD_WRITE_MULTI_EXT,
  146. 0,
  147. 0,
  148. 0,
  149. ATA_CMD_WRITE_MULTI_FUA_EXT,
  150. /* pio */
  151. ATA_CMD_PIO_READ,
  152. ATA_CMD_PIO_WRITE,
  153. ATA_CMD_PIO_READ_EXT,
  154. ATA_CMD_PIO_WRITE_EXT,
  155. 0,
  156. 0,
  157. 0,
  158. 0,
  159. /* dma */
  160. ATA_CMD_READ,
  161. ATA_CMD_WRITE,
  162. ATA_CMD_READ_EXT,
  163. ATA_CMD_WRITE_EXT,
  164. 0,
  165. 0,
  166. 0,
  167. ATA_CMD_WRITE_FUA_EXT
  168. };
  169. /**
  170. * ata_rwcmd_protocol - set taskfile r/w commands and protocol
  171. * @qc: command to examine and configure
  172. *
  173. * Examine the device configuration and tf->flags to calculate
  174. * the proper read/write commands and protocol to use.
  175. *
  176. * LOCKING:
  177. * caller.
  178. */
  179. int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
  180. {
  181. struct ata_taskfile *tf = &qc->tf;
  182. struct ata_device *dev = qc->dev;
  183. u8 cmd;
  184. int index, fua, lba48, write;
  185. fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
  186. lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
  187. write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
  188. if (dev->flags & ATA_DFLAG_PIO) {
  189. tf->protocol = ATA_PROT_PIO;
  190. index = dev->multi_count ? 0 : 8;
  191. } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
  192. /* Unable to use DMA due to host limitation */
  193. tf->protocol = ATA_PROT_PIO;
  194. index = dev->multi_count ? 0 : 8;
  195. } else {
  196. tf->protocol = ATA_PROT_DMA;
  197. index = 16;
  198. }
  199. cmd = ata_rw_cmds[index + fua + lba48 + write];
  200. if (cmd) {
  201. tf->command = cmd;
  202. return 0;
  203. }
  204. return -1;
  205. }
  206. /**
  207. * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
  208. * @pio_mask: pio_mask
  209. * @mwdma_mask: mwdma_mask
  210. * @udma_mask: udma_mask
  211. *
  212. * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
  213. * unsigned int xfer_mask.
  214. *
  215. * LOCKING:
  216. * None.
  217. *
  218. * RETURNS:
  219. * Packed xfer_mask.
  220. */
  221. static unsigned int ata_pack_xfermask(unsigned int pio_mask,
  222. unsigned int mwdma_mask,
  223. unsigned int udma_mask)
  224. {
  225. return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
  226. ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
  227. ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
  228. }
  229. /**
  230. * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
  231. * @xfer_mask: xfer_mask to unpack
  232. * @pio_mask: resulting pio_mask
  233. * @mwdma_mask: resulting mwdma_mask
  234. * @udma_mask: resulting udma_mask
  235. *
  236. * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
  237. * Any NULL distination masks will be ignored.
  238. */
  239. static void ata_unpack_xfermask(unsigned int xfer_mask,
  240. unsigned int *pio_mask,
  241. unsigned int *mwdma_mask,
  242. unsigned int *udma_mask)
  243. {
  244. if (pio_mask)
  245. *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
  246. if (mwdma_mask)
  247. *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
  248. if (udma_mask)
  249. *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
  250. }
  251. static const struct ata_xfer_ent {
  252. int shift, bits;
  253. u8 base;
  254. } ata_xfer_tbl[] = {
  255. { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
  256. { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
  257. { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
  258. { -1, },
  259. };
  260. /**
  261. * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
  262. * @xfer_mask: xfer_mask of interest
  263. *
  264. * Return matching XFER_* value for @xfer_mask. Only the highest
  265. * bit of @xfer_mask is considered.
  266. *
  267. * LOCKING:
  268. * None.
  269. *
  270. * RETURNS:
  271. * Matching XFER_* value, 0 if no match found.
  272. */
  273. static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
  274. {
  275. int highbit = fls(xfer_mask) - 1;
  276. const struct ata_xfer_ent *ent;
  277. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  278. if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
  279. return ent->base + highbit - ent->shift;
  280. return 0;
  281. }
  282. /**
  283. * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
  284. * @xfer_mode: XFER_* of interest
  285. *
  286. * Return matching xfer_mask for @xfer_mode.
  287. *
  288. * LOCKING:
  289. * None.
  290. *
  291. * RETURNS:
  292. * Matching xfer_mask, 0 if no match found.
  293. */
  294. static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
  295. {
  296. const struct ata_xfer_ent *ent;
  297. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  298. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  299. return 1 << (ent->shift + xfer_mode - ent->base);
  300. return 0;
  301. }
  302. /**
  303. * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
  304. * @xfer_mode: XFER_* of interest
  305. *
  306. * Return matching xfer_shift for @xfer_mode.
  307. *
  308. * LOCKING:
  309. * None.
  310. *
  311. * RETURNS:
  312. * Matching xfer_shift, -1 if no match found.
  313. */
  314. static int ata_xfer_mode2shift(unsigned int xfer_mode)
  315. {
  316. const struct ata_xfer_ent *ent;
  317. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  318. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  319. return ent->shift;
  320. return -1;
  321. }
  322. /**
  323. * ata_mode_string - convert xfer_mask to string
  324. * @xfer_mask: mask of bits supported; only highest bit counts.
  325. *
  326. * Determine string which represents the highest speed
  327. * (highest bit in @modemask).
  328. *
  329. * LOCKING:
  330. * None.
  331. *
  332. * RETURNS:
  333. * Constant C string representing highest speed listed in
  334. * @mode_mask, or the constant C string "<n/a>".
  335. */
  336. static const char *ata_mode_string(unsigned int xfer_mask)
  337. {
  338. static const char * const xfer_mode_str[] = {
  339. "PIO0",
  340. "PIO1",
  341. "PIO2",
  342. "PIO3",
  343. "PIO4",
  344. "MWDMA0",
  345. "MWDMA1",
  346. "MWDMA2",
  347. "UDMA/16",
  348. "UDMA/25",
  349. "UDMA/33",
  350. "UDMA/44",
  351. "UDMA/66",
  352. "UDMA/100",
  353. "UDMA/133",
  354. "UDMA7",
  355. };
  356. int highbit;
  357. highbit = fls(xfer_mask) - 1;
  358. if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
  359. return xfer_mode_str[highbit];
  360. return "<n/a>";
  361. }
  362. static const char *sata_spd_string(unsigned int spd)
  363. {
  364. static const char * const spd_str[] = {
  365. "1.5 Gbps",
  366. "3.0 Gbps",
  367. };
  368. if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
  369. return "<unknown>";
  370. return spd_str[spd - 1];
  371. }
  372. void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
  373. {
  374. if (ata_dev_enabled(dev)) {
  375. printk(KERN_WARNING "ata%u: dev %u disabled\n",
  376. ap->id, dev->devno);
  377. dev->class++;
  378. }
  379. }
  380. /**
  381. * ata_pio_devchk - PATA device presence detection
  382. * @ap: ATA channel to examine
  383. * @device: Device to examine (starting at zero)
  384. *
  385. * This technique was originally described in
  386. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  387. * later found its way into the ATA/ATAPI spec.
  388. *
  389. * Write a pattern to the ATA shadow registers,
  390. * and if a device is present, it will respond by
  391. * correctly storing and echoing back the
  392. * ATA shadow register contents.
  393. *
  394. * LOCKING:
  395. * caller.
  396. */
  397. static unsigned int ata_pio_devchk(struct ata_port *ap,
  398. unsigned int device)
  399. {
  400. struct ata_ioports *ioaddr = &ap->ioaddr;
  401. u8 nsect, lbal;
  402. ap->ops->dev_select(ap, device);
  403. outb(0x55, ioaddr->nsect_addr);
  404. outb(0xaa, ioaddr->lbal_addr);
  405. outb(0xaa, ioaddr->nsect_addr);
  406. outb(0x55, ioaddr->lbal_addr);
  407. outb(0x55, ioaddr->nsect_addr);
  408. outb(0xaa, ioaddr->lbal_addr);
  409. nsect = inb(ioaddr->nsect_addr);
  410. lbal = inb(ioaddr->lbal_addr);
  411. if ((nsect == 0x55) && (lbal == 0xaa))
  412. return 1; /* we found a device */
  413. return 0; /* nothing found */
  414. }
  415. /**
  416. * ata_mmio_devchk - PATA device presence detection
  417. * @ap: ATA channel to examine
  418. * @device: Device to examine (starting at zero)
  419. *
  420. * This technique was originally described in
  421. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  422. * later found its way into the ATA/ATAPI spec.
  423. *
  424. * Write a pattern to the ATA shadow registers,
  425. * and if a device is present, it will respond by
  426. * correctly storing and echoing back the
  427. * ATA shadow register contents.
  428. *
  429. * LOCKING:
  430. * caller.
  431. */
  432. static unsigned int ata_mmio_devchk(struct ata_port *ap,
  433. unsigned int device)
  434. {
  435. struct ata_ioports *ioaddr = &ap->ioaddr;
  436. u8 nsect, lbal;
  437. ap->ops->dev_select(ap, device);
  438. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  439. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  440. writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
  441. writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
  442. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  443. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  444. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  445. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  446. if ((nsect == 0x55) && (lbal == 0xaa))
  447. return 1; /* we found a device */
  448. return 0; /* nothing found */
  449. }
  450. /**
  451. * ata_devchk - PATA device presence detection
  452. * @ap: ATA channel to examine
  453. * @device: Device to examine (starting at zero)
  454. *
  455. * Dispatch ATA device presence detection, depending
  456. * on whether we are using PIO or MMIO to talk to the
  457. * ATA shadow registers.
  458. *
  459. * LOCKING:
  460. * caller.
  461. */
  462. static unsigned int ata_devchk(struct ata_port *ap,
  463. unsigned int device)
  464. {
  465. if (ap->flags & ATA_FLAG_MMIO)
  466. return ata_mmio_devchk(ap, device);
  467. return ata_pio_devchk(ap, device);
  468. }
  469. /**
  470. * ata_dev_classify - determine device type based on ATA-spec signature
  471. * @tf: ATA taskfile register set for device to be identified
  472. *
  473. * Determine from taskfile register contents whether a device is
  474. * ATA or ATAPI, as per "Signature and persistence" section
  475. * of ATA/PI spec (volume 1, sect 5.14).
  476. *
  477. * LOCKING:
  478. * None.
  479. *
  480. * RETURNS:
  481. * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
  482. * the event of failure.
  483. */
  484. unsigned int ata_dev_classify(const struct ata_taskfile *tf)
  485. {
  486. /* Apple's open source Darwin code hints that some devices only
  487. * put a proper signature into the LBA mid/high registers,
  488. * So, we only check those. It's sufficient for uniqueness.
  489. */
  490. if (((tf->lbam == 0) && (tf->lbah == 0)) ||
  491. ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
  492. DPRINTK("found ATA device by sig\n");
  493. return ATA_DEV_ATA;
  494. }
  495. if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
  496. ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
  497. DPRINTK("found ATAPI device by sig\n");
  498. return ATA_DEV_ATAPI;
  499. }
  500. DPRINTK("unknown device\n");
  501. return ATA_DEV_UNKNOWN;
  502. }
  503. /**
  504. * ata_dev_try_classify - Parse returned ATA device signature
  505. * @ap: ATA channel to examine
  506. * @device: Device to examine (starting at zero)
  507. * @r_err: Value of error register on completion
  508. *
  509. * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
  510. * an ATA/ATAPI-defined set of values is placed in the ATA
  511. * shadow registers, indicating the results of device detection
  512. * and diagnostics.
  513. *
  514. * Select the ATA device, and read the values from the ATA shadow
  515. * registers. Then parse according to the Error register value,
  516. * and the spec-defined values examined by ata_dev_classify().
  517. *
  518. * LOCKING:
  519. * caller.
  520. *
  521. * RETURNS:
  522. * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
  523. */
  524. static unsigned int
  525. ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
  526. {
  527. struct ata_taskfile tf;
  528. unsigned int class;
  529. u8 err;
  530. ap->ops->dev_select(ap, device);
  531. memset(&tf, 0, sizeof(tf));
  532. ap->ops->tf_read(ap, &tf);
  533. err = tf.feature;
  534. if (r_err)
  535. *r_err = err;
  536. /* see if device passed diags */
  537. if (err == 1)
  538. /* do nothing */ ;
  539. else if ((device == 0) && (err == 0x81))
  540. /* do nothing */ ;
  541. else
  542. return ATA_DEV_NONE;
  543. /* determine if device is ATA or ATAPI */
  544. class = ata_dev_classify(&tf);
  545. if (class == ATA_DEV_UNKNOWN)
  546. return ATA_DEV_NONE;
  547. if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
  548. return ATA_DEV_NONE;
  549. return class;
  550. }
  551. /**
  552. * ata_id_string - Convert IDENTIFY DEVICE page into string
  553. * @id: IDENTIFY DEVICE results we will examine
  554. * @s: string into which data is output
  555. * @ofs: offset into identify device page
  556. * @len: length of string to return. must be an even number.
  557. *
  558. * The strings in the IDENTIFY DEVICE page are broken up into
  559. * 16-bit chunks. Run through the string, and output each
  560. * 8-bit chunk linearly, regardless of platform.
  561. *
  562. * LOCKING:
  563. * caller.
  564. */
  565. void ata_id_string(const u16 *id, unsigned char *s,
  566. unsigned int ofs, unsigned int len)
  567. {
  568. unsigned int c;
  569. while (len > 0) {
  570. c = id[ofs] >> 8;
  571. *s = c;
  572. s++;
  573. c = id[ofs] & 0xff;
  574. *s = c;
  575. s++;
  576. ofs++;
  577. len -= 2;
  578. }
  579. }
  580. /**
  581. * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
  582. * @id: IDENTIFY DEVICE results we will examine
  583. * @s: string into which data is output
  584. * @ofs: offset into identify device page
  585. * @len: length of string to return. must be an odd number.
  586. *
  587. * This function is identical to ata_id_string except that it
  588. * trims trailing spaces and terminates the resulting string with
  589. * null. @len must be actual maximum length (even number) + 1.
  590. *
  591. * LOCKING:
  592. * caller.
  593. */
  594. void ata_id_c_string(const u16 *id, unsigned char *s,
  595. unsigned int ofs, unsigned int len)
  596. {
  597. unsigned char *p;
  598. WARN_ON(!(len & 1));
  599. ata_id_string(id, s, ofs, len - 1);
  600. p = s + strnlen(s, len - 1);
  601. while (p > s && p[-1] == ' ')
  602. p--;
  603. *p = '\0';
  604. }
  605. static u64 ata_id_n_sectors(const u16 *id)
  606. {
  607. if (ata_id_has_lba(id)) {
  608. if (ata_id_has_lba48(id))
  609. return ata_id_u64(id, 100);
  610. else
  611. return ata_id_u32(id, 60);
  612. } else {
  613. if (ata_id_current_chs_valid(id))
  614. return ata_id_u32(id, 57);
  615. else
  616. return id[1] * id[3] * id[6];
  617. }
  618. }
  619. /**
  620. * ata_noop_dev_select - Select device 0/1 on ATA bus
  621. * @ap: ATA channel to manipulate
  622. * @device: ATA device (numbered from zero) to select
  623. *
  624. * This function performs no actual function.
  625. *
  626. * May be used as the dev_select() entry in ata_port_operations.
  627. *
  628. * LOCKING:
  629. * caller.
  630. */
  631. void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
  632. {
  633. }
  634. /**
  635. * ata_std_dev_select - Select device 0/1 on ATA bus
  636. * @ap: ATA channel to manipulate
  637. * @device: ATA device (numbered from zero) to select
  638. *
  639. * Use the method defined in the ATA specification to
  640. * make either device 0, or device 1, active on the
  641. * ATA channel. Works with both PIO and MMIO.
  642. *
  643. * May be used as the dev_select() entry in ata_port_operations.
  644. *
  645. * LOCKING:
  646. * caller.
  647. */
  648. void ata_std_dev_select (struct ata_port *ap, unsigned int device)
  649. {
  650. u8 tmp;
  651. if (device == 0)
  652. tmp = ATA_DEVICE_OBS;
  653. else
  654. tmp = ATA_DEVICE_OBS | ATA_DEV1;
  655. if (ap->flags & ATA_FLAG_MMIO) {
  656. writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
  657. } else {
  658. outb(tmp, ap->ioaddr.device_addr);
  659. }
  660. ata_pause(ap); /* needed; also flushes, for mmio */
  661. }
  662. /**
  663. * ata_dev_select - Select device 0/1 on ATA bus
  664. * @ap: ATA channel to manipulate
  665. * @device: ATA device (numbered from zero) to select
  666. * @wait: non-zero to wait for Status register BSY bit to clear
  667. * @can_sleep: non-zero if context allows sleeping
  668. *
  669. * Use the method defined in the ATA specification to
  670. * make either device 0, or device 1, active on the
  671. * ATA channel.
  672. *
  673. * This is a high-level version of ata_std_dev_select(),
  674. * which additionally provides the services of inserting
  675. * the proper pauses and status polling, where needed.
  676. *
  677. * LOCKING:
  678. * caller.
  679. */
  680. void ata_dev_select(struct ata_port *ap, unsigned int device,
  681. unsigned int wait, unsigned int can_sleep)
  682. {
  683. VPRINTK("ENTER, ata%u: device %u, wait %u\n",
  684. ap->id, device, wait);
  685. if (wait)
  686. ata_wait_idle(ap);
  687. ap->ops->dev_select(ap, device);
  688. if (wait) {
  689. if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
  690. msleep(150);
  691. ata_wait_idle(ap);
  692. }
  693. }
  694. /**
  695. * ata_dump_id - IDENTIFY DEVICE info debugging output
  696. * @id: IDENTIFY DEVICE page to dump
  697. *
  698. * Dump selected 16-bit words from the given IDENTIFY DEVICE
  699. * page.
  700. *
  701. * LOCKING:
  702. * caller.
  703. */
  704. static inline void ata_dump_id(const u16 *id)
  705. {
  706. DPRINTK("49==0x%04x "
  707. "53==0x%04x "
  708. "63==0x%04x "
  709. "64==0x%04x "
  710. "75==0x%04x \n",
  711. id[49],
  712. id[53],
  713. id[63],
  714. id[64],
  715. id[75]);
  716. DPRINTK("80==0x%04x "
  717. "81==0x%04x "
  718. "82==0x%04x "
  719. "83==0x%04x "
  720. "84==0x%04x \n",
  721. id[80],
  722. id[81],
  723. id[82],
  724. id[83],
  725. id[84]);
  726. DPRINTK("88==0x%04x "
  727. "93==0x%04x\n",
  728. id[88],
  729. id[93]);
  730. }
  731. /**
  732. * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
  733. * @id: IDENTIFY data to compute xfer mask from
  734. *
  735. * Compute the xfermask for this device. This is not as trivial
  736. * as it seems if we must consider early devices correctly.
  737. *
  738. * FIXME: pre IDE drive timing (do we care ?).
  739. *
  740. * LOCKING:
  741. * None.
  742. *
  743. * RETURNS:
  744. * Computed xfermask
  745. */
  746. static unsigned int ata_id_xfermask(const u16 *id)
  747. {
  748. unsigned int pio_mask, mwdma_mask, udma_mask;
  749. /* Usual case. Word 53 indicates word 64 is valid */
  750. if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
  751. pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
  752. pio_mask <<= 3;
  753. pio_mask |= 0x7;
  754. } else {
  755. /* If word 64 isn't valid then Word 51 high byte holds
  756. * the PIO timing number for the maximum. Turn it into
  757. * a mask.
  758. */
  759. pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
  760. /* But wait.. there's more. Design your standards by
  761. * committee and you too can get a free iordy field to
  762. * process. However its the speeds not the modes that
  763. * are supported... Note drivers using the timing API
  764. * will get this right anyway
  765. */
  766. }
  767. mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
  768. udma_mask = 0;
  769. if (id[ATA_ID_FIELD_VALID] & (1 << 2))
  770. udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
  771. return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
  772. }
  773. /**
  774. * ata_port_queue_task - Queue port_task
  775. * @ap: The ata_port to queue port_task for
  776. *
  777. * Schedule @fn(@data) for execution after @delay jiffies using
  778. * port_task. There is one port_task per port and it's the
  779. * user(low level driver)'s responsibility to make sure that only
  780. * one task is active at any given time.
  781. *
  782. * libata core layer takes care of synchronization between
  783. * port_task and EH. ata_port_queue_task() may be ignored for EH
  784. * synchronization.
  785. *
  786. * LOCKING:
  787. * Inherited from caller.
  788. */
  789. void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
  790. unsigned long delay)
  791. {
  792. int rc;
  793. if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
  794. return;
  795. PREPARE_WORK(&ap->port_task, fn, data);
  796. if (!delay)
  797. rc = queue_work(ata_wq, &ap->port_task);
  798. else
  799. rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
  800. /* rc == 0 means that another user is using port task */
  801. WARN_ON(rc == 0);
  802. }
  803. /**
  804. * ata_port_flush_task - Flush port_task
  805. * @ap: The ata_port to flush port_task for
  806. *
  807. * After this function completes, port_task is guranteed not to
  808. * be running or scheduled.
  809. *
  810. * LOCKING:
  811. * Kernel thread context (may sleep)
  812. */
  813. void ata_port_flush_task(struct ata_port *ap)
  814. {
  815. unsigned long flags;
  816. DPRINTK("ENTER\n");
  817. spin_lock_irqsave(&ap->host_set->lock, flags);
  818. ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
  819. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  820. DPRINTK("flush #1\n");
  821. flush_workqueue(ata_wq);
  822. /*
  823. * At this point, if a task is running, it's guaranteed to see
  824. * the FLUSH flag; thus, it will never queue pio tasks again.
  825. * Cancel and flush.
  826. */
  827. if (!cancel_delayed_work(&ap->port_task)) {
  828. DPRINTK("flush #2\n");
  829. flush_workqueue(ata_wq);
  830. }
  831. spin_lock_irqsave(&ap->host_set->lock, flags);
  832. ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
  833. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  834. DPRINTK("EXIT\n");
  835. }
  836. void ata_qc_complete_internal(struct ata_queued_cmd *qc)
  837. {
  838. struct completion *waiting = qc->private_data;
  839. qc->ap->ops->tf_read(qc->ap, &qc->tf);
  840. complete(waiting);
  841. }
  842. /**
  843. * ata_exec_internal - execute libata internal command
  844. * @ap: Port to which the command is sent
  845. * @dev: Device to which the command is sent
  846. * @tf: Taskfile registers for the command and the result
  847. * @cdb: CDB for packet command
  848. * @dma_dir: Data tranfer direction of the command
  849. * @buf: Data buffer of the command
  850. * @buflen: Length of data buffer
  851. *
  852. * Executes libata internal command with timeout. @tf contains
  853. * command on entry and result on return. Timeout and error
  854. * conditions are reported via return value. No recovery action
  855. * is taken after a command times out. It's caller's duty to
  856. * clean up after timeout.
  857. *
  858. * LOCKING:
  859. * None. Should be called with kernel context, might sleep.
  860. */
  861. unsigned ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
  862. struct ata_taskfile *tf, const u8 *cdb,
  863. int dma_dir, void *buf, unsigned int buflen)
  864. {
  865. u8 command = tf->command;
  866. struct ata_queued_cmd *qc;
  867. DECLARE_COMPLETION(wait);
  868. unsigned long flags;
  869. unsigned int err_mask;
  870. spin_lock_irqsave(&ap->host_set->lock, flags);
  871. qc = ata_qc_new_init(ap, dev);
  872. BUG_ON(qc == NULL);
  873. qc->tf = *tf;
  874. if (cdb)
  875. memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
  876. qc->dma_dir = dma_dir;
  877. if (dma_dir != DMA_NONE) {
  878. ata_sg_init_one(qc, buf, buflen);
  879. qc->nsect = buflen / ATA_SECT_SIZE;
  880. }
  881. qc->private_data = &wait;
  882. qc->complete_fn = ata_qc_complete_internal;
  883. ata_qc_issue(qc);
  884. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  885. if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
  886. ata_port_flush_task(ap);
  887. spin_lock_irqsave(&ap->host_set->lock, flags);
  888. /* We're racing with irq here. If we lose, the
  889. * following test prevents us from completing the qc
  890. * again. If completion irq occurs after here but
  891. * before the caller cleans up, it will result in a
  892. * spurious interrupt. We can live with that.
  893. */
  894. if (qc->flags & ATA_QCFLAG_ACTIVE) {
  895. qc->err_mask = AC_ERR_TIMEOUT;
  896. ata_qc_complete(qc);
  897. printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
  898. ap->id, command);
  899. }
  900. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  901. }
  902. *tf = qc->tf;
  903. err_mask = qc->err_mask;
  904. ata_qc_free(qc);
  905. /* XXX - Some LLDDs (sata_mv) disable port on command failure.
  906. * Until those drivers are fixed, we detect the condition
  907. * here, fail the command with AC_ERR_SYSTEM and reenable the
  908. * port.
  909. *
  910. * Note that this doesn't change any behavior as internal
  911. * command failure results in disabling the device in the
  912. * higher layer for LLDDs without new reset/EH callbacks.
  913. *
  914. * Kill the following code as soon as those drivers are fixed.
  915. */
  916. if (ap->flags & ATA_FLAG_DISABLED) {
  917. err_mask |= AC_ERR_SYSTEM;
  918. ata_port_probe(ap);
  919. }
  920. return err_mask;
  921. }
  922. /**
  923. * ata_pio_need_iordy - check if iordy needed
  924. * @adev: ATA device
  925. *
  926. * Check if the current speed of the device requires IORDY. Used
  927. * by various controllers for chip configuration.
  928. */
  929. unsigned int ata_pio_need_iordy(const struct ata_device *adev)
  930. {
  931. int pio;
  932. int speed = adev->pio_mode - XFER_PIO_0;
  933. if (speed < 2)
  934. return 0;
  935. if (speed > 2)
  936. return 1;
  937. /* If we have no drive specific rule, then PIO 2 is non IORDY */
  938. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
  939. pio = adev->id[ATA_ID_EIDE_PIO];
  940. /* Is the speed faster than the drive allows non IORDY ? */
  941. if (pio) {
  942. /* This is cycle times not frequency - watch the logic! */
  943. if (pio > 240) /* PIO2 is 240nS per cycle */
  944. return 1;
  945. return 0;
  946. }
  947. }
  948. return 0;
  949. }
  950. /**
  951. * ata_dev_read_id - Read ID data from the specified device
  952. * @ap: port on which target device resides
  953. * @dev: target device
  954. * @p_class: pointer to class of the target device (may be changed)
  955. * @post_reset: is this read ID post-reset?
  956. * @p_id: read IDENTIFY page (newly allocated)
  957. *
  958. * Read ID data from the specified device. ATA_CMD_ID_ATA is
  959. * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
  960. * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
  961. * for pre-ATA4 drives.
  962. *
  963. * LOCKING:
  964. * Kernel thread context (may sleep)
  965. *
  966. * RETURNS:
  967. * 0 on success, -errno otherwise.
  968. */
  969. static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
  970. unsigned int *p_class, int post_reset, u16 **p_id)
  971. {
  972. unsigned int class = *p_class;
  973. struct ata_taskfile tf;
  974. unsigned int err_mask = 0;
  975. u16 *id;
  976. const char *reason;
  977. int rc;
  978. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  979. ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
  980. id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
  981. if (id == NULL) {
  982. rc = -ENOMEM;
  983. reason = "out of memory";
  984. goto err_out;
  985. }
  986. retry:
  987. ata_tf_init(ap, &tf, dev->devno);
  988. switch (class) {
  989. case ATA_DEV_ATA:
  990. tf.command = ATA_CMD_ID_ATA;
  991. break;
  992. case ATA_DEV_ATAPI:
  993. tf.command = ATA_CMD_ID_ATAPI;
  994. break;
  995. default:
  996. rc = -ENODEV;
  997. reason = "unsupported class";
  998. goto err_out;
  999. }
  1000. tf.protocol = ATA_PROT_PIO;
  1001. err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_FROM_DEVICE,
  1002. id, sizeof(id[0]) * ATA_ID_WORDS);
  1003. if (err_mask) {
  1004. rc = -EIO;
  1005. reason = "I/O error";
  1006. goto err_out;
  1007. }
  1008. swap_buf_le16(id, ATA_ID_WORDS);
  1009. /* sanity check */
  1010. if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
  1011. rc = -EINVAL;
  1012. reason = "device reports illegal type";
  1013. goto err_out;
  1014. }
  1015. if (post_reset && class == ATA_DEV_ATA) {
  1016. /*
  1017. * The exact sequence expected by certain pre-ATA4 drives is:
  1018. * SRST RESET
  1019. * IDENTIFY
  1020. * INITIALIZE DEVICE PARAMETERS
  1021. * anything else..
  1022. * Some drives were very specific about that exact sequence.
  1023. */
  1024. if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
  1025. err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
  1026. if (err_mask) {
  1027. rc = -EIO;
  1028. reason = "INIT_DEV_PARAMS failed";
  1029. goto err_out;
  1030. }
  1031. /* current CHS translation info (id[53-58]) might be
  1032. * changed. reread the identify device info.
  1033. */
  1034. post_reset = 0;
  1035. goto retry;
  1036. }
  1037. }
  1038. *p_class = class;
  1039. *p_id = id;
  1040. return 0;
  1041. err_out:
  1042. printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
  1043. ap->id, dev->devno, reason);
  1044. kfree(id);
  1045. return rc;
  1046. }
  1047. static inline u8 ata_dev_knobble(const struct ata_port *ap,
  1048. struct ata_device *dev)
  1049. {
  1050. return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
  1051. }
  1052. /**
  1053. * ata_dev_configure - Configure the specified ATA/ATAPI device
  1054. * @ap: Port on which target device resides
  1055. * @dev: Target device to configure
  1056. * @print_info: Enable device info printout
  1057. *
  1058. * Configure @dev according to @dev->id. Generic and low-level
  1059. * driver specific fixups are also applied.
  1060. *
  1061. * LOCKING:
  1062. * Kernel thread context (may sleep)
  1063. *
  1064. * RETURNS:
  1065. * 0 on success, -errno otherwise
  1066. */
  1067. static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
  1068. int print_info)
  1069. {
  1070. const u16 *id = dev->id;
  1071. unsigned int xfer_mask;
  1072. int i, rc;
  1073. if (!ata_dev_enabled(dev)) {
  1074. DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
  1075. ap->id, dev->devno);
  1076. return 0;
  1077. }
  1078. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  1079. /* print device capabilities */
  1080. if (print_info)
  1081. printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
  1082. "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
  1083. ap->id, dev->devno, id[49], id[82], id[83],
  1084. id[84], id[85], id[86], id[87], id[88]);
  1085. /* initialize to-be-configured parameters */
  1086. dev->flags &= ~ATA_DFLAG_CFG_MASK;
  1087. dev->max_sectors = 0;
  1088. dev->cdb_len = 0;
  1089. dev->n_sectors = 0;
  1090. dev->cylinders = 0;
  1091. dev->heads = 0;
  1092. dev->sectors = 0;
  1093. /*
  1094. * common ATA, ATAPI feature tests
  1095. */
  1096. /* find max transfer mode; for printk only */
  1097. xfer_mask = ata_id_xfermask(id);
  1098. ata_dump_id(id);
  1099. /* ATA-specific feature tests */
  1100. if (dev->class == ATA_DEV_ATA) {
  1101. dev->n_sectors = ata_id_n_sectors(id);
  1102. if (ata_id_has_lba(id)) {
  1103. const char *lba_desc;
  1104. lba_desc = "LBA";
  1105. dev->flags |= ATA_DFLAG_LBA;
  1106. if (ata_id_has_lba48(id)) {
  1107. dev->flags |= ATA_DFLAG_LBA48;
  1108. lba_desc = "LBA48";
  1109. }
  1110. /* print device info to dmesg */
  1111. if (print_info)
  1112. printk(KERN_INFO "ata%u: dev %u ATA-%d, "
  1113. "max %s, %Lu sectors: %s\n",
  1114. ap->id, dev->devno,
  1115. ata_id_major_version(id),
  1116. ata_mode_string(xfer_mask),
  1117. (unsigned long long)dev->n_sectors,
  1118. lba_desc);
  1119. } else {
  1120. /* CHS */
  1121. /* Default translation */
  1122. dev->cylinders = id[1];
  1123. dev->heads = id[3];
  1124. dev->sectors = id[6];
  1125. if (ata_id_current_chs_valid(id)) {
  1126. /* Current CHS translation is valid. */
  1127. dev->cylinders = id[54];
  1128. dev->heads = id[55];
  1129. dev->sectors = id[56];
  1130. }
  1131. /* print device info to dmesg */
  1132. if (print_info)
  1133. printk(KERN_INFO "ata%u: dev %u ATA-%d, "
  1134. "max %s, %Lu sectors: CHS %u/%u/%u\n",
  1135. ap->id, dev->devno,
  1136. ata_id_major_version(id),
  1137. ata_mode_string(xfer_mask),
  1138. (unsigned long long)dev->n_sectors,
  1139. dev->cylinders, dev->heads, dev->sectors);
  1140. }
  1141. if (dev->id[59] & 0x100) {
  1142. dev->multi_count = dev->id[59] & 0xff;
  1143. DPRINTK("ata%u: dev %u multi count %u\n",
  1144. ap->id, dev->devno, dev->multi_count);
  1145. }
  1146. dev->cdb_len = 16;
  1147. }
  1148. /* ATAPI-specific feature tests */
  1149. else if (dev->class == ATA_DEV_ATAPI) {
  1150. char *cdb_intr_string = "";
  1151. rc = atapi_cdb_len(id);
  1152. if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
  1153. printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
  1154. rc = -EINVAL;
  1155. goto err_out_nosup;
  1156. }
  1157. dev->cdb_len = (unsigned int) rc;
  1158. if (ata_id_cdb_intr(dev->id)) {
  1159. dev->flags |= ATA_DFLAG_CDB_INTR;
  1160. cdb_intr_string = ", CDB intr";
  1161. }
  1162. /* print device info to dmesg */
  1163. if (print_info)
  1164. printk(KERN_INFO "ata%u: dev %u ATAPI, max %s%s\n",
  1165. ap->id, dev->devno, ata_mode_string(xfer_mask),
  1166. cdb_intr_string);
  1167. }
  1168. ap->host->max_cmd_len = 0;
  1169. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1170. ap->host->max_cmd_len = max_t(unsigned int,
  1171. ap->host->max_cmd_len,
  1172. ap->device[i].cdb_len);
  1173. /* limit bridge transfers to udma5, 200 sectors */
  1174. if (ata_dev_knobble(ap, dev)) {
  1175. if (print_info)
  1176. printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
  1177. ap->id, dev->devno);
  1178. dev->udma_mask &= ATA_UDMA5;
  1179. dev->max_sectors = ATA_MAX_SECTORS;
  1180. }
  1181. if (ap->ops->dev_config)
  1182. ap->ops->dev_config(ap, dev);
  1183. DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
  1184. return 0;
  1185. err_out_nosup:
  1186. DPRINTK("EXIT, err\n");
  1187. return rc;
  1188. }
  1189. /**
  1190. * ata_bus_probe - Reset and probe ATA bus
  1191. * @ap: Bus to probe
  1192. *
  1193. * Master ATA bus probing function. Initiates a hardware-dependent
  1194. * bus reset, then attempts to identify any devices found on
  1195. * the bus.
  1196. *
  1197. * LOCKING:
  1198. * PCI/etc. bus probe sem.
  1199. *
  1200. * RETURNS:
  1201. * Zero on success, negative errno otherwise.
  1202. */
  1203. static int ata_bus_probe(struct ata_port *ap)
  1204. {
  1205. unsigned int classes[ATA_MAX_DEVICES];
  1206. int tries[ATA_MAX_DEVICES];
  1207. int i, rc, down_xfermask;
  1208. struct ata_device *dev;
  1209. ata_port_probe(ap);
  1210. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1211. tries[i] = ATA_PROBE_MAX_TRIES;
  1212. retry:
  1213. down_xfermask = 0;
  1214. /* reset and determine device classes */
  1215. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1216. classes[i] = ATA_DEV_UNKNOWN;
  1217. if (ap->ops->probe_reset) {
  1218. rc = ap->ops->probe_reset(ap, classes);
  1219. if (rc) {
  1220. printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
  1221. return rc;
  1222. }
  1223. } else {
  1224. ap->ops->phy_reset(ap);
  1225. if (!(ap->flags & ATA_FLAG_DISABLED))
  1226. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1227. classes[i] = ap->device[i].class;
  1228. ata_port_probe(ap);
  1229. }
  1230. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1231. if (classes[i] == ATA_DEV_UNKNOWN)
  1232. classes[i] = ATA_DEV_NONE;
  1233. /* read IDENTIFY page and configure devices */
  1234. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1235. dev = &ap->device[i];
  1236. dev->class = classes[i];
  1237. if (!tries[i]) {
  1238. ata_down_xfermask_limit(ap, dev, 1);
  1239. ata_dev_disable(ap, dev);
  1240. }
  1241. if (!ata_dev_enabled(dev))
  1242. continue;
  1243. kfree(dev->id);
  1244. dev->id = NULL;
  1245. rc = ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id);
  1246. if (rc)
  1247. goto fail;
  1248. rc = ata_dev_configure(ap, dev, 1);
  1249. if (rc)
  1250. goto fail;
  1251. }
  1252. /* configure transfer mode */
  1253. if (ap->ops->set_mode) {
  1254. /* FIXME: make ->set_mode handle no device case and
  1255. * return error code and failing device on failure as
  1256. * ata_set_mode() does.
  1257. */
  1258. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1259. if (ata_dev_enabled(&ap->device[i])) {
  1260. ap->ops->set_mode(ap);
  1261. break;
  1262. }
  1263. rc = 0;
  1264. } else {
  1265. rc = ata_set_mode(ap, &dev);
  1266. if (rc) {
  1267. down_xfermask = 1;
  1268. goto fail;
  1269. }
  1270. }
  1271. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1272. if (ata_dev_enabled(&ap->device[i]))
  1273. return 0;
  1274. /* no device present, disable port */
  1275. ata_port_disable(ap);
  1276. ap->ops->port_disable(ap);
  1277. return -ENODEV;
  1278. fail:
  1279. switch (rc) {
  1280. case -EINVAL:
  1281. case -ENODEV:
  1282. tries[dev->devno] = 0;
  1283. break;
  1284. case -EIO:
  1285. ata_down_sata_spd_limit(ap);
  1286. /* fall through */
  1287. default:
  1288. tries[dev->devno]--;
  1289. if (down_xfermask &&
  1290. ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
  1291. tries[dev->devno] = 0;
  1292. }
  1293. goto retry;
  1294. }
  1295. /**
  1296. * ata_port_probe - Mark port as enabled
  1297. * @ap: Port for which we indicate enablement
  1298. *
  1299. * Modify @ap data structure such that the system
  1300. * thinks that the entire port is enabled.
  1301. *
  1302. * LOCKING: host_set lock, or some other form of
  1303. * serialization.
  1304. */
  1305. void ata_port_probe(struct ata_port *ap)
  1306. {
  1307. ap->flags &= ~ATA_FLAG_DISABLED;
  1308. }
  1309. /**
  1310. * sata_print_link_status - Print SATA link status
  1311. * @ap: SATA port to printk link status about
  1312. *
  1313. * This function prints link speed and status of a SATA link.
  1314. *
  1315. * LOCKING:
  1316. * None.
  1317. */
  1318. static void sata_print_link_status(struct ata_port *ap)
  1319. {
  1320. u32 sstatus, scontrol, tmp;
  1321. if (!ap->ops->scr_read)
  1322. return;
  1323. sstatus = scr_read(ap, SCR_STATUS);
  1324. scontrol = scr_read(ap, SCR_CONTROL);
  1325. if (sata_dev_present(ap)) {
  1326. tmp = (sstatus >> 4) & 0xf;
  1327. printk(KERN_INFO
  1328. "ata%u: SATA link up %s (SStatus %X SControl %X)\n",
  1329. ap->id, sata_spd_string(tmp), sstatus, scontrol);
  1330. } else {
  1331. printk(KERN_INFO
  1332. "ata%u: SATA link down (SStatus %X SControl %X)\n",
  1333. ap->id, sstatus, scontrol);
  1334. }
  1335. }
  1336. /**
  1337. * __sata_phy_reset - Wake/reset a low-level SATA PHY
  1338. * @ap: SATA port associated with target SATA PHY.
  1339. *
  1340. * This function issues commands to standard SATA Sxxx
  1341. * PHY registers, to wake up the phy (and device), and
  1342. * clear any reset condition.
  1343. *
  1344. * LOCKING:
  1345. * PCI/etc. bus probe sem.
  1346. *
  1347. */
  1348. void __sata_phy_reset(struct ata_port *ap)
  1349. {
  1350. u32 sstatus;
  1351. unsigned long timeout = jiffies + (HZ * 5);
  1352. if (ap->flags & ATA_FLAG_SATA_RESET) {
  1353. /* issue phy wake/reset */
  1354. scr_write_flush(ap, SCR_CONTROL, 0x301);
  1355. /* Couldn't find anything in SATA I/II specs, but
  1356. * AHCI-1.1 10.4.2 says at least 1 ms. */
  1357. mdelay(1);
  1358. }
  1359. scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
  1360. /* wait for phy to become ready, if necessary */
  1361. do {
  1362. msleep(200);
  1363. sstatus = scr_read(ap, SCR_STATUS);
  1364. if ((sstatus & 0xf) != 1)
  1365. break;
  1366. } while (time_before(jiffies, timeout));
  1367. /* print link status */
  1368. sata_print_link_status(ap);
  1369. /* TODO: phy layer with polling, timeouts, etc. */
  1370. if (sata_dev_present(ap))
  1371. ata_port_probe(ap);
  1372. else
  1373. ata_port_disable(ap);
  1374. if (ap->flags & ATA_FLAG_DISABLED)
  1375. return;
  1376. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  1377. ata_port_disable(ap);
  1378. return;
  1379. }
  1380. ap->cbl = ATA_CBL_SATA;
  1381. }
  1382. /**
  1383. * sata_phy_reset - Reset SATA bus.
  1384. * @ap: SATA port associated with target SATA PHY.
  1385. *
  1386. * This function resets the SATA bus, and then probes
  1387. * the bus for devices.
  1388. *
  1389. * LOCKING:
  1390. * PCI/etc. bus probe sem.
  1391. *
  1392. */
  1393. void sata_phy_reset(struct ata_port *ap)
  1394. {
  1395. __sata_phy_reset(ap);
  1396. if (ap->flags & ATA_FLAG_DISABLED)
  1397. return;
  1398. ata_bus_reset(ap);
  1399. }
  1400. /**
  1401. * ata_dev_pair - return other device on cable
  1402. * @ap: port
  1403. * @adev: device
  1404. *
  1405. * Obtain the other device on the same cable, or if none is
  1406. * present NULL is returned
  1407. */
  1408. struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
  1409. {
  1410. struct ata_device *pair = &ap->device[1 - adev->devno];
  1411. if (!ata_dev_enabled(pair))
  1412. return NULL;
  1413. return pair;
  1414. }
  1415. /**
  1416. * ata_port_disable - Disable port.
  1417. * @ap: Port to be disabled.
  1418. *
  1419. * Modify @ap data structure such that the system
  1420. * thinks that the entire port is disabled, and should
  1421. * never attempt to probe or communicate with devices
  1422. * on this port.
  1423. *
  1424. * LOCKING: host_set lock, or some other form of
  1425. * serialization.
  1426. */
  1427. void ata_port_disable(struct ata_port *ap)
  1428. {
  1429. ap->device[0].class = ATA_DEV_NONE;
  1430. ap->device[1].class = ATA_DEV_NONE;
  1431. ap->flags |= ATA_FLAG_DISABLED;
  1432. }
  1433. /**
  1434. * ata_down_sata_spd_limit - adjust SATA spd limit downward
  1435. * @ap: Port to adjust SATA spd limit for
  1436. *
  1437. * Adjust SATA spd limit of @ap downward. Note that this
  1438. * function only adjusts the limit. The change must be applied
  1439. * using ata_set_sata_spd().
  1440. *
  1441. * LOCKING:
  1442. * Inherited from caller.
  1443. *
  1444. * RETURNS:
  1445. * 0 on success, negative errno on failure
  1446. */
  1447. int ata_down_sata_spd_limit(struct ata_port *ap)
  1448. {
  1449. u32 spd, mask;
  1450. int highbit;
  1451. if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
  1452. return -EOPNOTSUPP;
  1453. mask = ap->sata_spd_limit;
  1454. if (mask <= 1)
  1455. return -EINVAL;
  1456. highbit = fls(mask) - 1;
  1457. mask &= ~(1 << highbit);
  1458. spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
  1459. if (spd <= 1)
  1460. return -EINVAL;
  1461. spd--;
  1462. mask &= (1 << spd) - 1;
  1463. if (!mask)
  1464. return -EINVAL;
  1465. ap->sata_spd_limit = mask;
  1466. printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
  1467. ap->id, sata_spd_string(fls(mask)));
  1468. return 0;
  1469. }
  1470. static int __ata_set_sata_spd_needed(struct ata_port *ap, u32 *scontrol)
  1471. {
  1472. u32 spd, limit;
  1473. if (ap->sata_spd_limit == UINT_MAX)
  1474. limit = 0;
  1475. else
  1476. limit = fls(ap->sata_spd_limit);
  1477. spd = (*scontrol >> 4) & 0xf;
  1478. *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
  1479. return spd != limit;
  1480. }
  1481. /**
  1482. * ata_set_sata_spd_needed - is SATA spd configuration needed
  1483. * @ap: Port in question
  1484. *
  1485. * Test whether the spd limit in SControl matches
  1486. * @ap->sata_spd_limit. This function is used to determine
  1487. * whether hardreset is necessary to apply SATA spd
  1488. * configuration.
  1489. *
  1490. * LOCKING:
  1491. * Inherited from caller.
  1492. *
  1493. * RETURNS:
  1494. * 1 if SATA spd configuration is needed, 0 otherwise.
  1495. */
  1496. int ata_set_sata_spd_needed(struct ata_port *ap)
  1497. {
  1498. u32 scontrol;
  1499. if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
  1500. return 0;
  1501. scontrol = scr_read(ap, SCR_CONTROL);
  1502. return __ata_set_sata_spd_needed(ap, &scontrol);
  1503. }
  1504. /**
  1505. * ata_set_sata_spd - set SATA spd according to spd limit
  1506. * @ap: Port to set SATA spd for
  1507. *
  1508. * Set SATA spd of @ap according to sata_spd_limit.
  1509. *
  1510. * LOCKING:
  1511. * Inherited from caller.
  1512. *
  1513. * RETURNS:
  1514. * 0 if spd doesn't need to be changed, 1 if spd has been
  1515. * changed. -EOPNOTSUPP if SCR registers are inaccessible.
  1516. */
  1517. static int ata_set_sata_spd(struct ata_port *ap)
  1518. {
  1519. u32 scontrol;
  1520. if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
  1521. return -EOPNOTSUPP;
  1522. scontrol = scr_read(ap, SCR_CONTROL);
  1523. if (!__ata_set_sata_spd_needed(ap, &scontrol))
  1524. return 0;
  1525. scr_write(ap, SCR_CONTROL, scontrol);
  1526. return 1;
  1527. }
  1528. /*
  1529. * This mode timing computation functionality is ported over from
  1530. * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
  1531. */
  1532. /*
  1533. * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
  1534. * These were taken from ATA/ATAPI-6 standard, rev 0a, except
  1535. * for PIO 5, which is a nonstandard extension and UDMA6, which
  1536. * is currently supported only by Maxtor drives.
  1537. */
  1538. static const struct ata_timing ata_timing[] = {
  1539. { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
  1540. { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
  1541. { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
  1542. { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
  1543. { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
  1544. { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
  1545. { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
  1546. /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
  1547. { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
  1548. { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
  1549. { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
  1550. { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
  1551. { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
  1552. { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
  1553. /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
  1554. { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
  1555. { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
  1556. { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
  1557. { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
  1558. { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
  1559. /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
  1560. { 0xFF }
  1561. };
  1562. #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
  1563. #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
  1564. static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
  1565. {
  1566. q->setup = EZ(t->setup * 1000, T);
  1567. q->act8b = EZ(t->act8b * 1000, T);
  1568. q->rec8b = EZ(t->rec8b * 1000, T);
  1569. q->cyc8b = EZ(t->cyc8b * 1000, T);
  1570. q->active = EZ(t->active * 1000, T);
  1571. q->recover = EZ(t->recover * 1000, T);
  1572. q->cycle = EZ(t->cycle * 1000, T);
  1573. q->udma = EZ(t->udma * 1000, UT);
  1574. }
  1575. void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
  1576. struct ata_timing *m, unsigned int what)
  1577. {
  1578. if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
  1579. if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
  1580. if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
  1581. if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
  1582. if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
  1583. if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
  1584. if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
  1585. if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
  1586. }
  1587. static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
  1588. {
  1589. const struct ata_timing *t;
  1590. for (t = ata_timing; t->mode != speed; t++)
  1591. if (t->mode == 0xFF)
  1592. return NULL;
  1593. return t;
  1594. }
  1595. int ata_timing_compute(struct ata_device *adev, unsigned short speed,
  1596. struct ata_timing *t, int T, int UT)
  1597. {
  1598. const struct ata_timing *s;
  1599. struct ata_timing p;
  1600. /*
  1601. * Find the mode.
  1602. */
  1603. if (!(s = ata_timing_find_mode(speed)))
  1604. return -EINVAL;
  1605. memcpy(t, s, sizeof(*s));
  1606. /*
  1607. * If the drive is an EIDE drive, it can tell us it needs extended
  1608. * PIO/MW_DMA cycle timing.
  1609. */
  1610. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
  1611. memset(&p, 0, sizeof(p));
  1612. if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
  1613. if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
  1614. else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
  1615. } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
  1616. p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
  1617. }
  1618. ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
  1619. }
  1620. /*
  1621. * Convert the timing to bus clock counts.
  1622. */
  1623. ata_timing_quantize(t, t, T, UT);
  1624. /*
  1625. * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
  1626. * S.M.A.R.T * and some other commands. We have to ensure that the
  1627. * DMA cycle timing is slower/equal than the fastest PIO timing.
  1628. */
  1629. if (speed > XFER_PIO_4) {
  1630. ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
  1631. ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
  1632. }
  1633. /*
  1634. * Lengthen active & recovery time so that cycle time is correct.
  1635. */
  1636. if (t->act8b + t->rec8b < t->cyc8b) {
  1637. t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
  1638. t->rec8b = t->cyc8b - t->act8b;
  1639. }
  1640. if (t->active + t->recover < t->cycle) {
  1641. t->active += (t->cycle - (t->active + t->recover)) / 2;
  1642. t->recover = t->cycle - t->active;
  1643. }
  1644. return 0;
  1645. }
  1646. /**
  1647. * ata_down_xfermask_limit - adjust dev xfer masks downward
  1648. * @ap: Port associated with device @dev
  1649. * @dev: Device to adjust xfer masks
  1650. * @force_pio0: Force PIO0
  1651. *
  1652. * Adjust xfer masks of @dev downward. Note that this function
  1653. * does not apply the change. Invoking ata_set_mode() afterwards
  1654. * will apply the limit.
  1655. *
  1656. * LOCKING:
  1657. * Inherited from caller.
  1658. *
  1659. * RETURNS:
  1660. * 0 on success, negative errno on failure
  1661. */
  1662. int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
  1663. int force_pio0)
  1664. {
  1665. unsigned long xfer_mask;
  1666. int highbit;
  1667. xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
  1668. dev->udma_mask);
  1669. if (!xfer_mask)
  1670. goto fail;
  1671. /* don't gear down to MWDMA from UDMA, go directly to PIO */
  1672. if (xfer_mask & ATA_MASK_UDMA)
  1673. xfer_mask &= ~ATA_MASK_MWDMA;
  1674. highbit = fls(xfer_mask) - 1;
  1675. xfer_mask &= ~(1 << highbit);
  1676. if (force_pio0)
  1677. xfer_mask &= 1 << ATA_SHIFT_PIO;
  1678. if (!xfer_mask)
  1679. goto fail;
  1680. ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
  1681. &dev->udma_mask);
  1682. printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
  1683. ap->id, dev->devno, ata_mode_string(xfer_mask));
  1684. return 0;
  1685. fail:
  1686. return -EINVAL;
  1687. }
  1688. static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
  1689. {
  1690. unsigned int err_mask;
  1691. int rc;
  1692. dev->flags &= ~ATA_DFLAG_PIO;
  1693. if (dev->xfer_shift == ATA_SHIFT_PIO)
  1694. dev->flags |= ATA_DFLAG_PIO;
  1695. err_mask = ata_dev_set_xfermode(ap, dev);
  1696. if (err_mask) {
  1697. printk(KERN_ERR
  1698. "ata%u: failed to set xfermode (err_mask=0x%x)\n",
  1699. ap->id, err_mask);
  1700. return -EIO;
  1701. }
  1702. rc = ata_dev_revalidate(ap, dev, 0);
  1703. if (rc)
  1704. return rc;
  1705. DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
  1706. dev->xfer_shift, (int)dev->xfer_mode);
  1707. printk(KERN_INFO "ata%u: dev %u configured for %s\n",
  1708. ap->id, dev->devno,
  1709. ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
  1710. return 0;
  1711. }
  1712. /**
  1713. * ata_set_mode - Program timings and issue SET FEATURES - XFER
  1714. * @ap: port on which timings will be programmed
  1715. * @r_failed_dev: out paramter for failed device
  1716. *
  1717. * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
  1718. * ata_set_mode() fails, pointer to the failing device is
  1719. * returned in @r_failed_dev.
  1720. *
  1721. * LOCKING:
  1722. * PCI/etc. bus probe sem.
  1723. *
  1724. * RETURNS:
  1725. * 0 on success, negative errno otherwise
  1726. */
  1727. int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
  1728. {
  1729. struct ata_device *dev;
  1730. int i, rc = 0, used_dma = 0, found = 0;
  1731. /* step 1: calculate xfer_mask */
  1732. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1733. unsigned int pio_mask, dma_mask;
  1734. dev = &ap->device[i];
  1735. if (!ata_dev_enabled(dev))
  1736. continue;
  1737. ata_dev_xfermask(ap, dev);
  1738. pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
  1739. dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
  1740. dev->pio_mode = ata_xfer_mask2mode(pio_mask);
  1741. dev->dma_mode = ata_xfer_mask2mode(dma_mask);
  1742. found = 1;
  1743. if (dev->dma_mode)
  1744. used_dma = 1;
  1745. }
  1746. if (!found)
  1747. goto out;
  1748. /* step 2: always set host PIO timings */
  1749. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1750. dev = &ap->device[i];
  1751. if (!ata_dev_enabled(dev))
  1752. continue;
  1753. if (!dev->pio_mode) {
  1754. printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
  1755. ap->id, dev->devno);
  1756. rc = -EINVAL;
  1757. goto out;
  1758. }
  1759. dev->xfer_mode = dev->pio_mode;
  1760. dev->xfer_shift = ATA_SHIFT_PIO;
  1761. if (ap->ops->set_piomode)
  1762. ap->ops->set_piomode(ap, dev);
  1763. }
  1764. /* step 3: set host DMA timings */
  1765. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1766. dev = &ap->device[i];
  1767. if (!ata_dev_enabled(dev) || !dev->dma_mode)
  1768. continue;
  1769. dev->xfer_mode = dev->dma_mode;
  1770. dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
  1771. if (ap->ops->set_dmamode)
  1772. ap->ops->set_dmamode(ap, dev);
  1773. }
  1774. /* step 4: update devices' xfer mode */
  1775. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1776. dev = &ap->device[i];
  1777. if (!ata_dev_enabled(dev))
  1778. continue;
  1779. rc = ata_dev_set_mode(ap, dev);
  1780. if (rc)
  1781. goto out;
  1782. }
  1783. /* Record simplex status. If we selected DMA then the other
  1784. * host channels are not permitted to do so.
  1785. */
  1786. if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
  1787. ap->host_set->simplex_claimed = 1;
  1788. /* step5: chip specific finalisation */
  1789. if (ap->ops->post_set_mode)
  1790. ap->ops->post_set_mode(ap);
  1791. out:
  1792. if (rc)
  1793. *r_failed_dev = dev;
  1794. return rc;
  1795. }
  1796. /**
  1797. * ata_tf_to_host - issue ATA taskfile to host controller
  1798. * @ap: port to which command is being issued
  1799. * @tf: ATA taskfile register set
  1800. *
  1801. * Issues ATA taskfile register set to ATA host controller,
  1802. * with proper synchronization with interrupt handler and
  1803. * other threads.
  1804. *
  1805. * LOCKING:
  1806. * spin_lock_irqsave(host_set lock)
  1807. */
  1808. static inline void ata_tf_to_host(struct ata_port *ap,
  1809. const struct ata_taskfile *tf)
  1810. {
  1811. ap->ops->tf_load(ap, tf);
  1812. ap->ops->exec_command(ap, tf);
  1813. }
  1814. /**
  1815. * ata_busy_sleep - sleep until BSY clears, or timeout
  1816. * @ap: port containing status register to be polled
  1817. * @tmout_pat: impatience timeout
  1818. * @tmout: overall timeout
  1819. *
  1820. * Sleep until ATA Status register bit BSY clears,
  1821. * or a timeout occurs.
  1822. *
  1823. * LOCKING: None.
  1824. */
  1825. unsigned int ata_busy_sleep (struct ata_port *ap,
  1826. unsigned long tmout_pat, unsigned long tmout)
  1827. {
  1828. unsigned long timer_start, timeout;
  1829. u8 status;
  1830. status = ata_busy_wait(ap, ATA_BUSY, 300);
  1831. timer_start = jiffies;
  1832. timeout = timer_start + tmout_pat;
  1833. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1834. msleep(50);
  1835. status = ata_busy_wait(ap, ATA_BUSY, 3);
  1836. }
  1837. if (status & ATA_BUSY)
  1838. printk(KERN_WARNING "ata%u is slow to respond, "
  1839. "please be patient\n", ap->id);
  1840. timeout = timer_start + tmout;
  1841. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1842. msleep(50);
  1843. status = ata_chk_status(ap);
  1844. }
  1845. if (status & ATA_BUSY) {
  1846. printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
  1847. ap->id, tmout / HZ);
  1848. return 1;
  1849. }
  1850. return 0;
  1851. }
  1852. static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
  1853. {
  1854. struct ata_ioports *ioaddr = &ap->ioaddr;
  1855. unsigned int dev0 = devmask & (1 << 0);
  1856. unsigned int dev1 = devmask & (1 << 1);
  1857. unsigned long timeout;
  1858. /* if device 0 was found in ata_devchk, wait for its
  1859. * BSY bit to clear
  1860. */
  1861. if (dev0)
  1862. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1863. /* if device 1 was found in ata_devchk, wait for
  1864. * register access, then wait for BSY to clear
  1865. */
  1866. timeout = jiffies + ATA_TMOUT_BOOT;
  1867. while (dev1) {
  1868. u8 nsect, lbal;
  1869. ap->ops->dev_select(ap, 1);
  1870. if (ap->flags & ATA_FLAG_MMIO) {
  1871. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  1872. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  1873. } else {
  1874. nsect = inb(ioaddr->nsect_addr);
  1875. lbal = inb(ioaddr->lbal_addr);
  1876. }
  1877. if ((nsect == 1) && (lbal == 1))
  1878. break;
  1879. if (time_after(jiffies, timeout)) {
  1880. dev1 = 0;
  1881. break;
  1882. }
  1883. msleep(50); /* give drive a breather */
  1884. }
  1885. if (dev1)
  1886. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1887. /* is all this really necessary? */
  1888. ap->ops->dev_select(ap, 0);
  1889. if (dev1)
  1890. ap->ops->dev_select(ap, 1);
  1891. if (dev0)
  1892. ap->ops->dev_select(ap, 0);
  1893. }
  1894. static unsigned int ata_bus_softreset(struct ata_port *ap,
  1895. unsigned int devmask)
  1896. {
  1897. struct ata_ioports *ioaddr = &ap->ioaddr;
  1898. DPRINTK("ata%u: bus reset via SRST\n", ap->id);
  1899. /* software reset. causes dev0 to be selected */
  1900. if (ap->flags & ATA_FLAG_MMIO) {
  1901. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1902. udelay(20); /* FIXME: flush */
  1903. writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
  1904. udelay(20); /* FIXME: flush */
  1905. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1906. } else {
  1907. outb(ap->ctl, ioaddr->ctl_addr);
  1908. udelay(10);
  1909. outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
  1910. udelay(10);
  1911. outb(ap->ctl, ioaddr->ctl_addr);
  1912. }
  1913. /* spec mandates ">= 2ms" before checking status.
  1914. * We wait 150ms, because that was the magic delay used for
  1915. * ATAPI devices in Hale Landis's ATADRVR, for the period of time
  1916. * between when the ATA command register is written, and then
  1917. * status is checked. Because waiting for "a while" before
  1918. * checking status is fine, post SRST, we perform this magic
  1919. * delay here as well.
  1920. *
  1921. * Old drivers/ide uses the 2mS rule and then waits for ready
  1922. */
  1923. msleep(150);
  1924. /* Before we perform post reset processing we want to see if
  1925. * the bus shows 0xFF because the odd clown forgets the D7
  1926. * pulldown resistor.
  1927. */
  1928. if (ata_check_status(ap) == 0xFF)
  1929. return AC_ERR_OTHER;
  1930. ata_bus_post_reset(ap, devmask);
  1931. return 0;
  1932. }
  1933. /**
  1934. * ata_bus_reset - reset host port and associated ATA channel
  1935. * @ap: port to reset
  1936. *
  1937. * This is typically the first time we actually start issuing
  1938. * commands to the ATA channel. We wait for BSY to clear, then
  1939. * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
  1940. * result. Determine what devices, if any, are on the channel
  1941. * by looking at the device 0/1 error register. Look at the signature
  1942. * stored in each device's taskfile registers, to determine if
  1943. * the device is ATA or ATAPI.
  1944. *
  1945. * LOCKING:
  1946. * PCI/etc. bus probe sem.
  1947. * Obtains host_set lock.
  1948. *
  1949. * SIDE EFFECTS:
  1950. * Sets ATA_FLAG_DISABLED if bus reset fails.
  1951. */
  1952. void ata_bus_reset(struct ata_port *ap)
  1953. {
  1954. struct ata_ioports *ioaddr = &ap->ioaddr;
  1955. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  1956. u8 err;
  1957. unsigned int dev0, dev1 = 0, devmask = 0;
  1958. DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
  1959. /* determine if device 0/1 are present */
  1960. if (ap->flags & ATA_FLAG_SATA_RESET)
  1961. dev0 = 1;
  1962. else {
  1963. dev0 = ata_devchk(ap, 0);
  1964. if (slave_possible)
  1965. dev1 = ata_devchk(ap, 1);
  1966. }
  1967. if (dev0)
  1968. devmask |= (1 << 0);
  1969. if (dev1)
  1970. devmask |= (1 << 1);
  1971. /* select device 0 again */
  1972. ap->ops->dev_select(ap, 0);
  1973. /* issue bus reset */
  1974. if (ap->flags & ATA_FLAG_SRST)
  1975. if (ata_bus_softreset(ap, devmask))
  1976. goto err_out;
  1977. /*
  1978. * determine by signature whether we have ATA or ATAPI devices
  1979. */
  1980. ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
  1981. if ((slave_possible) && (err != 0x81))
  1982. ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
  1983. /* re-enable interrupts */
  1984. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  1985. ata_irq_on(ap);
  1986. /* is double-select really necessary? */
  1987. if (ap->device[1].class != ATA_DEV_NONE)
  1988. ap->ops->dev_select(ap, 1);
  1989. if (ap->device[0].class != ATA_DEV_NONE)
  1990. ap->ops->dev_select(ap, 0);
  1991. /* if no devices were detected, disable this port */
  1992. if ((ap->device[0].class == ATA_DEV_NONE) &&
  1993. (ap->device[1].class == ATA_DEV_NONE))
  1994. goto err_out;
  1995. if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
  1996. /* set up device control for ATA_FLAG_SATA_RESET */
  1997. if (ap->flags & ATA_FLAG_MMIO)
  1998. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1999. else
  2000. outb(ap->ctl, ioaddr->ctl_addr);
  2001. }
  2002. DPRINTK("EXIT\n");
  2003. return;
  2004. err_out:
  2005. printk(KERN_ERR "ata%u: disabling port\n", ap->id);
  2006. ap->ops->port_disable(ap);
  2007. DPRINTK("EXIT\n");
  2008. }
  2009. static int sata_phy_resume(struct ata_port *ap)
  2010. {
  2011. unsigned long timeout = jiffies + (HZ * 5);
  2012. u32 scontrol, sstatus;
  2013. scontrol = scr_read(ap, SCR_CONTROL);
  2014. scontrol = (scontrol & 0x0f0) | 0x300;
  2015. scr_write_flush(ap, SCR_CONTROL, scontrol);
  2016. /* Wait for phy to become ready, if necessary. */
  2017. do {
  2018. msleep(200);
  2019. sstatus = scr_read(ap, SCR_STATUS);
  2020. if ((sstatus & 0xf) != 1)
  2021. return 0;
  2022. } while (time_before(jiffies, timeout));
  2023. return -1;
  2024. }
  2025. /**
  2026. * ata_std_probeinit - initialize probing
  2027. * @ap: port to be probed
  2028. *
  2029. * @ap is about to be probed. Initialize it. This function is
  2030. * to be used as standard callback for ata_drive_probe_reset().
  2031. *
  2032. * NOTE!!! Do not use this function as probeinit if a low level
  2033. * driver implements only hardreset. Just pass NULL as probeinit
  2034. * in that case. Using this function is probably okay but doing
  2035. * so makes reset sequence different from the original
  2036. * ->phy_reset implementation and Jeff nervous. :-P
  2037. */
  2038. void ata_std_probeinit(struct ata_port *ap)
  2039. {
  2040. if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
  2041. u32 spd;
  2042. sata_phy_resume(ap);
  2043. spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
  2044. if (spd)
  2045. ap->sata_spd_limit &= (1 << spd) - 1;
  2046. if (sata_dev_present(ap))
  2047. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  2048. }
  2049. }
  2050. /**
  2051. * ata_std_softreset - reset host port via ATA SRST
  2052. * @ap: port to reset
  2053. * @verbose: fail verbosely
  2054. * @classes: resulting classes of attached devices
  2055. *
  2056. * Reset host port using ATA SRST. This function is to be used
  2057. * as standard callback for ata_drive_*_reset() functions.
  2058. *
  2059. * LOCKING:
  2060. * Kernel thread context (may sleep)
  2061. *
  2062. * RETURNS:
  2063. * 0 on success, -errno otherwise.
  2064. */
  2065. int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
  2066. {
  2067. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2068. unsigned int devmask = 0, err_mask;
  2069. u8 err;
  2070. DPRINTK("ENTER\n");
  2071. if (ap->ops->scr_read && !sata_dev_present(ap)) {
  2072. classes[0] = ATA_DEV_NONE;
  2073. goto out;
  2074. }
  2075. /* determine if device 0/1 are present */
  2076. if (ata_devchk(ap, 0))
  2077. devmask |= (1 << 0);
  2078. if (slave_possible && ata_devchk(ap, 1))
  2079. devmask |= (1 << 1);
  2080. /* select device 0 again */
  2081. ap->ops->dev_select(ap, 0);
  2082. /* issue bus reset */
  2083. DPRINTK("about to softreset, devmask=%x\n", devmask);
  2084. err_mask = ata_bus_softreset(ap, devmask);
  2085. if (err_mask) {
  2086. if (verbose)
  2087. printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
  2088. ap->id, err_mask);
  2089. else
  2090. DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
  2091. err_mask);
  2092. return -EIO;
  2093. }
  2094. /* determine by signature whether we have ATA or ATAPI devices */
  2095. classes[0] = ata_dev_try_classify(ap, 0, &err);
  2096. if (slave_possible && err != 0x81)
  2097. classes[1] = ata_dev_try_classify(ap, 1, &err);
  2098. out:
  2099. DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
  2100. return 0;
  2101. }
  2102. /**
  2103. * sata_std_hardreset - reset host port via SATA phy reset
  2104. * @ap: port to reset
  2105. * @verbose: fail verbosely
  2106. * @class: resulting class of attached device
  2107. *
  2108. * SATA phy-reset host port using DET bits of SControl register.
  2109. * This function is to be used as standard callback for
  2110. * ata_drive_*_reset().
  2111. *
  2112. * LOCKING:
  2113. * Kernel thread context (may sleep)
  2114. *
  2115. * RETURNS:
  2116. * 0 on success, -errno otherwise.
  2117. */
  2118. int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
  2119. {
  2120. u32 scontrol;
  2121. DPRINTK("ENTER\n");
  2122. if (ata_set_sata_spd_needed(ap)) {
  2123. /* SATA spec says nothing about how to reconfigure
  2124. * spd. To be on the safe side, turn off phy during
  2125. * reconfiguration. This works for at least ICH7 AHCI
  2126. * and Sil3124.
  2127. */
  2128. scontrol = scr_read(ap, SCR_CONTROL);
  2129. scontrol = (scontrol & 0x0f0) | 0x302;
  2130. scr_write_flush(ap, SCR_CONTROL, scontrol);
  2131. ata_set_sata_spd(ap);
  2132. }
  2133. /* issue phy wake/reset */
  2134. scontrol = scr_read(ap, SCR_CONTROL);
  2135. scontrol = (scontrol & 0x0f0) | 0x301;
  2136. scr_write_flush(ap, SCR_CONTROL, scontrol);
  2137. /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
  2138. * 10.4.2 says at least 1 ms.
  2139. */
  2140. msleep(1);
  2141. /* bring phy back */
  2142. sata_phy_resume(ap);
  2143. /* TODO: phy layer with polling, timeouts, etc. */
  2144. if (!sata_dev_present(ap)) {
  2145. *class = ATA_DEV_NONE;
  2146. DPRINTK("EXIT, link offline\n");
  2147. return 0;
  2148. }
  2149. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  2150. if (verbose)
  2151. printk(KERN_ERR "ata%u: COMRESET failed "
  2152. "(device not ready)\n", ap->id);
  2153. else
  2154. DPRINTK("EXIT, device not ready\n");
  2155. return -EIO;
  2156. }
  2157. ap->ops->dev_select(ap, 0); /* probably unnecessary */
  2158. *class = ata_dev_try_classify(ap, 0, NULL);
  2159. DPRINTK("EXIT, class=%u\n", *class);
  2160. return 0;
  2161. }
  2162. /**
  2163. * ata_std_postreset - standard postreset callback
  2164. * @ap: the target ata_port
  2165. * @classes: classes of attached devices
  2166. *
  2167. * This function is invoked after a successful reset. Note that
  2168. * the device might have been reset more than once using
  2169. * different reset methods before postreset is invoked.
  2170. *
  2171. * This function is to be used as standard callback for
  2172. * ata_drive_*_reset().
  2173. *
  2174. * LOCKING:
  2175. * Kernel thread context (may sleep)
  2176. */
  2177. void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
  2178. {
  2179. DPRINTK("ENTER\n");
  2180. /* set cable type if it isn't already set */
  2181. if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
  2182. ap->cbl = ATA_CBL_SATA;
  2183. /* print link status */
  2184. if (ap->cbl == ATA_CBL_SATA)
  2185. sata_print_link_status(ap);
  2186. /* re-enable interrupts */
  2187. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  2188. ata_irq_on(ap);
  2189. /* is double-select really necessary? */
  2190. if (classes[0] != ATA_DEV_NONE)
  2191. ap->ops->dev_select(ap, 1);
  2192. if (classes[1] != ATA_DEV_NONE)
  2193. ap->ops->dev_select(ap, 0);
  2194. /* bail out if no device is present */
  2195. if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
  2196. DPRINTK("EXIT, no device\n");
  2197. return;
  2198. }
  2199. /* set up device control */
  2200. if (ap->ioaddr.ctl_addr) {
  2201. if (ap->flags & ATA_FLAG_MMIO)
  2202. writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
  2203. else
  2204. outb(ap->ctl, ap->ioaddr.ctl_addr);
  2205. }
  2206. DPRINTK("EXIT\n");
  2207. }
  2208. /**
  2209. * ata_std_probe_reset - standard probe reset method
  2210. * @ap: prot to perform probe-reset
  2211. * @classes: resulting classes of attached devices
  2212. *
  2213. * The stock off-the-shelf ->probe_reset method.
  2214. *
  2215. * LOCKING:
  2216. * Kernel thread context (may sleep)
  2217. *
  2218. * RETURNS:
  2219. * 0 on success, -errno otherwise.
  2220. */
  2221. int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
  2222. {
  2223. ata_reset_fn_t hardreset;
  2224. hardreset = NULL;
  2225. if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
  2226. hardreset = sata_std_hardreset;
  2227. return ata_drive_probe_reset(ap, ata_std_probeinit,
  2228. ata_std_softreset, hardreset,
  2229. ata_std_postreset, classes);
  2230. }
  2231. int ata_do_reset(struct ata_port *ap,
  2232. ata_reset_fn_t reset, ata_postreset_fn_t postreset,
  2233. int verbose, unsigned int *classes)
  2234. {
  2235. int i, rc;
  2236. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2237. classes[i] = ATA_DEV_UNKNOWN;
  2238. rc = reset(ap, verbose, classes);
  2239. if (rc)
  2240. return rc;
  2241. /* If any class isn't ATA_DEV_UNKNOWN, consider classification
  2242. * is complete and convert all ATA_DEV_UNKNOWN to
  2243. * ATA_DEV_NONE.
  2244. */
  2245. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2246. if (classes[i] != ATA_DEV_UNKNOWN)
  2247. break;
  2248. if (i < ATA_MAX_DEVICES)
  2249. for (i = 0; i < ATA_MAX_DEVICES; i++)
  2250. if (classes[i] == ATA_DEV_UNKNOWN)
  2251. classes[i] = ATA_DEV_NONE;
  2252. if (postreset)
  2253. postreset(ap, classes);
  2254. return 0;
  2255. }
  2256. /**
  2257. * ata_drive_probe_reset - Perform probe reset with given methods
  2258. * @ap: port to reset
  2259. * @probeinit: probeinit method (can be NULL)
  2260. * @softreset: softreset method (can be NULL)
  2261. * @hardreset: hardreset method (can be NULL)
  2262. * @postreset: postreset method (can be NULL)
  2263. * @classes: resulting classes of attached devices
  2264. *
  2265. * Reset the specified port and classify attached devices using
  2266. * given methods. This function prefers softreset but tries all
  2267. * possible reset sequences to reset and classify devices. This
  2268. * function is intended to be used for constructing ->probe_reset
  2269. * callback by low level drivers.
  2270. *
  2271. * Reset methods should follow the following rules.
  2272. *
  2273. * - Return 0 on sucess, -errno on failure.
  2274. * - If classification is supported, fill classes[] with
  2275. * recognized class codes.
  2276. * - If classification is not supported, leave classes[] alone.
  2277. * - If verbose is non-zero, print error message on failure;
  2278. * otherwise, shut up.
  2279. *
  2280. * LOCKING:
  2281. * Kernel thread context (may sleep)
  2282. *
  2283. * RETURNS:
  2284. * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
  2285. * if classification fails, and any error code from reset
  2286. * methods.
  2287. */
  2288. int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
  2289. ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
  2290. ata_postreset_fn_t postreset, unsigned int *classes)
  2291. {
  2292. int rc = -EINVAL;
  2293. if (probeinit)
  2294. probeinit(ap);
  2295. if (softreset && !ata_set_sata_spd_needed(ap)) {
  2296. rc = ata_do_reset(ap, softreset, postreset, 0, classes);
  2297. if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
  2298. goto done;
  2299. printk(KERN_INFO "ata%u: softreset failed, will try "
  2300. "hardreset in 5 secs\n", ap->id);
  2301. ssleep(5);
  2302. }
  2303. if (!hardreset)
  2304. goto done;
  2305. while (1) {
  2306. rc = ata_do_reset(ap, hardreset, postreset, 0, classes);
  2307. if (rc == 0) {
  2308. if (classes[0] != ATA_DEV_UNKNOWN)
  2309. goto done;
  2310. break;
  2311. }
  2312. if (ata_down_sata_spd_limit(ap))
  2313. goto done;
  2314. printk(KERN_INFO "ata%u: hardreset failed, will retry "
  2315. "in 5 secs\n", ap->id);
  2316. ssleep(5);
  2317. }
  2318. if (softreset) {
  2319. printk(KERN_INFO "ata%u: hardreset succeeded without "
  2320. "classification, will retry softreset in 5 secs\n",
  2321. ap->id);
  2322. ssleep(5);
  2323. rc = ata_do_reset(ap, softreset, postreset, 0, classes);
  2324. }
  2325. done:
  2326. if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
  2327. rc = -ENODEV;
  2328. return rc;
  2329. }
  2330. /**
  2331. * ata_dev_same_device - Determine whether new ID matches configured device
  2332. * @ap: port on which the device to compare against resides
  2333. * @dev: device to compare against
  2334. * @new_class: class of the new device
  2335. * @new_id: IDENTIFY page of the new device
  2336. *
  2337. * Compare @new_class and @new_id against @dev and determine
  2338. * whether @dev is the device indicated by @new_class and
  2339. * @new_id.
  2340. *
  2341. * LOCKING:
  2342. * None.
  2343. *
  2344. * RETURNS:
  2345. * 1 if @dev matches @new_class and @new_id, 0 otherwise.
  2346. */
  2347. static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
  2348. unsigned int new_class, const u16 *new_id)
  2349. {
  2350. const u16 *old_id = dev->id;
  2351. unsigned char model[2][41], serial[2][21];
  2352. u64 new_n_sectors;
  2353. if (dev->class != new_class) {
  2354. printk(KERN_INFO
  2355. "ata%u: dev %u class mismatch %d != %d\n",
  2356. ap->id, dev->devno, dev->class, new_class);
  2357. return 0;
  2358. }
  2359. ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
  2360. ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
  2361. ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
  2362. ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
  2363. new_n_sectors = ata_id_n_sectors(new_id);
  2364. if (strcmp(model[0], model[1])) {
  2365. printk(KERN_INFO
  2366. "ata%u: dev %u model number mismatch '%s' != '%s'\n",
  2367. ap->id, dev->devno, model[0], model[1]);
  2368. return 0;
  2369. }
  2370. if (strcmp(serial[0], serial[1])) {
  2371. printk(KERN_INFO
  2372. "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
  2373. ap->id, dev->devno, serial[0], serial[1]);
  2374. return 0;
  2375. }
  2376. if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
  2377. printk(KERN_INFO
  2378. "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
  2379. ap->id, dev->devno, (unsigned long long)dev->n_sectors,
  2380. (unsigned long long)new_n_sectors);
  2381. return 0;
  2382. }
  2383. return 1;
  2384. }
  2385. /**
  2386. * ata_dev_revalidate - Revalidate ATA device
  2387. * @ap: port on which the device to revalidate resides
  2388. * @dev: device to revalidate
  2389. * @post_reset: is this revalidation after reset?
  2390. *
  2391. * Re-read IDENTIFY page and make sure @dev is still attached to
  2392. * the port.
  2393. *
  2394. * LOCKING:
  2395. * Kernel thread context (may sleep)
  2396. *
  2397. * RETURNS:
  2398. * 0 on success, negative errno otherwise
  2399. */
  2400. int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
  2401. int post_reset)
  2402. {
  2403. unsigned int class = dev->class;
  2404. u16 *id = NULL;
  2405. int rc;
  2406. if (!ata_dev_enabled(dev)) {
  2407. rc = -ENODEV;
  2408. goto fail;
  2409. }
  2410. /* allocate & read ID data */
  2411. rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
  2412. if (rc)
  2413. goto fail;
  2414. /* is the device still there? */
  2415. if (!ata_dev_same_device(ap, dev, class, id)) {
  2416. rc = -ENODEV;
  2417. goto fail;
  2418. }
  2419. kfree(dev->id);
  2420. dev->id = id;
  2421. /* configure device according to the new ID */
  2422. rc = ata_dev_configure(ap, dev, 0);
  2423. if (rc == 0)
  2424. return 0;
  2425. fail:
  2426. printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
  2427. ap->id, dev->devno, rc);
  2428. kfree(id);
  2429. return rc;
  2430. }
  2431. static const char * const ata_dma_blacklist [] = {
  2432. "WDC AC11000H", NULL,
  2433. "WDC AC22100H", NULL,
  2434. "WDC AC32500H", NULL,
  2435. "WDC AC33100H", NULL,
  2436. "WDC AC31600H", NULL,
  2437. "WDC AC32100H", "24.09P07",
  2438. "WDC AC23200L", "21.10N21",
  2439. "Compaq CRD-8241B", NULL,
  2440. "CRD-8400B", NULL,
  2441. "CRD-8480B", NULL,
  2442. "CRD-8482B", NULL,
  2443. "CRD-84", NULL,
  2444. "SanDisk SDP3B", NULL,
  2445. "SanDisk SDP3B-64", NULL,
  2446. "SANYO CD-ROM CRD", NULL,
  2447. "HITACHI CDR-8", NULL,
  2448. "HITACHI CDR-8335", NULL,
  2449. "HITACHI CDR-8435", NULL,
  2450. "Toshiba CD-ROM XM-6202B", NULL,
  2451. "TOSHIBA CD-ROM XM-1702BC", NULL,
  2452. "CD-532E-A", NULL,
  2453. "E-IDE CD-ROM CR-840", NULL,
  2454. "CD-ROM Drive/F5A", NULL,
  2455. "WPI CDD-820", NULL,
  2456. "SAMSUNG CD-ROM SC-148C", NULL,
  2457. "SAMSUNG CD-ROM SC", NULL,
  2458. "SanDisk SDP3B-64", NULL,
  2459. "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
  2460. "_NEC DV5800A", NULL,
  2461. "SAMSUNG CD-ROM SN-124", "N001"
  2462. };
  2463. static int ata_strim(char *s, size_t len)
  2464. {
  2465. len = strnlen(s, len);
  2466. /* ATAPI specifies that empty space is blank-filled; remove blanks */
  2467. while ((len > 0) && (s[len - 1] == ' ')) {
  2468. len--;
  2469. s[len] = 0;
  2470. }
  2471. return len;
  2472. }
  2473. static int ata_dma_blacklisted(const struct ata_device *dev)
  2474. {
  2475. unsigned char model_num[40];
  2476. unsigned char model_rev[16];
  2477. unsigned int nlen, rlen;
  2478. int i;
  2479. ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
  2480. sizeof(model_num));
  2481. ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
  2482. sizeof(model_rev));
  2483. nlen = ata_strim(model_num, sizeof(model_num));
  2484. rlen = ata_strim(model_rev, sizeof(model_rev));
  2485. for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
  2486. if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
  2487. if (ata_dma_blacklist[i+1] == NULL)
  2488. return 1;
  2489. if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
  2490. return 1;
  2491. }
  2492. }
  2493. return 0;
  2494. }
  2495. /**
  2496. * ata_dev_xfermask - Compute supported xfermask of the given device
  2497. * @ap: Port on which the device to compute xfermask for resides
  2498. * @dev: Device to compute xfermask for
  2499. *
  2500. * Compute supported xfermask of @dev and store it in
  2501. * dev->*_mask. This function is responsible for applying all
  2502. * known limits including host controller limits, device
  2503. * blacklist, etc...
  2504. *
  2505. * FIXME: The current implementation limits all transfer modes to
  2506. * the fastest of the lowested device on the port. This is not
  2507. * required on most controllers.
  2508. *
  2509. * LOCKING:
  2510. * None.
  2511. */
  2512. static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
  2513. {
  2514. struct ata_host_set *hs = ap->host_set;
  2515. unsigned long xfer_mask;
  2516. int i;
  2517. xfer_mask = ata_pack_xfermask(ap->pio_mask,
  2518. ap->mwdma_mask, ap->udma_mask);
  2519. /* Apply cable rule here. Don't apply it early because when
  2520. * we handle hot plug the cable type can itself change.
  2521. */
  2522. if (ap->cbl == ATA_CBL_PATA40)
  2523. xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
  2524. /* FIXME: Use port-wide xfermask for now */
  2525. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  2526. struct ata_device *d = &ap->device[i];
  2527. if (ata_dev_absent(d))
  2528. continue;
  2529. if (ata_dev_disabled(d)) {
  2530. /* to avoid violating device selection timing */
  2531. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2532. UINT_MAX, UINT_MAX);
  2533. continue;
  2534. }
  2535. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2536. d->mwdma_mask, d->udma_mask);
  2537. xfer_mask &= ata_id_xfermask(d->id);
  2538. if (ata_dma_blacklisted(d))
  2539. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2540. }
  2541. if (ata_dma_blacklisted(dev))
  2542. printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
  2543. "disabling DMA\n", ap->id, dev->devno);
  2544. if (hs->flags & ATA_HOST_SIMPLEX) {
  2545. if (hs->simplex_claimed)
  2546. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2547. }
  2548. if (ap->ops->mode_filter)
  2549. xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
  2550. ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
  2551. &dev->mwdma_mask, &dev->udma_mask);
  2552. }
  2553. /**
  2554. * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
  2555. * @ap: Port associated with device @dev
  2556. * @dev: Device to which command will be sent
  2557. *
  2558. * Issue SET FEATURES - XFER MODE command to device @dev
  2559. * on port @ap.
  2560. *
  2561. * LOCKING:
  2562. * PCI/etc. bus probe sem.
  2563. *
  2564. * RETURNS:
  2565. * 0 on success, AC_ERR_* mask otherwise.
  2566. */
  2567. static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
  2568. struct ata_device *dev)
  2569. {
  2570. struct ata_taskfile tf;
  2571. unsigned int err_mask;
  2572. /* set up set-features taskfile */
  2573. DPRINTK("set features - xfer mode\n");
  2574. ata_tf_init(ap, &tf, dev->devno);
  2575. tf.command = ATA_CMD_SET_FEATURES;
  2576. tf.feature = SETFEATURES_XFER;
  2577. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2578. tf.protocol = ATA_PROT_NODATA;
  2579. tf.nsect = dev->xfer_mode;
  2580. err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
  2581. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2582. return err_mask;
  2583. }
  2584. /**
  2585. * ata_dev_init_params - Issue INIT DEV PARAMS command
  2586. * @ap: Port associated with device @dev
  2587. * @dev: Device to which command will be sent
  2588. *
  2589. * LOCKING:
  2590. * Kernel thread context (may sleep)
  2591. *
  2592. * RETURNS:
  2593. * 0 on success, AC_ERR_* mask otherwise.
  2594. */
  2595. static unsigned int ata_dev_init_params(struct ata_port *ap,
  2596. struct ata_device *dev,
  2597. u16 heads,
  2598. u16 sectors)
  2599. {
  2600. struct ata_taskfile tf;
  2601. unsigned int err_mask;
  2602. /* Number of sectors per track 1-255. Number of heads 1-16 */
  2603. if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
  2604. return AC_ERR_INVALID;
  2605. /* set up init dev params taskfile */
  2606. DPRINTK("init dev params \n");
  2607. ata_tf_init(ap, &tf, dev->devno);
  2608. tf.command = ATA_CMD_INIT_DEV_PARAMS;
  2609. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2610. tf.protocol = ATA_PROT_NODATA;
  2611. tf.nsect = sectors;
  2612. tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
  2613. err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
  2614. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2615. return err_mask;
  2616. }
  2617. /**
  2618. * ata_sg_clean - Unmap DMA memory associated with command
  2619. * @qc: Command containing DMA memory to be released
  2620. *
  2621. * Unmap all mapped DMA memory associated with this command.
  2622. *
  2623. * LOCKING:
  2624. * spin_lock_irqsave(host_set lock)
  2625. */
  2626. static void ata_sg_clean(struct ata_queued_cmd *qc)
  2627. {
  2628. struct ata_port *ap = qc->ap;
  2629. struct scatterlist *sg = qc->__sg;
  2630. int dir = qc->dma_dir;
  2631. void *pad_buf = NULL;
  2632. WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
  2633. WARN_ON(sg == NULL);
  2634. if (qc->flags & ATA_QCFLAG_SINGLE)
  2635. WARN_ON(qc->n_elem > 1);
  2636. VPRINTK("unmapping %u sg elements\n", qc->n_elem);
  2637. /* if we padded the buffer out to 32-bit bound, and data
  2638. * xfer direction is from-device, we must copy from the
  2639. * pad buffer back into the supplied buffer
  2640. */
  2641. if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
  2642. pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2643. if (qc->flags & ATA_QCFLAG_SG) {
  2644. if (qc->n_elem)
  2645. dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
  2646. /* restore last sg */
  2647. sg[qc->orig_n_elem - 1].length += qc->pad_len;
  2648. if (pad_buf) {
  2649. struct scatterlist *psg = &qc->pad_sgent;
  2650. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2651. memcpy(addr + psg->offset, pad_buf, qc->pad_len);
  2652. kunmap_atomic(addr, KM_IRQ0);
  2653. }
  2654. } else {
  2655. if (qc->n_elem)
  2656. dma_unmap_single(ap->dev,
  2657. sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
  2658. dir);
  2659. /* restore sg */
  2660. sg->length += qc->pad_len;
  2661. if (pad_buf)
  2662. memcpy(qc->buf_virt + sg->length - qc->pad_len,
  2663. pad_buf, qc->pad_len);
  2664. }
  2665. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  2666. qc->__sg = NULL;
  2667. }
  2668. /**
  2669. * ata_fill_sg - Fill PCI IDE PRD table
  2670. * @qc: Metadata associated with taskfile to be transferred
  2671. *
  2672. * Fill PCI IDE PRD (scatter-gather) table with segments
  2673. * associated with the current disk command.
  2674. *
  2675. * LOCKING:
  2676. * spin_lock_irqsave(host_set lock)
  2677. *
  2678. */
  2679. static void ata_fill_sg(struct ata_queued_cmd *qc)
  2680. {
  2681. struct ata_port *ap = qc->ap;
  2682. struct scatterlist *sg;
  2683. unsigned int idx;
  2684. WARN_ON(qc->__sg == NULL);
  2685. WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
  2686. idx = 0;
  2687. ata_for_each_sg(sg, qc) {
  2688. u32 addr, offset;
  2689. u32 sg_len, len;
  2690. /* determine if physical DMA addr spans 64K boundary.
  2691. * Note h/w doesn't support 64-bit, so we unconditionally
  2692. * truncate dma_addr_t to u32.
  2693. */
  2694. addr = (u32) sg_dma_address(sg);
  2695. sg_len = sg_dma_len(sg);
  2696. while (sg_len) {
  2697. offset = addr & 0xffff;
  2698. len = sg_len;
  2699. if ((offset + sg_len) > 0x10000)
  2700. len = 0x10000 - offset;
  2701. ap->prd[idx].addr = cpu_to_le32(addr);
  2702. ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
  2703. VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
  2704. idx++;
  2705. sg_len -= len;
  2706. addr += len;
  2707. }
  2708. }
  2709. if (idx)
  2710. ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
  2711. }
  2712. /**
  2713. * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
  2714. * @qc: Metadata associated with taskfile to check
  2715. *
  2716. * Allow low-level driver to filter ATA PACKET commands, returning
  2717. * a status indicating whether or not it is OK to use DMA for the
  2718. * supplied PACKET command.
  2719. *
  2720. * LOCKING:
  2721. * spin_lock_irqsave(host_set lock)
  2722. *
  2723. * RETURNS: 0 when ATAPI DMA can be used
  2724. * nonzero otherwise
  2725. */
  2726. int ata_check_atapi_dma(struct ata_queued_cmd *qc)
  2727. {
  2728. struct ata_port *ap = qc->ap;
  2729. int rc = 0; /* Assume ATAPI DMA is OK by default */
  2730. if (ap->ops->check_atapi_dma)
  2731. rc = ap->ops->check_atapi_dma(qc);
  2732. /* We don't support polling DMA.
  2733. * Use PIO if the LLDD handles only interrupts in
  2734. * the HSM_ST_LAST state and the ATAPI device
  2735. * generates CDB interrupts.
  2736. */
  2737. if ((ap->flags & ATA_FLAG_PIO_POLLING) &&
  2738. (qc->dev->flags & ATA_DFLAG_CDB_INTR))
  2739. rc = 1;
  2740. return rc;
  2741. }
  2742. /**
  2743. * ata_qc_prep - Prepare taskfile for submission
  2744. * @qc: Metadata associated with taskfile to be prepared
  2745. *
  2746. * Prepare ATA taskfile for submission.
  2747. *
  2748. * LOCKING:
  2749. * spin_lock_irqsave(host_set lock)
  2750. */
  2751. void ata_qc_prep(struct ata_queued_cmd *qc)
  2752. {
  2753. if (!(qc->flags & ATA_QCFLAG_DMAMAP))
  2754. return;
  2755. ata_fill_sg(qc);
  2756. }
  2757. void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
  2758. /**
  2759. * ata_sg_init_one - Associate command with memory buffer
  2760. * @qc: Command to be associated
  2761. * @buf: Memory buffer
  2762. * @buflen: Length of memory buffer, in bytes.
  2763. *
  2764. * Initialize the data-related elements of queued_cmd @qc
  2765. * to point to a single memory buffer, @buf of byte length @buflen.
  2766. *
  2767. * LOCKING:
  2768. * spin_lock_irqsave(host_set lock)
  2769. */
  2770. void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
  2771. {
  2772. struct scatterlist *sg;
  2773. qc->flags |= ATA_QCFLAG_SINGLE;
  2774. memset(&qc->sgent, 0, sizeof(qc->sgent));
  2775. qc->__sg = &qc->sgent;
  2776. qc->n_elem = 1;
  2777. qc->orig_n_elem = 1;
  2778. qc->buf_virt = buf;
  2779. sg = qc->__sg;
  2780. sg_init_one(sg, buf, buflen);
  2781. }
  2782. /**
  2783. * ata_sg_init - Associate command with scatter-gather table.
  2784. * @qc: Command to be associated
  2785. * @sg: Scatter-gather table.
  2786. * @n_elem: Number of elements in s/g table.
  2787. *
  2788. * Initialize the data-related elements of queued_cmd @qc
  2789. * to point to a scatter-gather table @sg, containing @n_elem
  2790. * elements.
  2791. *
  2792. * LOCKING:
  2793. * spin_lock_irqsave(host_set lock)
  2794. */
  2795. void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
  2796. unsigned int n_elem)
  2797. {
  2798. qc->flags |= ATA_QCFLAG_SG;
  2799. qc->__sg = sg;
  2800. qc->n_elem = n_elem;
  2801. qc->orig_n_elem = n_elem;
  2802. }
  2803. /**
  2804. * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
  2805. * @qc: Command with memory buffer to be mapped.
  2806. *
  2807. * DMA-map the memory buffer associated with queued_cmd @qc.
  2808. *
  2809. * LOCKING:
  2810. * spin_lock_irqsave(host_set lock)
  2811. *
  2812. * RETURNS:
  2813. * Zero on success, negative on error.
  2814. */
  2815. static int ata_sg_setup_one(struct ata_queued_cmd *qc)
  2816. {
  2817. struct ata_port *ap = qc->ap;
  2818. int dir = qc->dma_dir;
  2819. struct scatterlist *sg = qc->__sg;
  2820. dma_addr_t dma_address;
  2821. int trim_sg = 0;
  2822. /* we must lengthen transfers to end on a 32-bit boundary */
  2823. qc->pad_len = sg->length & 3;
  2824. if (qc->pad_len) {
  2825. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2826. struct scatterlist *psg = &qc->pad_sgent;
  2827. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2828. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2829. if (qc->tf.flags & ATA_TFLAG_WRITE)
  2830. memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
  2831. qc->pad_len);
  2832. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2833. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2834. /* trim sg */
  2835. sg->length -= qc->pad_len;
  2836. if (sg->length == 0)
  2837. trim_sg = 1;
  2838. DPRINTK("padding done, sg->length=%u pad_len=%u\n",
  2839. sg->length, qc->pad_len);
  2840. }
  2841. if (trim_sg) {
  2842. qc->n_elem--;
  2843. goto skip_map;
  2844. }
  2845. dma_address = dma_map_single(ap->dev, qc->buf_virt,
  2846. sg->length, dir);
  2847. if (dma_mapping_error(dma_address)) {
  2848. /* restore sg */
  2849. sg->length += qc->pad_len;
  2850. return -1;
  2851. }
  2852. sg_dma_address(sg) = dma_address;
  2853. sg_dma_len(sg) = sg->length;
  2854. skip_map:
  2855. DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
  2856. qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  2857. return 0;
  2858. }
  2859. /**
  2860. * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
  2861. * @qc: Command with scatter-gather table to be mapped.
  2862. *
  2863. * DMA-map the scatter-gather table associated with queued_cmd @qc.
  2864. *
  2865. * LOCKING:
  2866. * spin_lock_irqsave(host_set lock)
  2867. *
  2868. * RETURNS:
  2869. * Zero on success, negative on error.
  2870. *
  2871. */
  2872. static int ata_sg_setup(struct ata_queued_cmd *qc)
  2873. {
  2874. struct ata_port *ap = qc->ap;
  2875. struct scatterlist *sg = qc->__sg;
  2876. struct scatterlist *lsg = &sg[qc->n_elem - 1];
  2877. int n_elem, pre_n_elem, dir, trim_sg = 0;
  2878. VPRINTK("ENTER, ata%u\n", ap->id);
  2879. WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
  2880. /* we must lengthen transfers to end on a 32-bit boundary */
  2881. qc->pad_len = lsg->length & 3;
  2882. if (qc->pad_len) {
  2883. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2884. struct scatterlist *psg = &qc->pad_sgent;
  2885. unsigned int offset;
  2886. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2887. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2888. /*
  2889. * psg->page/offset are used to copy to-be-written
  2890. * data in this function or read data in ata_sg_clean.
  2891. */
  2892. offset = lsg->offset + lsg->length - qc->pad_len;
  2893. psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
  2894. psg->offset = offset_in_page(offset);
  2895. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  2896. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2897. memcpy(pad_buf, addr + psg->offset, qc->pad_len);
  2898. kunmap_atomic(addr, KM_IRQ0);
  2899. }
  2900. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2901. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2902. /* trim last sg */
  2903. lsg->length -= qc->pad_len;
  2904. if (lsg->length == 0)
  2905. trim_sg = 1;
  2906. DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
  2907. qc->n_elem - 1, lsg->length, qc->pad_len);
  2908. }
  2909. pre_n_elem = qc->n_elem;
  2910. if (trim_sg && pre_n_elem)
  2911. pre_n_elem--;
  2912. if (!pre_n_elem) {
  2913. n_elem = 0;
  2914. goto skip_map;
  2915. }
  2916. dir = qc->dma_dir;
  2917. n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
  2918. if (n_elem < 1) {
  2919. /* restore last sg */
  2920. lsg->length += qc->pad_len;
  2921. return -1;
  2922. }
  2923. DPRINTK("%d sg elements mapped\n", n_elem);
  2924. skip_map:
  2925. qc->n_elem = n_elem;
  2926. return 0;
  2927. }
  2928. /**
  2929. * ata_poll_qc_complete - turn irq back on and finish qc
  2930. * @qc: Command to complete
  2931. * @err_mask: ATA status register content
  2932. *
  2933. * LOCKING:
  2934. * None. (grabs host lock)
  2935. */
  2936. void ata_poll_qc_complete(struct ata_queued_cmd *qc)
  2937. {
  2938. struct ata_port *ap = qc->ap;
  2939. unsigned long flags;
  2940. spin_lock_irqsave(&ap->host_set->lock, flags);
  2941. ata_irq_on(ap);
  2942. ata_qc_complete(qc);
  2943. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  2944. }
  2945. /**
  2946. * swap_buf_le16 - swap halves of 16-bit words in place
  2947. * @buf: Buffer to swap
  2948. * @buf_words: Number of 16-bit words in buffer.
  2949. *
  2950. * Swap halves of 16-bit words if needed to convert from
  2951. * little-endian byte order to native cpu byte order, or
  2952. * vice-versa.
  2953. *
  2954. * LOCKING:
  2955. * Inherited from caller.
  2956. */
  2957. void swap_buf_le16(u16 *buf, unsigned int buf_words)
  2958. {
  2959. #ifdef __BIG_ENDIAN
  2960. unsigned int i;
  2961. for (i = 0; i < buf_words; i++)
  2962. buf[i] = le16_to_cpu(buf[i]);
  2963. #endif /* __BIG_ENDIAN */
  2964. }
  2965. /**
  2966. * ata_mmio_data_xfer - Transfer data by MMIO
  2967. * @ap: port to read/write
  2968. * @buf: data buffer
  2969. * @buflen: buffer length
  2970. * @write_data: read/write
  2971. *
  2972. * Transfer data from/to the device data register by MMIO.
  2973. *
  2974. * LOCKING:
  2975. * Inherited from caller.
  2976. */
  2977. static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
  2978. unsigned int buflen, int write_data)
  2979. {
  2980. unsigned int i;
  2981. unsigned int words = buflen >> 1;
  2982. u16 *buf16 = (u16 *) buf;
  2983. void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
  2984. /* Transfer multiple of 2 bytes */
  2985. if (write_data) {
  2986. for (i = 0; i < words; i++)
  2987. writew(le16_to_cpu(buf16[i]), mmio);
  2988. } else {
  2989. for (i = 0; i < words; i++)
  2990. buf16[i] = cpu_to_le16(readw(mmio));
  2991. }
  2992. /* Transfer trailing 1 byte, if any. */
  2993. if (unlikely(buflen & 0x01)) {
  2994. u16 align_buf[1] = { 0 };
  2995. unsigned char *trailing_buf = buf + buflen - 1;
  2996. if (write_data) {
  2997. memcpy(align_buf, trailing_buf, 1);
  2998. writew(le16_to_cpu(align_buf[0]), mmio);
  2999. } else {
  3000. align_buf[0] = cpu_to_le16(readw(mmio));
  3001. memcpy(trailing_buf, align_buf, 1);
  3002. }
  3003. }
  3004. }
  3005. /**
  3006. * ata_pio_data_xfer - Transfer data by PIO
  3007. * @ap: port to read/write
  3008. * @buf: data buffer
  3009. * @buflen: buffer length
  3010. * @write_data: read/write
  3011. *
  3012. * Transfer data from/to the device data register by PIO.
  3013. *
  3014. * LOCKING:
  3015. * Inherited from caller.
  3016. */
  3017. static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
  3018. unsigned int buflen, int write_data)
  3019. {
  3020. unsigned int words = buflen >> 1;
  3021. /* Transfer multiple of 2 bytes */
  3022. if (write_data)
  3023. outsw(ap->ioaddr.data_addr, buf, words);
  3024. else
  3025. insw(ap->ioaddr.data_addr, buf, words);
  3026. /* Transfer trailing 1 byte, if any. */
  3027. if (unlikely(buflen & 0x01)) {
  3028. u16 align_buf[1] = { 0 };
  3029. unsigned char *trailing_buf = buf + buflen - 1;
  3030. if (write_data) {
  3031. memcpy(align_buf, trailing_buf, 1);
  3032. outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
  3033. } else {
  3034. align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
  3035. memcpy(trailing_buf, align_buf, 1);
  3036. }
  3037. }
  3038. }
  3039. /**
  3040. * ata_data_xfer - Transfer data from/to the data register.
  3041. * @ap: port to read/write
  3042. * @buf: data buffer
  3043. * @buflen: buffer length
  3044. * @do_write: read/write
  3045. *
  3046. * Transfer data from/to the device data register.
  3047. *
  3048. * LOCKING:
  3049. * Inherited from caller.
  3050. */
  3051. static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
  3052. unsigned int buflen, int do_write)
  3053. {
  3054. /* Make the crap hardware pay the costs not the good stuff */
  3055. if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
  3056. unsigned long flags;
  3057. local_irq_save(flags);
  3058. if (ap->flags & ATA_FLAG_MMIO)
  3059. ata_mmio_data_xfer(ap, buf, buflen, do_write);
  3060. else
  3061. ata_pio_data_xfer(ap, buf, buflen, do_write);
  3062. local_irq_restore(flags);
  3063. } else {
  3064. if (ap->flags & ATA_FLAG_MMIO)
  3065. ata_mmio_data_xfer(ap, buf, buflen, do_write);
  3066. else
  3067. ata_pio_data_xfer(ap, buf, buflen, do_write);
  3068. }
  3069. }
  3070. /**
  3071. * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
  3072. * @qc: Command on going
  3073. *
  3074. * Transfer ATA_SECT_SIZE of data from/to the ATA device.
  3075. *
  3076. * LOCKING:
  3077. * Inherited from caller.
  3078. */
  3079. static void ata_pio_sector(struct ata_queued_cmd *qc)
  3080. {
  3081. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3082. struct scatterlist *sg = qc->__sg;
  3083. struct ata_port *ap = qc->ap;
  3084. struct page *page;
  3085. unsigned int offset;
  3086. unsigned char *buf;
  3087. if (qc->cursect == (qc->nsect - 1))
  3088. ap->hsm_task_state = HSM_ST_LAST;
  3089. page = sg[qc->cursg].page;
  3090. offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
  3091. /* get the current page and offset */
  3092. page = nth_page(page, (offset >> PAGE_SHIFT));
  3093. offset %= PAGE_SIZE;
  3094. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3095. if (PageHighMem(page)) {
  3096. unsigned long flags;
  3097. local_irq_save(flags);
  3098. buf = kmap_atomic(page, KM_IRQ0);
  3099. /* do the actual data transfer */
  3100. ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
  3101. kunmap_atomic(buf, KM_IRQ0);
  3102. local_irq_restore(flags);
  3103. } else {
  3104. buf = page_address(page);
  3105. ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
  3106. }
  3107. qc->cursect++;
  3108. qc->cursg_ofs++;
  3109. if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
  3110. qc->cursg++;
  3111. qc->cursg_ofs = 0;
  3112. }
  3113. }
  3114. /**
  3115. * ata_pio_sectors - Transfer one or many 512-byte sectors.
  3116. * @qc: Command on going
  3117. *
  3118. * Transfer one or many ATA_SECT_SIZE of data from/to the
  3119. * ATA device for the DRQ request.
  3120. *
  3121. * LOCKING:
  3122. * Inherited from caller.
  3123. */
  3124. static void ata_pio_sectors(struct ata_queued_cmd *qc)
  3125. {
  3126. if (is_multi_taskfile(&qc->tf)) {
  3127. /* READ/WRITE MULTIPLE */
  3128. unsigned int nsect;
  3129. WARN_ON(qc->dev->multi_count == 0);
  3130. nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
  3131. while (nsect--)
  3132. ata_pio_sector(qc);
  3133. } else
  3134. ata_pio_sector(qc);
  3135. }
  3136. /**
  3137. * atapi_send_cdb - Write CDB bytes to hardware
  3138. * @ap: Port to which ATAPI device is attached.
  3139. * @qc: Taskfile currently active
  3140. *
  3141. * When device has indicated its readiness to accept
  3142. * a CDB, this function is called. Send the CDB.
  3143. *
  3144. * LOCKING:
  3145. * caller.
  3146. */
  3147. static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
  3148. {
  3149. /* send SCSI cdb */
  3150. DPRINTK("send cdb\n");
  3151. WARN_ON(qc->dev->cdb_len < 12);
  3152. ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
  3153. ata_altstatus(ap); /* flush */
  3154. switch (qc->tf.protocol) {
  3155. case ATA_PROT_ATAPI:
  3156. ap->hsm_task_state = HSM_ST;
  3157. break;
  3158. case ATA_PROT_ATAPI_NODATA:
  3159. ap->hsm_task_state = HSM_ST_LAST;
  3160. break;
  3161. case ATA_PROT_ATAPI_DMA:
  3162. ap->hsm_task_state = HSM_ST_LAST;
  3163. /* initiate bmdma */
  3164. ap->ops->bmdma_start(qc);
  3165. break;
  3166. }
  3167. }
  3168. /**
  3169. * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3170. * @qc: Command on going
  3171. * @bytes: number of bytes
  3172. *
  3173. * Transfer Transfer data from/to the ATAPI device.
  3174. *
  3175. * LOCKING:
  3176. * Inherited from caller.
  3177. *
  3178. */
  3179. static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
  3180. {
  3181. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3182. struct scatterlist *sg = qc->__sg;
  3183. struct ata_port *ap = qc->ap;
  3184. struct page *page;
  3185. unsigned char *buf;
  3186. unsigned int offset, count;
  3187. if (qc->curbytes + bytes >= qc->nbytes)
  3188. ap->hsm_task_state = HSM_ST_LAST;
  3189. next_sg:
  3190. if (unlikely(qc->cursg >= qc->n_elem)) {
  3191. /*
  3192. * The end of qc->sg is reached and the device expects
  3193. * more data to transfer. In order not to overrun qc->sg
  3194. * and fulfill length specified in the byte count register,
  3195. * - for read case, discard trailing data from the device
  3196. * - for write case, padding zero data to the device
  3197. */
  3198. u16 pad_buf[1] = { 0 };
  3199. unsigned int words = bytes >> 1;
  3200. unsigned int i;
  3201. if (words) /* warning if bytes > 1 */
  3202. printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
  3203. ap->id, bytes);
  3204. for (i = 0; i < words; i++)
  3205. ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
  3206. ap->hsm_task_state = HSM_ST_LAST;
  3207. return;
  3208. }
  3209. sg = &qc->__sg[qc->cursg];
  3210. page = sg->page;
  3211. offset = sg->offset + qc->cursg_ofs;
  3212. /* get the current page and offset */
  3213. page = nth_page(page, (offset >> PAGE_SHIFT));
  3214. offset %= PAGE_SIZE;
  3215. /* don't overrun current sg */
  3216. count = min(sg->length - qc->cursg_ofs, bytes);
  3217. /* don't cross page boundaries */
  3218. count = min(count, (unsigned int)PAGE_SIZE - offset);
  3219. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3220. if (PageHighMem(page)) {
  3221. unsigned long flags;
  3222. local_irq_save(flags);
  3223. buf = kmap_atomic(page, KM_IRQ0);
  3224. /* do the actual data transfer */
  3225. ata_data_xfer(ap, buf + offset, count, do_write);
  3226. kunmap_atomic(buf, KM_IRQ0);
  3227. local_irq_restore(flags);
  3228. } else {
  3229. buf = page_address(page);
  3230. ata_data_xfer(ap, buf + offset, count, do_write);
  3231. }
  3232. bytes -= count;
  3233. qc->curbytes += count;
  3234. qc->cursg_ofs += count;
  3235. if (qc->cursg_ofs == sg->length) {
  3236. qc->cursg++;
  3237. qc->cursg_ofs = 0;
  3238. }
  3239. if (bytes)
  3240. goto next_sg;
  3241. }
  3242. /**
  3243. * atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3244. * @qc: Command on going
  3245. *
  3246. * Transfer Transfer data from/to the ATAPI device.
  3247. *
  3248. * LOCKING:
  3249. * Inherited from caller.
  3250. */
  3251. static void atapi_pio_bytes(struct ata_queued_cmd *qc)
  3252. {
  3253. struct ata_port *ap = qc->ap;
  3254. struct ata_device *dev = qc->dev;
  3255. unsigned int ireason, bc_lo, bc_hi, bytes;
  3256. int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
  3257. ap->ops->tf_read(ap, &qc->tf);
  3258. ireason = qc->tf.nsect;
  3259. bc_lo = qc->tf.lbam;
  3260. bc_hi = qc->tf.lbah;
  3261. bytes = (bc_hi << 8) | bc_lo;
  3262. /* shall be cleared to zero, indicating xfer of data */
  3263. if (ireason & (1 << 0))
  3264. goto err_out;
  3265. /* make sure transfer direction matches expected */
  3266. i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
  3267. if (do_write != i_write)
  3268. goto err_out;
  3269. VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
  3270. __atapi_pio_bytes(qc, bytes);
  3271. return;
  3272. err_out:
  3273. printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
  3274. ap->id, dev->devno);
  3275. qc->err_mask |= AC_ERR_HSM;
  3276. ap->hsm_task_state = HSM_ST_ERR;
  3277. }
  3278. /**
  3279. * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
  3280. * @ap: the target ata_port
  3281. * @qc: qc on going
  3282. *
  3283. * RETURNS:
  3284. * 1 if ok in workqueue, 0 otherwise.
  3285. */
  3286. static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
  3287. {
  3288. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3289. return 1;
  3290. if (ap->hsm_task_state == HSM_ST_FIRST) {
  3291. if (qc->tf.protocol == ATA_PROT_PIO &&
  3292. (qc->tf.flags & ATA_TFLAG_WRITE))
  3293. return 1;
  3294. if (is_atapi_taskfile(&qc->tf) &&
  3295. !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3296. return 1;
  3297. }
  3298. return 0;
  3299. }
  3300. /**
  3301. * ata_hsm_move - move the HSM to the next state.
  3302. * @ap: the target ata_port
  3303. * @qc: qc on going
  3304. * @status: current device status
  3305. * @in_wq: 1 if called from workqueue, 0 otherwise
  3306. *
  3307. * RETURNS:
  3308. * 1 when poll next status needed, 0 otherwise.
  3309. */
  3310. static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
  3311. u8 status, int in_wq)
  3312. {
  3313. unsigned long flags = 0;
  3314. int poll_next;
  3315. WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
  3316. /* Make sure ata_qc_issue_prot() does not throw things
  3317. * like DMA polling into the workqueue. Notice that
  3318. * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
  3319. */
  3320. WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
  3321. fsm_start:
  3322. DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
  3323. ap->id, qc->tf.protocol, ap->hsm_task_state, status);
  3324. switch (ap->hsm_task_state) {
  3325. case HSM_ST_FIRST:
  3326. /* Send first data block or PACKET CDB */
  3327. /* If polling, we will stay in the work queue after
  3328. * sending the data. Otherwise, interrupt handler
  3329. * takes over after sending the data.
  3330. */
  3331. poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
  3332. /* check device status */
  3333. if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
  3334. /* Wrong status. Let EH handle this */
  3335. qc->err_mask |= AC_ERR_HSM;
  3336. ap->hsm_task_state = HSM_ST_ERR;
  3337. goto fsm_start;
  3338. }
  3339. /* Device should not ask for data transfer (DRQ=1)
  3340. * when it finds something wrong.
  3341. * We ignore DRQ here and stop the HSM by
  3342. * changing hsm_task_state to HSM_ST_ERR and
  3343. * let the EH abort the command or reset the device.
  3344. */
  3345. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3346. printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
  3347. ap->id, status);
  3348. qc->err_mask |= AC_ERR_DEV;
  3349. ap->hsm_task_state = HSM_ST_ERR;
  3350. goto fsm_start;
  3351. }
  3352. /* Send the CDB (atapi) or the first data block (ata pio out).
  3353. * During the state transition, interrupt handler shouldn't
  3354. * be invoked before the data transfer is complete and
  3355. * hsm_task_state is changed. Hence, the following locking.
  3356. */
  3357. if (in_wq)
  3358. spin_lock_irqsave(&ap->host_set->lock, flags);
  3359. if (qc->tf.protocol == ATA_PROT_PIO) {
  3360. /* PIO data out protocol.
  3361. * send first data block.
  3362. */
  3363. /* ata_pio_sectors() might change the state
  3364. * to HSM_ST_LAST. so, the state is changed here
  3365. * before ata_pio_sectors().
  3366. */
  3367. ap->hsm_task_state = HSM_ST;
  3368. ata_pio_sectors(qc);
  3369. ata_altstatus(ap); /* flush */
  3370. } else
  3371. /* send CDB */
  3372. atapi_send_cdb(ap, qc);
  3373. if (in_wq)
  3374. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3375. /* if polling, ata_pio_task() handles the rest.
  3376. * otherwise, interrupt handler takes over from here.
  3377. */
  3378. break;
  3379. case HSM_ST:
  3380. /* complete command or read/write the data register */
  3381. if (qc->tf.protocol == ATA_PROT_ATAPI) {
  3382. /* ATAPI PIO protocol */
  3383. if ((status & ATA_DRQ) == 0) {
  3384. /* no more data to transfer */
  3385. ap->hsm_task_state = HSM_ST_LAST;
  3386. goto fsm_start;
  3387. }
  3388. /* Device should not ask for data transfer (DRQ=1)
  3389. * when it finds something wrong.
  3390. * We ignore DRQ here and stop the HSM by
  3391. * changing hsm_task_state to HSM_ST_ERR and
  3392. * let the EH abort the command or reset the device.
  3393. */
  3394. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3395. printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
  3396. ap->id, status);
  3397. qc->err_mask |= AC_ERR_DEV;
  3398. ap->hsm_task_state = HSM_ST_ERR;
  3399. goto fsm_start;
  3400. }
  3401. atapi_pio_bytes(qc);
  3402. if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
  3403. /* bad ireason reported by device */
  3404. goto fsm_start;
  3405. } else {
  3406. /* ATA PIO protocol */
  3407. if (unlikely((status & ATA_DRQ) == 0)) {
  3408. /* handle BSY=0, DRQ=0 as error */
  3409. qc->err_mask |= AC_ERR_HSM;
  3410. ap->hsm_task_state = HSM_ST_ERR;
  3411. goto fsm_start;
  3412. }
  3413. /* For PIO reads, some devices may ask for
  3414. * data transfer (DRQ=1) alone with ERR=1.
  3415. * We respect DRQ here and transfer one
  3416. * block of junk data before changing the
  3417. * hsm_task_state to HSM_ST_ERR.
  3418. *
  3419. * For PIO writes, ERR=1 DRQ=1 doesn't make
  3420. * sense since the data block has been
  3421. * transferred to the device.
  3422. */
  3423. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3424. /* data might be corrputed */
  3425. qc->err_mask |= AC_ERR_DEV;
  3426. if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
  3427. ata_pio_sectors(qc);
  3428. ata_altstatus(ap);
  3429. status = ata_wait_idle(ap);
  3430. }
  3431. /* ata_pio_sectors() might change the
  3432. * state to HSM_ST_LAST. so, the state
  3433. * is changed after ata_pio_sectors().
  3434. */
  3435. ap->hsm_task_state = HSM_ST_ERR;
  3436. goto fsm_start;
  3437. }
  3438. ata_pio_sectors(qc);
  3439. if (ap->hsm_task_state == HSM_ST_LAST &&
  3440. (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
  3441. /* all data read */
  3442. ata_altstatus(ap);
  3443. status = ata_wait_idle(ap);
  3444. goto fsm_start;
  3445. }
  3446. }
  3447. ata_altstatus(ap); /* flush */
  3448. poll_next = 1;
  3449. break;
  3450. case HSM_ST_LAST:
  3451. if (unlikely(!ata_ok(status))) {
  3452. qc->err_mask |= __ac_err_mask(status);
  3453. ap->hsm_task_state = HSM_ST_ERR;
  3454. goto fsm_start;
  3455. }
  3456. /* no more data to transfer */
  3457. DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
  3458. ap->id, qc->dev->devno, status);
  3459. WARN_ON(qc->err_mask);
  3460. ap->hsm_task_state = HSM_ST_IDLE;
  3461. /* complete taskfile transaction */
  3462. if (in_wq)
  3463. ata_poll_qc_complete(qc);
  3464. else
  3465. ata_qc_complete(qc);
  3466. poll_next = 0;
  3467. break;
  3468. case HSM_ST_ERR:
  3469. if (qc->tf.command != ATA_CMD_PACKET)
  3470. printk(KERN_ERR "ata%u: dev %u command error, drv_stat 0x%x\n",
  3471. ap->id, qc->dev->devno, status);
  3472. /* make sure qc->err_mask is available to
  3473. * know what's wrong and recover
  3474. */
  3475. WARN_ON(qc->err_mask == 0);
  3476. ap->hsm_task_state = HSM_ST_IDLE;
  3477. /* complete taskfile transaction */
  3478. if (in_wq)
  3479. ata_poll_qc_complete(qc);
  3480. else
  3481. ata_qc_complete(qc);
  3482. poll_next = 0;
  3483. break;
  3484. default:
  3485. poll_next = 0;
  3486. BUG();
  3487. }
  3488. return poll_next;
  3489. }
  3490. static void ata_pio_task(void *_data)
  3491. {
  3492. struct ata_queued_cmd *qc = _data;
  3493. struct ata_port *ap = qc->ap;
  3494. u8 status;
  3495. int poll_next;
  3496. fsm_start:
  3497. WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
  3498. /*
  3499. * This is purely heuristic. This is a fast path.
  3500. * Sometimes when we enter, BSY will be cleared in
  3501. * a chk-status or two. If not, the drive is probably seeking
  3502. * or something. Snooze for a couple msecs, then
  3503. * chk-status again. If still busy, queue delayed work.
  3504. */
  3505. status = ata_busy_wait(ap, ATA_BUSY, 5);
  3506. if (status & ATA_BUSY) {
  3507. msleep(2);
  3508. status = ata_busy_wait(ap, ATA_BUSY, 10);
  3509. if (status & ATA_BUSY) {
  3510. ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
  3511. return;
  3512. }
  3513. }
  3514. /* move the HSM */
  3515. poll_next = ata_hsm_move(ap, qc, status, 1);
  3516. /* another command or interrupt handler
  3517. * may be running at this point.
  3518. */
  3519. if (poll_next)
  3520. goto fsm_start;
  3521. }
  3522. /**
  3523. * ata_qc_new - Request an available ATA command, for queueing
  3524. * @ap: Port associated with device @dev
  3525. * @dev: Device from whom we request an available command structure
  3526. *
  3527. * LOCKING:
  3528. * None.
  3529. */
  3530. static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
  3531. {
  3532. struct ata_queued_cmd *qc = NULL;
  3533. unsigned int i;
  3534. for (i = 0; i < ATA_MAX_QUEUE; i++)
  3535. if (!test_and_set_bit(i, &ap->qactive)) {
  3536. qc = ata_qc_from_tag(ap, i);
  3537. break;
  3538. }
  3539. if (qc)
  3540. qc->tag = i;
  3541. return qc;
  3542. }
  3543. /**
  3544. * ata_qc_new_init - Request an available ATA command, and initialize it
  3545. * @ap: Port associated with device @dev
  3546. * @dev: Device from whom we request an available command structure
  3547. *
  3548. * LOCKING:
  3549. * None.
  3550. */
  3551. struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
  3552. struct ata_device *dev)
  3553. {
  3554. struct ata_queued_cmd *qc;
  3555. qc = ata_qc_new(ap);
  3556. if (qc) {
  3557. qc->scsicmd = NULL;
  3558. qc->ap = ap;
  3559. qc->dev = dev;
  3560. ata_qc_reinit(qc);
  3561. }
  3562. return qc;
  3563. }
  3564. /**
  3565. * ata_qc_free - free unused ata_queued_cmd
  3566. * @qc: Command to complete
  3567. *
  3568. * Designed to free unused ata_queued_cmd object
  3569. * in case something prevents using it.
  3570. *
  3571. * LOCKING:
  3572. * spin_lock_irqsave(host_set lock)
  3573. */
  3574. void ata_qc_free(struct ata_queued_cmd *qc)
  3575. {
  3576. struct ata_port *ap = qc->ap;
  3577. unsigned int tag;
  3578. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3579. qc->flags = 0;
  3580. tag = qc->tag;
  3581. if (likely(ata_tag_valid(tag))) {
  3582. if (tag == ap->active_tag)
  3583. ap->active_tag = ATA_TAG_POISON;
  3584. qc->tag = ATA_TAG_POISON;
  3585. clear_bit(tag, &ap->qactive);
  3586. }
  3587. }
  3588. void __ata_qc_complete(struct ata_queued_cmd *qc)
  3589. {
  3590. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3591. WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
  3592. if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
  3593. ata_sg_clean(qc);
  3594. /* atapi: mark qc as inactive to prevent the interrupt handler
  3595. * from completing the command twice later, before the error handler
  3596. * is called. (when rc != 0 and atapi request sense is needed)
  3597. */
  3598. qc->flags &= ~ATA_QCFLAG_ACTIVE;
  3599. /* call completion callback */
  3600. qc->complete_fn(qc);
  3601. }
  3602. static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
  3603. {
  3604. struct ata_port *ap = qc->ap;
  3605. switch (qc->tf.protocol) {
  3606. case ATA_PROT_DMA:
  3607. case ATA_PROT_ATAPI_DMA:
  3608. return 1;
  3609. case ATA_PROT_ATAPI:
  3610. case ATA_PROT_PIO:
  3611. if (ap->flags & ATA_FLAG_PIO_DMA)
  3612. return 1;
  3613. /* fall through */
  3614. default:
  3615. return 0;
  3616. }
  3617. /* never reached */
  3618. }
  3619. /**
  3620. * ata_qc_issue - issue taskfile to device
  3621. * @qc: command to issue to device
  3622. *
  3623. * Prepare an ATA command to submission to device.
  3624. * This includes mapping the data into a DMA-able
  3625. * area, filling in the S/G table, and finally
  3626. * writing the taskfile to hardware, starting the command.
  3627. *
  3628. * LOCKING:
  3629. * spin_lock_irqsave(host_set lock)
  3630. */
  3631. void ata_qc_issue(struct ata_queued_cmd *qc)
  3632. {
  3633. struct ata_port *ap = qc->ap;
  3634. qc->ap->active_tag = qc->tag;
  3635. qc->flags |= ATA_QCFLAG_ACTIVE;
  3636. if (ata_should_dma_map(qc)) {
  3637. if (qc->flags & ATA_QCFLAG_SG) {
  3638. if (ata_sg_setup(qc))
  3639. goto sg_err;
  3640. } else if (qc->flags & ATA_QCFLAG_SINGLE) {
  3641. if (ata_sg_setup_one(qc))
  3642. goto sg_err;
  3643. }
  3644. } else {
  3645. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3646. }
  3647. ap->ops->qc_prep(qc);
  3648. qc->err_mask |= ap->ops->qc_issue(qc);
  3649. if (unlikely(qc->err_mask))
  3650. goto err;
  3651. return;
  3652. sg_err:
  3653. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3654. qc->err_mask |= AC_ERR_SYSTEM;
  3655. err:
  3656. ata_qc_complete(qc);
  3657. }
  3658. /**
  3659. * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
  3660. * @qc: command to issue to device
  3661. *
  3662. * Using various libata functions and hooks, this function
  3663. * starts an ATA command. ATA commands are grouped into
  3664. * classes called "protocols", and issuing each type of protocol
  3665. * is slightly different.
  3666. *
  3667. * May be used as the qc_issue() entry in ata_port_operations.
  3668. *
  3669. * LOCKING:
  3670. * spin_lock_irqsave(host_set lock)
  3671. *
  3672. * RETURNS:
  3673. * Zero on success, AC_ERR_* mask on failure
  3674. */
  3675. unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
  3676. {
  3677. struct ata_port *ap = qc->ap;
  3678. /* Use polling pio if the LLD doesn't handle
  3679. * interrupt driven pio and atapi CDB interrupt.
  3680. */
  3681. if (ap->flags & ATA_FLAG_PIO_POLLING) {
  3682. switch (qc->tf.protocol) {
  3683. case ATA_PROT_PIO:
  3684. case ATA_PROT_ATAPI:
  3685. case ATA_PROT_ATAPI_NODATA:
  3686. qc->tf.flags |= ATA_TFLAG_POLLING;
  3687. break;
  3688. case ATA_PROT_ATAPI_DMA:
  3689. if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
  3690. /* see ata_check_atapi_dma() */
  3691. BUG();
  3692. break;
  3693. default:
  3694. break;
  3695. }
  3696. }
  3697. /* select the device */
  3698. ata_dev_select(ap, qc->dev->devno, 1, 0);
  3699. /* start the command */
  3700. switch (qc->tf.protocol) {
  3701. case ATA_PROT_NODATA:
  3702. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3703. ata_qc_set_polling(qc);
  3704. ata_tf_to_host(ap, &qc->tf);
  3705. ap->hsm_task_state = HSM_ST_LAST;
  3706. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3707. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3708. break;
  3709. case ATA_PROT_DMA:
  3710. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3711. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3712. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3713. ap->ops->bmdma_start(qc); /* initiate bmdma */
  3714. ap->hsm_task_state = HSM_ST_LAST;
  3715. break;
  3716. case ATA_PROT_PIO:
  3717. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3718. ata_qc_set_polling(qc);
  3719. ata_tf_to_host(ap, &qc->tf);
  3720. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  3721. /* PIO data out protocol */
  3722. ap->hsm_task_state = HSM_ST_FIRST;
  3723. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3724. /* always send first data block using
  3725. * the ata_pio_task() codepath.
  3726. */
  3727. } else {
  3728. /* PIO data in protocol */
  3729. ap->hsm_task_state = HSM_ST;
  3730. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3731. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3732. /* if polling, ata_pio_task() handles the rest.
  3733. * otherwise, interrupt handler takes over from here.
  3734. */
  3735. }
  3736. break;
  3737. case ATA_PROT_ATAPI:
  3738. case ATA_PROT_ATAPI_NODATA:
  3739. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3740. ata_qc_set_polling(qc);
  3741. ata_tf_to_host(ap, &qc->tf);
  3742. ap->hsm_task_state = HSM_ST_FIRST;
  3743. /* send cdb by polling if no cdb interrupt */
  3744. if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
  3745. (qc->tf.flags & ATA_TFLAG_POLLING))
  3746. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3747. break;
  3748. case ATA_PROT_ATAPI_DMA:
  3749. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3750. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3751. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3752. ap->hsm_task_state = HSM_ST_FIRST;
  3753. /* send cdb by polling if no cdb interrupt */
  3754. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3755. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3756. break;
  3757. default:
  3758. WARN_ON(1);
  3759. return AC_ERR_SYSTEM;
  3760. }
  3761. return 0;
  3762. }
  3763. /**
  3764. * ata_host_intr - Handle host interrupt for given (port, task)
  3765. * @ap: Port on which interrupt arrived (possibly...)
  3766. * @qc: Taskfile currently active in engine
  3767. *
  3768. * Handle host interrupt for given queued command. Currently,
  3769. * only DMA interrupts are handled. All other commands are
  3770. * handled via polling with interrupts disabled (nIEN bit).
  3771. *
  3772. * LOCKING:
  3773. * spin_lock_irqsave(host_set lock)
  3774. *
  3775. * RETURNS:
  3776. * One if interrupt was handled, zero if not (shared irq).
  3777. */
  3778. inline unsigned int ata_host_intr (struct ata_port *ap,
  3779. struct ata_queued_cmd *qc)
  3780. {
  3781. u8 status, host_stat = 0;
  3782. VPRINTK("ata%u: protocol %d task_state %d\n",
  3783. ap->id, qc->tf.protocol, ap->hsm_task_state);
  3784. /* Check whether we are expecting interrupt in this state */
  3785. switch (ap->hsm_task_state) {
  3786. case HSM_ST_FIRST:
  3787. /* Some pre-ATAPI-4 devices assert INTRQ
  3788. * at this state when ready to receive CDB.
  3789. */
  3790. /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
  3791. * The flag was turned on only for atapi devices.
  3792. * No need to check is_atapi_taskfile(&qc->tf) again.
  3793. */
  3794. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3795. goto idle_irq;
  3796. break;
  3797. case HSM_ST_LAST:
  3798. if (qc->tf.protocol == ATA_PROT_DMA ||
  3799. qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
  3800. /* check status of DMA engine */
  3801. host_stat = ap->ops->bmdma_status(ap);
  3802. VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
  3803. /* if it's not our irq... */
  3804. if (!(host_stat & ATA_DMA_INTR))
  3805. goto idle_irq;
  3806. /* before we do anything else, clear DMA-Start bit */
  3807. ap->ops->bmdma_stop(qc);
  3808. if (unlikely(host_stat & ATA_DMA_ERR)) {
  3809. /* error when transfering data to/from memory */
  3810. qc->err_mask |= AC_ERR_HOST_BUS;
  3811. ap->hsm_task_state = HSM_ST_ERR;
  3812. }
  3813. }
  3814. break;
  3815. case HSM_ST:
  3816. break;
  3817. default:
  3818. goto idle_irq;
  3819. }
  3820. /* check altstatus */
  3821. status = ata_altstatus(ap);
  3822. if (status & ATA_BUSY)
  3823. goto idle_irq;
  3824. /* check main status, clearing INTRQ */
  3825. status = ata_chk_status(ap);
  3826. if (unlikely(status & ATA_BUSY))
  3827. goto idle_irq;
  3828. /* ack bmdma irq events */
  3829. ap->ops->irq_clear(ap);
  3830. ata_hsm_move(ap, qc, status, 0);
  3831. return 1; /* irq handled */
  3832. idle_irq:
  3833. ap->stats.idle_irq++;
  3834. #ifdef ATA_IRQ_TRAP
  3835. if ((ap->stats.idle_irq % 1000) == 0) {
  3836. ata_irq_ack(ap, 0); /* debug trap */
  3837. printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
  3838. return 1;
  3839. }
  3840. #endif
  3841. return 0; /* irq not handled */
  3842. }
  3843. /**
  3844. * ata_interrupt - Default ATA host interrupt handler
  3845. * @irq: irq line (unused)
  3846. * @dev_instance: pointer to our ata_host_set information structure
  3847. * @regs: unused
  3848. *
  3849. * Default interrupt handler for PCI IDE devices. Calls
  3850. * ata_host_intr() for each port that is not disabled.
  3851. *
  3852. * LOCKING:
  3853. * Obtains host_set lock during operation.
  3854. *
  3855. * RETURNS:
  3856. * IRQ_NONE or IRQ_HANDLED.
  3857. */
  3858. irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
  3859. {
  3860. struct ata_host_set *host_set = dev_instance;
  3861. unsigned int i;
  3862. unsigned int handled = 0;
  3863. unsigned long flags;
  3864. /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
  3865. spin_lock_irqsave(&host_set->lock, flags);
  3866. for (i = 0; i < host_set->n_ports; i++) {
  3867. struct ata_port *ap;
  3868. ap = host_set->ports[i];
  3869. if (ap &&
  3870. !(ap->flags & ATA_FLAG_DISABLED)) {
  3871. struct ata_queued_cmd *qc;
  3872. qc = ata_qc_from_tag(ap, ap->active_tag);
  3873. if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
  3874. (qc->flags & ATA_QCFLAG_ACTIVE))
  3875. handled |= ata_host_intr(ap, qc);
  3876. }
  3877. }
  3878. spin_unlock_irqrestore(&host_set->lock, flags);
  3879. return IRQ_RETVAL(handled);
  3880. }
  3881. /*
  3882. * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
  3883. * without filling any other registers
  3884. */
  3885. static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
  3886. u8 cmd)
  3887. {
  3888. struct ata_taskfile tf;
  3889. int err;
  3890. ata_tf_init(ap, &tf, dev->devno);
  3891. tf.command = cmd;
  3892. tf.flags |= ATA_TFLAG_DEVICE;
  3893. tf.protocol = ATA_PROT_NODATA;
  3894. err = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
  3895. if (err)
  3896. printk(KERN_ERR "%s: ata command failed: %d\n",
  3897. __FUNCTION__, err);
  3898. return err;
  3899. }
  3900. static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
  3901. {
  3902. u8 cmd;
  3903. if (!ata_try_flush_cache(dev))
  3904. return 0;
  3905. if (ata_id_has_flush_ext(dev->id))
  3906. cmd = ATA_CMD_FLUSH_EXT;
  3907. else
  3908. cmd = ATA_CMD_FLUSH;
  3909. return ata_do_simple_cmd(ap, dev, cmd);
  3910. }
  3911. static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
  3912. {
  3913. return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
  3914. }
  3915. static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
  3916. {
  3917. return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
  3918. }
  3919. /**
  3920. * ata_device_resume - wakeup a previously suspended devices
  3921. * @ap: port the device is connected to
  3922. * @dev: the device to resume
  3923. *
  3924. * Kick the drive back into action, by sending it an idle immediate
  3925. * command and making sure its transfer mode matches between drive
  3926. * and host.
  3927. *
  3928. */
  3929. int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
  3930. {
  3931. if (ap->flags & ATA_FLAG_SUSPENDED) {
  3932. struct ata_device *failed_dev;
  3933. ap->flags &= ~ATA_FLAG_SUSPENDED;
  3934. while (ata_set_mode(ap, &failed_dev))
  3935. ata_dev_disable(ap, failed_dev);
  3936. }
  3937. if (!ata_dev_enabled(dev))
  3938. return 0;
  3939. if (dev->class == ATA_DEV_ATA)
  3940. ata_start_drive(ap, dev);
  3941. return 0;
  3942. }
  3943. /**
  3944. * ata_device_suspend - prepare a device for suspend
  3945. * @ap: port the device is connected to
  3946. * @dev: the device to suspend
  3947. *
  3948. * Flush the cache on the drive, if appropriate, then issue a
  3949. * standbynow command.
  3950. */
  3951. int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
  3952. {
  3953. if (!ata_dev_enabled(dev))
  3954. return 0;
  3955. if (dev->class == ATA_DEV_ATA)
  3956. ata_flush_cache(ap, dev);
  3957. if (state.event != PM_EVENT_FREEZE)
  3958. ata_standby_drive(ap, dev);
  3959. ap->flags |= ATA_FLAG_SUSPENDED;
  3960. return 0;
  3961. }
  3962. /**
  3963. * ata_port_start - Set port up for dma.
  3964. * @ap: Port to initialize
  3965. *
  3966. * Called just after data structures for each port are
  3967. * initialized. Allocates space for PRD table.
  3968. *
  3969. * May be used as the port_start() entry in ata_port_operations.
  3970. *
  3971. * LOCKING:
  3972. * Inherited from caller.
  3973. */
  3974. int ata_port_start (struct ata_port *ap)
  3975. {
  3976. struct device *dev = ap->dev;
  3977. int rc;
  3978. ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
  3979. if (!ap->prd)
  3980. return -ENOMEM;
  3981. rc = ata_pad_alloc(ap, dev);
  3982. if (rc) {
  3983. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  3984. return rc;
  3985. }
  3986. DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
  3987. return 0;
  3988. }
  3989. /**
  3990. * ata_port_stop - Undo ata_port_start()
  3991. * @ap: Port to shut down
  3992. *
  3993. * Frees the PRD table.
  3994. *
  3995. * May be used as the port_stop() entry in ata_port_operations.
  3996. *
  3997. * LOCKING:
  3998. * Inherited from caller.
  3999. */
  4000. void ata_port_stop (struct ata_port *ap)
  4001. {
  4002. struct device *dev = ap->dev;
  4003. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  4004. ata_pad_free(ap, dev);
  4005. }
  4006. void ata_host_stop (struct ata_host_set *host_set)
  4007. {
  4008. if (host_set->mmio_base)
  4009. iounmap(host_set->mmio_base);
  4010. }
  4011. /**
  4012. * ata_host_remove - Unregister SCSI host structure with upper layers
  4013. * @ap: Port to unregister
  4014. * @do_unregister: 1 if we fully unregister, 0 to just stop the port
  4015. *
  4016. * LOCKING:
  4017. * Inherited from caller.
  4018. */
  4019. static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
  4020. {
  4021. struct Scsi_Host *sh = ap->host;
  4022. DPRINTK("ENTER\n");
  4023. if (do_unregister)
  4024. scsi_remove_host(sh);
  4025. ap->ops->port_stop(ap);
  4026. }
  4027. /**
  4028. * ata_host_init - Initialize an ata_port structure
  4029. * @ap: Structure to initialize
  4030. * @host: associated SCSI mid-layer structure
  4031. * @host_set: Collection of hosts to which @ap belongs
  4032. * @ent: Probe information provided by low-level driver
  4033. * @port_no: Port number associated with this ata_port
  4034. *
  4035. * Initialize a new ata_port structure, and its associated
  4036. * scsi_host.
  4037. *
  4038. * LOCKING:
  4039. * Inherited from caller.
  4040. */
  4041. static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
  4042. struct ata_host_set *host_set,
  4043. const struct ata_probe_ent *ent, unsigned int port_no)
  4044. {
  4045. unsigned int i;
  4046. host->max_id = 16;
  4047. host->max_lun = 1;
  4048. host->max_channel = 1;
  4049. host->unique_id = ata_unique_id++;
  4050. host->max_cmd_len = 12;
  4051. ap->flags = ATA_FLAG_DISABLED;
  4052. ap->id = host->unique_id;
  4053. ap->host = host;
  4054. ap->ctl = ATA_DEVCTL_OBS;
  4055. ap->host_set = host_set;
  4056. ap->dev = ent->dev;
  4057. ap->port_no = port_no;
  4058. ap->hard_port_no =
  4059. ent->legacy_mode ? ent->hard_port_no : port_no;
  4060. ap->pio_mask = ent->pio_mask;
  4061. ap->mwdma_mask = ent->mwdma_mask;
  4062. ap->udma_mask = ent->udma_mask;
  4063. ap->flags |= ent->host_flags;
  4064. ap->ops = ent->port_ops;
  4065. ap->cbl = ATA_CBL_NONE;
  4066. ap->sata_spd_limit = UINT_MAX;
  4067. ap->active_tag = ATA_TAG_POISON;
  4068. ap->last_ctl = 0xFF;
  4069. INIT_WORK(&ap->port_task, NULL, NULL);
  4070. INIT_LIST_HEAD(&ap->eh_done_q);
  4071. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  4072. struct ata_device *dev = &ap->device[i];
  4073. dev->devno = i;
  4074. dev->pio_mask = UINT_MAX;
  4075. dev->mwdma_mask = UINT_MAX;
  4076. dev->udma_mask = UINT_MAX;
  4077. }
  4078. #ifdef ATA_IRQ_TRAP
  4079. ap->stats.unhandled_irq = 1;
  4080. ap->stats.idle_irq = 1;
  4081. #endif
  4082. memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
  4083. }
  4084. /**
  4085. * ata_host_add - Attach low-level ATA driver to system
  4086. * @ent: Information provided by low-level driver
  4087. * @host_set: Collections of ports to which we add
  4088. * @port_no: Port number associated with this host
  4089. *
  4090. * Attach low-level ATA driver to system.
  4091. *
  4092. * LOCKING:
  4093. * PCI/etc. bus probe sem.
  4094. *
  4095. * RETURNS:
  4096. * New ata_port on success, for NULL on error.
  4097. */
  4098. static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
  4099. struct ata_host_set *host_set,
  4100. unsigned int port_no)
  4101. {
  4102. struct Scsi_Host *host;
  4103. struct ata_port *ap;
  4104. int rc;
  4105. DPRINTK("ENTER\n");
  4106. if (!ent->port_ops->probe_reset &&
  4107. !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
  4108. printk(KERN_ERR "ata%u: no reset mechanism available\n",
  4109. port_no);
  4110. return NULL;
  4111. }
  4112. host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
  4113. if (!host)
  4114. return NULL;
  4115. host->transportt = &ata_scsi_transport_template;
  4116. ap = (struct ata_port *) &host->hostdata[0];
  4117. ata_host_init(ap, host, host_set, ent, port_no);
  4118. rc = ap->ops->port_start(ap);
  4119. if (rc)
  4120. goto err_out;
  4121. return ap;
  4122. err_out:
  4123. scsi_host_put(host);
  4124. return NULL;
  4125. }
  4126. /**
  4127. * ata_device_add - Register hardware device with ATA and SCSI layers
  4128. * @ent: Probe information describing hardware device to be registered
  4129. *
  4130. * This function processes the information provided in the probe
  4131. * information struct @ent, allocates the necessary ATA and SCSI
  4132. * host information structures, initializes them, and registers
  4133. * everything with requisite kernel subsystems.
  4134. *
  4135. * This function requests irqs, probes the ATA bus, and probes
  4136. * the SCSI bus.
  4137. *
  4138. * LOCKING:
  4139. * PCI/etc. bus probe sem.
  4140. *
  4141. * RETURNS:
  4142. * Number of ports registered. Zero on error (no ports registered).
  4143. */
  4144. int ata_device_add(const struct ata_probe_ent *ent)
  4145. {
  4146. unsigned int count = 0, i;
  4147. struct device *dev = ent->dev;
  4148. struct ata_host_set *host_set;
  4149. DPRINTK("ENTER\n");
  4150. /* alloc a container for our list of ATA ports (buses) */
  4151. host_set = kzalloc(sizeof(struct ata_host_set) +
  4152. (ent->n_ports * sizeof(void *)), GFP_KERNEL);
  4153. if (!host_set)
  4154. return 0;
  4155. spin_lock_init(&host_set->lock);
  4156. host_set->dev = dev;
  4157. host_set->n_ports = ent->n_ports;
  4158. host_set->irq = ent->irq;
  4159. host_set->mmio_base = ent->mmio_base;
  4160. host_set->private_data = ent->private_data;
  4161. host_set->ops = ent->port_ops;
  4162. host_set->flags = ent->host_set_flags;
  4163. /* register each port bound to this device */
  4164. for (i = 0; i < ent->n_ports; i++) {
  4165. struct ata_port *ap;
  4166. unsigned long xfer_mode_mask;
  4167. ap = ata_host_add(ent, host_set, i);
  4168. if (!ap)
  4169. goto err_out;
  4170. host_set->ports[i] = ap;
  4171. xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
  4172. (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
  4173. (ap->pio_mask << ATA_SHIFT_PIO);
  4174. /* print per-port info to dmesg */
  4175. printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
  4176. "bmdma 0x%lX irq %lu\n",
  4177. ap->id,
  4178. ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
  4179. ata_mode_string(xfer_mode_mask),
  4180. ap->ioaddr.cmd_addr,
  4181. ap->ioaddr.ctl_addr,
  4182. ap->ioaddr.bmdma_addr,
  4183. ent->irq);
  4184. ata_chk_status(ap);
  4185. host_set->ops->irq_clear(ap);
  4186. count++;
  4187. }
  4188. if (!count)
  4189. goto err_free_ret;
  4190. /* obtain irq, that is shared between channels */
  4191. if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
  4192. DRV_NAME, host_set))
  4193. goto err_out;
  4194. /* perform each probe synchronously */
  4195. DPRINTK("probe begin\n");
  4196. for (i = 0; i < count; i++) {
  4197. struct ata_port *ap;
  4198. int rc;
  4199. ap = host_set->ports[i];
  4200. DPRINTK("ata%u: bus probe begin\n", ap->id);
  4201. rc = ata_bus_probe(ap);
  4202. DPRINTK("ata%u: bus probe end\n", ap->id);
  4203. if (rc) {
  4204. /* FIXME: do something useful here?
  4205. * Current libata behavior will
  4206. * tear down everything when
  4207. * the module is removed
  4208. * or the h/w is unplugged.
  4209. */
  4210. }
  4211. rc = scsi_add_host(ap->host, dev);
  4212. if (rc) {
  4213. printk(KERN_ERR "ata%u: scsi_add_host failed\n",
  4214. ap->id);
  4215. /* FIXME: do something useful here */
  4216. /* FIXME: handle unconditional calls to
  4217. * scsi_scan_host and ata_host_remove, below,
  4218. * at the very least
  4219. */
  4220. }
  4221. }
  4222. /* probes are done, now scan each port's disk(s) */
  4223. DPRINTK("host probe begin\n");
  4224. for (i = 0; i < count; i++) {
  4225. struct ata_port *ap = host_set->ports[i];
  4226. ata_scsi_scan_host(ap);
  4227. }
  4228. dev_set_drvdata(dev, host_set);
  4229. VPRINTK("EXIT, returning %u\n", ent->n_ports);
  4230. return ent->n_ports; /* success */
  4231. err_out:
  4232. for (i = 0; i < count; i++) {
  4233. ata_host_remove(host_set->ports[i], 1);
  4234. scsi_host_put(host_set->ports[i]->host);
  4235. }
  4236. err_free_ret:
  4237. kfree(host_set);
  4238. VPRINTK("EXIT, returning 0\n");
  4239. return 0;
  4240. }
  4241. /**
  4242. * ata_host_set_remove - PCI layer callback for device removal
  4243. * @host_set: ATA host set that was removed
  4244. *
  4245. * Unregister all objects associated with this host set. Free those
  4246. * objects.
  4247. *
  4248. * LOCKING:
  4249. * Inherited from calling layer (may sleep).
  4250. */
  4251. void ata_host_set_remove(struct ata_host_set *host_set)
  4252. {
  4253. struct ata_port *ap;
  4254. unsigned int i;
  4255. for (i = 0; i < host_set->n_ports; i++) {
  4256. ap = host_set->ports[i];
  4257. scsi_remove_host(ap->host);
  4258. }
  4259. free_irq(host_set->irq, host_set);
  4260. for (i = 0; i < host_set->n_ports; i++) {
  4261. ap = host_set->ports[i];
  4262. ata_scsi_release(ap->host);
  4263. if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
  4264. struct ata_ioports *ioaddr = &ap->ioaddr;
  4265. if (ioaddr->cmd_addr == 0x1f0)
  4266. release_region(0x1f0, 8);
  4267. else if (ioaddr->cmd_addr == 0x170)
  4268. release_region(0x170, 8);
  4269. }
  4270. scsi_host_put(ap->host);
  4271. }
  4272. if (host_set->ops->host_stop)
  4273. host_set->ops->host_stop(host_set);
  4274. kfree(host_set);
  4275. }
  4276. /**
  4277. * ata_scsi_release - SCSI layer callback hook for host unload
  4278. * @host: libata host to be unloaded
  4279. *
  4280. * Performs all duties necessary to shut down a libata port...
  4281. * Kill port kthread, disable port, and release resources.
  4282. *
  4283. * LOCKING:
  4284. * Inherited from SCSI layer.
  4285. *
  4286. * RETURNS:
  4287. * One.
  4288. */
  4289. int ata_scsi_release(struct Scsi_Host *host)
  4290. {
  4291. struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
  4292. int i;
  4293. DPRINTK("ENTER\n");
  4294. ap->ops->port_disable(ap);
  4295. ata_host_remove(ap, 0);
  4296. for (i = 0; i < ATA_MAX_DEVICES; i++)
  4297. kfree(ap->device[i].id);
  4298. DPRINTK("EXIT\n");
  4299. return 1;
  4300. }
  4301. /**
  4302. * ata_std_ports - initialize ioaddr with standard port offsets.
  4303. * @ioaddr: IO address structure to be initialized
  4304. *
  4305. * Utility function which initializes data_addr, error_addr,
  4306. * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
  4307. * device_addr, status_addr, and command_addr to standard offsets
  4308. * relative to cmd_addr.
  4309. *
  4310. * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
  4311. */
  4312. void ata_std_ports(struct ata_ioports *ioaddr)
  4313. {
  4314. ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
  4315. ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
  4316. ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
  4317. ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
  4318. ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
  4319. ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
  4320. ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
  4321. ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
  4322. ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
  4323. ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
  4324. }
  4325. #ifdef CONFIG_PCI
  4326. void ata_pci_host_stop (struct ata_host_set *host_set)
  4327. {
  4328. struct pci_dev *pdev = to_pci_dev(host_set->dev);
  4329. pci_iounmap(pdev, host_set->mmio_base);
  4330. }
  4331. /**
  4332. * ata_pci_remove_one - PCI layer callback for device removal
  4333. * @pdev: PCI device that was removed
  4334. *
  4335. * PCI layer indicates to libata via this hook that
  4336. * hot-unplug or module unload event has occurred.
  4337. * Handle this by unregistering all objects associated
  4338. * with this PCI device. Free those objects. Then finally
  4339. * release PCI resources and disable device.
  4340. *
  4341. * LOCKING:
  4342. * Inherited from PCI layer (may sleep).
  4343. */
  4344. void ata_pci_remove_one (struct pci_dev *pdev)
  4345. {
  4346. struct device *dev = pci_dev_to_dev(pdev);
  4347. struct ata_host_set *host_set = dev_get_drvdata(dev);
  4348. ata_host_set_remove(host_set);
  4349. pci_release_regions(pdev);
  4350. pci_disable_device(pdev);
  4351. dev_set_drvdata(dev, NULL);
  4352. }
  4353. /* move to PCI subsystem */
  4354. int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
  4355. {
  4356. unsigned long tmp = 0;
  4357. switch (bits->width) {
  4358. case 1: {
  4359. u8 tmp8 = 0;
  4360. pci_read_config_byte(pdev, bits->reg, &tmp8);
  4361. tmp = tmp8;
  4362. break;
  4363. }
  4364. case 2: {
  4365. u16 tmp16 = 0;
  4366. pci_read_config_word(pdev, bits->reg, &tmp16);
  4367. tmp = tmp16;
  4368. break;
  4369. }
  4370. case 4: {
  4371. u32 tmp32 = 0;
  4372. pci_read_config_dword(pdev, bits->reg, &tmp32);
  4373. tmp = tmp32;
  4374. break;
  4375. }
  4376. default:
  4377. return -EINVAL;
  4378. }
  4379. tmp &= bits->mask;
  4380. return (tmp == bits->val) ? 1 : 0;
  4381. }
  4382. int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
  4383. {
  4384. pci_save_state(pdev);
  4385. pci_disable_device(pdev);
  4386. pci_set_power_state(pdev, PCI_D3hot);
  4387. return 0;
  4388. }
  4389. int ata_pci_device_resume(struct pci_dev *pdev)
  4390. {
  4391. pci_set_power_state(pdev, PCI_D0);
  4392. pci_restore_state(pdev);
  4393. pci_enable_device(pdev);
  4394. pci_set_master(pdev);
  4395. return 0;
  4396. }
  4397. #endif /* CONFIG_PCI */
  4398. static int __init ata_init(void)
  4399. {
  4400. ata_wq = create_workqueue("ata");
  4401. if (!ata_wq)
  4402. return -ENOMEM;
  4403. printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
  4404. return 0;
  4405. }
  4406. static void __exit ata_exit(void)
  4407. {
  4408. destroy_workqueue(ata_wq);
  4409. }
  4410. module_init(ata_init);
  4411. module_exit(ata_exit);
  4412. static unsigned long ratelimit_time;
  4413. static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
  4414. int ata_ratelimit(void)
  4415. {
  4416. int rc;
  4417. unsigned long flags;
  4418. spin_lock_irqsave(&ata_ratelimit_lock, flags);
  4419. if (time_after(jiffies, ratelimit_time)) {
  4420. rc = 1;
  4421. ratelimit_time = jiffies + (HZ/5);
  4422. } else
  4423. rc = 0;
  4424. spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
  4425. return rc;
  4426. }
  4427. /*
  4428. * libata is essentially a library of internal helper functions for
  4429. * low-level ATA host controller drivers. As such, the API/ABI is
  4430. * likely to change as new drivers are added and updated.
  4431. * Do not depend on ABI/API stability.
  4432. */
  4433. EXPORT_SYMBOL_GPL(ata_std_bios_param);
  4434. EXPORT_SYMBOL_GPL(ata_std_ports);
  4435. EXPORT_SYMBOL_GPL(ata_device_add);
  4436. EXPORT_SYMBOL_GPL(ata_host_set_remove);
  4437. EXPORT_SYMBOL_GPL(ata_sg_init);
  4438. EXPORT_SYMBOL_GPL(ata_sg_init_one);
  4439. EXPORT_SYMBOL_GPL(__ata_qc_complete);
  4440. EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
  4441. EXPORT_SYMBOL_GPL(ata_tf_load);
  4442. EXPORT_SYMBOL_GPL(ata_tf_read);
  4443. EXPORT_SYMBOL_GPL(ata_noop_dev_select);
  4444. EXPORT_SYMBOL_GPL(ata_std_dev_select);
  4445. EXPORT_SYMBOL_GPL(ata_tf_to_fis);
  4446. EXPORT_SYMBOL_GPL(ata_tf_from_fis);
  4447. EXPORT_SYMBOL_GPL(ata_check_status);
  4448. EXPORT_SYMBOL_GPL(ata_altstatus);
  4449. EXPORT_SYMBOL_GPL(ata_exec_command);
  4450. EXPORT_SYMBOL_GPL(ata_port_start);
  4451. EXPORT_SYMBOL_GPL(ata_port_stop);
  4452. EXPORT_SYMBOL_GPL(ata_host_stop);
  4453. EXPORT_SYMBOL_GPL(ata_interrupt);
  4454. EXPORT_SYMBOL_GPL(ata_qc_prep);
  4455. EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
  4456. EXPORT_SYMBOL_GPL(ata_bmdma_setup);
  4457. EXPORT_SYMBOL_GPL(ata_bmdma_start);
  4458. EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
  4459. EXPORT_SYMBOL_GPL(ata_bmdma_status);
  4460. EXPORT_SYMBOL_GPL(ata_bmdma_stop);
  4461. EXPORT_SYMBOL_GPL(ata_port_probe);
  4462. EXPORT_SYMBOL_GPL(sata_phy_reset);
  4463. EXPORT_SYMBOL_GPL(__sata_phy_reset);
  4464. EXPORT_SYMBOL_GPL(ata_bus_reset);
  4465. EXPORT_SYMBOL_GPL(ata_std_probeinit);
  4466. EXPORT_SYMBOL_GPL(ata_std_softreset);
  4467. EXPORT_SYMBOL_GPL(sata_std_hardreset);
  4468. EXPORT_SYMBOL_GPL(ata_std_postreset);
  4469. EXPORT_SYMBOL_GPL(ata_std_probe_reset);
  4470. EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
  4471. EXPORT_SYMBOL_GPL(ata_dev_revalidate);
  4472. EXPORT_SYMBOL_GPL(ata_dev_classify);
  4473. EXPORT_SYMBOL_GPL(ata_dev_pair);
  4474. EXPORT_SYMBOL_GPL(ata_port_disable);
  4475. EXPORT_SYMBOL_GPL(ata_ratelimit);
  4476. EXPORT_SYMBOL_GPL(ata_busy_sleep);
  4477. EXPORT_SYMBOL_GPL(ata_port_queue_task);
  4478. EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
  4479. EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
  4480. EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
  4481. EXPORT_SYMBOL_GPL(ata_scsi_release);
  4482. EXPORT_SYMBOL_GPL(ata_host_intr);
  4483. EXPORT_SYMBOL_GPL(ata_id_string);
  4484. EXPORT_SYMBOL_GPL(ata_id_c_string);
  4485. EXPORT_SYMBOL_GPL(ata_scsi_simulate);
  4486. EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
  4487. EXPORT_SYMBOL_GPL(ata_timing_compute);
  4488. EXPORT_SYMBOL_GPL(ata_timing_merge);
  4489. #ifdef CONFIG_PCI
  4490. EXPORT_SYMBOL_GPL(pci_test_config_bits);
  4491. EXPORT_SYMBOL_GPL(ata_pci_host_stop);
  4492. EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
  4493. EXPORT_SYMBOL_GPL(ata_pci_init_one);
  4494. EXPORT_SYMBOL_GPL(ata_pci_remove_one);
  4495. EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
  4496. EXPORT_SYMBOL_GPL(ata_pci_device_resume);
  4497. EXPORT_SYMBOL_GPL(ata_pci_default_filter);
  4498. EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
  4499. #endif /* CONFIG_PCI */
  4500. EXPORT_SYMBOL_GPL(ata_device_suspend);
  4501. EXPORT_SYMBOL_GPL(ata_device_resume);
  4502. EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
  4503. EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
  4504. EXPORT_SYMBOL_GPL(ata_scsi_error);
  4505. EXPORT_SYMBOL_GPL(ata_eng_timeout);
  4506. EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
  4507. EXPORT_SYMBOL_GPL(ata_eh_qc_retry);