mpt2sas_base.c 108 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include <linux/time.h>
  58. #include "mpt2sas_base.h"
  59. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  60. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  61. #define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */
  62. static int max_queue_depth = -1;
  63. module_param(max_queue_depth, int, 0);
  64. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  65. static int max_sgl_entries = -1;
  66. module_param(max_sgl_entries, int, 0);
  67. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  68. static int msix_disable = -1;
  69. module_param(msix_disable, int, 0);
  70. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  71. /* diag_buffer_enable is bitwise
  72. * bit 0 set = TRACE
  73. * bit 1 set = SNAPSHOT
  74. * bit 2 set = EXTENDED
  75. *
  76. * Either bit can be set, or both
  77. */
  78. static int diag_buffer_enable;
  79. module_param(diag_buffer_enable, int, 0);
  80. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  81. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  82. int mpt2sas_fwfault_debug;
  83. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  84. "and halt firmware - (default=0)");
  85. /**
  86. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  87. *
  88. */
  89. static int
  90. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  91. {
  92. int ret = param_set_int(val, kp);
  93. struct MPT2SAS_ADAPTER *ioc;
  94. if (ret)
  95. return ret;
  96. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  97. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  98. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  99. return 0;
  100. }
  101. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  102. param_get_int, &mpt2sas_fwfault_debug, 0644);
  103. /**
  104. * _base_fault_reset_work - workq handling ioc fault conditions
  105. * @work: input argument, used to derive ioc
  106. * Context: sleep.
  107. *
  108. * Return nothing.
  109. */
  110. static void
  111. _base_fault_reset_work(struct work_struct *work)
  112. {
  113. struct MPT2SAS_ADAPTER *ioc =
  114. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  115. unsigned long flags;
  116. u32 doorbell;
  117. int rc;
  118. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  119. if (ioc->shost_recovery)
  120. goto rearm_timer;
  121. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  122. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  123. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  124. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  125. FORCE_BIG_HAMMER);
  126. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  127. __func__, (rc == 0) ? "success" : "failed");
  128. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  129. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  130. mpt2sas_base_fault_info(ioc, doorbell &
  131. MPI2_DOORBELL_DATA_MASK);
  132. }
  133. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  134. rearm_timer:
  135. if (ioc->fault_reset_work_q)
  136. queue_delayed_work(ioc->fault_reset_work_q,
  137. &ioc->fault_reset_work,
  138. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  139. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  140. }
  141. /**
  142. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  143. * @ioc: per adapter object
  144. * Context: sleep.
  145. *
  146. * Return nothing.
  147. */
  148. void
  149. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  150. {
  151. unsigned long flags;
  152. if (ioc->fault_reset_work_q)
  153. return;
  154. /* initialize fault polling */
  155. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  156. snprintf(ioc->fault_reset_work_q_name,
  157. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  158. ioc->fault_reset_work_q =
  159. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  160. if (!ioc->fault_reset_work_q) {
  161. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  162. ioc->name, __func__, __LINE__);
  163. return;
  164. }
  165. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  166. if (ioc->fault_reset_work_q)
  167. queue_delayed_work(ioc->fault_reset_work_q,
  168. &ioc->fault_reset_work,
  169. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  170. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  171. }
  172. /**
  173. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  174. * @ioc: per adapter object
  175. * Context: sleep.
  176. *
  177. * Return nothing.
  178. */
  179. void
  180. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  181. {
  182. unsigned long flags;
  183. struct workqueue_struct *wq;
  184. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  185. wq = ioc->fault_reset_work_q;
  186. ioc->fault_reset_work_q = NULL;
  187. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  188. if (wq) {
  189. if (!cancel_delayed_work(&ioc->fault_reset_work))
  190. flush_workqueue(wq);
  191. destroy_workqueue(wq);
  192. }
  193. }
  194. /**
  195. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  196. * @ioc: per adapter object
  197. * @fault_code: fault code
  198. *
  199. * Return nothing.
  200. */
  201. void
  202. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  203. {
  204. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  205. ioc->name, fault_code);
  206. }
  207. /**
  208. * mpt2sas_halt_firmware - halt's mpt controller firmware
  209. * @ioc: per adapter object
  210. *
  211. * For debugging timeout related issues. Writing 0xCOFFEE00
  212. * to the doorbell register will halt controller firmware. With
  213. * the purpose to stop both driver and firmware, the enduser can
  214. * obtain a ring buffer from controller UART.
  215. */
  216. void
  217. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  218. {
  219. u32 doorbell;
  220. if (!ioc->fwfault_debug)
  221. return;
  222. dump_stack();
  223. doorbell = readl(&ioc->chip->Doorbell);
  224. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  225. mpt2sas_base_fault_info(ioc , doorbell);
  226. else {
  227. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  228. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  229. "timeout\n", ioc->name);
  230. }
  231. panic("panic in %s\n", __func__);
  232. }
  233. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  234. /**
  235. * _base_sas_ioc_info - verbose translation of the ioc status
  236. * @ioc: per adapter object
  237. * @mpi_reply: reply mf payload returned from firmware
  238. * @request_hdr: request mf
  239. *
  240. * Return nothing.
  241. */
  242. static void
  243. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  244. MPI2RequestHeader_t *request_hdr)
  245. {
  246. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  247. MPI2_IOCSTATUS_MASK;
  248. char *desc = NULL;
  249. u16 frame_sz;
  250. char *func_str = NULL;
  251. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  252. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  253. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  254. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  255. return;
  256. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  257. return;
  258. switch (ioc_status) {
  259. /****************************************************************************
  260. * Common IOCStatus values for all replies
  261. ****************************************************************************/
  262. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  263. desc = "invalid function";
  264. break;
  265. case MPI2_IOCSTATUS_BUSY:
  266. desc = "busy";
  267. break;
  268. case MPI2_IOCSTATUS_INVALID_SGL:
  269. desc = "invalid sgl";
  270. break;
  271. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  272. desc = "internal error";
  273. break;
  274. case MPI2_IOCSTATUS_INVALID_VPID:
  275. desc = "invalid vpid";
  276. break;
  277. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  278. desc = "insufficient resources";
  279. break;
  280. case MPI2_IOCSTATUS_INVALID_FIELD:
  281. desc = "invalid field";
  282. break;
  283. case MPI2_IOCSTATUS_INVALID_STATE:
  284. desc = "invalid state";
  285. break;
  286. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  287. desc = "op state not supported";
  288. break;
  289. /****************************************************************************
  290. * Config IOCStatus values
  291. ****************************************************************************/
  292. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  293. desc = "config invalid action";
  294. break;
  295. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  296. desc = "config invalid type";
  297. break;
  298. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  299. desc = "config invalid page";
  300. break;
  301. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  302. desc = "config invalid data";
  303. break;
  304. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  305. desc = "config no defaults";
  306. break;
  307. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  308. desc = "config cant commit";
  309. break;
  310. /****************************************************************************
  311. * SCSI IO Reply
  312. ****************************************************************************/
  313. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  314. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  315. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  316. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  317. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  318. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  319. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  320. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  321. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  322. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  323. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  324. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  325. break;
  326. /****************************************************************************
  327. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  328. ****************************************************************************/
  329. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  330. desc = "eedp guard error";
  331. break;
  332. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  333. desc = "eedp ref tag error";
  334. break;
  335. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  336. desc = "eedp app tag error";
  337. break;
  338. /****************************************************************************
  339. * SCSI Target values
  340. ****************************************************************************/
  341. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  342. desc = "target invalid io index";
  343. break;
  344. case MPI2_IOCSTATUS_TARGET_ABORTED:
  345. desc = "target aborted";
  346. break;
  347. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  348. desc = "target no conn retryable";
  349. break;
  350. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  351. desc = "target no connection";
  352. break;
  353. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  354. desc = "target xfer count mismatch";
  355. break;
  356. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  357. desc = "target data offset error";
  358. break;
  359. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  360. desc = "target too much write data";
  361. break;
  362. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  363. desc = "target iu too short";
  364. break;
  365. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  366. desc = "target ack nak timeout";
  367. break;
  368. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  369. desc = "target nak received";
  370. break;
  371. /****************************************************************************
  372. * Serial Attached SCSI values
  373. ****************************************************************************/
  374. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  375. desc = "smp request failed";
  376. break;
  377. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  378. desc = "smp data overrun";
  379. break;
  380. /****************************************************************************
  381. * Diagnostic Buffer Post / Diagnostic Release values
  382. ****************************************************************************/
  383. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  384. desc = "diagnostic released";
  385. break;
  386. default:
  387. break;
  388. }
  389. if (!desc)
  390. return;
  391. switch (request_hdr->Function) {
  392. case MPI2_FUNCTION_CONFIG:
  393. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  394. func_str = "config_page";
  395. break;
  396. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  397. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  398. func_str = "task_mgmt";
  399. break;
  400. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  401. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  402. func_str = "sas_iounit_ctl";
  403. break;
  404. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  405. frame_sz = sizeof(Mpi2SepRequest_t);
  406. func_str = "enclosure";
  407. break;
  408. case MPI2_FUNCTION_IOC_INIT:
  409. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  410. func_str = "ioc_init";
  411. break;
  412. case MPI2_FUNCTION_PORT_ENABLE:
  413. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  414. func_str = "port_enable";
  415. break;
  416. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  417. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  418. func_str = "smp_passthru";
  419. break;
  420. default:
  421. frame_sz = 32;
  422. func_str = "unknown";
  423. break;
  424. }
  425. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  426. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  427. _debug_dump_mf(request_hdr, frame_sz/4);
  428. }
  429. /**
  430. * _base_display_event_data - verbose translation of firmware asyn events
  431. * @ioc: per adapter object
  432. * @mpi_reply: reply mf payload returned from firmware
  433. *
  434. * Return nothing.
  435. */
  436. static void
  437. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  438. Mpi2EventNotificationReply_t *mpi_reply)
  439. {
  440. char *desc = NULL;
  441. u16 event;
  442. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  443. return;
  444. event = le16_to_cpu(mpi_reply->Event);
  445. switch (event) {
  446. case MPI2_EVENT_LOG_DATA:
  447. desc = "Log Data";
  448. break;
  449. case MPI2_EVENT_STATE_CHANGE:
  450. desc = "Status Change";
  451. break;
  452. case MPI2_EVENT_HARD_RESET_RECEIVED:
  453. desc = "Hard Reset Received";
  454. break;
  455. case MPI2_EVENT_EVENT_CHANGE:
  456. desc = "Event Change";
  457. break;
  458. case MPI2_EVENT_TASK_SET_FULL:
  459. desc = "Task Set Full";
  460. break;
  461. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  462. desc = "Device Status Change";
  463. break;
  464. case MPI2_EVENT_IR_OPERATION_STATUS:
  465. desc = "IR Operation Status";
  466. break;
  467. case MPI2_EVENT_SAS_DISCOVERY:
  468. {
  469. Mpi2EventDataSasDiscovery_t *event_data =
  470. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  471. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  472. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  473. "start" : "stop");
  474. if (event_data->DiscoveryStatus)
  475. printk("discovery_status(0x%08x)",
  476. le32_to_cpu(event_data->DiscoveryStatus));
  477. printk("\n");
  478. return;
  479. }
  480. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  481. desc = "SAS Broadcast Primitive";
  482. break;
  483. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  484. desc = "SAS Init Device Status Change";
  485. break;
  486. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  487. desc = "SAS Init Table Overflow";
  488. break;
  489. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  490. desc = "SAS Topology Change List";
  491. break;
  492. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  493. desc = "SAS Enclosure Device Status Change";
  494. break;
  495. case MPI2_EVENT_IR_VOLUME:
  496. desc = "IR Volume";
  497. break;
  498. case MPI2_EVENT_IR_PHYSICAL_DISK:
  499. desc = "IR Physical Disk";
  500. break;
  501. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  502. desc = "IR Configuration Change List";
  503. break;
  504. case MPI2_EVENT_LOG_ENTRY_ADDED:
  505. desc = "Log Entry Added";
  506. break;
  507. }
  508. if (!desc)
  509. return;
  510. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  511. }
  512. #endif
  513. /**
  514. * _base_sas_log_info - verbose translation of firmware log info
  515. * @ioc: per adapter object
  516. * @log_info: log info
  517. *
  518. * Return nothing.
  519. */
  520. static void
  521. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  522. {
  523. union loginfo_type {
  524. u32 loginfo;
  525. struct {
  526. u32 subcode:16;
  527. u32 code:8;
  528. u32 originator:4;
  529. u32 bus_type:4;
  530. } dw;
  531. };
  532. union loginfo_type sas_loginfo;
  533. char *originator_str = NULL;
  534. sas_loginfo.loginfo = log_info;
  535. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  536. return;
  537. /* each nexus loss loginfo */
  538. if (log_info == 0x31170000)
  539. return;
  540. /* eat the loginfos associated with task aborts */
  541. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  542. 0x31140000 || log_info == 0x31130000))
  543. return;
  544. switch (sas_loginfo.dw.originator) {
  545. case 0:
  546. originator_str = "IOP";
  547. break;
  548. case 1:
  549. originator_str = "PL";
  550. break;
  551. case 2:
  552. originator_str = "IR";
  553. break;
  554. }
  555. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  556. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  557. originator_str, sas_loginfo.dw.code,
  558. sas_loginfo.dw.subcode);
  559. }
  560. /**
  561. * _base_display_reply_info -
  562. * @ioc: per adapter object
  563. * @smid: system request message index
  564. * @msix_index: MSIX table index supplied by the OS
  565. * @reply: reply message frame(lower 32bit addr)
  566. *
  567. * Return nothing.
  568. */
  569. static void
  570. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  571. u32 reply)
  572. {
  573. MPI2DefaultReply_t *mpi_reply;
  574. u16 ioc_status;
  575. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  576. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  577. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  578. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  579. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  580. _base_sas_ioc_info(ioc , mpi_reply,
  581. mpt2sas_base_get_msg_frame(ioc, smid));
  582. }
  583. #endif
  584. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  585. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  586. }
  587. /**
  588. * mpt2sas_base_done - base internal command completion routine
  589. * @ioc: per adapter object
  590. * @smid: system request message index
  591. * @msix_index: MSIX table index supplied by the OS
  592. * @reply: reply message frame(lower 32bit addr)
  593. *
  594. * Return 1 meaning mf should be freed from _base_interrupt
  595. * 0 means the mf is freed from this function.
  596. */
  597. u8
  598. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  599. u32 reply)
  600. {
  601. MPI2DefaultReply_t *mpi_reply;
  602. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  603. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  604. return 1;
  605. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  606. return 1;
  607. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  608. if (mpi_reply) {
  609. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  610. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  611. }
  612. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  613. complete(&ioc->base_cmds.done);
  614. return 1;
  615. }
  616. /**
  617. * _base_async_event - main callback handler for firmware asyn events
  618. * @ioc: per adapter object
  619. * @msix_index: MSIX table index supplied by the OS
  620. * @reply: reply message frame(lower 32bit addr)
  621. *
  622. * Return 1 meaning mf should be freed from _base_interrupt
  623. * 0 means the mf is freed from this function.
  624. */
  625. static u8
  626. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  627. {
  628. Mpi2EventNotificationReply_t *mpi_reply;
  629. Mpi2EventAckRequest_t *ack_request;
  630. u16 smid;
  631. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  632. if (!mpi_reply)
  633. return 1;
  634. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  635. return 1;
  636. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  637. _base_display_event_data(ioc, mpi_reply);
  638. #endif
  639. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  640. goto out;
  641. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  642. if (!smid) {
  643. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  644. ioc->name, __func__);
  645. goto out;
  646. }
  647. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  648. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  649. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  650. ack_request->Event = mpi_reply->Event;
  651. ack_request->EventContext = mpi_reply->EventContext;
  652. ack_request->VF_ID = 0; /* TODO */
  653. ack_request->VP_ID = 0;
  654. mpt2sas_base_put_smid_default(ioc, smid);
  655. out:
  656. /* scsih callback handler */
  657. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  658. /* ctl callback handler */
  659. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  660. return 1;
  661. }
  662. /**
  663. * _base_get_cb_idx - obtain the callback index
  664. * @ioc: per adapter object
  665. * @smid: system request message index
  666. *
  667. * Return callback index.
  668. */
  669. static u8
  670. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  671. {
  672. int i;
  673. u8 cb_idx = 0xFF;
  674. if (smid >= ioc->hi_priority_smid) {
  675. if (smid < ioc->internal_smid) {
  676. i = smid - ioc->hi_priority_smid;
  677. cb_idx = ioc->hpr_lookup[i].cb_idx;
  678. } else {
  679. i = smid - ioc->internal_smid;
  680. cb_idx = ioc->internal_lookup[i].cb_idx;
  681. }
  682. } else {
  683. i = smid - 1;
  684. cb_idx = ioc->scsi_lookup[i].cb_idx;
  685. }
  686. return cb_idx;
  687. }
  688. /**
  689. * _base_mask_interrupts - disable interrupts
  690. * @ioc: per adapter object
  691. *
  692. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  693. *
  694. * Return nothing.
  695. */
  696. static void
  697. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  698. {
  699. u32 him_register;
  700. ioc->mask_interrupts = 1;
  701. him_register = readl(&ioc->chip->HostInterruptMask);
  702. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  703. writel(him_register, &ioc->chip->HostInterruptMask);
  704. readl(&ioc->chip->HostInterruptMask);
  705. }
  706. /**
  707. * _base_unmask_interrupts - enable interrupts
  708. * @ioc: per adapter object
  709. *
  710. * Enabling only Reply Interrupts
  711. *
  712. * Return nothing.
  713. */
  714. static void
  715. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  716. {
  717. u32 him_register;
  718. him_register = readl(&ioc->chip->HostInterruptMask);
  719. him_register &= ~MPI2_HIM_RIM;
  720. writel(him_register, &ioc->chip->HostInterruptMask);
  721. ioc->mask_interrupts = 0;
  722. }
  723. union reply_descriptor {
  724. u64 word;
  725. struct {
  726. u32 low;
  727. u32 high;
  728. } u;
  729. };
  730. /**
  731. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  732. * @irq: irq number (not used)
  733. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  734. * @r: pt_regs pointer (not used)
  735. *
  736. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  737. */
  738. static irqreturn_t
  739. _base_interrupt(int irq, void *bus_id)
  740. {
  741. union reply_descriptor rd;
  742. u32 completed_cmds;
  743. u8 request_desript_type;
  744. u16 smid;
  745. u8 cb_idx;
  746. u32 reply;
  747. u8 msix_index;
  748. struct MPT2SAS_ADAPTER *ioc = bus_id;
  749. Mpi2ReplyDescriptorsUnion_t *rpf;
  750. u8 rc;
  751. if (ioc->mask_interrupts)
  752. return IRQ_NONE;
  753. rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
  754. request_desript_type = rpf->Default.ReplyFlags
  755. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  756. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  757. return IRQ_NONE;
  758. completed_cmds = 0;
  759. do {
  760. rd.word = rpf->Words;
  761. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  762. goto out;
  763. reply = 0;
  764. cb_idx = 0xFF;
  765. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  766. msix_index = rpf->Default.MSIxIndex;
  767. if (request_desript_type ==
  768. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  769. reply = le32_to_cpu
  770. (rpf->AddressReply.ReplyFrameAddress);
  771. } else if (request_desript_type ==
  772. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  773. goto next;
  774. else if (request_desript_type ==
  775. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  776. goto next;
  777. if (smid)
  778. cb_idx = _base_get_cb_idx(ioc, smid);
  779. if (smid && cb_idx != 0xFF) {
  780. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  781. reply);
  782. if (reply)
  783. _base_display_reply_info(ioc, smid, msix_index,
  784. reply);
  785. if (rc)
  786. mpt2sas_base_free_smid(ioc, smid);
  787. }
  788. if (!smid)
  789. _base_async_event(ioc, msix_index, reply);
  790. /* reply free queue handling */
  791. if (reply) {
  792. ioc->reply_free_host_index =
  793. (ioc->reply_free_host_index ==
  794. (ioc->reply_free_queue_depth - 1)) ?
  795. 0 : ioc->reply_free_host_index + 1;
  796. ioc->reply_free[ioc->reply_free_host_index] =
  797. cpu_to_le32(reply);
  798. wmb();
  799. writel(ioc->reply_free_host_index,
  800. &ioc->chip->ReplyFreeHostIndex);
  801. }
  802. next:
  803. rpf->Words = ULLONG_MAX;
  804. ioc->reply_post_host_index = (ioc->reply_post_host_index ==
  805. (ioc->reply_post_queue_depth - 1)) ? 0 :
  806. ioc->reply_post_host_index + 1;
  807. request_desript_type =
  808. ioc->reply_post_free[ioc->reply_post_host_index].Default.
  809. ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  810. completed_cmds++;
  811. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  812. goto out;
  813. if (!ioc->reply_post_host_index)
  814. rpf = ioc->reply_post_free;
  815. else
  816. rpf++;
  817. } while (1);
  818. out:
  819. if (!completed_cmds)
  820. return IRQ_NONE;
  821. wmb();
  822. writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
  823. return IRQ_HANDLED;
  824. }
  825. /**
  826. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  827. * @cb_idx: callback index
  828. *
  829. * Return nothing.
  830. */
  831. void
  832. mpt2sas_base_release_callback_handler(u8 cb_idx)
  833. {
  834. mpt_callbacks[cb_idx] = NULL;
  835. }
  836. /**
  837. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  838. * @cb_func: callback function
  839. *
  840. * Returns cb_func.
  841. */
  842. u8
  843. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  844. {
  845. u8 cb_idx;
  846. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  847. if (mpt_callbacks[cb_idx] == NULL)
  848. break;
  849. mpt_callbacks[cb_idx] = cb_func;
  850. return cb_idx;
  851. }
  852. /**
  853. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  854. *
  855. * Return nothing.
  856. */
  857. void
  858. mpt2sas_base_initialize_callback_handler(void)
  859. {
  860. u8 cb_idx;
  861. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  862. mpt2sas_base_release_callback_handler(cb_idx);
  863. }
  864. /**
  865. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  866. * @ioc: per adapter object
  867. * @paddr: virtual address for SGE
  868. *
  869. * Create a zero length scatter gather entry to insure the IOCs hardware has
  870. * something to use if the target device goes brain dead and tries
  871. * to send data even when none is asked for.
  872. *
  873. * Return nothing.
  874. */
  875. void
  876. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  877. {
  878. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  879. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  880. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  881. MPI2_SGE_FLAGS_SHIFT);
  882. ioc->base_add_sg_single(paddr, flags_length, -1);
  883. }
  884. /**
  885. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  886. * @paddr: virtual address for SGE
  887. * @flags_length: SGE flags and data transfer length
  888. * @dma_addr: Physical address
  889. *
  890. * Return nothing.
  891. */
  892. static void
  893. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  894. {
  895. Mpi2SGESimple32_t *sgel = paddr;
  896. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  897. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  898. sgel->FlagsLength = cpu_to_le32(flags_length);
  899. sgel->Address = cpu_to_le32(dma_addr);
  900. }
  901. /**
  902. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  903. * @paddr: virtual address for SGE
  904. * @flags_length: SGE flags and data transfer length
  905. * @dma_addr: Physical address
  906. *
  907. * Return nothing.
  908. */
  909. static void
  910. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  911. {
  912. Mpi2SGESimple64_t *sgel = paddr;
  913. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  914. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  915. sgel->FlagsLength = cpu_to_le32(flags_length);
  916. sgel->Address = cpu_to_le64(dma_addr);
  917. }
  918. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  919. /**
  920. * _base_config_dma_addressing - set dma addressing
  921. * @ioc: per adapter object
  922. * @pdev: PCI device struct
  923. *
  924. * Returns 0 for success, non-zero for failure.
  925. */
  926. static int
  927. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  928. {
  929. struct sysinfo s;
  930. char *desc = NULL;
  931. if (sizeof(dma_addr_t) > 4) {
  932. const uint64_t required_mask =
  933. dma_get_required_mask(&pdev->dev);
  934. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  935. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  936. DMA_BIT_MASK(64))) {
  937. ioc->base_add_sg_single = &_base_add_sg_single_64;
  938. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  939. desc = "64";
  940. goto out;
  941. }
  942. }
  943. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  944. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  945. ioc->base_add_sg_single = &_base_add_sg_single_32;
  946. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  947. desc = "32";
  948. } else
  949. return -ENODEV;
  950. out:
  951. si_meminfo(&s);
  952. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  953. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  954. return 0;
  955. }
  956. /**
  957. * _base_save_msix_table - backup msix vector table
  958. * @ioc: per adapter object
  959. *
  960. * This address an errata where diag reset clears out the table
  961. */
  962. static void
  963. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  964. {
  965. int i;
  966. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  967. return;
  968. for (i = 0; i < ioc->msix_vector_count; i++)
  969. ioc->msix_table_backup[i] = ioc->msix_table[i];
  970. }
  971. /**
  972. * _base_restore_msix_table - this restores the msix vector table
  973. * @ioc: per adapter object
  974. *
  975. */
  976. static void
  977. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  978. {
  979. int i;
  980. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  981. return;
  982. for (i = 0; i < ioc->msix_vector_count; i++)
  983. ioc->msix_table[i] = ioc->msix_table_backup[i];
  984. }
  985. /**
  986. * _base_check_enable_msix - checks MSIX capabable.
  987. * @ioc: per adapter object
  988. *
  989. * Check to see if card is capable of MSIX, and set number
  990. * of avaliable msix vectors
  991. */
  992. static int
  993. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  994. {
  995. int base;
  996. u16 message_control;
  997. u32 msix_table_offset;
  998. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  999. if (!base) {
  1000. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1001. "supported\n", ioc->name));
  1002. return -EINVAL;
  1003. }
  1004. /* get msix vector count */
  1005. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1006. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1007. /* get msix table */
  1008. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  1009. msix_table_offset &= 0xFFFFFFF8;
  1010. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  1011. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1012. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  1013. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  1014. return 0;
  1015. }
  1016. /**
  1017. * _base_disable_msix - disables msix
  1018. * @ioc: per adapter object
  1019. *
  1020. */
  1021. static void
  1022. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1023. {
  1024. if (ioc->msix_enable) {
  1025. pci_disable_msix(ioc->pdev);
  1026. kfree(ioc->msix_table_backup);
  1027. ioc->msix_table_backup = NULL;
  1028. ioc->msix_enable = 0;
  1029. }
  1030. }
  1031. /**
  1032. * _base_enable_msix - enables msix, failback to io_apic
  1033. * @ioc: per adapter object
  1034. *
  1035. */
  1036. static int
  1037. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1038. {
  1039. struct msix_entry entries;
  1040. int r;
  1041. u8 try_msix = 0;
  1042. if (msix_disable == -1 || msix_disable == 0)
  1043. try_msix = 1;
  1044. if (!try_msix)
  1045. goto try_ioapic;
  1046. if (_base_check_enable_msix(ioc) != 0)
  1047. goto try_ioapic;
  1048. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  1049. sizeof(u32), GFP_KERNEL);
  1050. if (!ioc->msix_table_backup) {
  1051. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  1052. "msix_table_backup failed!!!\n", ioc->name));
  1053. goto try_ioapic;
  1054. }
  1055. memset(&entries, 0, sizeof(struct msix_entry));
  1056. r = pci_enable_msix(ioc->pdev, &entries, 1);
  1057. if (r) {
  1058. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1059. "failed (r=%d) !!!\n", ioc->name, r));
  1060. goto try_ioapic;
  1061. }
  1062. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  1063. ioc->name, ioc);
  1064. if (r) {
  1065. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  1066. "interrupt %d !!!\n", ioc->name, entries.vector));
  1067. pci_disable_msix(ioc->pdev);
  1068. goto try_ioapic;
  1069. }
  1070. ioc->pci_irq = entries.vector;
  1071. ioc->msix_enable = 1;
  1072. return 0;
  1073. /* failback to io_apic interrupt routing */
  1074. try_ioapic:
  1075. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  1076. ioc->name, ioc);
  1077. if (r) {
  1078. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1079. ioc->name, ioc->pdev->irq);
  1080. r = -EBUSY;
  1081. goto out_fail;
  1082. }
  1083. ioc->pci_irq = ioc->pdev->irq;
  1084. return 0;
  1085. out_fail:
  1086. return r;
  1087. }
  1088. /**
  1089. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1090. * @ioc: per adapter object
  1091. *
  1092. * Returns 0 for success, non-zero for failure.
  1093. */
  1094. int
  1095. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1096. {
  1097. struct pci_dev *pdev = ioc->pdev;
  1098. u32 memap_sz;
  1099. u32 pio_sz;
  1100. int i, r = 0;
  1101. u64 pio_chip = 0;
  1102. u64 chip_phys = 0;
  1103. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
  1104. ioc->name, __func__));
  1105. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1106. if (pci_enable_device_mem(pdev)) {
  1107. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1108. "failed\n", ioc->name);
  1109. return -ENODEV;
  1110. }
  1111. if (pci_request_selected_regions(pdev, ioc->bars,
  1112. MPT2SAS_DRIVER_NAME)) {
  1113. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1114. "failed\n", ioc->name);
  1115. r = -ENODEV;
  1116. goto out_fail;
  1117. }
  1118. pci_set_master(pdev);
  1119. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1120. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1121. ioc->name, pci_name(pdev));
  1122. r = -ENODEV;
  1123. goto out_fail;
  1124. }
  1125. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1126. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1127. if (pio_sz)
  1128. continue;
  1129. pio_chip = (u64)pci_resource_start(pdev, i);
  1130. pio_sz = pci_resource_len(pdev, i);
  1131. } else {
  1132. if (memap_sz)
  1133. continue;
  1134. /* verify memory resource is valid before using */
  1135. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1136. ioc->chip_phys = pci_resource_start(pdev, i);
  1137. chip_phys = (u64)ioc->chip_phys;
  1138. memap_sz = pci_resource_len(pdev, i);
  1139. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1140. if (ioc->chip == NULL) {
  1141. printk(MPT2SAS_ERR_FMT "unable to map "
  1142. "adapter memory!\n", ioc->name);
  1143. r = -EINVAL;
  1144. goto out_fail;
  1145. }
  1146. }
  1147. }
  1148. }
  1149. _base_mask_interrupts(ioc);
  1150. r = _base_enable_msix(ioc);
  1151. if (r)
  1152. goto out_fail;
  1153. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1154. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1155. "IO-APIC enabled"), ioc->pci_irq);
  1156. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1157. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1158. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1159. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1160. return 0;
  1161. out_fail:
  1162. if (ioc->chip_phys)
  1163. iounmap(ioc->chip);
  1164. ioc->chip_phys = 0;
  1165. ioc->pci_irq = -1;
  1166. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1167. pci_disable_device(pdev);
  1168. return r;
  1169. }
  1170. /**
  1171. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1172. * @ioc: per adapter object
  1173. * @smid: system request message index(smid zero is invalid)
  1174. *
  1175. * Returns virt pointer to message frame.
  1176. */
  1177. void *
  1178. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1179. {
  1180. return (void *)(ioc->request + (smid * ioc->request_sz));
  1181. }
  1182. /**
  1183. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1184. * @ioc: per adapter object
  1185. * @smid: system request message index
  1186. *
  1187. * Returns virt pointer to sense buffer.
  1188. */
  1189. void *
  1190. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1191. {
  1192. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1193. }
  1194. /**
  1195. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1196. * @ioc: per adapter object
  1197. * @smid: system request message index
  1198. *
  1199. * Returns phys pointer to the low 32bit address of the sense buffer.
  1200. */
  1201. __le32
  1202. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1203. {
  1204. return cpu_to_le32(ioc->sense_dma +
  1205. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1206. }
  1207. /**
  1208. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1209. * @ioc: per adapter object
  1210. * @phys_addr: lower 32 physical addr of the reply
  1211. *
  1212. * Converts 32bit lower physical addr into a virt address.
  1213. */
  1214. void *
  1215. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1216. {
  1217. if (!phys_addr)
  1218. return NULL;
  1219. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1220. }
  1221. /**
  1222. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1223. * @ioc: per adapter object
  1224. * @cb_idx: callback index
  1225. *
  1226. * Returns smid (zero is invalid)
  1227. */
  1228. u16
  1229. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1230. {
  1231. unsigned long flags;
  1232. struct request_tracker *request;
  1233. u16 smid;
  1234. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1235. if (list_empty(&ioc->internal_free_list)) {
  1236. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1237. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1238. ioc->name, __func__);
  1239. return 0;
  1240. }
  1241. request = list_entry(ioc->internal_free_list.next,
  1242. struct request_tracker, tracker_list);
  1243. request->cb_idx = cb_idx;
  1244. smid = request->smid;
  1245. list_del(&request->tracker_list);
  1246. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1247. return smid;
  1248. }
  1249. /**
  1250. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1251. * @ioc: per adapter object
  1252. * @cb_idx: callback index
  1253. * @scmd: pointer to scsi command object
  1254. *
  1255. * Returns smid (zero is invalid)
  1256. */
  1257. u16
  1258. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1259. struct scsi_cmnd *scmd)
  1260. {
  1261. unsigned long flags;
  1262. struct request_tracker *request;
  1263. u16 smid;
  1264. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1265. if (list_empty(&ioc->free_list)) {
  1266. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1267. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1268. ioc->name, __func__);
  1269. return 0;
  1270. }
  1271. request = list_entry(ioc->free_list.next,
  1272. struct request_tracker, tracker_list);
  1273. request->scmd = scmd;
  1274. request->cb_idx = cb_idx;
  1275. smid = request->smid;
  1276. list_del(&request->tracker_list);
  1277. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1278. return smid;
  1279. }
  1280. /**
  1281. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1282. * @ioc: per adapter object
  1283. * @cb_idx: callback index
  1284. *
  1285. * Returns smid (zero is invalid)
  1286. */
  1287. u16
  1288. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1289. {
  1290. unsigned long flags;
  1291. struct request_tracker *request;
  1292. u16 smid;
  1293. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1294. if (list_empty(&ioc->hpr_free_list)) {
  1295. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1296. return 0;
  1297. }
  1298. request = list_entry(ioc->hpr_free_list.next,
  1299. struct request_tracker, tracker_list);
  1300. request->cb_idx = cb_idx;
  1301. smid = request->smid;
  1302. list_del(&request->tracker_list);
  1303. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1304. return smid;
  1305. }
  1306. /**
  1307. * mpt2sas_base_free_smid - put smid back on free_list
  1308. * @ioc: per adapter object
  1309. * @smid: system request message index
  1310. *
  1311. * Return nothing.
  1312. */
  1313. void
  1314. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1315. {
  1316. unsigned long flags;
  1317. int i;
  1318. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1319. if (smid >= ioc->hi_priority_smid) {
  1320. if (smid < ioc->internal_smid) {
  1321. /* hi-priority */
  1322. i = smid - ioc->hi_priority_smid;
  1323. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1324. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1325. &ioc->hpr_free_list);
  1326. } else {
  1327. /* internal queue */
  1328. i = smid - ioc->internal_smid;
  1329. ioc->internal_lookup[i].cb_idx = 0xFF;
  1330. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1331. &ioc->internal_free_list);
  1332. }
  1333. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1334. return;
  1335. }
  1336. /* scsiio queue */
  1337. i = smid - 1;
  1338. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1339. ioc->scsi_lookup[i].scmd = NULL;
  1340. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1341. &ioc->free_list);
  1342. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1343. /*
  1344. * See _wait_for_commands_to_complete() call with regards to this code.
  1345. */
  1346. if (ioc->shost_recovery && ioc->pending_io_count) {
  1347. if (ioc->pending_io_count == 1)
  1348. wake_up(&ioc->reset_wq);
  1349. ioc->pending_io_count--;
  1350. }
  1351. }
  1352. /**
  1353. * _base_writeq - 64 bit write to MMIO
  1354. * @ioc: per adapter object
  1355. * @b: data payload
  1356. * @addr: address in MMIO space
  1357. * @writeq_lock: spin lock
  1358. *
  1359. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1360. * care of 32 bit environment where its not quarenteed to send the entire word
  1361. * in one transfer.
  1362. */
  1363. #ifndef writeq
  1364. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1365. spinlock_t *writeq_lock)
  1366. {
  1367. unsigned long flags;
  1368. __u64 data_out = cpu_to_le64(b);
  1369. spin_lock_irqsave(writeq_lock, flags);
  1370. writel((u32)(data_out), addr);
  1371. writel((u32)(data_out >> 32), (addr + 4));
  1372. spin_unlock_irqrestore(writeq_lock, flags);
  1373. }
  1374. #else
  1375. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1376. spinlock_t *writeq_lock)
  1377. {
  1378. writeq(cpu_to_le64(b), addr);
  1379. }
  1380. #endif
  1381. /**
  1382. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1383. * @ioc: per adapter object
  1384. * @smid: system request message index
  1385. * @handle: device handle
  1386. *
  1387. * Return nothing.
  1388. */
  1389. void
  1390. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1391. {
  1392. Mpi2RequestDescriptorUnion_t descriptor;
  1393. u64 *request = (u64 *)&descriptor;
  1394. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1395. descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
  1396. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1397. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1398. descriptor.SCSIIO.LMID = 0;
  1399. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1400. &ioc->scsi_lookup_lock);
  1401. }
  1402. /**
  1403. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1404. * @ioc: per adapter object
  1405. * @smid: system request message index
  1406. *
  1407. * Return nothing.
  1408. */
  1409. void
  1410. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1411. {
  1412. Mpi2RequestDescriptorUnion_t descriptor;
  1413. u64 *request = (u64 *)&descriptor;
  1414. descriptor.HighPriority.RequestFlags =
  1415. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1416. descriptor.HighPriority.MSIxIndex = 0; /* TODO */
  1417. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1418. descriptor.HighPriority.LMID = 0;
  1419. descriptor.HighPriority.Reserved1 = 0;
  1420. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1421. &ioc->scsi_lookup_lock);
  1422. }
  1423. /**
  1424. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1425. * @ioc: per adapter object
  1426. * @smid: system request message index
  1427. *
  1428. * Return nothing.
  1429. */
  1430. void
  1431. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1432. {
  1433. Mpi2RequestDescriptorUnion_t descriptor;
  1434. u64 *request = (u64 *)&descriptor;
  1435. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1436. descriptor.Default.MSIxIndex = 0; /* TODO */
  1437. descriptor.Default.SMID = cpu_to_le16(smid);
  1438. descriptor.Default.LMID = 0;
  1439. descriptor.Default.DescriptorTypeDependent = 0;
  1440. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1441. &ioc->scsi_lookup_lock);
  1442. }
  1443. /**
  1444. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1445. * @ioc: per adapter object
  1446. * @smid: system request message index
  1447. * @io_index: value used to track the IO
  1448. *
  1449. * Return nothing.
  1450. */
  1451. void
  1452. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1453. u16 io_index)
  1454. {
  1455. Mpi2RequestDescriptorUnion_t descriptor;
  1456. u64 *request = (u64 *)&descriptor;
  1457. descriptor.SCSITarget.RequestFlags =
  1458. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1459. descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
  1460. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1461. descriptor.SCSITarget.LMID = 0;
  1462. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1463. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1464. &ioc->scsi_lookup_lock);
  1465. }
  1466. /**
  1467. * _base_display_dell_branding - Disply branding string
  1468. * @ioc: per adapter object
  1469. *
  1470. * Return nothing.
  1471. */
  1472. static void
  1473. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1474. {
  1475. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1476. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1477. return;
  1478. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1479. switch (ioc->pdev->subsystem_device) {
  1480. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1481. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1482. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1483. break;
  1484. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1485. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1486. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1487. break;
  1488. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1489. strncpy(dell_branding,
  1490. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1491. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1492. break;
  1493. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1494. strncpy(dell_branding,
  1495. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1496. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1497. break;
  1498. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1499. strncpy(dell_branding,
  1500. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1501. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1502. break;
  1503. case MPT2SAS_DELL_PERC_H200_SSDID:
  1504. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1505. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1506. break;
  1507. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1508. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1509. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1510. break;
  1511. default:
  1512. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1513. break;
  1514. }
  1515. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1516. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1517. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1518. ioc->pdev->subsystem_device);
  1519. }
  1520. /**
  1521. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1522. * @ioc: per adapter object
  1523. *
  1524. * Return nothing.
  1525. */
  1526. static void
  1527. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1528. {
  1529. int i = 0;
  1530. char desc[16];
  1531. u8 revision;
  1532. u32 iounit_pg1_flags;
  1533. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1534. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1535. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1536. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1537. ioc->name, desc,
  1538. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1539. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1540. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1541. ioc->facts.FWVersion.Word & 0x000000FF,
  1542. revision,
  1543. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1544. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1545. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1546. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1547. _base_display_dell_branding(ioc);
  1548. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1549. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1550. printk("Initiator");
  1551. i++;
  1552. }
  1553. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1554. printk("%sTarget", i ? "," : "");
  1555. i++;
  1556. }
  1557. i = 0;
  1558. printk("), ");
  1559. printk("Capabilities=(");
  1560. if (ioc->facts.IOCCapabilities &
  1561. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1562. printk("Raid");
  1563. i++;
  1564. }
  1565. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1566. printk("%sTLR", i ? "," : "");
  1567. i++;
  1568. }
  1569. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1570. printk("%sMulticast", i ? "," : "");
  1571. i++;
  1572. }
  1573. if (ioc->facts.IOCCapabilities &
  1574. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1575. printk("%sBIDI Target", i ? "," : "");
  1576. i++;
  1577. }
  1578. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1579. printk("%sEEDP", i ? "," : "");
  1580. i++;
  1581. }
  1582. if (ioc->facts.IOCCapabilities &
  1583. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1584. printk("%sSnapshot Buffer", i ? "," : "");
  1585. i++;
  1586. }
  1587. if (ioc->facts.IOCCapabilities &
  1588. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1589. printk("%sDiag Trace Buffer", i ? "," : "");
  1590. i++;
  1591. }
  1592. if (ioc->facts.IOCCapabilities &
  1593. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1594. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1595. i++;
  1596. }
  1597. if (ioc->facts.IOCCapabilities &
  1598. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1599. printk("%sTask Set Full", i ? "," : "");
  1600. i++;
  1601. }
  1602. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1603. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1604. printk("%sNCQ", i ? "," : "");
  1605. i++;
  1606. }
  1607. printk(")\n");
  1608. }
  1609. /**
  1610. * _base_static_config_pages - static start of day config pages
  1611. * @ioc: per adapter object
  1612. *
  1613. * Return nothing.
  1614. */
  1615. static void
  1616. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1617. {
  1618. Mpi2ConfigReply_t mpi_reply;
  1619. u32 iounit_pg1_flags;
  1620. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1621. if (ioc->ir_firmware)
  1622. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  1623. &ioc->manu_pg10);
  1624. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1625. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1626. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1627. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1628. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1629. _base_display_ioc_capabilities(ioc);
  1630. /*
  1631. * Enable task_set_full handling in iounit_pg1 when the
  1632. * facts capabilities indicate that its supported.
  1633. */
  1634. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1635. if ((ioc->facts.IOCCapabilities &
  1636. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1637. iounit_pg1_flags &=
  1638. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1639. else
  1640. iounit_pg1_flags |=
  1641. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1642. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1643. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1644. }
  1645. /**
  1646. * _base_release_memory_pools - release memory
  1647. * @ioc: per adapter object
  1648. *
  1649. * Free memory allocated from _base_allocate_memory_pools.
  1650. *
  1651. * Return nothing.
  1652. */
  1653. static void
  1654. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1655. {
  1656. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1657. __func__));
  1658. if (ioc->request) {
  1659. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1660. ioc->request, ioc->request_dma);
  1661. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1662. ": free\n", ioc->name, ioc->request));
  1663. ioc->request = NULL;
  1664. }
  1665. if (ioc->sense) {
  1666. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1667. if (ioc->sense_dma_pool)
  1668. pci_pool_destroy(ioc->sense_dma_pool);
  1669. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1670. ": free\n", ioc->name, ioc->sense));
  1671. ioc->sense = NULL;
  1672. }
  1673. if (ioc->reply) {
  1674. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1675. if (ioc->reply_dma_pool)
  1676. pci_pool_destroy(ioc->reply_dma_pool);
  1677. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1678. ": free\n", ioc->name, ioc->reply));
  1679. ioc->reply = NULL;
  1680. }
  1681. if (ioc->reply_free) {
  1682. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1683. ioc->reply_free_dma);
  1684. if (ioc->reply_free_dma_pool)
  1685. pci_pool_destroy(ioc->reply_free_dma_pool);
  1686. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1687. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1688. ioc->reply_free = NULL;
  1689. }
  1690. if (ioc->reply_post_free) {
  1691. pci_pool_free(ioc->reply_post_free_dma_pool,
  1692. ioc->reply_post_free, ioc->reply_post_free_dma);
  1693. if (ioc->reply_post_free_dma_pool)
  1694. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1695. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1696. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1697. ioc->reply_post_free));
  1698. ioc->reply_post_free = NULL;
  1699. }
  1700. if (ioc->config_page) {
  1701. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1702. "config_page(0x%p): free\n", ioc->name,
  1703. ioc->config_page));
  1704. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1705. ioc->config_page, ioc->config_page_dma);
  1706. }
  1707. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  1708. kfree(ioc->hpr_lookup);
  1709. kfree(ioc->internal_lookup);
  1710. }
  1711. /**
  1712. * _base_allocate_memory_pools - allocate start of day memory pools
  1713. * @ioc: per adapter object
  1714. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1715. *
  1716. * Returns 0 success, anything else error
  1717. */
  1718. static int
  1719. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1720. {
  1721. Mpi2IOCFactsReply_t *facts;
  1722. u32 queue_size, queue_diff;
  1723. u16 max_sge_elements;
  1724. u16 num_of_reply_frames;
  1725. u16 chains_needed_per_io;
  1726. u32 sz, total_sz;
  1727. u32 retry_sz;
  1728. u16 max_request_credit;
  1729. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1730. __func__));
  1731. retry_sz = 0;
  1732. facts = &ioc->facts;
  1733. /* command line tunables for max sgl entries */
  1734. if (max_sgl_entries != -1) {
  1735. ioc->shost->sg_tablesize = (max_sgl_entries <
  1736. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1737. MPT2SAS_SG_DEPTH;
  1738. } else {
  1739. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1740. }
  1741. /* command line tunables for max controller queue depth */
  1742. if (max_queue_depth != -1) {
  1743. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1744. ? max_queue_depth : facts->RequestCredit;
  1745. } else {
  1746. max_request_credit = (facts->RequestCredit >
  1747. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1748. facts->RequestCredit;
  1749. }
  1750. ioc->hba_queue_depth = max_request_credit;
  1751. ioc->hi_priority_depth = facts->HighPriorityCredit;
  1752. ioc->internal_depth = ioc->hi_priority_depth + 5;
  1753. /* request frame size */
  1754. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1755. /* reply frame size */
  1756. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1757. retry_allocation:
  1758. total_sz = 0;
  1759. /* calculate number of sg elements left over in the 1st frame */
  1760. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1761. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1762. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1763. /* now do the same for a chain buffer */
  1764. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1765. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1766. ioc->chain_offset_value_for_main_message =
  1767. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1768. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1769. /*
  1770. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1771. */
  1772. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1773. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1774. + 1;
  1775. if (chains_needed_per_io > facts->MaxChainDepth) {
  1776. chains_needed_per_io = facts->MaxChainDepth;
  1777. ioc->shost->sg_tablesize = min_t(u16,
  1778. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1779. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1780. }
  1781. ioc->chains_needed_per_io = chains_needed_per_io;
  1782. /* reply free queue sizing - taking into account for events */
  1783. num_of_reply_frames = ioc->hba_queue_depth + 32;
  1784. /* number of replies frames can't be a multiple of 16 */
  1785. /* decrease number of reply frames by 1 */
  1786. if (!(num_of_reply_frames % 16))
  1787. num_of_reply_frames--;
  1788. /* calculate number of reply free queue entries
  1789. * (must be multiple of 16)
  1790. */
  1791. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1792. queue_size = num_of_reply_frames;
  1793. queue_size += 16 - (queue_size % 16);
  1794. ioc->reply_free_queue_depth = queue_size;
  1795. /* reply descriptor post queue sizing */
  1796. /* this size should be the number of request frames + number of reply
  1797. * frames
  1798. */
  1799. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  1800. /* round up to 16 byte boundary */
  1801. if (queue_size % 16)
  1802. queue_size += 16 - (queue_size % 16);
  1803. /* check against IOC maximum reply post queue depth */
  1804. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1805. queue_diff = queue_size -
  1806. facts->MaxReplyDescriptorPostQueueDepth;
  1807. /* round queue_diff up to multiple of 16 */
  1808. if (queue_diff % 16)
  1809. queue_diff += 16 - (queue_diff % 16);
  1810. /* adjust hba_queue_depth, reply_free_queue_depth,
  1811. * and queue_size
  1812. */
  1813. ioc->hba_queue_depth -= queue_diff;
  1814. ioc->reply_free_queue_depth -= queue_diff;
  1815. queue_size -= queue_diff;
  1816. }
  1817. ioc->reply_post_queue_depth = queue_size;
  1818. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1819. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1820. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1821. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1822. ioc->chains_needed_per_io));
  1823. ioc->scsiio_depth = ioc->hba_queue_depth -
  1824. ioc->hi_priority_depth - ioc->internal_depth;
  1825. /* set the scsi host can_queue depth
  1826. * with some internal commands that could be outstanding
  1827. */
  1828. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  1829. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  1830. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  1831. /* contiguous pool for request and chains, 16 byte align, one extra "
  1832. * "frame for smid=0
  1833. */
  1834. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  1835. sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1836. /* hi-priority queue */
  1837. sz += (ioc->hi_priority_depth * ioc->request_sz);
  1838. /* internal queue */
  1839. sz += (ioc->internal_depth * ioc->request_sz);
  1840. ioc->request_dma_sz = sz;
  1841. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1842. if (!ioc->request) {
  1843. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1844. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1845. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  1846. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1847. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1848. goto out;
  1849. retry_sz += 64;
  1850. ioc->hba_queue_depth = max_request_credit - retry_sz;
  1851. goto retry_allocation;
  1852. }
  1853. if (retry_sz)
  1854. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1855. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1856. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  1857. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1858. /* hi-priority queue */
  1859. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  1860. ioc->request_sz);
  1861. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  1862. ioc->request_sz);
  1863. /* internal queue */
  1864. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  1865. ioc->request_sz);
  1866. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  1867. ioc->request_sz);
  1868. ioc->chain = ioc->internal + (ioc->internal_depth *
  1869. ioc->request_sz);
  1870. ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth *
  1871. ioc->request_sz);
  1872. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1873. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1874. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  1875. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  1876. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1877. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1878. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1879. ioc->request_sz))/1024));
  1880. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1881. ioc->name, (unsigned long long) ioc->request_dma));
  1882. total_sz += sz;
  1883. sz = ioc->scsiio_depth * sizeof(struct request_tracker);
  1884. ioc->scsi_lookup_pages = get_order(sz);
  1885. ioc->scsi_lookup = (struct request_tracker *)__get_free_pages(
  1886. GFP_KERNEL, ioc->scsi_lookup_pages);
  1887. if (!ioc->scsi_lookup) {
  1888. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  1889. "sz(%d)\n", ioc->name, (int)sz);
  1890. goto out;
  1891. }
  1892. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  1893. "depth(%d)\n", ioc->name, ioc->request,
  1894. ioc->scsiio_depth));
  1895. /* initialize hi-priority queue smid's */
  1896. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  1897. sizeof(struct request_tracker), GFP_KERNEL);
  1898. if (!ioc->hpr_lookup) {
  1899. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  1900. ioc->name);
  1901. goto out;
  1902. }
  1903. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  1904. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  1905. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  1906. ioc->hi_priority_depth, ioc->hi_priority_smid));
  1907. /* initialize internal queue smid's */
  1908. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  1909. sizeof(struct request_tracker), GFP_KERNEL);
  1910. if (!ioc->internal_lookup) {
  1911. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  1912. ioc->name);
  1913. goto out;
  1914. }
  1915. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  1916. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  1917. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  1918. ioc->internal_depth, ioc->internal_smid));
  1919. /* sense buffers, 4 byte align */
  1920. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  1921. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  1922. 0);
  1923. if (!ioc->sense_dma_pool) {
  1924. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  1925. ioc->name);
  1926. goto out;
  1927. }
  1928. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  1929. &ioc->sense_dma);
  1930. if (!ioc->sense) {
  1931. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  1932. ioc->name);
  1933. goto out;
  1934. }
  1935. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1936. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  1937. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  1938. SCSI_SENSE_BUFFERSIZE, sz/1024));
  1939. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  1940. ioc->name, (unsigned long long)ioc->sense_dma));
  1941. total_sz += sz;
  1942. /* reply pool, 4 byte align */
  1943. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  1944. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  1945. 0);
  1946. if (!ioc->reply_dma_pool) {
  1947. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  1948. ioc->name);
  1949. goto out;
  1950. }
  1951. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  1952. &ioc->reply_dma);
  1953. if (!ioc->reply) {
  1954. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  1955. ioc->name);
  1956. goto out;
  1957. }
  1958. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  1959. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  1960. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  1961. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  1962. ioc->name, (unsigned long long)ioc->reply_dma));
  1963. total_sz += sz;
  1964. /* reply free queue, 16 byte align */
  1965. sz = ioc->reply_free_queue_depth * 4;
  1966. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  1967. ioc->pdev, sz, 16, 0);
  1968. if (!ioc->reply_free_dma_pool) {
  1969. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  1970. "failed\n", ioc->name);
  1971. goto out;
  1972. }
  1973. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  1974. &ioc->reply_free_dma);
  1975. if (!ioc->reply_free) {
  1976. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  1977. "failed\n", ioc->name);
  1978. goto out;
  1979. }
  1980. memset(ioc->reply_free, 0, sz);
  1981. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  1982. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  1983. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  1984. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  1985. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  1986. total_sz += sz;
  1987. /* reply post queue, 16 byte align */
  1988. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  1989. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  1990. ioc->pdev, sz, 16, 0);
  1991. if (!ioc->reply_post_free_dma_pool) {
  1992. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  1993. "failed\n", ioc->name);
  1994. goto out;
  1995. }
  1996. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  1997. GFP_KERNEL, &ioc->reply_post_free_dma);
  1998. if (!ioc->reply_post_free) {
  1999. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2000. "failed\n", ioc->name);
  2001. goto out;
  2002. }
  2003. memset(ioc->reply_post_free, 0, sz);
  2004. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2005. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2006. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2007. sz/1024));
  2008. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2009. "(0x%llx)\n", ioc->name, (unsigned long long)
  2010. ioc->reply_post_free_dma));
  2011. total_sz += sz;
  2012. ioc->config_page_sz = 512;
  2013. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2014. ioc->config_page_sz, &ioc->config_page_dma);
  2015. if (!ioc->config_page) {
  2016. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2017. "failed\n", ioc->name);
  2018. goto out;
  2019. }
  2020. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2021. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2022. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2023. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2024. total_sz += ioc->config_page_sz;
  2025. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2026. ioc->name, total_sz/1024);
  2027. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2028. "Max Controller Queue Depth(%d)\n",
  2029. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2030. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2031. ioc->name, ioc->shost->sg_tablesize);
  2032. return 0;
  2033. out:
  2034. _base_release_memory_pools(ioc);
  2035. return -ENOMEM;
  2036. }
  2037. /**
  2038. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2039. * @ioc: Pointer to MPT_ADAPTER structure
  2040. * @cooked: Request raw or cooked IOC state
  2041. *
  2042. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2043. * Doorbell bits in MPI_IOC_STATE_MASK.
  2044. */
  2045. u32
  2046. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2047. {
  2048. u32 s, sc;
  2049. s = readl(&ioc->chip->Doorbell);
  2050. sc = s & MPI2_IOC_STATE_MASK;
  2051. return cooked ? sc : s;
  2052. }
  2053. /**
  2054. * _base_wait_on_iocstate - waiting on a particular ioc state
  2055. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2056. * @timeout: timeout in second
  2057. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2058. *
  2059. * Returns 0 for success, non-zero for failure.
  2060. */
  2061. static int
  2062. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2063. int sleep_flag)
  2064. {
  2065. u32 count, cntdn;
  2066. u32 current_state;
  2067. count = 0;
  2068. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2069. do {
  2070. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2071. if (current_state == ioc_state)
  2072. return 0;
  2073. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2074. break;
  2075. if (sleep_flag == CAN_SLEEP)
  2076. msleep(1);
  2077. else
  2078. udelay(500);
  2079. count++;
  2080. } while (--cntdn);
  2081. return current_state;
  2082. }
  2083. /**
  2084. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2085. * a write to the doorbell)
  2086. * @ioc: per adapter object
  2087. * @timeout: timeout in second
  2088. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2089. *
  2090. * Returns 0 for success, non-zero for failure.
  2091. *
  2092. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2093. */
  2094. static int
  2095. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2096. int sleep_flag)
  2097. {
  2098. u32 cntdn, count;
  2099. u32 int_status;
  2100. count = 0;
  2101. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2102. do {
  2103. int_status = readl(&ioc->chip->HostInterruptStatus);
  2104. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2105. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2106. "successfull count(%d), timeout(%d)\n", ioc->name,
  2107. __func__, count, timeout));
  2108. return 0;
  2109. }
  2110. if (sleep_flag == CAN_SLEEP)
  2111. msleep(1);
  2112. else
  2113. udelay(500);
  2114. count++;
  2115. } while (--cntdn);
  2116. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2117. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2118. return -EFAULT;
  2119. }
  2120. /**
  2121. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2122. * @ioc: per adapter object
  2123. * @timeout: timeout in second
  2124. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2125. *
  2126. * Returns 0 for success, non-zero for failure.
  2127. *
  2128. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2129. * doorbell.
  2130. */
  2131. static int
  2132. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2133. int sleep_flag)
  2134. {
  2135. u32 cntdn, count;
  2136. u32 int_status;
  2137. u32 doorbell;
  2138. count = 0;
  2139. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2140. do {
  2141. int_status = readl(&ioc->chip->HostInterruptStatus);
  2142. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2143. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2144. "successfull count(%d), timeout(%d)\n", ioc->name,
  2145. __func__, count, timeout));
  2146. return 0;
  2147. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2148. doorbell = readl(&ioc->chip->Doorbell);
  2149. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2150. MPI2_IOC_STATE_FAULT) {
  2151. mpt2sas_base_fault_info(ioc , doorbell);
  2152. return -EFAULT;
  2153. }
  2154. } else if (int_status == 0xFFFFFFFF)
  2155. goto out;
  2156. if (sleep_flag == CAN_SLEEP)
  2157. msleep(1);
  2158. else
  2159. udelay(500);
  2160. count++;
  2161. } while (--cntdn);
  2162. out:
  2163. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2164. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2165. return -EFAULT;
  2166. }
  2167. /**
  2168. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2169. * @ioc: per adapter object
  2170. * @timeout: timeout in second
  2171. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2172. *
  2173. * Returns 0 for success, non-zero for failure.
  2174. *
  2175. */
  2176. static int
  2177. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2178. int sleep_flag)
  2179. {
  2180. u32 cntdn, count;
  2181. u32 doorbell_reg;
  2182. count = 0;
  2183. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2184. do {
  2185. doorbell_reg = readl(&ioc->chip->Doorbell);
  2186. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2187. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2188. "successfull count(%d), timeout(%d)\n", ioc->name,
  2189. __func__, count, timeout));
  2190. return 0;
  2191. }
  2192. if (sleep_flag == CAN_SLEEP)
  2193. msleep(1);
  2194. else
  2195. udelay(500);
  2196. count++;
  2197. } while (--cntdn);
  2198. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2199. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2200. return -EFAULT;
  2201. }
  2202. /**
  2203. * _base_send_ioc_reset - send doorbell reset
  2204. * @ioc: per adapter object
  2205. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2206. * @timeout: timeout in second
  2207. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2208. *
  2209. * Returns 0 for success, non-zero for failure.
  2210. */
  2211. static int
  2212. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2213. int sleep_flag)
  2214. {
  2215. u32 ioc_state;
  2216. int r = 0;
  2217. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2218. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2219. ioc->name, __func__);
  2220. return -EFAULT;
  2221. }
  2222. if (!(ioc->facts.IOCCapabilities &
  2223. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2224. return -EFAULT;
  2225. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2226. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2227. &ioc->chip->Doorbell);
  2228. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2229. r = -EFAULT;
  2230. goto out;
  2231. }
  2232. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2233. timeout, sleep_flag);
  2234. if (ioc_state) {
  2235. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2236. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2237. r = -EFAULT;
  2238. goto out;
  2239. }
  2240. out:
  2241. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2242. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2243. return r;
  2244. }
  2245. /**
  2246. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2247. * @ioc: per adapter object
  2248. * @request_bytes: request length
  2249. * @request: pointer having request payload
  2250. * @reply_bytes: reply length
  2251. * @reply: pointer to reply payload
  2252. * @timeout: timeout in second
  2253. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2254. *
  2255. * Returns 0 for success, non-zero for failure.
  2256. */
  2257. static int
  2258. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2259. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2260. {
  2261. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2262. int i;
  2263. u8 failed;
  2264. u16 dummy;
  2265. u32 *mfp;
  2266. /* make sure doorbell is not in use */
  2267. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2268. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2269. " (line=%d)\n", ioc->name, __LINE__);
  2270. return -EFAULT;
  2271. }
  2272. /* clear pending doorbell interrupts from previous state changes */
  2273. if (readl(&ioc->chip->HostInterruptStatus) &
  2274. MPI2_HIS_IOC2SYS_DB_STATUS)
  2275. writel(0, &ioc->chip->HostInterruptStatus);
  2276. /* send message to ioc */
  2277. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2278. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2279. &ioc->chip->Doorbell);
  2280. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2281. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2282. "int failed (line=%d)\n", ioc->name, __LINE__);
  2283. return -EFAULT;
  2284. }
  2285. writel(0, &ioc->chip->HostInterruptStatus);
  2286. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2287. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2288. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2289. return -EFAULT;
  2290. }
  2291. /* send message 32-bits at a time */
  2292. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2293. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2294. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2295. failed = 1;
  2296. }
  2297. if (failed) {
  2298. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2299. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2300. return -EFAULT;
  2301. }
  2302. /* now wait for the reply */
  2303. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2304. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2305. "int failed (line=%d)\n", ioc->name, __LINE__);
  2306. return -EFAULT;
  2307. }
  2308. /* read the first two 16-bits, it gives the total length of the reply */
  2309. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2310. & MPI2_DOORBELL_DATA_MASK);
  2311. writel(0, &ioc->chip->HostInterruptStatus);
  2312. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2313. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2314. "int failed (line=%d)\n", ioc->name, __LINE__);
  2315. return -EFAULT;
  2316. }
  2317. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2318. & MPI2_DOORBELL_DATA_MASK);
  2319. writel(0, &ioc->chip->HostInterruptStatus);
  2320. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2321. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2322. printk(MPT2SAS_ERR_FMT "doorbell "
  2323. "handshake int failed (line=%d)\n", ioc->name,
  2324. __LINE__);
  2325. return -EFAULT;
  2326. }
  2327. if (i >= reply_bytes/2) /* overflow case */
  2328. dummy = readl(&ioc->chip->Doorbell);
  2329. else
  2330. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2331. & MPI2_DOORBELL_DATA_MASK);
  2332. writel(0, &ioc->chip->HostInterruptStatus);
  2333. }
  2334. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2335. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2336. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2337. " (line=%d)\n", ioc->name, __LINE__));
  2338. }
  2339. writel(0, &ioc->chip->HostInterruptStatus);
  2340. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2341. mfp = (u32 *)reply;
  2342. printk(KERN_DEBUG "\toffset:data\n");
  2343. for (i = 0; i < reply_bytes/4; i++)
  2344. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2345. le32_to_cpu(mfp[i]));
  2346. }
  2347. return 0;
  2348. }
  2349. /**
  2350. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2351. * @ioc: per adapter object
  2352. * @mpi_reply: the reply payload from FW
  2353. * @mpi_request: the request payload sent to FW
  2354. *
  2355. * The SAS IO Unit Control Request message allows the host to perform low-level
  2356. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2357. * to obtain the IOC assigned device handles for a device if it has other
  2358. * identifying information about the device, in addition allows the host to
  2359. * remove IOC resources associated with the device.
  2360. *
  2361. * Returns 0 for success, non-zero for failure.
  2362. */
  2363. int
  2364. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2365. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2366. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2367. {
  2368. u16 smid;
  2369. u32 ioc_state;
  2370. unsigned long timeleft;
  2371. u8 issue_reset;
  2372. int rc;
  2373. void *request;
  2374. u16 wait_state_count;
  2375. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2376. __func__));
  2377. mutex_lock(&ioc->base_cmds.mutex);
  2378. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2379. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2380. ioc->name, __func__);
  2381. rc = -EAGAIN;
  2382. goto out;
  2383. }
  2384. wait_state_count = 0;
  2385. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2386. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2387. if (wait_state_count++ == 10) {
  2388. printk(MPT2SAS_ERR_FMT
  2389. "%s: failed due to ioc not operational\n",
  2390. ioc->name, __func__);
  2391. rc = -EFAULT;
  2392. goto out;
  2393. }
  2394. ssleep(1);
  2395. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2396. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2397. "operational state(count=%d)\n", ioc->name,
  2398. __func__, wait_state_count);
  2399. }
  2400. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2401. if (!smid) {
  2402. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2403. ioc->name, __func__);
  2404. rc = -EAGAIN;
  2405. goto out;
  2406. }
  2407. rc = 0;
  2408. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2409. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2410. ioc->base_cmds.smid = smid;
  2411. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2412. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2413. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2414. ioc->ioc_link_reset_in_progress = 1;
  2415. mpt2sas_base_put_smid_default(ioc, smid);
  2416. init_completion(&ioc->base_cmds.done);
  2417. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2418. msecs_to_jiffies(10000));
  2419. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2420. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2421. ioc->ioc_link_reset_in_progress)
  2422. ioc->ioc_link_reset_in_progress = 0;
  2423. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2424. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2425. ioc->name, __func__);
  2426. _debug_dump_mf(mpi_request,
  2427. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2428. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2429. issue_reset = 1;
  2430. goto issue_host_reset;
  2431. }
  2432. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2433. memcpy(mpi_reply, ioc->base_cmds.reply,
  2434. sizeof(Mpi2SasIoUnitControlReply_t));
  2435. else
  2436. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2437. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2438. goto out;
  2439. issue_host_reset:
  2440. if (issue_reset)
  2441. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2442. FORCE_BIG_HAMMER);
  2443. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2444. rc = -EFAULT;
  2445. out:
  2446. mutex_unlock(&ioc->base_cmds.mutex);
  2447. return rc;
  2448. }
  2449. /**
  2450. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2451. * @ioc: per adapter object
  2452. * @mpi_reply: the reply payload from FW
  2453. * @mpi_request: the request payload sent to FW
  2454. *
  2455. * The SCSI Enclosure Processor request message causes the IOC to
  2456. * communicate with SES devices to control LED status signals.
  2457. *
  2458. * Returns 0 for success, non-zero for failure.
  2459. */
  2460. int
  2461. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2462. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2463. {
  2464. u16 smid;
  2465. u32 ioc_state;
  2466. unsigned long timeleft;
  2467. u8 issue_reset;
  2468. int rc;
  2469. void *request;
  2470. u16 wait_state_count;
  2471. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2472. __func__));
  2473. mutex_lock(&ioc->base_cmds.mutex);
  2474. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2475. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2476. ioc->name, __func__);
  2477. rc = -EAGAIN;
  2478. goto out;
  2479. }
  2480. wait_state_count = 0;
  2481. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2482. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2483. if (wait_state_count++ == 10) {
  2484. printk(MPT2SAS_ERR_FMT
  2485. "%s: failed due to ioc not operational\n",
  2486. ioc->name, __func__);
  2487. rc = -EFAULT;
  2488. goto out;
  2489. }
  2490. ssleep(1);
  2491. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2492. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2493. "operational state(count=%d)\n", ioc->name,
  2494. __func__, wait_state_count);
  2495. }
  2496. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2497. if (!smid) {
  2498. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2499. ioc->name, __func__);
  2500. rc = -EAGAIN;
  2501. goto out;
  2502. }
  2503. rc = 0;
  2504. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2505. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2506. ioc->base_cmds.smid = smid;
  2507. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2508. mpt2sas_base_put_smid_default(ioc, smid);
  2509. init_completion(&ioc->base_cmds.done);
  2510. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2511. msecs_to_jiffies(10000));
  2512. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2513. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2514. ioc->name, __func__);
  2515. _debug_dump_mf(mpi_request,
  2516. sizeof(Mpi2SepRequest_t)/4);
  2517. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2518. issue_reset = 1;
  2519. goto issue_host_reset;
  2520. }
  2521. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2522. memcpy(mpi_reply, ioc->base_cmds.reply,
  2523. sizeof(Mpi2SepReply_t));
  2524. else
  2525. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2526. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2527. goto out;
  2528. issue_host_reset:
  2529. if (issue_reset)
  2530. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2531. FORCE_BIG_HAMMER);
  2532. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2533. rc = -EFAULT;
  2534. out:
  2535. mutex_unlock(&ioc->base_cmds.mutex);
  2536. return rc;
  2537. }
  2538. /**
  2539. * _base_get_port_facts - obtain port facts reply and save in ioc
  2540. * @ioc: per adapter object
  2541. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2542. *
  2543. * Returns 0 for success, non-zero for failure.
  2544. */
  2545. static int
  2546. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2547. {
  2548. Mpi2PortFactsRequest_t mpi_request;
  2549. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2550. int mpi_reply_sz, mpi_request_sz, r;
  2551. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2552. __func__));
  2553. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2554. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2555. memset(&mpi_request, 0, mpi_request_sz);
  2556. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2557. mpi_request.PortNumber = port;
  2558. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2559. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2560. if (r != 0) {
  2561. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2562. ioc->name, __func__, r);
  2563. return r;
  2564. }
  2565. pfacts = &ioc->pfacts[port];
  2566. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2567. pfacts->PortNumber = mpi_reply.PortNumber;
  2568. pfacts->VP_ID = mpi_reply.VP_ID;
  2569. pfacts->VF_ID = mpi_reply.VF_ID;
  2570. pfacts->MaxPostedCmdBuffers =
  2571. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2572. return 0;
  2573. }
  2574. /**
  2575. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2576. * @ioc: per adapter object
  2577. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2578. *
  2579. * Returns 0 for success, non-zero for failure.
  2580. */
  2581. static int
  2582. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2583. {
  2584. Mpi2IOCFactsRequest_t mpi_request;
  2585. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2586. int mpi_reply_sz, mpi_request_sz, r;
  2587. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2588. __func__));
  2589. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2590. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2591. memset(&mpi_request, 0, mpi_request_sz);
  2592. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2593. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2594. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2595. if (r != 0) {
  2596. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2597. ioc->name, __func__, r);
  2598. return r;
  2599. }
  2600. facts = &ioc->facts;
  2601. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2602. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2603. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2604. facts->VP_ID = mpi_reply.VP_ID;
  2605. facts->VF_ID = mpi_reply.VF_ID;
  2606. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2607. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2608. facts->WhoInit = mpi_reply.WhoInit;
  2609. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2610. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2611. facts->MaxReplyDescriptorPostQueueDepth =
  2612. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2613. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2614. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2615. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2616. ioc->ir_firmware = 1;
  2617. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2618. facts->IOCRequestFrameSize =
  2619. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2620. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2621. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2622. ioc->shost->max_id = -1;
  2623. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2624. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2625. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2626. facts->HighPriorityCredit =
  2627. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2628. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2629. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2630. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2631. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2632. facts->MaxChainDepth));
  2633. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2634. "reply frame size(%d)\n", ioc->name,
  2635. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2636. return 0;
  2637. }
  2638. /**
  2639. * _base_send_ioc_init - send ioc_init to firmware
  2640. * @ioc: per adapter object
  2641. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2642. *
  2643. * Returns 0 for success, non-zero for failure.
  2644. */
  2645. static int
  2646. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2647. {
  2648. Mpi2IOCInitRequest_t mpi_request;
  2649. Mpi2IOCInitReply_t mpi_reply;
  2650. int r;
  2651. struct timeval current_time;
  2652. u16 ioc_status;
  2653. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2654. __func__));
  2655. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2656. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2657. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2658. mpi_request.VF_ID = 0; /* TODO */
  2659. mpi_request.VP_ID = 0;
  2660. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2661. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2662. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2663. * removed and made reserved. For those with older firmware will need
  2664. * this fix. It was decided that the Reply and Request frame sizes are
  2665. * the same.
  2666. */
  2667. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2668. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2669. /* mpi_request.SystemReplyFrameSize =
  2670. * cpu_to_le16(ioc->reply_sz);
  2671. */
  2672. }
  2673. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2674. mpi_request.ReplyDescriptorPostQueueDepth =
  2675. cpu_to_le16(ioc->reply_post_queue_depth);
  2676. mpi_request.ReplyFreeQueueDepth =
  2677. cpu_to_le16(ioc->reply_free_queue_depth);
  2678. #if BITS_PER_LONG > 32
  2679. mpi_request.SenseBufferAddressHigh =
  2680. cpu_to_le32(ioc->sense_dma >> 32);
  2681. mpi_request.SystemReplyAddressHigh =
  2682. cpu_to_le32(ioc->reply_dma >> 32);
  2683. mpi_request.SystemRequestFrameBaseAddress =
  2684. cpu_to_le64(ioc->request_dma);
  2685. mpi_request.ReplyFreeQueueAddress =
  2686. cpu_to_le64(ioc->reply_free_dma);
  2687. mpi_request.ReplyDescriptorPostQueueAddress =
  2688. cpu_to_le64(ioc->reply_post_free_dma);
  2689. #else
  2690. mpi_request.SystemRequestFrameBaseAddress =
  2691. cpu_to_le32(ioc->request_dma);
  2692. mpi_request.ReplyFreeQueueAddress =
  2693. cpu_to_le32(ioc->reply_free_dma);
  2694. mpi_request.ReplyDescriptorPostQueueAddress =
  2695. cpu_to_le32(ioc->reply_post_free_dma);
  2696. #endif
  2697. /* This time stamp specifies number of milliseconds
  2698. * since epoch ~ midnight January 1, 1970.
  2699. */
  2700. do_gettimeofday(&current_time);
  2701. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  2702. (current_time.tv_usec / 1000));
  2703. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2704. u32 *mfp;
  2705. int i;
  2706. mfp = (u32 *)&mpi_request;
  2707. printk(KERN_DEBUG "\toffset:data\n");
  2708. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2709. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2710. le32_to_cpu(mfp[i]));
  2711. }
  2712. r = _base_handshake_req_reply_wait(ioc,
  2713. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2714. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2715. sleep_flag);
  2716. if (r != 0) {
  2717. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2718. ioc->name, __func__, r);
  2719. return r;
  2720. }
  2721. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  2722. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  2723. mpi_reply.IOCLogInfo) {
  2724. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2725. r = -EIO;
  2726. }
  2727. return 0;
  2728. }
  2729. /**
  2730. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2731. * @ioc: per adapter object
  2732. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2733. *
  2734. * Returns 0 for success, non-zero for failure.
  2735. */
  2736. static int
  2737. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2738. {
  2739. Mpi2PortEnableRequest_t *mpi_request;
  2740. u32 ioc_state;
  2741. unsigned long timeleft;
  2742. int r = 0;
  2743. u16 smid;
  2744. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2745. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2746. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2747. ioc->name, __func__);
  2748. return -EAGAIN;
  2749. }
  2750. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2751. if (!smid) {
  2752. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2753. ioc->name, __func__);
  2754. return -EAGAIN;
  2755. }
  2756. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2757. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2758. ioc->base_cmds.smid = smid;
  2759. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2760. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2761. mpi_request->VF_ID = 0; /* TODO */
  2762. mpi_request->VP_ID = 0;
  2763. mpt2sas_base_put_smid_default(ioc, smid);
  2764. init_completion(&ioc->base_cmds.done);
  2765. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2766. 300*HZ);
  2767. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2768. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2769. ioc->name, __func__);
  2770. _debug_dump_mf(mpi_request,
  2771. sizeof(Mpi2PortEnableRequest_t)/4);
  2772. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2773. r = -EFAULT;
  2774. else
  2775. r = -ETIME;
  2776. goto out;
  2777. } else
  2778. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2779. ioc->name, __func__));
  2780. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2781. 60, sleep_flag);
  2782. if (ioc_state) {
  2783. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2784. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2785. r = -EFAULT;
  2786. }
  2787. out:
  2788. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2789. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2790. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2791. return r;
  2792. }
  2793. /**
  2794. * _base_unmask_events - turn on notification for this event
  2795. * @ioc: per adapter object
  2796. * @event: firmware event
  2797. *
  2798. * The mask is stored in ioc->event_masks.
  2799. */
  2800. static void
  2801. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2802. {
  2803. u32 desired_event;
  2804. if (event >= 128)
  2805. return;
  2806. desired_event = (1 << (event % 32));
  2807. if (event < 32)
  2808. ioc->event_masks[0] &= ~desired_event;
  2809. else if (event < 64)
  2810. ioc->event_masks[1] &= ~desired_event;
  2811. else if (event < 96)
  2812. ioc->event_masks[2] &= ~desired_event;
  2813. else if (event < 128)
  2814. ioc->event_masks[3] &= ~desired_event;
  2815. }
  2816. /**
  2817. * _base_event_notification - send event notification
  2818. * @ioc: per adapter object
  2819. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2820. *
  2821. * Returns 0 for success, non-zero for failure.
  2822. */
  2823. static int
  2824. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2825. {
  2826. Mpi2EventNotificationRequest_t *mpi_request;
  2827. unsigned long timeleft;
  2828. u16 smid;
  2829. int r = 0;
  2830. int i;
  2831. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2832. __func__));
  2833. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2834. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2835. ioc->name, __func__);
  2836. return -EAGAIN;
  2837. }
  2838. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2839. if (!smid) {
  2840. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2841. ioc->name, __func__);
  2842. return -EAGAIN;
  2843. }
  2844. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2845. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2846. ioc->base_cmds.smid = smid;
  2847. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2848. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2849. mpi_request->VF_ID = 0; /* TODO */
  2850. mpi_request->VP_ID = 0;
  2851. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2852. mpi_request->EventMasks[i] =
  2853. cpu_to_le32(ioc->event_masks[i]);
  2854. mpt2sas_base_put_smid_default(ioc, smid);
  2855. init_completion(&ioc->base_cmds.done);
  2856. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2857. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2858. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2859. ioc->name, __func__);
  2860. _debug_dump_mf(mpi_request,
  2861. sizeof(Mpi2EventNotificationRequest_t)/4);
  2862. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2863. r = -EFAULT;
  2864. else
  2865. r = -ETIME;
  2866. } else
  2867. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2868. ioc->name, __func__));
  2869. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2870. return r;
  2871. }
  2872. /**
  2873. * mpt2sas_base_validate_event_type - validating event types
  2874. * @ioc: per adapter object
  2875. * @event: firmware event
  2876. *
  2877. * This will turn on firmware event notification when application
  2878. * ask for that event. We don't mask events that are already enabled.
  2879. */
  2880. void
  2881. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2882. {
  2883. int i, j;
  2884. u32 event_mask, desired_event;
  2885. u8 send_update_to_fw;
  2886. for (i = 0, send_update_to_fw = 0; i <
  2887. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2888. event_mask = ~event_type[i];
  2889. desired_event = 1;
  2890. for (j = 0; j < 32; j++) {
  2891. if (!(event_mask & desired_event) &&
  2892. (ioc->event_masks[i] & desired_event)) {
  2893. ioc->event_masks[i] &= ~desired_event;
  2894. send_update_to_fw = 1;
  2895. }
  2896. desired_event = (desired_event << 1);
  2897. }
  2898. }
  2899. if (!send_update_to_fw)
  2900. return;
  2901. mutex_lock(&ioc->base_cmds.mutex);
  2902. _base_event_notification(ioc, CAN_SLEEP);
  2903. mutex_unlock(&ioc->base_cmds.mutex);
  2904. }
  2905. /**
  2906. * _base_diag_reset - the "big hammer" start of day reset
  2907. * @ioc: per adapter object
  2908. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2909. *
  2910. * Returns 0 for success, non-zero for failure.
  2911. */
  2912. static int
  2913. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2914. {
  2915. u32 host_diagnostic;
  2916. u32 ioc_state;
  2917. u32 count;
  2918. u32 hcb_size;
  2919. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  2920. _base_save_msix_table(ioc);
  2921. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
  2922. ioc->name));
  2923. count = 0;
  2924. do {
  2925. /* Write magic sequence to WriteSequence register
  2926. * Loop until in diagnostic mode
  2927. */
  2928. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
  2929. "sequence\n", ioc->name));
  2930. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2931. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  2932. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  2933. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  2934. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2935. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2936. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2937. /* wait 100 msec */
  2938. if (sleep_flag == CAN_SLEEP)
  2939. msleep(100);
  2940. else
  2941. mdelay(100);
  2942. if (count++ > 20)
  2943. goto out;
  2944. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2945. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
  2946. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  2947. ioc->name, count, host_diagnostic));
  2948. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  2949. hcb_size = readl(&ioc->chip->HCBSize);
  2950. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
  2951. ioc->name));
  2952. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  2953. &ioc->chip->HostDiagnostic);
  2954. /* don't access any registers for 50 milliseconds */
  2955. msleep(50);
  2956. /* 300 second max wait */
  2957. for (count = 0; count < 3000000 ; count++) {
  2958. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2959. if (host_diagnostic == 0xFFFFFFFF)
  2960. goto out;
  2961. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  2962. break;
  2963. /* wait 100 msec */
  2964. if (sleep_flag == CAN_SLEEP)
  2965. msleep(1);
  2966. else
  2967. mdelay(1);
  2968. }
  2969. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  2970. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
  2971. "assuming the HCB Address points to good F/W\n",
  2972. ioc->name));
  2973. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  2974. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  2975. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  2976. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
  2977. "re-enable the HCDW\n", ioc->name));
  2978. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  2979. &ioc->chip->HCBSize);
  2980. }
  2981. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
  2982. ioc->name));
  2983. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  2984. &ioc->chip->HostDiagnostic);
  2985. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
  2986. "diagnostic register\n", ioc->name));
  2987. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2988. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
  2989. "READY state\n", ioc->name));
  2990. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  2991. sleep_flag);
  2992. if (ioc_state) {
  2993. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2994. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2995. goto out;
  2996. }
  2997. _base_restore_msix_table(ioc);
  2998. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  2999. return 0;
  3000. out:
  3001. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3002. return -EFAULT;
  3003. }
  3004. /**
  3005. * _base_make_ioc_ready - put controller in READY state
  3006. * @ioc: per adapter object
  3007. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3008. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3009. *
  3010. * Returns 0 for success, non-zero for failure.
  3011. */
  3012. static int
  3013. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3014. enum reset_type type)
  3015. {
  3016. u32 ioc_state;
  3017. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3018. __func__));
  3019. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3020. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
  3021. ioc->name, __func__, ioc_state));
  3022. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3023. return 0;
  3024. if (ioc_state & MPI2_DOORBELL_USED) {
  3025. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
  3026. "active!\n", ioc->name));
  3027. goto issue_diag_reset;
  3028. }
  3029. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3030. mpt2sas_base_fault_info(ioc, ioc_state &
  3031. MPI2_DOORBELL_DATA_MASK);
  3032. goto issue_diag_reset;
  3033. }
  3034. if (type == FORCE_BIG_HAMMER)
  3035. goto issue_diag_reset;
  3036. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3037. if (!(_base_send_ioc_reset(ioc,
  3038. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
  3039. return 0;
  3040. issue_diag_reset:
  3041. return _base_diag_reset(ioc, CAN_SLEEP);
  3042. }
  3043. /**
  3044. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3045. * @ioc: per adapter object
  3046. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3047. *
  3048. * Returns 0 for success, non-zero for failure.
  3049. */
  3050. static int
  3051. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3052. {
  3053. int r, i;
  3054. unsigned long flags;
  3055. u32 reply_address;
  3056. u16 smid;
  3057. struct _tr_list *delayed_tr, *delayed_tr_next;
  3058. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3059. __func__));
  3060. /* clean the delayed target reset list */
  3061. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3062. &ioc->delayed_tr_list, list) {
  3063. list_del(&delayed_tr->list);
  3064. kfree(delayed_tr);
  3065. }
  3066. /* initialize the scsi lookup free list */
  3067. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3068. INIT_LIST_HEAD(&ioc->free_list);
  3069. smid = 1;
  3070. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3071. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3072. ioc->scsi_lookup[i].smid = smid;
  3073. ioc->scsi_lookup[i].scmd = NULL;
  3074. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3075. &ioc->free_list);
  3076. }
  3077. /* hi-priority queue */
  3078. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3079. smid = ioc->hi_priority_smid;
  3080. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3081. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3082. ioc->hpr_lookup[i].smid = smid;
  3083. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3084. &ioc->hpr_free_list);
  3085. }
  3086. /* internal queue */
  3087. INIT_LIST_HEAD(&ioc->internal_free_list);
  3088. smid = ioc->internal_smid;
  3089. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3090. ioc->internal_lookup[i].cb_idx = 0xFF;
  3091. ioc->internal_lookup[i].smid = smid;
  3092. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3093. &ioc->internal_free_list);
  3094. }
  3095. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3096. /* initialize Reply Free Queue */
  3097. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3098. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3099. ioc->reply_sz)
  3100. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3101. /* initialize Reply Post Free Queue */
  3102. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3103. ioc->reply_post_free[i].Words = ULLONG_MAX;
  3104. r = _base_send_ioc_init(ioc, sleep_flag);
  3105. if (r)
  3106. return r;
  3107. /* initialize the index's */
  3108. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3109. ioc->reply_post_host_index = 0;
  3110. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3111. writel(0, &ioc->chip->ReplyPostHostIndex);
  3112. _base_unmask_interrupts(ioc);
  3113. r = _base_event_notification(ioc, sleep_flag);
  3114. if (r)
  3115. return r;
  3116. if (sleep_flag == CAN_SLEEP)
  3117. _base_static_config_pages(ioc);
  3118. r = _base_send_port_enable(ioc, sleep_flag);
  3119. if (r)
  3120. return r;
  3121. return r;
  3122. }
  3123. /**
  3124. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3125. * @ioc: per adapter object
  3126. *
  3127. * Return nothing.
  3128. */
  3129. void
  3130. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3131. {
  3132. struct pci_dev *pdev = ioc->pdev;
  3133. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3134. __func__));
  3135. _base_mask_interrupts(ioc);
  3136. ioc->shost_recovery = 1;
  3137. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3138. ioc->shost_recovery = 0;
  3139. if (ioc->pci_irq) {
  3140. synchronize_irq(pdev->irq);
  3141. free_irq(ioc->pci_irq, ioc);
  3142. }
  3143. _base_disable_msix(ioc);
  3144. if (ioc->chip_phys)
  3145. iounmap(ioc->chip);
  3146. ioc->pci_irq = -1;
  3147. ioc->chip_phys = 0;
  3148. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3149. pci_disable_device(pdev);
  3150. return;
  3151. }
  3152. /**
  3153. * mpt2sas_base_attach - attach controller instance
  3154. * @ioc: per adapter object
  3155. *
  3156. * Returns 0 for success, non-zero for failure.
  3157. */
  3158. int
  3159. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3160. {
  3161. int r, i;
  3162. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3163. __func__));
  3164. r = mpt2sas_base_map_resources(ioc);
  3165. if (r)
  3166. return r;
  3167. pci_set_drvdata(ioc->pdev, ioc->shost);
  3168. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3169. if (r)
  3170. goto out_free_resources;
  3171. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3172. if (r)
  3173. goto out_free_resources;
  3174. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3175. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3176. if (!ioc->pfacts) {
  3177. r = -ENOMEM;
  3178. goto out_free_resources;
  3179. }
  3180. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3181. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3182. if (r)
  3183. goto out_free_resources;
  3184. }
  3185. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3186. if (r)
  3187. goto out_free_resources;
  3188. init_waitqueue_head(&ioc->reset_wq);
  3189. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3190. /* base internal command bits */
  3191. mutex_init(&ioc->base_cmds.mutex);
  3192. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3193. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3194. /* transport internal command bits */
  3195. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3196. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3197. mutex_init(&ioc->transport_cmds.mutex);
  3198. /* scsih internal command bits */
  3199. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3200. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3201. mutex_init(&ioc->scsih_cmds.mutex);
  3202. /* task management internal command bits */
  3203. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3204. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3205. mutex_init(&ioc->tm_cmds.mutex);
  3206. /* config page internal command bits */
  3207. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3208. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3209. mutex_init(&ioc->config_cmds.mutex);
  3210. /* ctl module internal command bits */
  3211. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3212. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3213. mutex_init(&ioc->ctl_cmds.mutex);
  3214. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3215. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3216. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3217. r = -ENOMEM;
  3218. goto out_free_resources;
  3219. }
  3220. init_completion(&ioc->shost_recovery_done);
  3221. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3222. ioc->event_masks[i] = -1;
  3223. /* here we enable the events we care about */
  3224. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3225. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3226. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3227. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3228. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3229. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3230. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3231. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3232. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3233. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  3234. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3235. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3236. if (r)
  3237. goto out_free_resources;
  3238. mpt2sas_base_start_watchdog(ioc);
  3239. if (diag_buffer_enable != 0)
  3240. mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
  3241. return 0;
  3242. out_free_resources:
  3243. ioc->remove_host = 1;
  3244. mpt2sas_base_free_resources(ioc);
  3245. _base_release_memory_pools(ioc);
  3246. pci_set_drvdata(ioc->pdev, NULL);
  3247. kfree(ioc->tm_cmds.reply);
  3248. kfree(ioc->transport_cmds.reply);
  3249. kfree(ioc->scsih_cmds.reply);
  3250. kfree(ioc->config_cmds.reply);
  3251. kfree(ioc->base_cmds.reply);
  3252. kfree(ioc->ctl_cmds.reply);
  3253. kfree(ioc->pfacts);
  3254. ioc->ctl_cmds.reply = NULL;
  3255. ioc->base_cmds.reply = NULL;
  3256. ioc->tm_cmds.reply = NULL;
  3257. ioc->scsih_cmds.reply = NULL;
  3258. ioc->transport_cmds.reply = NULL;
  3259. ioc->config_cmds.reply = NULL;
  3260. ioc->pfacts = NULL;
  3261. return r;
  3262. }
  3263. /**
  3264. * mpt2sas_base_detach - remove controller instance
  3265. * @ioc: per adapter object
  3266. *
  3267. * Return nothing.
  3268. */
  3269. void
  3270. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3271. {
  3272. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3273. __func__));
  3274. mpt2sas_base_stop_watchdog(ioc);
  3275. mpt2sas_base_free_resources(ioc);
  3276. _base_release_memory_pools(ioc);
  3277. pci_set_drvdata(ioc->pdev, NULL);
  3278. kfree(ioc->pfacts);
  3279. kfree(ioc->ctl_cmds.reply);
  3280. kfree(ioc->base_cmds.reply);
  3281. kfree(ioc->tm_cmds.reply);
  3282. kfree(ioc->transport_cmds.reply);
  3283. kfree(ioc->scsih_cmds.reply);
  3284. kfree(ioc->config_cmds.reply);
  3285. }
  3286. /**
  3287. * _base_reset_handler - reset callback handler (for base)
  3288. * @ioc: per adapter object
  3289. * @reset_phase: phase
  3290. *
  3291. * The handler for doing any required cleanup or initialization.
  3292. *
  3293. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3294. * MPT2_IOC_DONE_RESET
  3295. *
  3296. * Return nothing.
  3297. */
  3298. static void
  3299. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3300. {
  3301. switch (reset_phase) {
  3302. case MPT2_IOC_PRE_RESET:
  3303. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3304. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3305. break;
  3306. case MPT2_IOC_AFTER_RESET:
  3307. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3308. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3309. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3310. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3311. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3312. complete(&ioc->transport_cmds.done);
  3313. }
  3314. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3315. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3316. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3317. complete(&ioc->base_cmds.done);
  3318. }
  3319. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3320. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3321. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3322. ioc->config_cmds.smid = USHORT_MAX;
  3323. complete(&ioc->config_cmds.done);
  3324. }
  3325. break;
  3326. case MPT2_IOC_DONE_RESET:
  3327. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3328. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3329. break;
  3330. }
  3331. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3332. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3333. }
  3334. /**
  3335. * _wait_for_commands_to_complete - reset controller
  3336. * @ioc: Pointer to MPT_ADAPTER structure
  3337. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3338. *
  3339. * This function waiting(3s) for all pending commands to complete
  3340. * prior to putting controller in reset.
  3341. */
  3342. static void
  3343. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3344. {
  3345. u32 ioc_state;
  3346. unsigned long flags;
  3347. u16 i;
  3348. ioc->pending_io_count = 0;
  3349. if (sleep_flag != CAN_SLEEP)
  3350. return;
  3351. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3352. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3353. return;
  3354. /* pending command count */
  3355. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3356. for (i = 0; i < ioc->scsiio_depth; i++)
  3357. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3358. ioc->pending_io_count++;
  3359. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3360. if (!ioc->pending_io_count)
  3361. return;
  3362. /* wait for pending commands to complete */
  3363. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
  3364. }
  3365. /**
  3366. * mpt2sas_base_hard_reset_handler - reset controller
  3367. * @ioc: Pointer to MPT_ADAPTER structure
  3368. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3369. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3370. *
  3371. * Returns 0 for success, non-zero for failure.
  3372. */
  3373. int
  3374. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3375. enum reset_type type)
  3376. {
  3377. int r;
  3378. unsigned long flags;
  3379. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
  3380. __func__));
  3381. if (mpt2sas_fwfault_debug)
  3382. mpt2sas_halt_firmware(ioc);
  3383. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3384. if (ioc->shost_recovery) {
  3385. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3386. printk(MPT2SAS_ERR_FMT "%s: busy\n",
  3387. ioc->name, __func__);
  3388. return -EBUSY;
  3389. }
  3390. ioc->shost_recovery = 1;
  3391. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3392. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3393. _wait_for_commands_to_complete(ioc, sleep_flag);
  3394. _base_mask_interrupts(ioc);
  3395. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3396. if (r)
  3397. goto out;
  3398. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3399. r = _base_make_ioc_operational(ioc, sleep_flag);
  3400. if (!r)
  3401. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3402. out:
  3403. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
  3404. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3405. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3406. ioc->shost_recovery = 0;
  3407. complete(&ioc->shost_recovery_done);
  3408. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3409. return r;
  3410. }