s5m8767.c 20 KB

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  1. /*
  2. * s5m8767.c
  3. *
  4. * Copyright (c) 2011 Samsung Electronics Co., Ltd
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. *
  12. */
  13. #include <linux/bug.h>
  14. #include <linux/err.h>
  15. #include <linux/gpio.h>
  16. #include <linux/slab.h>
  17. #include <linux/module.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/regulator/driver.h>
  20. #include <linux/regulator/machine.h>
  21. #include <linux/mfd/samsung/core.h>
  22. #include <linux/mfd/samsung/s5m8767.h>
  23. struct s5m8767_info {
  24. struct device *dev;
  25. struct sec_pmic_dev *iodev;
  26. int num_regulators;
  27. struct regulator_dev **rdev;
  28. struct sec_opmode_data *opmode;
  29. int ramp_delay;
  30. bool buck2_ramp;
  31. bool buck3_ramp;
  32. bool buck4_ramp;
  33. bool buck2_gpiodvs;
  34. bool buck3_gpiodvs;
  35. bool buck4_gpiodvs;
  36. u8 buck2_vol[8];
  37. u8 buck3_vol[8];
  38. u8 buck4_vol[8];
  39. int buck_gpios[3];
  40. int buck_ds[3];
  41. int buck_gpioindex;
  42. };
  43. struct sec_voltage_desc {
  44. int max;
  45. int min;
  46. int step;
  47. };
  48. static const struct sec_voltage_desc buck_voltage_val1 = {
  49. .max = 2225000,
  50. .min = 650000,
  51. .step = 6250,
  52. };
  53. static const struct sec_voltage_desc buck_voltage_val2 = {
  54. .max = 1600000,
  55. .min = 600000,
  56. .step = 6250,
  57. };
  58. static const struct sec_voltage_desc buck_voltage_val3 = {
  59. .max = 3000000,
  60. .min = 750000,
  61. .step = 12500,
  62. };
  63. static const struct sec_voltage_desc ldo_voltage_val1 = {
  64. .max = 3950000,
  65. .min = 800000,
  66. .step = 50000,
  67. };
  68. static const struct sec_voltage_desc ldo_voltage_val2 = {
  69. .max = 2375000,
  70. .min = 800000,
  71. .step = 25000,
  72. };
  73. static const struct sec_voltage_desc *reg_voltage_map[] = {
  74. [S5M8767_LDO1] = &ldo_voltage_val2,
  75. [S5M8767_LDO2] = &ldo_voltage_val2,
  76. [S5M8767_LDO3] = &ldo_voltage_val1,
  77. [S5M8767_LDO4] = &ldo_voltage_val1,
  78. [S5M8767_LDO5] = &ldo_voltage_val1,
  79. [S5M8767_LDO6] = &ldo_voltage_val2,
  80. [S5M8767_LDO7] = &ldo_voltage_val2,
  81. [S5M8767_LDO8] = &ldo_voltage_val2,
  82. [S5M8767_LDO9] = &ldo_voltage_val1,
  83. [S5M8767_LDO10] = &ldo_voltage_val1,
  84. [S5M8767_LDO11] = &ldo_voltage_val1,
  85. [S5M8767_LDO12] = &ldo_voltage_val1,
  86. [S5M8767_LDO13] = &ldo_voltage_val1,
  87. [S5M8767_LDO14] = &ldo_voltage_val1,
  88. [S5M8767_LDO15] = &ldo_voltage_val2,
  89. [S5M8767_LDO16] = &ldo_voltage_val1,
  90. [S5M8767_LDO17] = &ldo_voltage_val1,
  91. [S5M8767_LDO18] = &ldo_voltage_val1,
  92. [S5M8767_LDO19] = &ldo_voltage_val1,
  93. [S5M8767_LDO20] = &ldo_voltage_val1,
  94. [S5M8767_LDO21] = &ldo_voltage_val1,
  95. [S5M8767_LDO22] = &ldo_voltage_val1,
  96. [S5M8767_LDO23] = &ldo_voltage_val1,
  97. [S5M8767_LDO24] = &ldo_voltage_val1,
  98. [S5M8767_LDO25] = &ldo_voltage_val1,
  99. [S5M8767_LDO26] = &ldo_voltage_val1,
  100. [S5M8767_LDO27] = &ldo_voltage_val1,
  101. [S5M8767_LDO28] = &ldo_voltage_val1,
  102. [S5M8767_BUCK1] = &buck_voltage_val1,
  103. [S5M8767_BUCK2] = &buck_voltage_val2,
  104. [S5M8767_BUCK3] = &buck_voltage_val2,
  105. [S5M8767_BUCK4] = &buck_voltage_val2,
  106. [S5M8767_BUCK5] = &buck_voltage_val1,
  107. [S5M8767_BUCK6] = &buck_voltage_val1,
  108. [S5M8767_BUCK7] = NULL,
  109. [S5M8767_BUCK8] = NULL,
  110. [S5M8767_BUCK9] = &buck_voltage_val3,
  111. };
  112. static unsigned int s5m8767_opmode_reg[][4] = {
  113. /* {OFF, ON, LOWPOWER, SUSPEND} */
  114. /* LDO1 ... LDO28 */
  115. {0x0, 0x3, 0x2, 0x1}, /* LDO1 */
  116. {0x0, 0x3, 0x2, 0x1},
  117. {0x0, 0x3, 0x2, 0x1},
  118. {0x0, 0x0, 0x0, 0x0},
  119. {0x0, 0x3, 0x2, 0x1}, /* LDO5 */
  120. {0x0, 0x3, 0x2, 0x1},
  121. {0x0, 0x3, 0x2, 0x1},
  122. {0x0, 0x3, 0x2, 0x1},
  123. {0x0, 0x3, 0x2, 0x1},
  124. {0x0, 0x3, 0x2, 0x1}, /* LDO10 */
  125. {0x0, 0x3, 0x2, 0x1},
  126. {0x0, 0x3, 0x2, 0x1},
  127. {0x0, 0x3, 0x2, 0x1},
  128. {0x0, 0x3, 0x2, 0x1},
  129. {0x0, 0x3, 0x2, 0x1}, /* LDO15 */
  130. {0x0, 0x3, 0x2, 0x1},
  131. {0x0, 0x3, 0x2, 0x1},
  132. {0x0, 0x0, 0x0, 0x0},
  133. {0x0, 0x3, 0x2, 0x1},
  134. {0x0, 0x3, 0x2, 0x1}, /* LDO20 */
  135. {0x0, 0x3, 0x2, 0x1},
  136. {0x0, 0x3, 0x2, 0x1},
  137. {0x0, 0x0, 0x0, 0x0},
  138. {0x0, 0x3, 0x2, 0x1},
  139. {0x0, 0x3, 0x2, 0x1}, /* LDO25 */
  140. {0x0, 0x3, 0x2, 0x1},
  141. {0x0, 0x3, 0x2, 0x1},
  142. {0x0, 0x3, 0x2, 0x1}, /* LDO28 */
  143. /* BUCK1 ... BUCK9 */
  144. {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
  145. {0x0, 0x3, 0x1, 0x1},
  146. {0x0, 0x3, 0x1, 0x1},
  147. {0x0, 0x3, 0x1, 0x1},
  148. {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
  149. {0x0, 0x3, 0x1, 0x1},
  150. {0x0, 0x3, 0x1, 0x1},
  151. {0x0, 0x3, 0x1, 0x1},
  152. {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
  153. };
  154. static int s5m8767_get_register(struct regulator_dev *rdev, int *reg,
  155. int *enable_ctrl)
  156. {
  157. int i, reg_id = rdev_get_id(rdev);
  158. unsigned int mode;
  159. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  160. switch (reg_id) {
  161. case S5M8767_LDO1 ... S5M8767_LDO2:
  162. *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
  163. break;
  164. case S5M8767_LDO3 ... S5M8767_LDO28:
  165. *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
  166. break;
  167. case S5M8767_BUCK1:
  168. *reg = S5M8767_REG_BUCK1CTRL1;
  169. break;
  170. case S5M8767_BUCK2 ... S5M8767_BUCK4:
  171. *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
  172. break;
  173. case S5M8767_BUCK5:
  174. *reg = S5M8767_REG_BUCK5CTRL1;
  175. break;
  176. case S5M8767_BUCK6 ... S5M8767_BUCK9:
  177. *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
  178. break;
  179. default:
  180. return -EINVAL;
  181. }
  182. for (i = 0; i < s5m8767->num_regulators; i++) {
  183. if (s5m8767->opmode[i].id == reg_id) {
  184. mode = s5m8767->opmode[i].mode;
  185. break;
  186. }
  187. }
  188. if (i < s5m8767->num_regulators)
  189. *enable_ctrl =
  190. s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
  191. return 0;
  192. }
  193. static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
  194. {
  195. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  196. int ret, reg;
  197. int mask = 0xc0, enable_ctrl;
  198. unsigned int val;
  199. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  200. if (ret == -EINVAL)
  201. return 1;
  202. else if (ret)
  203. return ret;
  204. ret = sec_reg_read(s5m8767->iodev, reg, &val);
  205. if (ret)
  206. return ret;
  207. return (val & mask) == enable_ctrl;
  208. }
  209. static int s5m8767_reg_enable(struct regulator_dev *rdev)
  210. {
  211. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  212. int ret, reg;
  213. int mask = 0xc0, enable_ctrl;
  214. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  215. if (ret)
  216. return ret;
  217. return sec_reg_update(s5m8767->iodev, reg, enable_ctrl, mask);
  218. }
  219. static int s5m8767_reg_disable(struct regulator_dev *rdev)
  220. {
  221. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  222. int ret, reg;
  223. int mask = 0xc0, enable_ctrl;
  224. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  225. if (ret)
  226. return ret;
  227. return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
  228. }
  229. static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
  230. {
  231. int reg;
  232. switch (reg_id) {
  233. case S5M8767_LDO1 ... S5M8767_LDO2:
  234. reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
  235. break;
  236. case S5M8767_LDO3 ... S5M8767_LDO28:
  237. reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
  238. break;
  239. case S5M8767_BUCK1:
  240. reg = S5M8767_REG_BUCK1CTRL2;
  241. break;
  242. case S5M8767_BUCK2:
  243. reg = S5M8767_REG_BUCK2DVS1;
  244. if (s5m8767->buck2_gpiodvs)
  245. reg += s5m8767->buck_gpioindex;
  246. break;
  247. case S5M8767_BUCK3:
  248. reg = S5M8767_REG_BUCK3DVS1;
  249. if (s5m8767->buck3_gpiodvs)
  250. reg += s5m8767->buck_gpioindex;
  251. break;
  252. case S5M8767_BUCK4:
  253. reg = S5M8767_REG_BUCK4DVS1;
  254. if (s5m8767->buck4_gpiodvs)
  255. reg += s5m8767->buck_gpioindex;
  256. break;
  257. case S5M8767_BUCK5:
  258. reg = S5M8767_REG_BUCK5CTRL2;
  259. break;
  260. case S5M8767_BUCK6 ... S5M8767_BUCK9:
  261. reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
  262. break;
  263. default:
  264. return -EINVAL;
  265. }
  266. return reg;
  267. }
  268. static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc,
  269. int min_vol)
  270. {
  271. int selector = 0;
  272. if (desc == NULL)
  273. return -EINVAL;
  274. if (min_vol > desc->max)
  275. return -EINVAL;
  276. if (min_vol < desc->min)
  277. min_vol = desc->min;
  278. selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
  279. if (desc->min + desc->step * selector > desc->max)
  280. return -EINVAL;
  281. return selector;
  282. }
  283. static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
  284. {
  285. int temp_index = s5m8767->buck_gpioindex;
  286. gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
  287. gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
  288. gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
  289. return 0;
  290. }
  291. static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
  292. {
  293. int temp_index = s5m8767->buck_gpioindex;
  294. gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
  295. gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
  296. gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
  297. return 0;
  298. }
  299. static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
  300. unsigned selector)
  301. {
  302. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  303. int reg_id = rdev_get_id(rdev);
  304. int old_index, index = 0;
  305. u8 *buck234_vol = NULL;
  306. switch (reg_id) {
  307. case S5M8767_LDO1 ... S5M8767_LDO28:
  308. break;
  309. case S5M8767_BUCK1 ... S5M8767_BUCK6:
  310. if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
  311. buck234_vol = &s5m8767->buck2_vol[0];
  312. else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
  313. buck234_vol = &s5m8767->buck3_vol[0];
  314. else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
  315. buck234_vol = &s5m8767->buck4_vol[0];
  316. break;
  317. case S5M8767_BUCK7 ... S5M8767_BUCK8:
  318. return -EINVAL;
  319. case S5M8767_BUCK9:
  320. break;
  321. default:
  322. return -EINVAL;
  323. }
  324. /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
  325. if (buck234_vol) {
  326. while (*buck234_vol != selector) {
  327. buck234_vol++;
  328. index++;
  329. }
  330. old_index = s5m8767->buck_gpioindex;
  331. s5m8767->buck_gpioindex = index;
  332. if (index > old_index)
  333. return s5m8767_set_high(s5m8767);
  334. else
  335. return s5m8767_set_low(s5m8767);
  336. } else {
  337. return regulator_set_voltage_sel_regmap(rdev, selector);
  338. }
  339. }
  340. static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
  341. unsigned int old_sel,
  342. unsigned int new_sel)
  343. {
  344. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  345. const struct sec_voltage_desc *desc;
  346. int reg_id = rdev_get_id(rdev);
  347. desc = reg_voltage_map[reg_id];
  348. if ((old_sel < new_sel) && s5m8767->ramp_delay)
  349. return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
  350. s5m8767->ramp_delay * 1000);
  351. return 0;
  352. }
  353. static struct regulator_ops s5m8767_ops = {
  354. .list_voltage = regulator_list_voltage_linear,
  355. .is_enabled = s5m8767_reg_is_enabled,
  356. .enable = s5m8767_reg_enable,
  357. .disable = s5m8767_reg_disable,
  358. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  359. .set_voltage_sel = s5m8767_set_voltage_sel,
  360. .set_voltage_time_sel = s5m8767_set_voltage_time_sel,
  361. };
  362. static struct regulator_ops s5m8767_buck78_ops = {
  363. .is_enabled = s5m8767_reg_is_enabled,
  364. .enable = s5m8767_reg_enable,
  365. .disable = s5m8767_reg_disable,
  366. };
  367. #define s5m8767_regulator_desc(_name) { \
  368. .name = #_name, \
  369. .id = S5M8767_##_name, \
  370. .ops = &s5m8767_ops, \
  371. .type = REGULATOR_VOLTAGE, \
  372. .owner = THIS_MODULE, \
  373. }
  374. #define s5m8767_regulator_buck78_desc(_name) { \
  375. .name = #_name, \
  376. .id = S5M8767_##_name, \
  377. .ops = &s5m8767_buck78_ops, \
  378. .type = REGULATOR_VOLTAGE, \
  379. .owner = THIS_MODULE, \
  380. }
  381. static struct regulator_desc regulators[] = {
  382. s5m8767_regulator_desc(LDO1),
  383. s5m8767_regulator_desc(LDO2),
  384. s5m8767_regulator_desc(LDO3),
  385. s5m8767_regulator_desc(LDO4),
  386. s5m8767_regulator_desc(LDO5),
  387. s5m8767_regulator_desc(LDO6),
  388. s5m8767_regulator_desc(LDO7),
  389. s5m8767_regulator_desc(LDO8),
  390. s5m8767_regulator_desc(LDO9),
  391. s5m8767_regulator_desc(LDO10),
  392. s5m8767_regulator_desc(LDO11),
  393. s5m8767_regulator_desc(LDO12),
  394. s5m8767_regulator_desc(LDO13),
  395. s5m8767_regulator_desc(LDO14),
  396. s5m8767_regulator_desc(LDO15),
  397. s5m8767_regulator_desc(LDO16),
  398. s5m8767_regulator_desc(LDO17),
  399. s5m8767_regulator_desc(LDO18),
  400. s5m8767_regulator_desc(LDO19),
  401. s5m8767_regulator_desc(LDO20),
  402. s5m8767_regulator_desc(LDO21),
  403. s5m8767_regulator_desc(LDO22),
  404. s5m8767_regulator_desc(LDO23),
  405. s5m8767_regulator_desc(LDO24),
  406. s5m8767_regulator_desc(LDO25),
  407. s5m8767_regulator_desc(LDO26),
  408. s5m8767_regulator_desc(LDO27),
  409. s5m8767_regulator_desc(LDO28),
  410. s5m8767_regulator_desc(BUCK1),
  411. s5m8767_regulator_desc(BUCK2),
  412. s5m8767_regulator_desc(BUCK3),
  413. s5m8767_regulator_desc(BUCK4),
  414. s5m8767_regulator_desc(BUCK5),
  415. s5m8767_regulator_desc(BUCK6),
  416. s5m8767_regulator_buck78_desc(BUCK7),
  417. s5m8767_regulator_buck78_desc(BUCK8),
  418. s5m8767_regulator_desc(BUCK9),
  419. };
  420. static int s5m8767_pmic_probe(struct platform_device *pdev)
  421. {
  422. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  423. struct sec_platform_data *pdata = dev_get_platdata(iodev->dev);
  424. struct regulator_config config = { };
  425. struct regulator_dev **rdev;
  426. struct s5m8767_info *s5m8767;
  427. int i, ret, size, buck_init;
  428. if (!pdata) {
  429. dev_err(pdev->dev.parent, "Platform data not supplied\n");
  430. return -ENODEV;
  431. }
  432. if (pdata->buck2_gpiodvs) {
  433. if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
  434. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  435. return -EINVAL;
  436. }
  437. }
  438. if (pdata->buck3_gpiodvs) {
  439. if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
  440. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  441. return -EINVAL;
  442. }
  443. }
  444. if (pdata->buck4_gpiodvs) {
  445. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
  446. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  447. return -EINVAL;
  448. }
  449. }
  450. s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
  451. GFP_KERNEL);
  452. if (!s5m8767)
  453. return -ENOMEM;
  454. size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2);
  455. s5m8767->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
  456. if (!s5m8767->rdev)
  457. return -ENOMEM;
  458. rdev = s5m8767->rdev;
  459. s5m8767->dev = &pdev->dev;
  460. s5m8767->iodev = iodev;
  461. s5m8767->num_regulators = pdata->num_regulators;
  462. platform_set_drvdata(pdev, s5m8767);
  463. s5m8767->buck_gpioindex = pdata->buck_default_idx;
  464. s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
  465. s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
  466. s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
  467. s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
  468. s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
  469. s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
  470. s5m8767->buck_ds[0] = pdata->buck_ds[0];
  471. s5m8767->buck_ds[1] = pdata->buck_ds[1];
  472. s5m8767->buck_ds[2] = pdata->buck_ds[2];
  473. s5m8767->ramp_delay = pdata->buck_ramp_delay;
  474. s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
  475. s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
  476. s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
  477. s5m8767->opmode = pdata->opmode;
  478. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  479. pdata->buck2_init);
  480. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
  481. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  482. pdata->buck3_init);
  483. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
  484. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  485. pdata->buck4_init);
  486. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
  487. for (i = 0; i < 8; i++) {
  488. if (s5m8767->buck2_gpiodvs) {
  489. s5m8767->buck2_vol[i] =
  490. s5m8767_convert_voltage_to_sel(
  491. &buck_voltage_val2,
  492. pdata->buck2_voltage[i]);
  493. }
  494. if (s5m8767->buck3_gpiodvs) {
  495. s5m8767->buck3_vol[i] =
  496. s5m8767_convert_voltage_to_sel(
  497. &buck_voltage_val2,
  498. pdata->buck3_voltage[i]);
  499. }
  500. if (s5m8767->buck4_gpiodvs) {
  501. s5m8767->buck4_vol[i] =
  502. s5m8767_convert_voltage_to_sel(
  503. &buck_voltage_val2,
  504. pdata->buck4_voltage[i]);
  505. }
  506. }
  507. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
  508. pdata->buck4_gpiodvs) {
  509. if (!gpio_is_valid(pdata->buck_gpios[0]) ||
  510. !gpio_is_valid(pdata->buck_gpios[1]) ||
  511. !gpio_is_valid(pdata->buck_gpios[2])) {
  512. dev_err(&pdev->dev, "GPIO NOT VALID\n");
  513. return -EINVAL;
  514. }
  515. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
  516. "S5M8767 SET1");
  517. if (ret)
  518. return ret;
  519. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
  520. "S5M8767 SET2");
  521. if (ret)
  522. return ret;
  523. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
  524. "S5M8767 SET3");
  525. if (ret)
  526. return ret;
  527. /* SET1 GPIO */
  528. gpio_direction_output(pdata->buck_gpios[0],
  529. (s5m8767->buck_gpioindex >> 2) & 0x1);
  530. /* SET2 GPIO */
  531. gpio_direction_output(pdata->buck_gpios[1],
  532. (s5m8767->buck_gpioindex >> 1) & 0x1);
  533. /* SET3 GPIO */
  534. gpio_direction_output(pdata->buck_gpios[2],
  535. (s5m8767->buck_gpioindex >> 0) & 0x1);
  536. }
  537. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
  538. if (ret)
  539. return ret;
  540. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
  541. if (ret)
  542. return ret;
  543. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
  544. if (ret)
  545. return ret;
  546. /* DS2 GPIO */
  547. gpio_direction_output(pdata->buck_ds[0], 0x0);
  548. /* DS3 GPIO */
  549. gpio_direction_output(pdata->buck_ds[1], 0x0);
  550. /* DS4 GPIO */
  551. gpio_direction_output(pdata->buck_ds[2], 0x0);
  552. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
  553. pdata->buck4_gpiodvs) {
  554. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
  555. (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
  556. 1 << 1);
  557. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
  558. (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
  559. 1 << 1);
  560. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
  561. (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
  562. 1 << 1);
  563. }
  564. /* Initialize GPIO DVS registers */
  565. for (i = 0; i < 8; i++) {
  566. if (s5m8767->buck2_gpiodvs) {
  567. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
  568. s5m8767->buck2_vol[i]);
  569. }
  570. if (s5m8767->buck3_gpiodvs) {
  571. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
  572. s5m8767->buck3_vol[i]);
  573. }
  574. if (s5m8767->buck4_gpiodvs) {
  575. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
  576. s5m8767->buck4_vol[i]);
  577. }
  578. }
  579. if (s5m8767->buck2_ramp)
  580. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
  581. if (s5m8767->buck3_ramp)
  582. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
  583. if (s5m8767->buck4_ramp)
  584. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
  585. if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
  586. || s5m8767->buck4_ramp) {
  587. switch (s5m8767->ramp_delay) {
  588. case 5:
  589. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  590. 0x40, 0xf0);
  591. break;
  592. case 10:
  593. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  594. 0x90, 0xf0);
  595. break;
  596. case 25:
  597. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  598. 0xd0, 0xf0);
  599. break;
  600. case 50:
  601. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  602. 0xe0, 0xf0);
  603. break;
  604. case 100:
  605. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  606. 0xf0, 0xf0);
  607. break;
  608. default:
  609. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  610. 0x90, 0xf0);
  611. }
  612. }
  613. for (i = 0; i < pdata->num_regulators; i++) {
  614. const struct sec_voltage_desc *desc;
  615. int id = pdata->regulators[i].id;
  616. desc = reg_voltage_map[id];
  617. if (desc) {
  618. regulators[id].n_voltages =
  619. (desc->max - desc->min) / desc->step + 1;
  620. regulators[id].min_uV = desc->min;
  621. regulators[id].uV_step = desc->step;
  622. regulators[id].vsel_reg =
  623. s5m8767_get_vsel_reg(id, s5m8767);
  624. if (id < S5M8767_BUCK1)
  625. regulators[id].vsel_mask = 0x3f;
  626. else
  627. regulators[id].vsel_mask = 0xff;
  628. }
  629. config.dev = s5m8767->dev;
  630. config.init_data = pdata->regulators[i].initdata;
  631. config.driver_data = s5m8767;
  632. config.regmap = iodev->regmap;
  633. rdev[i] = regulator_register(&regulators[id], &config);
  634. if (IS_ERR(rdev[i])) {
  635. ret = PTR_ERR(rdev[i]);
  636. dev_err(s5m8767->dev, "regulator init failed for %d\n",
  637. id);
  638. rdev[i] = NULL;
  639. goto err;
  640. }
  641. }
  642. return 0;
  643. err:
  644. for (i = 0; i < s5m8767->num_regulators; i++)
  645. if (rdev[i])
  646. regulator_unregister(rdev[i]);
  647. return ret;
  648. }
  649. static int s5m8767_pmic_remove(struct platform_device *pdev)
  650. {
  651. struct s5m8767_info *s5m8767 = platform_get_drvdata(pdev);
  652. struct regulator_dev **rdev = s5m8767->rdev;
  653. int i;
  654. for (i = 0; i < s5m8767->num_regulators; i++)
  655. if (rdev[i])
  656. regulator_unregister(rdev[i]);
  657. return 0;
  658. }
  659. static const struct platform_device_id s5m8767_pmic_id[] = {
  660. { "s5m8767-pmic", 0},
  661. { },
  662. };
  663. MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
  664. static struct platform_driver s5m8767_pmic_driver = {
  665. .driver = {
  666. .name = "s5m8767-pmic",
  667. .owner = THIS_MODULE,
  668. },
  669. .probe = s5m8767_pmic_probe,
  670. .remove = s5m8767_pmic_remove,
  671. .id_table = s5m8767_pmic_id,
  672. };
  673. static int __init s5m8767_pmic_init(void)
  674. {
  675. return platform_driver_register(&s5m8767_pmic_driver);
  676. }
  677. subsys_initcall(s5m8767_pmic_init);
  678. static void __exit s5m8767_pmic_exit(void)
  679. {
  680. platform_driver_unregister(&s5m8767_pmic_driver);
  681. }
  682. module_exit(s5m8767_pmic_exit);
  683. /* Module information */
  684. MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
  685. MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
  686. MODULE_LICENSE("GPL");