time.c 33 KB

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  1. /*
  2. * linux/arch/x86-64/kernel/time.c
  3. *
  4. * "High Precision Event Timer" based timekeeping.
  5. *
  6. * Copyright (c) 1991,1992,1995 Linus Torvalds
  7. * Copyright (c) 1994 Alan Modra
  8. * Copyright (c) 1995 Markus Kuhn
  9. * Copyright (c) 1996 Ingo Molnar
  10. * Copyright (c) 1998 Andrea Arcangeli
  11. * Copyright (c) 2002,2006 Vojtech Pavlik
  12. * Copyright (c) 2003 Andi Kleen
  13. * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/sched.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/init.h>
  19. #include <linux/mc146818rtc.h>
  20. #include <linux/time.h>
  21. #include <linux/ioport.h>
  22. #include <linux/module.h>
  23. #include <linux/device.h>
  24. #include <linux/sysdev.h>
  25. #include <linux/bcd.h>
  26. #include <linux/notifier.h>
  27. #include <linux/cpu.h>
  28. #include <linux/kallsyms.h>
  29. #include <linux/acpi.h>
  30. #ifdef CONFIG_ACPI
  31. #include <acpi/achware.h> /* for PM timer frequency */
  32. #include <acpi/acpi_bus.h>
  33. #endif
  34. #include <asm/8253pit.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/vsyscall.h>
  37. #include <asm/timex.h>
  38. #include <asm/proto.h>
  39. #include <asm/hpet.h>
  40. #include <asm/sections.h>
  41. #include <linux/cpufreq.h>
  42. #include <linux/hpet.h>
  43. #ifdef CONFIG_X86_LOCAL_APIC
  44. #include <asm/apic.h>
  45. #endif
  46. #ifdef CONFIG_CPU_FREQ
  47. static void cpufreq_delayed_get(void);
  48. #endif
  49. extern void i8254_timer_resume(void);
  50. extern int using_apic_timer;
  51. static char *timename = NULL;
  52. DEFINE_SPINLOCK(rtc_lock);
  53. EXPORT_SYMBOL(rtc_lock);
  54. DEFINE_SPINLOCK(i8253_lock);
  55. int nohpet __initdata = 0;
  56. static int notsc __initdata = 0;
  57. #define USEC_PER_TICK (USEC_PER_SEC / HZ)
  58. #define NSEC_PER_TICK (NSEC_PER_SEC / HZ)
  59. #define FSEC_PER_TICK (FSEC_PER_SEC / HZ)
  60. #define NS_SCALE 10 /* 2^10, carefully chosen */
  61. #define US_SCALE 32 /* 2^32, arbitralrily chosen */
  62. unsigned int cpu_khz; /* TSC clocks / usec, not used here */
  63. EXPORT_SYMBOL(cpu_khz);
  64. static unsigned long hpet_period; /* fsecs / HPET clock */
  65. unsigned long hpet_tick; /* HPET clocks / interrupt */
  66. int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
  67. unsigned long vxtime_hz = PIT_TICK_RATE;
  68. int report_lost_ticks; /* command line option */
  69. unsigned long long monotonic_base;
  70. struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
  71. volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
  72. unsigned long __wall_jiffies __section_wall_jiffies = INITIAL_JIFFIES;
  73. struct timespec __xtime __section_xtime;
  74. struct timezone __sys_tz __section_sys_tz;
  75. /*
  76. * do_gettimeoffset() returns microseconds since last timer interrupt was
  77. * triggered by hardware. A memory read of HPET is slower than a register read
  78. * of TSC, but much more reliable. It's also synchronized to the timer
  79. * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
  80. * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
  81. * This is not a problem, because jiffies hasn't updated either. They are bound
  82. * together by xtime_lock.
  83. */
  84. static inline unsigned int do_gettimeoffset_tsc(void)
  85. {
  86. unsigned long t;
  87. unsigned long x;
  88. t = get_cycles_sync();
  89. if (t < vxtime.last_tsc)
  90. t = vxtime.last_tsc; /* hack */
  91. x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> US_SCALE;
  92. return x;
  93. }
  94. static inline unsigned int do_gettimeoffset_hpet(void)
  95. {
  96. /* cap counter read to one tick to avoid inconsistencies */
  97. unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
  98. return (min(counter,hpet_tick) * vxtime.quot) >> US_SCALE;
  99. }
  100. unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
  101. /*
  102. * This version of gettimeofday() has microsecond resolution and better than
  103. * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
  104. * MHz) HPET timer.
  105. */
  106. void do_gettimeofday(struct timeval *tv)
  107. {
  108. unsigned long seq, t;
  109. unsigned int sec, usec;
  110. do {
  111. seq = read_seqbegin(&xtime_lock);
  112. sec = xtime.tv_sec;
  113. usec = xtime.tv_nsec / NSEC_PER_USEC;
  114. /* i386 does some correction here to keep the clock
  115. monotonous even when ntpd is fixing drift.
  116. But they didn't work for me, there is a non monotonic
  117. clock anyways with ntp.
  118. I dropped all corrections now until a real solution can
  119. be found. Note when you fix it here you need to do the same
  120. in arch/x86_64/kernel/vsyscall.c and export all needed
  121. variables in vmlinux.lds. -AK */
  122. t = (jiffies - wall_jiffies) * USEC_PER_TICK +
  123. do_gettimeoffset();
  124. usec += t;
  125. } while (read_seqretry(&xtime_lock, seq));
  126. tv->tv_sec = sec + usec / USEC_PER_SEC;
  127. tv->tv_usec = usec % USEC_PER_SEC;
  128. }
  129. EXPORT_SYMBOL(do_gettimeofday);
  130. /*
  131. * settimeofday() first undoes the correction that gettimeofday would do
  132. * on the time, and then saves it. This is ugly, but has been like this for
  133. * ages already.
  134. */
  135. int do_settimeofday(struct timespec *tv)
  136. {
  137. time_t wtm_sec, sec = tv->tv_sec;
  138. long wtm_nsec, nsec = tv->tv_nsec;
  139. if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
  140. return -EINVAL;
  141. write_seqlock_irq(&xtime_lock);
  142. nsec -= do_gettimeoffset() * NSEC_PER_USEC +
  143. (jiffies - wall_jiffies) * NSEC_PER_TICK;
  144. wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
  145. wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
  146. set_normalized_timespec(&xtime, sec, nsec);
  147. set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
  148. ntp_clear();
  149. write_sequnlock_irq(&xtime_lock);
  150. clock_was_set();
  151. return 0;
  152. }
  153. EXPORT_SYMBOL(do_settimeofday);
  154. unsigned long profile_pc(struct pt_regs *regs)
  155. {
  156. unsigned long pc = instruction_pointer(regs);
  157. /* Assume the lock function has either no stack frame or a copy
  158. of eflags from PUSHF
  159. Eflags always has bits 22 and up cleared unlike kernel addresses. */
  160. if (!user_mode(regs) && in_lock_functions(pc)) {
  161. unsigned long *sp = (unsigned long *)regs->rsp;
  162. if (sp[0] >> 22)
  163. return sp[0];
  164. if (sp[1] >> 22)
  165. return sp[1];
  166. }
  167. return pc;
  168. }
  169. EXPORT_SYMBOL(profile_pc);
  170. /*
  171. * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
  172. * ms after the second nowtime has started, because when nowtime is written
  173. * into the registers of the CMOS clock, it will jump to the next second
  174. * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
  175. * sheet for details.
  176. */
  177. static void set_rtc_mmss(unsigned long nowtime)
  178. {
  179. int real_seconds, real_minutes, cmos_minutes;
  180. unsigned char control, freq_select;
  181. /*
  182. * IRQs are disabled when we're called from the timer interrupt,
  183. * no need for spin_lock_irqsave()
  184. */
  185. spin_lock(&rtc_lock);
  186. /*
  187. * Tell the clock it's being set and stop it.
  188. */
  189. control = CMOS_READ(RTC_CONTROL);
  190. CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
  191. freq_select = CMOS_READ(RTC_FREQ_SELECT);
  192. CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
  193. cmos_minutes = CMOS_READ(RTC_MINUTES);
  194. BCD_TO_BIN(cmos_minutes);
  195. /*
  196. * since we're only adjusting minutes and seconds, don't interfere with hour
  197. * overflow. This avoids messing with unknown time zones but requires your RTC
  198. * not to be off by more than 15 minutes. Since we're calling it only when
  199. * our clock is externally synchronized using NTP, this shouldn't be a problem.
  200. */
  201. real_seconds = nowtime % 60;
  202. real_minutes = nowtime / 60;
  203. if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
  204. real_minutes += 30; /* correct for half hour time zone */
  205. real_minutes %= 60;
  206. if (abs(real_minutes - cmos_minutes) >= 30) {
  207. printk(KERN_WARNING "time.c: can't update CMOS clock "
  208. "from %d to %d\n", cmos_minutes, real_minutes);
  209. } else {
  210. BIN_TO_BCD(real_seconds);
  211. BIN_TO_BCD(real_minutes);
  212. CMOS_WRITE(real_seconds, RTC_SECONDS);
  213. CMOS_WRITE(real_minutes, RTC_MINUTES);
  214. }
  215. /*
  216. * The following flags have to be released exactly in this order, otherwise the
  217. * DS12887 (popular MC146818A clone with integrated battery and quartz) will
  218. * not reset the oscillator and will not update precisely 500 ms later. You
  219. * won't find this mentioned in the Dallas Semiconductor data sheets, but who
  220. * believes data sheets anyway ... -- Markus Kuhn
  221. */
  222. CMOS_WRITE(control, RTC_CONTROL);
  223. CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
  224. spin_unlock(&rtc_lock);
  225. }
  226. /* monotonic_clock(): returns # of nanoseconds passed since time_init()
  227. * Note: This function is required to return accurate
  228. * time even in the absence of multiple timer ticks.
  229. */
  230. unsigned long long monotonic_clock(void)
  231. {
  232. unsigned long seq;
  233. u32 last_offset, this_offset, offset;
  234. unsigned long long base;
  235. if (vxtime.mode == VXTIME_HPET) {
  236. do {
  237. seq = read_seqbegin(&xtime_lock);
  238. last_offset = vxtime.last;
  239. base = monotonic_base;
  240. this_offset = hpet_readl(HPET_COUNTER);
  241. } while (read_seqretry(&xtime_lock, seq));
  242. offset = (this_offset - last_offset);
  243. offset *= NSEC_PER_TICK / hpet_tick;
  244. } else {
  245. do {
  246. seq = read_seqbegin(&xtime_lock);
  247. last_offset = vxtime.last_tsc;
  248. base = monotonic_base;
  249. } while (read_seqretry(&xtime_lock, seq));
  250. this_offset = get_cycles_sync();
  251. /* FIXME: 1000 or 1000000? */
  252. offset = (this_offset - last_offset)*1000 / cpu_khz;
  253. }
  254. return base + offset;
  255. }
  256. EXPORT_SYMBOL(monotonic_clock);
  257. static noinline void handle_lost_ticks(int lost, struct pt_regs *regs)
  258. {
  259. static long lost_count;
  260. static int warned;
  261. if (report_lost_ticks) {
  262. printk(KERN_WARNING "time.c: Lost %d timer tick(s)! ", lost);
  263. print_symbol("rip %s)\n", regs->rip);
  264. }
  265. if (lost_count == 1000 && !warned) {
  266. printk(KERN_WARNING "warning: many lost ticks.\n"
  267. KERN_WARNING "Your time source seems to be instable or "
  268. "some driver is hogging interupts\n");
  269. print_symbol("rip %s\n", regs->rip);
  270. if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
  271. printk(KERN_WARNING "Falling back to HPET\n");
  272. if (hpet_use_timer)
  273. vxtime.last = hpet_readl(HPET_T0_CMP) -
  274. hpet_tick;
  275. else
  276. vxtime.last = hpet_readl(HPET_COUNTER);
  277. vxtime.mode = VXTIME_HPET;
  278. do_gettimeoffset = do_gettimeoffset_hpet;
  279. }
  280. /* else should fall back to PIT, but code missing. */
  281. warned = 1;
  282. } else
  283. lost_count++;
  284. #ifdef CONFIG_CPU_FREQ
  285. /* In some cases the CPU can change frequency without us noticing
  286. Give cpufreq a change to catch up. */
  287. if ((lost_count+1) % 25 == 0)
  288. cpufreq_delayed_get();
  289. #endif
  290. }
  291. void main_timer_handler(struct pt_regs *regs)
  292. {
  293. static unsigned long rtc_update = 0;
  294. unsigned long tsc;
  295. int delay = 0, offset = 0, lost = 0;
  296. /*
  297. * Here we are in the timer irq handler. We have irqs locally disabled (so we
  298. * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
  299. * on the other CPU, so we need a lock. We also need to lock the vsyscall
  300. * variables, because both do_timer() and us change them -arca+vojtech
  301. */
  302. write_seqlock(&xtime_lock);
  303. if (vxtime.hpet_address)
  304. offset = hpet_readl(HPET_COUNTER);
  305. if (hpet_use_timer) {
  306. /* if we're using the hpet timer functionality,
  307. * we can more accurately know the counter value
  308. * when the timer interrupt occured.
  309. */
  310. offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
  311. delay = hpet_readl(HPET_COUNTER) - offset;
  312. } else if (!pmtmr_ioport) {
  313. spin_lock(&i8253_lock);
  314. outb_p(0x00, 0x43);
  315. delay = inb_p(0x40);
  316. delay |= inb(0x40) << 8;
  317. spin_unlock(&i8253_lock);
  318. delay = LATCH - 1 - delay;
  319. }
  320. tsc = get_cycles_sync();
  321. if (vxtime.mode == VXTIME_HPET) {
  322. if (offset - vxtime.last > hpet_tick) {
  323. lost = (offset - vxtime.last) / hpet_tick - 1;
  324. }
  325. monotonic_base +=
  326. (offset - vxtime.last) * NSEC_PER_TICK / hpet_tick;
  327. vxtime.last = offset;
  328. #ifdef CONFIG_X86_PM_TIMER
  329. } else if (vxtime.mode == VXTIME_PMTMR) {
  330. lost = pmtimer_mark_offset();
  331. #endif
  332. } else {
  333. offset = (((tsc - vxtime.last_tsc) *
  334. vxtime.tsc_quot) >> US_SCALE) - USEC_PER_TICK;
  335. if (offset < 0)
  336. offset = 0;
  337. if (offset > USEC_PER_TICK) {
  338. lost = offset / USEC_PER_TICK;
  339. offset %= USEC_PER_TICK;
  340. }
  341. /* FIXME: 1000 or 1000000? */
  342. monotonic_base += (tsc - vxtime.last_tsc) * 1000000 / cpu_khz;
  343. vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
  344. if ((((tsc - vxtime.last_tsc) *
  345. vxtime.tsc_quot) >> US_SCALE) < offset)
  346. vxtime.last_tsc = tsc -
  347. (((long) offset << US_SCALE) / vxtime.tsc_quot) - 1;
  348. }
  349. if (lost > 0) {
  350. handle_lost_ticks(lost, regs);
  351. jiffies += lost;
  352. }
  353. /*
  354. * Do the timer stuff.
  355. */
  356. do_timer(regs);
  357. #ifndef CONFIG_SMP
  358. update_process_times(user_mode(regs));
  359. #endif
  360. /*
  361. * In the SMP case we use the local APIC timer interrupt to do the profiling,
  362. * except when we simulate SMP mode on a uniprocessor system, in that case we
  363. * have to call the local interrupt handler.
  364. */
  365. #ifndef CONFIG_X86_LOCAL_APIC
  366. profile_tick(CPU_PROFILING, regs);
  367. #else
  368. if (!using_apic_timer)
  369. smp_local_timer_interrupt(regs);
  370. #endif
  371. /*
  372. * If we have an externally synchronized Linux clock, then update CMOS clock
  373. * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
  374. * closest to exactly 500 ms before the next second. If the update fails, we
  375. * don't care, as it'll be updated on the next turn, and the problem (time way
  376. * off) isn't likely to go away much sooner anyway.
  377. */
  378. if (ntp_synced() && xtime.tv_sec > rtc_update &&
  379. abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
  380. set_rtc_mmss(xtime.tv_sec);
  381. rtc_update = xtime.tv_sec + 660;
  382. }
  383. write_sequnlock(&xtime_lock);
  384. }
  385. static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  386. {
  387. if (apic_runs_main_timer > 1)
  388. return IRQ_HANDLED;
  389. main_timer_handler(regs);
  390. #ifdef CONFIG_X86_LOCAL_APIC
  391. if (using_apic_timer)
  392. smp_send_timer_broadcast_ipi();
  393. #endif
  394. return IRQ_HANDLED;
  395. }
  396. static unsigned int cyc2ns_scale __read_mostly;
  397. static inline void set_cyc2ns_scale(unsigned long cpu_khz)
  398. {
  399. cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / cpu_khz;
  400. }
  401. static inline unsigned long long cycles_2_ns(unsigned long long cyc)
  402. {
  403. return (cyc * cyc2ns_scale) >> NS_SCALE;
  404. }
  405. unsigned long long sched_clock(void)
  406. {
  407. unsigned long a = 0;
  408. #if 0
  409. /* Don't do a HPET read here. Using TSC always is much faster
  410. and HPET may not be mapped yet when the scheduler first runs.
  411. Disadvantage is a small drift between CPUs in some configurations,
  412. but that should be tolerable. */
  413. if (__vxtime.mode == VXTIME_HPET)
  414. return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> US_SCALE;
  415. #endif
  416. /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
  417. which means it is not completely exact and may not be monotonous between
  418. CPUs. But the errors should be too small to matter for scheduling
  419. purposes. */
  420. rdtscll(a);
  421. return cycles_2_ns(a);
  422. }
  423. static unsigned long get_cmos_time(void)
  424. {
  425. unsigned int year, mon, day, hour, min, sec;
  426. unsigned long flags;
  427. unsigned extyear = 0;
  428. spin_lock_irqsave(&rtc_lock, flags);
  429. do {
  430. sec = CMOS_READ(RTC_SECONDS);
  431. min = CMOS_READ(RTC_MINUTES);
  432. hour = CMOS_READ(RTC_HOURS);
  433. day = CMOS_READ(RTC_DAY_OF_MONTH);
  434. mon = CMOS_READ(RTC_MONTH);
  435. year = CMOS_READ(RTC_YEAR);
  436. #ifdef CONFIG_ACPI
  437. if (acpi_fadt.revision >= FADT2_REVISION_ID &&
  438. acpi_fadt.century)
  439. extyear = CMOS_READ(acpi_fadt.century);
  440. #endif
  441. } while (sec != CMOS_READ(RTC_SECONDS));
  442. spin_unlock_irqrestore(&rtc_lock, flags);
  443. /*
  444. * We know that x86-64 always uses BCD format, no need to check the
  445. * config register.
  446. */
  447. BCD_TO_BIN(sec);
  448. BCD_TO_BIN(min);
  449. BCD_TO_BIN(hour);
  450. BCD_TO_BIN(day);
  451. BCD_TO_BIN(mon);
  452. BCD_TO_BIN(year);
  453. if (extyear) {
  454. BCD_TO_BIN(extyear);
  455. year += extyear;
  456. printk(KERN_INFO "Extended CMOS year: %d\n", extyear);
  457. } else {
  458. /*
  459. * x86-64 systems only exists since 2002.
  460. * This will work up to Dec 31, 2100
  461. */
  462. year += 2000;
  463. }
  464. return mktime(year, mon, day, hour, min, sec);
  465. }
  466. #ifdef CONFIG_CPU_FREQ
  467. /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
  468. changes.
  469. RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
  470. not that important because current Opteron setups do not support
  471. scaling on SMP anyroads.
  472. Should fix up last_tsc too. Currently gettimeofday in the
  473. first tick after the change will be slightly wrong. */
  474. #include <linux/workqueue.h>
  475. static unsigned int cpufreq_delayed_issched = 0;
  476. static unsigned int cpufreq_init = 0;
  477. static struct work_struct cpufreq_delayed_get_work;
  478. static void handle_cpufreq_delayed_get(void *v)
  479. {
  480. unsigned int cpu;
  481. for_each_online_cpu(cpu) {
  482. cpufreq_get(cpu);
  483. }
  484. cpufreq_delayed_issched = 0;
  485. }
  486. /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
  487. * to verify the CPU frequency the timing core thinks the CPU is running
  488. * at is still correct.
  489. */
  490. static void cpufreq_delayed_get(void)
  491. {
  492. static int warned;
  493. if (cpufreq_init && !cpufreq_delayed_issched) {
  494. cpufreq_delayed_issched = 1;
  495. if (!warned) {
  496. warned = 1;
  497. printk(KERN_DEBUG
  498. "Losing some ticks... checking if CPU frequency changed.\n");
  499. }
  500. schedule_work(&cpufreq_delayed_get_work);
  501. }
  502. }
  503. static unsigned int ref_freq = 0;
  504. static unsigned long loops_per_jiffy_ref = 0;
  505. static unsigned long cpu_khz_ref = 0;
  506. static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
  507. void *data)
  508. {
  509. struct cpufreq_freqs *freq = data;
  510. unsigned long *lpj, dummy;
  511. if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
  512. return 0;
  513. lpj = &dummy;
  514. if (!(freq->flags & CPUFREQ_CONST_LOOPS))
  515. #ifdef CONFIG_SMP
  516. lpj = &cpu_data[freq->cpu].loops_per_jiffy;
  517. #else
  518. lpj = &boot_cpu_data.loops_per_jiffy;
  519. #endif
  520. if (!ref_freq) {
  521. ref_freq = freq->old;
  522. loops_per_jiffy_ref = *lpj;
  523. cpu_khz_ref = cpu_khz;
  524. }
  525. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  526. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
  527. (val == CPUFREQ_RESUMECHANGE)) {
  528. *lpj =
  529. cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
  530. cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
  531. if (!(freq->flags & CPUFREQ_CONST_LOOPS))
  532. vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
  533. }
  534. set_cyc2ns_scale(cpu_khz_ref);
  535. return 0;
  536. }
  537. static struct notifier_block time_cpufreq_notifier_block = {
  538. .notifier_call = time_cpufreq_notifier
  539. };
  540. static int __init cpufreq_tsc(void)
  541. {
  542. INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL);
  543. if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
  544. CPUFREQ_TRANSITION_NOTIFIER))
  545. cpufreq_init = 1;
  546. return 0;
  547. }
  548. core_initcall(cpufreq_tsc);
  549. #endif
  550. /*
  551. * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
  552. * it to the HPET timer of known frequency.
  553. */
  554. #define TICK_COUNT 100000000
  555. static unsigned int __init hpet_calibrate_tsc(void)
  556. {
  557. int tsc_start, hpet_start;
  558. int tsc_now, hpet_now;
  559. unsigned long flags;
  560. local_irq_save(flags);
  561. local_irq_disable();
  562. hpet_start = hpet_readl(HPET_COUNTER);
  563. rdtscl(tsc_start);
  564. do {
  565. local_irq_disable();
  566. hpet_now = hpet_readl(HPET_COUNTER);
  567. tsc_now = get_cycles_sync();
  568. local_irq_restore(flags);
  569. } while ((tsc_now - tsc_start) < TICK_COUNT &&
  570. (hpet_now - hpet_start) < TICK_COUNT);
  571. return (tsc_now - tsc_start) * 1000000000L
  572. / ((hpet_now - hpet_start) * hpet_period / 1000);
  573. }
  574. /*
  575. * pit_calibrate_tsc() uses the speaker output (channel 2) of
  576. * the PIT. This is better than using the timer interrupt output,
  577. * because we can read the value of the speaker with just one inb(),
  578. * where we need three i/o operations for the interrupt channel.
  579. * We count how many ticks the TSC does in 50 ms.
  580. */
  581. static unsigned int __init pit_calibrate_tsc(void)
  582. {
  583. unsigned long start, end;
  584. unsigned long flags;
  585. spin_lock_irqsave(&i8253_lock, flags);
  586. outb((inb(0x61) & ~0x02) | 0x01, 0x61);
  587. outb(0xb0, 0x43);
  588. outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
  589. outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
  590. start = get_cycles_sync();
  591. while ((inb(0x61) & 0x20) == 0);
  592. end = get_cycles_sync();
  593. spin_unlock_irqrestore(&i8253_lock, flags);
  594. return (end - start) / 50;
  595. }
  596. #ifdef CONFIG_HPET
  597. static __init int late_hpet_init(void)
  598. {
  599. struct hpet_data hd;
  600. unsigned int ntimer;
  601. if (!vxtime.hpet_address)
  602. return 0;
  603. memset(&hd, 0, sizeof (hd));
  604. ntimer = hpet_readl(HPET_ID);
  605. ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
  606. ntimer++;
  607. /*
  608. * Register with driver.
  609. * Timer0 and Timer1 is used by platform.
  610. */
  611. hd.hd_phys_address = vxtime.hpet_address;
  612. hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
  613. hd.hd_nirqs = ntimer;
  614. hd.hd_flags = HPET_DATA_PLATFORM;
  615. hpet_reserve_timer(&hd, 0);
  616. #ifdef CONFIG_HPET_EMULATE_RTC
  617. hpet_reserve_timer(&hd, 1);
  618. #endif
  619. hd.hd_irq[0] = HPET_LEGACY_8254;
  620. hd.hd_irq[1] = HPET_LEGACY_RTC;
  621. if (ntimer > 2) {
  622. struct hpet *hpet;
  623. struct hpet_timer *timer;
  624. int i;
  625. hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
  626. timer = &hpet->hpet_timers[2];
  627. for (i = 2; i < ntimer; timer++, i++)
  628. hd.hd_irq[i] = (timer->hpet_config &
  629. Tn_INT_ROUTE_CNF_MASK) >>
  630. Tn_INT_ROUTE_CNF_SHIFT;
  631. }
  632. hpet_alloc(&hd);
  633. return 0;
  634. }
  635. fs_initcall(late_hpet_init);
  636. #endif
  637. static int hpet_timer_stop_set_go(unsigned long tick)
  638. {
  639. unsigned int cfg;
  640. /*
  641. * Stop the timers and reset the main counter.
  642. */
  643. cfg = hpet_readl(HPET_CFG);
  644. cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
  645. hpet_writel(cfg, HPET_CFG);
  646. hpet_writel(0, HPET_COUNTER);
  647. hpet_writel(0, HPET_COUNTER + 4);
  648. /*
  649. * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
  650. * and period also hpet_tick.
  651. */
  652. if (hpet_use_timer) {
  653. hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
  654. HPET_TN_32BIT, HPET_T0_CFG);
  655. hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */
  656. hpet_writel(hpet_tick, HPET_T0_CMP); /* period */
  657. cfg |= HPET_CFG_LEGACY;
  658. }
  659. /*
  660. * Go!
  661. */
  662. cfg |= HPET_CFG_ENABLE;
  663. hpet_writel(cfg, HPET_CFG);
  664. return 0;
  665. }
  666. static int hpet_init(void)
  667. {
  668. unsigned int id;
  669. if (!vxtime.hpet_address)
  670. return -1;
  671. set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
  672. __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
  673. /*
  674. * Read the period, compute tick and quotient.
  675. */
  676. id = hpet_readl(HPET_ID);
  677. if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
  678. return -1;
  679. hpet_period = hpet_readl(HPET_PERIOD);
  680. if (hpet_period < 100000 || hpet_period > 100000000)
  681. return -1;
  682. hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period;
  683. hpet_use_timer = (id & HPET_ID_LEGSUP);
  684. return hpet_timer_stop_set_go(hpet_tick);
  685. }
  686. static int hpet_reenable(void)
  687. {
  688. return hpet_timer_stop_set_go(hpet_tick);
  689. }
  690. #define PIT_MODE 0x43
  691. #define PIT_CH0 0x40
  692. static void __init __pit_init(int val, u8 mode)
  693. {
  694. unsigned long flags;
  695. spin_lock_irqsave(&i8253_lock, flags);
  696. outb_p(mode, PIT_MODE);
  697. outb_p(val & 0xff, PIT_CH0); /* LSB */
  698. outb_p(val >> 8, PIT_CH0); /* MSB */
  699. spin_unlock_irqrestore(&i8253_lock, flags);
  700. }
  701. void __init pit_init(void)
  702. {
  703. __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
  704. }
  705. void __init pit_stop_interrupt(void)
  706. {
  707. __pit_init(0, 0x30); /* mode 0 */
  708. }
  709. void __init stop_timer_interrupt(void)
  710. {
  711. char *name;
  712. if (vxtime.hpet_address) {
  713. name = "HPET";
  714. hpet_timer_stop_set_go(0);
  715. } else {
  716. name = "PIT";
  717. pit_stop_interrupt();
  718. }
  719. printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
  720. }
  721. int __init time_setup(char *str)
  722. {
  723. report_lost_ticks = 1;
  724. return 1;
  725. }
  726. static struct irqaction irq0 = {
  727. timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL
  728. };
  729. static int __cpuinit
  730. time_cpu_notifier(struct notifier_block *nb, unsigned long action, void *hcpu)
  731. {
  732. unsigned cpu = (unsigned long) hcpu;
  733. if (action == CPU_ONLINE)
  734. vsyscall_set_cpu(cpu);
  735. return NOTIFY_DONE;
  736. }
  737. void __init time_init(void)
  738. {
  739. if (nohpet)
  740. vxtime.hpet_address = 0;
  741. xtime.tv_sec = get_cmos_time();
  742. xtime.tv_nsec = 0;
  743. set_normalized_timespec(&wall_to_monotonic,
  744. -xtime.tv_sec, -xtime.tv_nsec);
  745. if (!hpet_init())
  746. vxtime_hz = (FSEC_PER_SEC + hpet_period / 2) / hpet_period;
  747. else
  748. vxtime.hpet_address = 0;
  749. if (hpet_use_timer) {
  750. /* set tick_nsec to use the proper rate for HPET */
  751. tick_nsec = TICK_NSEC_HPET;
  752. cpu_khz = hpet_calibrate_tsc();
  753. timename = "HPET";
  754. #ifdef CONFIG_X86_PM_TIMER
  755. } else if (pmtmr_ioport && !vxtime.hpet_address) {
  756. vxtime_hz = PM_TIMER_FREQUENCY;
  757. timename = "PM";
  758. pit_init();
  759. cpu_khz = pit_calibrate_tsc();
  760. #endif
  761. } else {
  762. pit_init();
  763. cpu_khz = pit_calibrate_tsc();
  764. timename = "PIT";
  765. }
  766. vxtime.mode = VXTIME_TSC;
  767. vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
  768. vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
  769. vxtime.last_tsc = get_cycles_sync();
  770. setup_irq(0, &irq0);
  771. set_cyc2ns_scale(cpu_khz);
  772. hotcpu_notifier(time_cpu_notifier, 0);
  773. time_cpu_notifier(NULL, CPU_ONLINE, (void *)(long)smp_processor_id());
  774. #ifndef CONFIG_SMP
  775. time_init_gtod();
  776. #endif
  777. }
  778. /*
  779. * Make an educated guess if the TSC is trustworthy and synchronized
  780. * over all CPUs.
  781. */
  782. __cpuinit int unsynchronized_tsc(void)
  783. {
  784. #ifdef CONFIG_SMP
  785. if (apic_is_clustered_box())
  786. return 1;
  787. #endif
  788. /* Most intel systems have synchronized TSCs except for
  789. multi node systems */
  790. if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) {
  791. #ifdef CONFIG_ACPI
  792. /* But TSC doesn't tick in C3 so don't use it there */
  793. if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100)
  794. return 1;
  795. #endif
  796. return 0;
  797. }
  798. /* Assume multi socket systems are not synchronized */
  799. return num_present_cpus() > 1;
  800. }
  801. /*
  802. * Decide what mode gettimeofday should use.
  803. */
  804. void time_init_gtod(void)
  805. {
  806. char *timetype;
  807. if (unsynchronized_tsc())
  808. notsc = 1;
  809. if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
  810. vgetcpu_mode = VGETCPU_RDTSCP;
  811. else
  812. vgetcpu_mode = VGETCPU_LSL;
  813. if (vxtime.hpet_address && notsc) {
  814. timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
  815. if (hpet_use_timer)
  816. vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
  817. else
  818. vxtime.last = hpet_readl(HPET_COUNTER);
  819. vxtime.mode = VXTIME_HPET;
  820. do_gettimeoffset = do_gettimeoffset_hpet;
  821. #ifdef CONFIG_X86_PM_TIMER
  822. /* Using PM for gettimeofday is quite slow, but we have no other
  823. choice because the TSC is too unreliable on some systems. */
  824. } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
  825. timetype = "PM";
  826. do_gettimeoffset = do_gettimeoffset_pm;
  827. vxtime.mode = VXTIME_PMTMR;
  828. sysctl_vsyscall = 0;
  829. printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
  830. #endif
  831. } else {
  832. timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
  833. vxtime.mode = VXTIME_TSC;
  834. }
  835. printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
  836. vxtime_hz / 1000000, vxtime_hz % 1000000, timename, timetype);
  837. printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
  838. cpu_khz / 1000, cpu_khz % 1000);
  839. vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz;
  840. vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz;
  841. vxtime.last_tsc = get_cycles_sync();
  842. set_cyc2ns_scale(cpu_khz);
  843. }
  844. __setup("report_lost_ticks", time_setup);
  845. static long clock_cmos_diff;
  846. static unsigned long sleep_start;
  847. /*
  848. * sysfs support for the timer.
  849. */
  850. static int timer_suspend(struct sys_device *dev, pm_message_t state)
  851. {
  852. /*
  853. * Estimate time zone so that set_time can update the clock
  854. */
  855. long cmos_time = get_cmos_time();
  856. clock_cmos_diff = -cmos_time;
  857. clock_cmos_diff += get_seconds();
  858. sleep_start = cmos_time;
  859. return 0;
  860. }
  861. static int timer_resume(struct sys_device *dev)
  862. {
  863. unsigned long flags;
  864. unsigned long sec;
  865. unsigned long ctime = get_cmos_time();
  866. unsigned long sleep_length = (ctime - sleep_start) * HZ;
  867. if (vxtime.hpet_address)
  868. hpet_reenable();
  869. else
  870. i8254_timer_resume();
  871. sec = ctime + clock_cmos_diff;
  872. write_seqlock_irqsave(&xtime_lock,flags);
  873. xtime.tv_sec = sec;
  874. xtime.tv_nsec = 0;
  875. if (vxtime.mode == VXTIME_HPET) {
  876. if (hpet_use_timer)
  877. vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
  878. else
  879. vxtime.last = hpet_readl(HPET_COUNTER);
  880. #ifdef CONFIG_X86_PM_TIMER
  881. } else if (vxtime.mode == VXTIME_PMTMR) {
  882. pmtimer_resume();
  883. #endif
  884. } else
  885. vxtime.last_tsc = get_cycles_sync();
  886. write_sequnlock_irqrestore(&xtime_lock,flags);
  887. jiffies += sleep_length;
  888. wall_jiffies += sleep_length;
  889. monotonic_base += sleep_length * (NSEC_PER_SEC/HZ);
  890. touch_softlockup_watchdog();
  891. return 0;
  892. }
  893. static struct sysdev_class timer_sysclass = {
  894. .resume = timer_resume,
  895. .suspend = timer_suspend,
  896. set_kset_name("timer"),
  897. };
  898. /* XXX this driverfs stuff should probably go elsewhere later -john */
  899. static struct sys_device device_timer = {
  900. .id = 0,
  901. .cls = &timer_sysclass,
  902. };
  903. static int time_init_device(void)
  904. {
  905. int error = sysdev_class_register(&timer_sysclass);
  906. if (!error)
  907. error = sysdev_register(&device_timer);
  908. return error;
  909. }
  910. device_initcall(time_init_device);
  911. #ifdef CONFIG_HPET_EMULATE_RTC
  912. /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
  913. * is enabled, we support RTC interrupt functionality in software.
  914. * RTC has 3 kinds of interrupts:
  915. * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
  916. * is updated
  917. * 2) Alarm Interrupt - generate an interrupt at a specific time of day
  918. * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
  919. * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
  920. * (1) and (2) above are implemented using polling at a frequency of
  921. * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
  922. * overhead. (DEFAULT_RTC_INT_FREQ)
  923. * For (3), we use interrupts at 64Hz or user specified periodic
  924. * frequency, whichever is higher.
  925. */
  926. #include <linux/rtc.h>
  927. #define DEFAULT_RTC_INT_FREQ 64
  928. #define RTC_NUM_INTS 1
  929. static unsigned long UIE_on;
  930. static unsigned long prev_update_sec;
  931. static unsigned long AIE_on;
  932. static struct rtc_time alarm_time;
  933. static unsigned long PIE_on;
  934. static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
  935. static unsigned long PIE_count;
  936. static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
  937. static unsigned int hpet_t1_cmp; /* cached comparator register */
  938. int is_hpet_enabled(void)
  939. {
  940. return vxtime.hpet_address != 0;
  941. }
  942. /*
  943. * Timer 1 for RTC, we do not use periodic interrupt feature,
  944. * even if HPET supports periodic interrupts on Timer 1.
  945. * The reason being, to set up a periodic interrupt in HPET, we need to
  946. * stop the main counter. And if we do that everytime someone diables/enables
  947. * RTC, we will have adverse effect on main kernel timer running on Timer 0.
  948. * So, for the time being, simulate the periodic interrupt in software.
  949. *
  950. * hpet_rtc_timer_init() is called for the first time and during subsequent
  951. * interuppts reinit happens through hpet_rtc_timer_reinit().
  952. */
  953. int hpet_rtc_timer_init(void)
  954. {
  955. unsigned int cfg, cnt;
  956. unsigned long flags;
  957. if (!is_hpet_enabled())
  958. return 0;
  959. /*
  960. * Set the counter 1 and enable the interrupts.
  961. */
  962. if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
  963. hpet_rtc_int_freq = PIE_freq;
  964. else
  965. hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
  966. local_irq_save(flags);
  967. cnt = hpet_readl(HPET_COUNTER);
  968. cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
  969. hpet_writel(cnt, HPET_T1_CMP);
  970. hpet_t1_cmp = cnt;
  971. local_irq_restore(flags);
  972. cfg = hpet_readl(HPET_T1_CFG);
  973. cfg &= ~HPET_TN_PERIODIC;
  974. cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
  975. hpet_writel(cfg, HPET_T1_CFG);
  976. return 1;
  977. }
  978. static void hpet_rtc_timer_reinit(void)
  979. {
  980. unsigned int cfg, cnt;
  981. if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
  982. cfg = hpet_readl(HPET_T1_CFG);
  983. cfg &= ~HPET_TN_ENABLE;
  984. hpet_writel(cfg, HPET_T1_CFG);
  985. return;
  986. }
  987. if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
  988. hpet_rtc_int_freq = PIE_freq;
  989. else
  990. hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
  991. /* It is more accurate to use the comparator value than current count.*/
  992. cnt = hpet_t1_cmp;
  993. cnt += hpet_tick*HZ/hpet_rtc_int_freq;
  994. hpet_writel(cnt, HPET_T1_CMP);
  995. hpet_t1_cmp = cnt;
  996. }
  997. /*
  998. * The functions below are called from rtc driver.
  999. * Return 0 if HPET is not being used.
  1000. * Otherwise do the necessary changes and return 1.
  1001. */
  1002. int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
  1003. {
  1004. if (!is_hpet_enabled())
  1005. return 0;
  1006. if (bit_mask & RTC_UIE)
  1007. UIE_on = 0;
  1008. if (bit_mask & RTC_PIE)
  1009. PIE_on = 0;
  1010. if (bit_mask & RTC_AIE)
  1011. AIE_on = 0;
  1012. return 1;
  1013. }
  1014. int hpet_set_rtc_irq_bit(unsigned long bit_mask)
  1015. {
  1016. int timer_init_reqd = 0;
  1017. if (!is_hpet_enabled())
  1018. return 0;
  1019. if (!(PIE_on | AIE_on | UIE_on))
  1020. timer_init_reqd = 1;
  1021. if (bit_mask & RTC_UIE) {
  1022. UIE_on = 1;
  1023. }
  1024. if (bit_mask & RTC_PIE) {
  1025. PIE_on = 1;
  1026. PIE_count = 0;
  1027. }
  1028. if (bit_mask & RTC_AIE) {
  1029. AIE_on = 1;
  1030. }
  1031. if (timer_init_reqd)
  1032. hpet_rtc_timer_init();
  1033. return 1;
  1034. }
  1035. int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
  1036. {
  1037. if (!is_hpet_enabled())
  1038. return 0;
  1039. alarm_time.tm_hour = hrs;
  1040. alarm_time.tm_min = min;
  1041. alarm_time.tm_sec = sec;
  1042. return 1;
  1043. }
  1044. int hpet_set_periodic_freq(unsigned long freq)
  1045. {
  1046. if (!is_hpet_enabled())
  1047. return 0;
  1048. PIE_freq = freq;
  1049. PIE_count = 0;
  1050. return 1;
  1051. }
  1052. int hpet_rtc_dropped_irq(void)
  1053. {
  1054. if (!is_hpet_enabled())
  1055. return 0;
  1056. return 1;
  1057. }
  1058. irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  1059. {
  1060. struct rtc_time curr_time;
  1061. unsigned long rtc_int_flag = 0;
  1062. int call_rtc_interrupt = 0;
  1063. hpet_rtc_timer_reinit();
  1064. if (UIE_on | AIE_on) {
  1065. rtc_get_rtc_time(&curr_time);
  1066. }
  1067. if (UIE_on) {
  1068. if (curr_time.tm_sec != prev_update_sec) {
  1069. /* Set update int info, call real rtc int routine */
  1070. call_rtc_interrupt = 1;
  1071. rtc_int_flag = RTC_UF;
  1072. prev_update_sec = curr_time.tm_sec;
  1073. }
  1074. }
  1075. if (PIE_on) {
  1076. PIE_count++;
  1077. if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
  1078. /* Set periodic int info, call real rtc int routine */
  1079. call_rtc_interrupt = 1;
  1080. rtc_int_flag |= RTC_PF;
  1081. PIE_count = 0;
  1082. }
  1083. }
  1084. if (AIE_on) {
  1085. if ((curr_time.tm_sec == alarm_time.tm_sec) &&
  1086. (curr_time.tm_min == alarm_time.tm_min) &&
  1087. (curr_time.tm_hour == alarm_time.tm_hour)) {
  1088. /* Set alarm int info, call real rtc int routine */
  1089. call_rtc_interrupt = 1;
  1090. rtc_int_flag |= RTC_AF;
  1091. }
  1092. }
  1093. if (call_rtc_interrupt) {
  1094. rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
  1095. rtc_interrupt(rtc_int_flag, dev_id, regs);
  1096. }
  1097. return IRQ_HANDLED;
  1098. }
  1099. #endif
  1100. static int __init nohpet_setup(char *s)
  1101. {
  1102. nohpet = 1;
  1103. return 1;
  1104. }
  1105. __setup("nohpet", nohpet_setup);
  1106. int __init notsc_setup(char *s)
  1107. {
  1108. notsc = 1;
  1109. return 1;
  1110. }
  1111. __setup("notsc", notsc_setup);