emufx.c 90 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Creative Labs, Inc.
  4. * Routines for effect processor FX8010
  5. *
  6. * BUGS:
  7. * --
  8. *
  9. * TODO:
  10. * --
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <sound/driver.h>
  28. #include <linux/pci.h>
  29. #include <linux/capability.h>
  30. #include <linux/delay.h>
  31. #include <linux/slab.h>
  32. #include <linux/vmalloc.h>
  33. #include <linux/init.h>
  34. #include <linux/mutex.h>
  35. #include <sound/core.h>
  36. #include <sound/tlv.h>
  37. #include <sound/emu10k1.h>
  38. #if 0 /* for testing purposes - digital out -> capture */
  39. #define EMU10K1_CAPTURE_DIGITAL_OUT
  40. #endif
  41. #if 0 /* for testing purposes - set S/PDIF to AC3 output */
  42. #define EMU10K1_SET_AC3_IEC958
  43. #endif
  44. #if 0 /* for testing purposes - feed the front signal to Center/LFE outputs */
  45. #define EMU10K1_CENTER_LFE_FROM_FRONT
  46. #endif
  47. /*
  48. * Tables
  49. */
  50. static char *fxbuses[16] = {
  51. /* 0x00 */ "PCM Left",
  52. /* 0x01 */ "PCM Right",
  53. /* 0x02 */ "PCM Surround Left",
  54. /* 0x03 */ "PCM Surround Right",
  55. /* 0x04 */ "MIDI Left",
  56. /* 0x05 */ "MIDI Right",
  57. /* 0x06 */ "Center",
  58. /* 0x07 */ "LFE",
  59. /* 0x08 */ NULL,
  60. /* 0x09 */ NULL,
  61. /* 0x0a */ NULL,
  62. /* 0x0b */ NULL,
  63. /* 0x0c */ "MIDI Reverb",
  64. /* 0x0d */ "MIDI Chorus",
  65. /* 0x0e */ NULL,
  66. /* 0x0f */ NULL
  67. };
  68. static char *creative_ins[16] = {
  69. /* 0x00 */ "AC97 Left",
  70. /* 0x01 */ "AC97 Right",
  71. /* 0x02 */ "TTL IEC958 Left",
  72. /* 0x03 */ "TTL IEC958 Right",
  73. /* 0x04 */ "Zoom Video Left",
  74. /* 0x05 */ "Zoom Video Right",
  75. /* 0x06 */ "Optical IEC958 Left",
  76. /* 0x07 */ "Optical IEC958 Right",
  77. /* 0x08 */ "Line/Mic 1 Left",
  78. /* 0x09 */ "Line/Mic 1 Right",
  79. /* 0x0a */ "Coaxial IEC958 Left",
  80. /* 0x0b */ "Coaxial IEC958 Right",
  81. /* 0x0c */ "Line/Mic 2 Left",
  82. /* 0x0d */ "Line/Mic 2 Right",
  83. /* 0x0e */ NULL,
  84. /* 0x0f */ NULL
  85. };
  86. static char *audigy_ins[16] = {
  87. /* 0x00 */ "AC97 Left",
  88. /* 0x01 */ "AC97 Right",
  89. /* 0x02 */ "Audigy CD Left",
  90. /* 0x03 */ "Audigy CD Right",
  91. /* 0x04 */ "Optical IEC958 Left",
  92. /* 0x05 */ "Optical IEC958 Right",
  93. /* 0x06 */ NULL,
  94. /* 0x07 */ NULL,
  95. /* 0x08 */ "Line/Mic 2 Left",
  96. /* 0x09 */ "Line/Mic 2 Right",
  97. /* 0x0a */ "SPDIF Left",
  98. /* 0x0b */ "SPDIF Right",
  99. /* 0x0c */ "Aux2 Left",
  100. /* 0x0d */ "Aux2 Right",
  101. /* 0x0e */ NULL,
  102. /* 0x0f */ NULL
  103. };
  104. static char *creative_outs[32] = {
  105. /* 0x00 */ "AC97 Left",
  106. /* 0x01 */ "AC97 Right",
  107. /* 0x02 */ "Optical IEC958 Left",
  108. /* 0x03 */ "Optical IEC958 Right",
  109. /* 0x04 */ "Center",
  110. /* 0x05 */ "LFE",
  111. /* 0x06 */ "Headphone Left",
  112. /* 0x07 */ "Headphone Right",
  113. /* 0x08 */ "Surround Left",
  114. /* 0x09 */ "Surround Right",
  115. /* 0x0a */ "PCM Capture Left",
  116. /* 0x0b */ "PCM Capture Right",
  117. /* 0x0c */ "MIC Capture",
  118. /* 0x0d */ "AC97 Surround Left",
  119. /* 0x0e */ "AC97 Surround Right",
  120. /* 0x0f */ NULL,
  121. /* 0x10 */ NULL,
  122. /* 0x11 */ "Analog Center",
  123. /* 0x12 */ "Analog LFE",
  124. /* 0x13 */ NULL,
  125. /* 0x14 */ NULL,
  126. /* 0x15 */ NULL,
  127. /* 0x16 */ NULL,
  128. /* 0x17 */ NULL,
  129. /* 0x18 */ NULL,
  130. /* 0x19 */ NULL,
  131. /* 0x1a */ NULL,
  132. /* 0x1b */ NULL,
  133. /* 0x1c */ NULL,
  134. /* 0x1d */ NULL,
  135. /* 0x1e */ NULL,
  136. /* 0x1f */ NULL,
  137. };
  138. static char *audigy_outs[32] = {
  139. /* 0x00 */ "Digital Front Left",
  140. /* 0x01 */ "Digital Front Right",
  141. /* 0x02 */ "Digital Center",
  142. /* 0x03 */ "Digital LEF",
  143. /* 0x04 */ "Headphone Left",
  144. /* 0x05 */ "Headphone Right",
  145. /* 0x06 */ "Digital Rear Left",
  146. /* 0x07 */ "Digital Rear Right",
  147. /* 0x08 */ "Front Left",
  148. /* 0x09 */ "Front Right",
  149. /* 0x0a */ "Center",
  150. /* 0x0b */ "LFE",
  151. /* 0x0c */ NULL,
  152. /* 0x0d */ NULL,
  153. /* 0x0e */ "Rear Left",
  154. /* 0x0f */ "Rear Right",
  155. /* 0x10 */ "AC97 Front Left",
  156. /* 0x11 */ "AC97 Front Right",
  157. /* 0x12 */ "ADC Caputre Left",
  158. /* 0x13 */ "ADC Capture Right",
  159. /* 0x14 */ NULL,
  160. /* 0x15 */ NULL,
  161. /* 0x16 */ NULL,
  162. /* 0x17 */ NULL,
  163. /* 0x18 */ NULL,
  164. /* 0x19 */ NULL,
  165. /* 0x1a */ NULL,
  166. /* 0x1b */ NULL,
  167. /* 0x1c */ NULL,
  168. /* 0x1d */ NULL,
  169. /* 0x1e */ NULL,
  170. /* 0x1f */ NULL,
  171. };
  172. static const u32 bass_table[41][5] = {
  173. { 0x3e4f844f, 0x84ed4cc3, 0x3cc69927, 0x7b03553a, 0xc4da8486 },
  174. { 0x3e69a17a, 0x84c280fb, 0x3cd77cd4, 0x7b2f2a6f, 0xc4b08d1d },
  175. { 0x3e82ff42, 0x849991d5, 0x3ce7466b, 0x7b5917c6, 0xc48863ee },
  176. { 0x3e9bab3c, 0x847267f0, 0x3cf5ffe8, 0x7b813560, 0xc461f22c },
  177. { 0x3eb3b275, 0x844ced29, 0x3d03b295, 0x7ba79a1c, 0xc43d223b },
  178. { 0x3ecb2174, 0x84290c8b, 0x3d106714, 0x7bcc5ba3, 0xc419dfa5 },
  179. { 0x3ee2044b, 0x8406b244, 0x3d1c2561, 0x7bef8e77, 0xc3f8170f },
  180. { 0x3ef86698, 0x83e5cb96, 0x3d26f4d8, 0x7c114600, 0xc3d7b625 },
  181. { 0x3f0e5390, 0x83c646c9, 0x3d30dc39, 0x7c319498, 0xc3b8ab97 },
  182. { 0x3f23d60b, 0x83a81321, 0x3d39e1af, 0x7c508b9c, 0xc39ae704 },
  183. { 0x3f38f884, 0x838b20d2, 0x3d420ad2, 0x7c6e3b75, 0xc37e58f1 },
  184. { 0x3f4dc52c, 0x836f60ef, 0x3d495cab, 0x7c8ab3a6, 0xc362f2be },
  185. { 0x3f6245e8, 0x8354c565, 0x3d4fdbb8, 0x7ca602d6, 0xc348a69b },
  186. { 0x3f76845f, 0x833b40ec, 0x3d558bf0, 0x7cc036df, 0xc32f677c },
  187. { 0x3f8a8a03, 0x8322c6fb, 0x3d5a70c4, 0x7cd95cd7, 0xc317290b },
  188. { 0x3f9e6014, 0x830b4bc3, 0x3d5e8d25, 0x7cf1811a, 0xc2ffdfa5 },
  189. { 0x3fb20fae, 0x82f4c420, 0x3d61e37f, 0x7d08af56, 0xc2e9804a },
  190. { 0x3fc5a1cc, 0x82df2592, 0x3d6475c3, 0x7d1ef294, 0xc2d40096 },
  191. { 0x3fd91f55, 0x82ca6632, 0x3d664564, 0x7d345541, 0xc2bf56b9 },
  192. { 0x3fec9120, 0x82b67cac, 0x3d675356, 0x7d48e138, 0xc2ab796e },
  193. { 0x40000000, 0x82a36037, 0x3d67a012, 0x7d5c9fc9, 0xc2985fee },
  194. { 0x401374c7, 0x8291088a, 0x3d672b93, 0x7d6f99c3, 0xc28601f2 },
  195. { 0x4026f857, 0x827f6dd7, 0x3d65f559, 0x7d81d77c, 0xc27457a3 },
  196. { 0x403a939f, 0x826e88c5, 0x3d63fc63, 0x7d9360d4, 0xc2635996 },
  197. { 0x404e4faf, 0x825e5266, 0x3d613f32, 0x7da43d42, 0xc25300c6 },
  198. { 0x406235ba, 0x824ec434, 0x3d5dbbc3, 0x7db473d7, 0xc243468e },
  199. { 0x40764f1f, 0x823fd80c, 0x3d596f8f, 0x7dc40b44, 0xc23424a2 },
  200. { 0x408aa576, 0x82318824, 0x3d545787, 0x7dd309e2, 0xc2259509 },
  201. { 0x409f4296, 0x8223cf0b, 0x3d4e7012, 0x7de175b5, 0xc2179218 },
  202. { 0x40b430a0, 0x8216a7a1, 0x3d47b505, 0x7def5475, 0xc20a1670 },
  203. { 0x40c97a0a, 0x820a0d12, 0x3d4021a1, 0x7dfcab8d, 0xc1fd1cf5 },
  204. { 0x40df29a6, 0x81fdfad6, 0x3d37b08d, 0x7e098028, 0xc1f0a0ca },
  205. { 0x40f54ab1, 0x81f26ca9, 0x3d2e5bd1, 0x7e15d72b, 0xc1e49d52 },
  206. { 0x410be8da, 0x81e75e89, 0x3d241cce, 0x7e21b544, 0xc1d90e24 },
  207. { 0x41231051, 0x81dcccb3, 0x3d18ec37, 0x7e2d1ee6, 0xc1cdef10 },
  208. { 0x413acdd0, 0x81d2b39e, 0x3d0cc20a, 0x7e38184e, 0xc1c33c13 },
  209. { 0x41532ea7, 0x81c90ffb, 0x3cff9585, 0x7e42a58b, 0xc1b8f15a },
  210. { 0x416c40cd, 0x81bfdeb2, 0x3cf15d21, 0x7e4cca7c, 0xc1af0b3f },
  211. { 0x418612ea, 0x81b71cdc, 0x3ce20e85, 0x7e568ad3, 0xc1a58640 },
  212. { 0x41a0b465, 0x81aec7c5, 0x3cd19e7c, 0x7e5fea1e, 0xc19c5f03 },
  213. { 0x41bc3573, 0x81a6dcea, 0x3cc000e9, 0x7e68ebc2, 0xc1939250 }
  214. };
  215. static const u32 treble_table[41][5] = {
  216. { 0x0125cba9, 0xfed5debd, 0x00599b6c, 0x0d2506da, 0xfa85b354 },
  217. { 0x0142f67e, 0xfeb03163, 0x0066cd0f, 0x0d14c69d, 0xfa914473 },
  218. { 0x016328bd, 0xfe860158, 0x0075b7f2, 0x0d03eb27, 0xfa9d32d2 },
  219. { 0x0186b438, 0xfe56c982, 0x00869234, 0x0cf27048, 0xfaa97fca },
  220. { 0x01adf358, 0xfe21f5fe, 0x00999842, 0x0ce051c2, 0xfab62ca5 },
  221. { 0x01d949fa, 0xfde6e287, 0x00af0d8d, 0x0ccd8b4a, 0xfac33aa7 },
  222. { 0x02092669, 0xfda4d8bf, 0x00c73d4c, 0x0cba1884, 0xfad0ab07 },
  223. { 0x023e0268, 0xfd5b0e4a, 0x00e27b54, 0x0ca5f509, 0xfade7ef2 },
  224. { 0x0278645c, 0xfd08a2b0, 0x01012509, 0x0c911c63, 0xfaecb788 },
  225. { 0x02b8e091, 0xfcac9d1a, 0x0123a262, 0x0c7b8a14, 0xfafb55df },
  226. { 0x03001a9a, 0xfc45e9ce, 0x014a6709, 0x0c65398f, 0xfb0a5aff },
  227. { 0x034ec6d7, 0xfbd3576b, 0x0175f397, 0x0c4e2643, 0xfb19c7e4 },
  228. { 0x03a5ac15, 0xfb5393ee, 0x01a6d6ed, 0x0c364b94, 0xfb299d7c },
  229. { 0x0405a562, 0xfac52968, 0x01ddafae, 0x0c1da4e2, 0xfb39dca5 },
  230. { 0x046fa3fe, 0xfa267a66, 0x021b2ddd, 0x0c042d8d, 0xfb4a8631 },
  231. { 0x04e4b17f, 0xf975be0f, 0x0260149f, 0x0be9e0f2, 0xfb5b9ae0 },
  232. { 0x0565f220, 0xf8b0fbe5, 0x02ad3c29, 0x0bceba73, 0xfb6d1b60 },
  233. { 0x05f4a745, 0xf7d60722, 0x030393d4, 0x0bb2b578, 0xfb7f084d },
  234. { 0x06923236, 0xf6e279bd, 0x03642465, 0x0b95cd75, 0xfb916233 },
  235. { 0x07401713, 0xf5d3aef9, 0x03d01283, 0x0b77fded, 0xfba42984 },
  236. { 0x08000000, 0xf4a6bd88, 0x0448a161, 0x0b594278, 0xfbb75e9f },
  237. { 0x08d3c097, 0xf3587131, 0x04cf35a4, 0x0b3996c9, 0xfbcb01cb },
  238. { 0x09bd59a2, 0xf1e543f9, 0x05655880, 0x0b18f6b2, 0xfbdf1333 },
  239. { 0x0abefd0f, 0xf04956ca, 0x060cbb12, 0x0af75e2c, 0xfbf392e8 },
  240. { 0x0bdb123e, 0xee806984, 0x06c739fe, 0x0ad4c962, 0xfc0880dd },
  241. { 0x0d143a94, 0xec85d287, 0x0796e150, 0x0ab134b0, 0xfc1ddce5 },
  242. { 0x0e6d5664, 0xea547598, 0x087df0a0, 0x0a8c9cb6, 0xfc33a6ad },
  243. { 0x0fe98a2a, 0xe7e6ba35, 0x097edf83, 0x0a66fe5b, 0xfc49ddc2 },
  244. { 0x118c4421, 0xe536813a, 0x0a9c6248, 0x0a4056d7, 0xfc608185 },
  245. { 0x1359422e, 0xe23d19eb, 0x0bd96efb, 0x0a18a3bf, 0xfc77912c },
  246. { 0x1554982b, 0xdef33645, 0x0d3942bd, 0x09efe312, 0xfc8f0bc1 },
  247. { 0x1782b68a, 0xdb50deb1, 0x0ebf676d, 0x09c6133f, 0xfca6f019 },
  248. { 0x19e8715d, 0xd74d64fd, 0x106fb999, 0x099b3337, 0xfcbf3cd6 },
  249. { 0x1c8b07b8, 0xd2df56ab, 0x124e6ec8, 0x096f4274, 0xfcd7f060 },
  250. { 0x1f702b6d, 0xcdfc6e92, 0x14601c10, 0x0942410b, 0xfcf108e5 },
  251. { 0x229e0933, 0xc89985cd, 0x16a9bcfa, 0x09142fb5, 0xfd0a8451 },
  252. { 0x261b5118, 0xc2aa8409, 0x1930bab6, 0x08e50fdc, 0xfd24604d },
  253. { 0x29ef3f5d, 0xbc224f28, 0x1bfaf396, 0x08b4e3aa, 0xfd3e9a3b },
  254. { 0x2e21a59b, 0xb4f2ba46, 0x1f0ec2d6, 0x0883ae15, 0xfd592f33 },
  255. { 0x32baf44b, 0xad0c7429, 0x227308a3, 0x085172eb, 0xfd741bfd },
  256. { 0x37c4448b, 0xa45ef51d, 0x262f3267, 0x081e36dc, 0xfd8f5d14 }
  257. };
  258. static const u32 db_table[101] = {
  259. 0x00000000, 0x01571f82, 0x01674b41, 0x01783a1b, 0x0189f540,
  260. 0x019c8651, 0x01aff763, 0x01c45306, 0x01d9a446, 0x01eff6b8,
  261. 0x0207567a, 0x021fd03d, 0x0239714c, 0x02544792, 0x027061a1,
  262. 0x028dcebb, 0x02ac9edc, 0x02cce2bf, 0x02eeabe8, 0x03120cb0,
  263. 0x0337184e, 0x035de2df, 0x03868173, 0x03b10a18, 0x03dd93e9,
  264. 0x040c3713, 0x043d0cea, 0x04702ff3, 0x04a5bbf2, 0x04ddcdfb,
  265. 0x0518847f, 0x0555ff62, 0x05966005, 0x05d9c95d, 0x06206005,
  266. 0x066a4a52, 0x06b7b067, 0x0708bc4c, 0x075d9a01, 0x07b6779d,
  267. 0x08138561, 0x0874f5d5, 0x08dafde1, 0x0945d4ed, 0x09b5b4fd,
  268. 0x0a2adad1, 0x0aa58605, 0x0b25f936, 0x0bac7a24, 0x0c3951d8,
  269. 0x0ccccccc, 0x0d673b17, 0x0e08f093, 0x0eb24510, 0x0f639481,
  270. 0x101d3f2d, 0x10dfa9e6, 0x11ab3e3f, 0x12806ac3, 0x135fa333,
  271. 0x144960c5, 0x153e2266, 0x163e6cfe, 0x174acbb7, 0x1863d04d,
  272. 0x198a1357, 0x1abe349f, 0x1c00db77, 0x1d52b712, 0x1eb47ee6,
  273. 0x2026f30f, 0x21aadcb6, 0x23410e7e, 0x24ea64f9, 0x26a7c71d,
  274. 0x287a26c4, 0x2a62812c, 0x2c61df84, 0x2e795779, 0x30aa0bcf,
  275. 0x32f52cfe, 0x355bf9d8, 0x37dfc033, 0x3a81dda4, 0x3d43c038,
  276. 0x4026e73c, 0x432ce40f, 0x46575af8, 0x49a8040f, 0x4d20ac2a,
  277. 0x50c335d3, 0x54919a57, 0x588dead1, 0x5cba514a, 0x611911ea,
  278. 0x65ac8c2f, 0x6a773c39, 0x6f7bbc23, 0x74bcc56c, 0x7a3d3272,
  279. 0x7fffffff,
  280. };
  281. /* EMU10k1/EMU10k2 DSP control db gain */
  282. static DECLARE_TLV_DB_SCALE(snd_emu10k1_db_scale1, -4000, 40, 1);
  283. static const u32 onoff_table[2] = {
  284. 0x00000000, 0x00000001
  285. };
  286. /*
  287. */
  288. static inline mm_segment_t snd_enter_user(void)
  289. {
  290. mm_segment_t fs = get_fs();
  291. set_fs(get_ds());
  292. return fs;
  293. }
  294. static inline void snd_leave_user(mm_segment_t fs)
  295. {
  296. set_fs(fs);
  297. }
  298. /*
  299. * controls
  300. */
  301. static int snd_emu10k1_gpr_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  302. {
  303. struct snd_emu10k1_fx8010_ctl *ctl =
  304. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  305. if (ctl->min == 0 && ctl->max == 1)
  306. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  307. else
  308. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  309. uinfo->count = ctl->vcount;
  310. uinfo->value.integer.min = ctl->min;
  311. uinfo->value.integer.max = ctl->max;
  312. return 0;
  313. }
  314. static int snd_emu10k1_gpr_ctl_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  315. {
  316. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  317. struct snd_emu10k1_fx8010_ctl *ctl =
  318. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  319. unsigned long flags;
  320. unsigned int i;
  321. spin_lock_irqsave(&emu->reg_lock, flags);
  322. for (i = 0; i < ctl->vcount; i++)
  323. ucontrol->value.integer.value[i] = ctl->value[i];
  324. spin_unlock_irqrestore(&emu->reg_lock, flags);
  325. return 0;
  326. }
  327. static int snd_emu10k1_gpr_ctl_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  328. {
  329. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  330. struct snd_emu10k1_fx8010_ctl *ctl =
  331. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  332. unsigned long flags;
  333. unsigned int nval, val;
  334. unsigned int i, j;
  335. int change = 0;
  336. spin_lock_irqsave(&emu->reg_lock, flags);
  337. for (i = 0; i < ctl->vcount; i++) {
  338. nval = ucontrol->value.integer.value[i];
  339. if (nval < ctl->min)
  340. nval = ctl->min;
  341. if (nval > ctl->max)
  342. nval = ctl->max;
  343. if (nval != ctl->value[i])
  344. change = 1;
  345. val = ctl->value[i] = nval;
  346. switch (ctl->translation) {
  347. case EMU10K1_GPR_TRANSLATION_NONE:
  348. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, val);
  349. break;
  350. case EMU10K1_GPR_TRANSLATION_TABLE100:
  351. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, db_table[val]);
  352. break;
  353. case EMU10K1_GPR_TRANSLATION_BASS:
  354. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  355. change = -EIO;
  356. goto __error;
  357. }
  358. for (j = 0; j < 5; j++)
  359. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, bass_table[val][j]);
  360. break;
  361. case EMU10K1_GPR_TRANSLATION_TREBLE:
  362. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  363. change = -EIO;
  364. goto __error;
  365. }
  366. for (j = 0; j < 5; j++)
  367. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, treble_table[val][j]);
  368. break;
  369. case EMU10K1_GPR_TRANSLATION_ONOFF:
  370. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, onoff_table[val]);
  371. break;
  372. }
  373. }
  374. __error:
  375. spin_unlock_irqrestore(&emu->reg_lock, flags);
  376. return change;
  377. }
  378. /*
  379. * Interrupt handler
  380. */
  381. static void snd_emu10k1_fx8010_interrupt(struct snd_emu10k1 *emu)
  382. {
  383. struct snd_emu10k1_fx8010_irq *irq, *nirq;
  384. irq = emu->fx8010.irq_handlers;
  385. while (irq) {
  386. nirq = irq->next; /* irq ptr can be removed from list */
  387. if (snd_emu10k1_ptr_read(emu, emu->gpr_base + irq->gpr_running, 0) & 0xffff0000) {
  388. if (irq->handler)
  389. irq->handler(emu, irq->private_data);
  390. snd_emu10k1_ptr_write(emu, emu->gpr_base + irq->gpr_running, 0, 1);
  391. }
  392. irq = nirq;
  393. }
  394. }
  395. int snd_emu10k1_fx8010_register_irq_handler(struct snd_emu10k1 *emu,
  396. snd_fx8010_irq_handler_t *handler,
  397. unsigned char gpr_running,
  398. void *private_data,
  399. struct snd_emu10k1_fx8010_irq **r_irq)
  400. {
  401. struct snd_emu10k1_fx8010_irq *irq;
  402. unsigned long flags;
  403. irq = kmalloc(sizeof(*irq), GFP_ATOMIC);
  404. if (irq == NULL)
  405. return -ENOMEM;
  406. irq->handler = handler;
  407. irq->gpr_running = gpr_running;
  408. irq->private_data = private_data;
  409. irq->next = NULL;
  410. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  411. if (emu->fx8010.irq_handlers == NULL) {
  412. emu->fx8010.irq_handlers = irq;
  413. emu->dsp_interrupt = snd_emu10k1_fx8010_interrupt;
  414. snd_emu10k1_intr_enable(emu, INTE_FXDSPENABLE);
  415. } else {
  416. irq->next = emu->fx8010.irq_handlers;
  417. emu->fx8010.irq_handlers = irq;
  418. }
  419. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  420. if (r_irq)
  421. *r_irq = irq;
  422. return 0;
  423. }
  424. int snd_emu10k1_fx8010_unregister_irq_handler(struct snd_emu10k1 *emu,
  425. struct snd_emu10k1_fx8010_irq *irq)
  426. {
  427. struct snd_emu10k1_fx8010_irq *tmp;
  428. unsigned long flags;
  429. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  430. if ((tmp = emu->fx8010.irq_handlers) == irq) {
  431. emu->fx8010.irq_handlers = tmp->next;
  432. if (emu->fx8010.irq_handlers == NULL) {
  433. snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
  434. emu->dsp_interrupt = NULL;
  435. }
  436. } else {
  437. while (tmp && tmp->next != irq)
  438. tmp = tmp->next;
  439. if (tmp)
  440. tmp->next = tmp->next->next;
  441. }
  442. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  443. kfree(irq);
  444. return 0;
  445. }
  446. /*************************************************************************
  447. * EMU10K1 effect manager
  448. *************************************************************************/
  449. static void snd_emu10k1_write_op(struct snd_emu10k1_fx8010_code *icode,
  450. unsigned int *ptr,
  451. u32 op, u32 r, u32 a, u32 x, u32 y)
  452. {
  453. u_int32_t *code;
  454. snd_assert(*ptr < 512, return);
  455. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  456. set_bit(*ptr, icode->code_valid);
  457. code[0] = ((x & 0x3ff) << 10) | (y & 0x3ff);
  458. code[1] = ((op & 0x0f) << 20) | ((r & 0x3ff) << 10) | (a & 0x3ff);
  459. (*ptr)++;
  460. }
  461. #define OP(icode, ptr, op, r, a, x, y) \
  462. snd_emu10k1_write_op(icode, ptr, op, r, a, x, y)
  463. static void snd_emu10k1_audigy_write_op(struct snd_emu10k1_fx8010_code *icode,
  464. unsigned int *ptr,
  465. u32 op, u32 r, u32 a, u32 x, u32 y)
  466. {
  467. u_int32_t *code;
  468. snd_assert(*ptr < 1024, return);
  469. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  470. set_bit(*ptr, icode->code_valid);
  471. code[0] = ((x & 0x7ff) << 12) | (y & 0x7ff);
  472. code[1] = ((op & 0x0f) << 24) | ((r & 0x7ff) << 12) | (a & 0x7ff);
  473. (*ptr)++;
  474. }
  475. #define A_OP(icode, ptr, op, r, a, x, y) \
  476. snd_emu10k1_audigy_write_op(icode, ptr, op, r, a, x, y)
  477. static void snd_emu10k1_efx_write(struct snd_emu10k1 *emu, unsigned int pc, unsigned int data)
  478. {
  479. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  480. snd_emu10k1_ptr_write(emu, pc, 0, data);
  481. }
  482. unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc)
  483. {
  484. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  485. return snd_emu10k1_ptr_read(emu, pc, 0);
  486. }
  487. static int snd_emu10k1_gpr_poke(struct snd_emu10k1 *emu,
  488. struct snd_emu10k1_fx8010_code *icode)
  489. {
  490. int gpr;
  491. u32 val;
  492. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  493. if (!test_bit(gpr, icode->gpr_valid))
  494. continue;
  495. if (get_user(val, &icode->gpr_map[gpr]))
  496. return -EFAULT;
  497. snd_emu10k1_ptr_write(emu, emu->gpr_base + gpr, 0, val);
  498. }
  499. return 0;
  500. }
  501. static int snd_emu10k1_gpr_peek(struct snd_emu10k1 *emu,
  502. struct snd_emu10k1_fx8010_code *icode)
  503. {
  504. int gpr;
  505. u32 val;
  506. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  507. set_bit(gpr, icode->gpr_valid);
  508. val = snd_emu10k1_ptr_read(emu, emu->gpr_base + gpr, 0);
  509. if (put_user(val, &icode->gpr_map[gpr]))
  510. return -EFAULT;
  511. }
  512. return 0;
  513. }
  514. static int snd_emu10k1_tram_poke(struct snd_emu10k1 *emu,
  515. struct snd_emu10k1_fx8010_code *icode)
  516. {
  517. int tram;
  518. u32 addr, val;
  519. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  520. if (!test_bit(tram, icode->tram_valid))
  521. continue;
  522. if (get_user(val, &icode->tram_data_map[tram]) ||
  523. get_user(addr, &icode->tram_addr_map[tram]))
  524. return -EFAULT;
  525. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + tram, 0, val);
  526. if (!emu->audigy) {
  527. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr);
  528. } else {
  529. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr << 12);
  530. snd_emu10k1_ptr_write(emu, A_TANKMEMCTLREGBASE + tram, 0, addr >> 20);
  531. }
  532. }
  533. return 0;
  534. }
  535. static int snd_emu10k1_tram_peek(struct snd_emu10k1 *emu,
  536. struct snd_emu10k1_fx8010_code *icode)
  537. {
  538. int tram;
  539. u32 val, addr;
  540. memset(icode->tram_valid, 0, sizeof(icode->tram_valid));
  541. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  542. set_bit(tram, icode->tram_valid);
  543. val = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + tram, 0);
  544. if (!emu->audigy) {
  545. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0);
  546. } else {
  547. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0) >> 12;
  548. addr |= snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + tram, 0) << 20;
  549. }
  550. if (put_user(val, &icode->tram_data_map[tram]) ||
  551. put_user(addr, &icode->tram_addr_map[tram]))
  552. return -EFAULT;
  553. }
  554. return 0;
  555. }
  556. static int snd_emu10k1_code_poke(struct snd_emu10k1 *emu,
  557. struct snd_emu10k1_fx8010_code *icode)
  558. {
  559. u32 pc, lo, hi;
  560. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  561. if (!test_bit(pc / 2, icode->code_valid))
  562. continue;
  563. if (get_user(lo, &icode->code[pc + 0]) ||
  564. get_user(hi, &icode->code[pc + 1]))
  565. return -EFAULT;
  566. snd_emu10k1_efx_write(emu, pc + 0, lo);
  567. snd_emu10k1_efx_write(emu, pc + 1, hi);
  568. }
  569. return 0;
  570. }
  571. static int snd_emu10k1_code_peek(struct snd_emu10k1 *emu,
  572. struct snd_emu10k1_fx8010_code *icode)
  573. {
  574. u32 pc;
  575. memset(icode->code_valid, 0, sizeof(icode->code_valid));
  576. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  577. set_bit(pc / 2, icode->code_valid);
  578. if (put_user(snd_emu10k1_efx_read(emu, pc + 0), &icode->code[pc + 0]))
  579. return -EFAULT;
  580. if (put_user(snd_emu10k1_efx_read(emu, pc + 1), &icode->code[pc + 1]))
  581. return -EFAULT;
  582. }
  583. return 0;
  584. }
  585. static struct snd_emu10k1_fx8010_ctl *
  586. snd_emu10k1_look_for_ctl(struct snd_emu10k1 *emu, struct snd_ctl_elem_id *id)
  587. {
  588. struct snd_emu10k1_fx8010_ctl *ctl;
  589. struct snd_kcontrol *kcontrol;
  590. struct list_head *list;
  591. list_for_each(list, &emu->fx8010.gpr_ctl) {
  592. ctl = emu10k1_gpr_ctl(list);
  593. kcontrol = ctl->kcontrol;
  594. if (kcontrol->id.iface == id->iface &&
  595. !strcmp(kcontrol->id.name, id->name) &&
  596. kcontrol->id.index == id->index)
  597. return ctl;
  598. }
  599. return NULL;
  600. }
  601. static int snd_emu10k1_verify_controls(struct snd_emu10k1 *emu,
  602. struct snd_emu10k1_fx8010_code *icode)
  603. {
  604. unsigned int i;
  605. struct snd_ctl_elem_id __user *_id;
  606. struct snd_ctl_elem_id id;
  607. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  608. struct snd_emu10k1_fx8010_control_gpr *gctl;
  609. int err;
  610. for (i = 0, _id = icode->gpr_del_controls;
  611. i < icode->gpr_del_control_count; i++, _id++) {
  612. if (copy_from_user(&id, _id, sizeof(id)))
  613. return -EFAULT;
  614. if (snd_emu10k1_look_for_ctl(emu, &id) == NULL)
  615. return -ENOENT;
  616. }
  617. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  618. if (! gctl)
  619. return -ENOMEM;
  620. err = 0;
  621. for (i = 0, _gctl = icode->gpr_add_controls;
  622. i < icode->gpr_add_control_count; i++, _gctl++) {
  623. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  624. err = -EFAULT;
  625. goto __error;
  626. }
  627. if (snd_emu10k1_look_for_ctl(emu, &gctl->id))
  628. continue;
  629. down_read(&emu->card->controls_rwsem);
  630. if (snd_ctl_find_id(emu->card, &gctl->id) != NULL) {
  631. up_read(&emu->card->controls_rwsem);
  632. err = -EEXIST;
  633. goto __error;
  634. }
  635. up_read(&emu->card->controls_rwsem);
  636. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  637. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  638. err = -EINVAL;
  639. goto __error;
  640. }
  641. }
  642. for (i = 0, _gctl = icode->gpr_list_controls;
  643. i < icode->gpr_list_control_count; i++, _gctl++) {
  644. /* FIXME: we need to check the WRITE access */
  645. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  646. err = -EFAULT;
  647. goto __error;
  648. }
  649. }
  650. __error:
  651. kfree(gctl);
  652. return err;
  653. }
  654. static void snd_emu10k1_ctl_private_free(struct snd_kcontrol *kctl)
  655. {
  656. struct snd_emu10k1_fx8010_ctl *ctl;
  657. ctl = (struct snd_emu10k1_fx8010_ctl *) kctl->private_value;
  658. kctl->private_value = 0;
  659. list_del(&ctl->list);
  660. kfree(ctl);
  661. }
  662. static int snd_emu10k1_add_controls(struct snd_emu10k1 *emu,
  663. struct snd_emu10k1_fx8010_code *icode)
  664. {
  665. unsigned int i, j;
  666. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  667. struct snd_emu10k1_fx8010_control_gpr *gctl;
  668. struct snd_emu10k1_fx8010_ctl *ctl, *nctl;
  669. struct snd_kcontrol_new knew;
  670. struct snd_kcontrol *kctl;
  671. struct snd_ctl_elem_value *val;
  672. int err = 0;
  673. val = kmalloc(sizeof(*val), GFP_KERNEL);
  674. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  675. nctl = kmalloc(sizeof(*nctl), GFP_KERNEL);
  676. if (!val || !gctl || !nctl) {
  677. err = -ENOMEM;
  678. goto __error;
  679. }
  680. for (i = 0, _gctl = icode->gpr_add_controls;
  681. i < icode->gpr_add_control_count; i++, _gctl++) {
  682. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  683. err = -EFAULT;
  684. goto __error;
  685. }
  686. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  687. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  688. err = -EINVAL;
  689. goto __error;
  690. }
  691. if (! gctl->id.name[0]) {
  692. err = -EINVAL;
  693. goto __error;
  694. }
  695. ctl = snd_emu10k1_look_for_ctl(emu, &gctl->id);
  696. memset(&knew, 0, sizeof(knew));
  697. knew.iface = gctl->id.iface;
  698. knew.name = gctl->id.name;
  699. knew.index = gctl->id.index;
  700. knew.device = gctl->id.device;
  701. knew.subdevice = gctl->id.subdevice;
  702. knew.info = snd_emu10k1_gpr_ctl_info;
  703. if (gctl->tlv.p) {
  704. knew.tlv.p = gctl->tlv.p;
  705. knew.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  706. SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  707. }
  708. knew.get = snd_emu10k1_gpr_ctl_get;
  709. knew.put = snd_emu10k1_gpr_ctl_put;
  710. memset(nctl, 0, sizeof(*nctl));
  711. nctl->vcount = gctl->vcount;
  712. nctl->count = gctl->count;
  713. for (j = 0; j < 32; j++) {
  714. nctl->gpr[j] = gctl->gpr[j];
  715. nctl->value[j] = ~gctl->value[j]; /* inverted, we want to write new value in gpr_ctl_put() */
  716. val->value.integer.value[j] = gctl->value[j];
  717. }
  718. nctl->min = gctl->min;
  719. nctl->max = gctl->max;
  720. nctl->translation = gctl->translation;
  721. if (ctl == NULL) {
  722. ctl = kmalloc(sizeof(*ctl), GFP_KERNEL);
  723. if (ctl == NULL) {
  724. err = -ENOMEM;
  725. goto __error;
  726. }
  727. knew.private_value = (unsigned long)ctl;
  728. *ctl = *nctl;
  729. if ((err = snd_ctl_add(emu->card, kctl = snd_ctl_new1(&knew, emu))) < 0) {
  730. kfree(ctl);
  731. goto __error;
  732. }
  733. kctl->private_free = snd_emu10k1_ctl_private_free;
  734. ctl->kcontrol = kctl;
  735. list_add_tail(&ctl->list, &emu->fx8010.gpr_ctl);
  736. } else {
  737. /* overwrite */
  738. nctl->list = ctl->list;
  739. nctl->kcontrol = ctl->kcontrol;
  740. *ctl = *nctl;
  741. snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE |
  742. SNDRV_CTL_EVENT_MASK_INFO, &ctl->kcontrol->id);
  743. }
  744. snd_emu10k1_gpr_ctl_put(ctl->kcontrol, val);
  745. }
  746. __error:
  747. kfree(nctl);
  748. kfree(gctl);
  749. kfree(val);
  750. return err;
  751. }
  752. static int snd_emu10k1_del_controls(struct snd_emu10k1 *emu,
  753. struct snd_emu10k1_fx8010_code *icode)
  754. {
  755. unsigned int i;
  756. struct snd_ctl_elem_id id;
  757. struct snd_ctl_elem_id __user *_id;
  758. struct snd_emu10k1_fx8010_ctl *ctl;
  759. struct snd_card *card = emu->card;
  760. for (i = 0, _id = icode->gpr_del_controls;
  761. i < icode->gpr_del_control_count; i++, _id++) {
  762. if (copy_from_user(&id, _id, sizeof(id)))
  763. return -EFAULT;
  764. down_write(&card->controls_rwsem);
  765. ctl = snd_emu10k1_look_for_ctl(emu, &id);
  766. if (ctl)
  767. snd_ctl_remove(card, ctl->kcontrol);
  768. up_write(&card->controls_rwsem);
  769. }
  770. return 0;
  771. }
  772. static int snd_emu10k1_list_controls(struct snd_emu10k1 *emu,
  773. struct snd_emu10k1_fx8010_code *icode)
  774. {
  775. unsigned int i = 0, j;
  776. unsigned int total = 0;
  777. struct snd_emu10k1_fx8010_control_gpr *gctl;
  778. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  779. struct snd_emu10k1_fx8010_ctl *ctl;
  780. struct snd_ctl_elem_id *id;
  781. struct list_head *list;
  782. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  783. if (! gctl)
  784. return -ENOMEM;
  785. _gctl = icode->gpr_list_controls;
  786. list_for_each(list, &emu->fx8010.gpr_ctl) {
  787. ctl = emu10k1_gpr_ctl(list);
  788. total++;
  789. if (_gctl && i < icode->gpr_list_control_count) {
  790. memset(gctl, 0, sizeof(*gctl));
  791. id = &ctl->kcontrol->id;
  792. gctl->id.iface = id->iface;
  793. strlcpy(gctl->id.name, id->name, sizeof(gctl->id.name));
  794. gctl->id.index = id->index;
  795. gctl->id.device = id->device;
  796. gctl->id.subdevice = id->subdevice;
  797. gctl->vcount = ctl->vcount;
  798. gctl->count = ctl->count;
  799. for (j = 0; j < 32; j++) {
  800. gctl->gpr[j] = ctl->gpr[j];
  801. gctl->value[j] = ctl->value[j];
  802. }
  803. gctl->min = ctl->min;
  804. gctl->max = ctl->max;
  805. gctl->translation = ctl->translation;
  806. if (copy_to_user(_gctl, gctl, sizeof(*gctl))) {
  807. kfree(gctl);
  808. return -EFAULT;
  809. }
  810. _gctl++;
  811. i++;
  812. }
  813. }
  814. icode->gpr_list_control_total = total;
  815. kfree(gctl);
  816. return 0;
  817. }
  818. static int snd_emu10k1_icode_poke(struct snd_emu10k1 *emu,
  819. struct snd_emu10k1_fx8010_code *icode)
  820. {
  821. int err = 0;
  822. mutex_lock(&emu->fx8010.lock);
  823. if ((err = snd_emu10k1_verify_controls(emu, icode)) < 0)
  824. goto __error;
  825. strlcpy(emu->fx8010.name, icode->name, sizeof(emu->fx8010.name));
  826. /* stop FX processor - this may be dangerous, but it's better to miss
  827. some samples than generate wrong ones - [jk] */
  828. if (emu->audigy)
  829. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  830. else
  831. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  832. /* ok, do the main job */
  833. if ((err = snd_emu10k1_del_controls(emu, icode)) < 0 ||
  834. (err = snd_emu10k1_gpr_poke(emu, icode)) < 0 ||
  835. (err = snd_emu10k1_tram_poke(emu, icode)) < 0 ||
  836. (err = snd_emu10k1_code_poke(emu, icode)) < 0 ||
  837. (err = snd_emu10k1_add_controls(emu, icode)) < 0)
  838. goto __error;
  839. /* start FX processor when the DSP code is updated */
  840. if (emu->audigy)
  841. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  842. else
  843. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  844. __error:
  845. mutex_unlock(&emu->fx8010.lock);
  846. return err;
  847. }
  848. static int snd_emu10k1_icode_peek(struct snd_emu10k1 *emu,
  849. struct snd_emu10k1_fx8010_code *icode)
  850. {
  851. int err;
  852. mutex_lock(&emu->fx8010.lock);
  853. strlcpy(icode->name, emu->fx8010.name, sizeof(icode->name));
  854. /* ok, do the main job */
  855. err = snd_emu10k1_gpr_peek(emu, icode);
  856. if (err >= 0)
  857. err = snd_emu10k1_tram_peek(emu, icode);
  858. if (err >= 0)
  859. err = snd_emu10k1_code_peek(emu, icode);
  860. if (err >= 0)
  861. err = snd_emu10k1_list_controls(emu, icode);
  862. mutex_unlock(&emu->fx8010.lock);
  863. return err;
  864. }
  865. static int snd_emu10k1_ipcm_poke(struct snd_emu10k1 *emu,
  866. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  867. {
  868. unsigned int i;
  869. int err = 0;
  870. struct snd_emu10k1_fx8010_pcm *pcm;
  871. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  872. return -EINVAL;
  873. if (ipcm->channels > 32)
  874. return -EINVAL;
  875. pcm = &emu->fx8010.pcm[ipcm->substream];
  876. mutex_lock(&emu->fx8010.lock);
  877. spin_lock_irq(&emu->reg_lock);
  878. if (pcm->opened) {
  879. err = -EBUSY;
  880. goto __error;
  881. }
  882. if (ipcm->channels == 0) { /* remove */
  883. pcm->valid = 0;
  884. } else {
  885. /* FIXME: we need to add universal code to the PCM transfer routine */
  886. if (ipcm->channels != 2) {
  887. err = -EINVAL;
  888. goto __error;
  889. }
  890. pcm->valid = 1;
  891. pcm->opened = 0;
  892. pcm->channels = ipcm->channels;
  893. pcm->tram_start = ipcm->tram_start;
  894. pcm->buffer_size = ipcm->buffer_size;
  895. pcm->gpr_size = ipcm->gpr_size;
  896. pcm->gpr_count = ipcm->gpr_count;
  897. pcm->gpr_tmpcount = ipcm->gpr_tmpcount;
  898. pcm->gpr_ptr = ipcm->gpr_ptr;
  899. pcm->gpr_trigger = ipcm->gpr_trigger;
  900. pcm->gpr_running = ipcm->gpr_running;
  901. for (i = 0; i < pcm->channels; i++)
  902. pcm->etram[i] = ipcm->etram[i];
  903. }
  904. __error:
  905. spin_unlock_irq(&emu->reg_lock);
  906. mutex_unlock(&emu->fx8010.lock);
  907. return err;
  908. }
  909. static int snd_emu10k1_ipcm_peek(struct snd_emu10k1 *emu,
  910. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  911. {
  912. unsigned int i;
  913. int err = 0;
  914. struct snd_emu10k1_fx8010_pcm *pcm;
  915. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  916. return -EINVAL;
  917. pcm = &emu->fx8010.pcm[ipcm->substream];
  918. mutex_lock(&emu->fx8010.lock);
  919. spin_lock_irq(&emu->reg_lock);
  920. ipcm->channels = pcm->channels;
  921. ipcm->tram_start = pcm->tram_start;
  922. ipcm->buffer_size = pcm->buffer_size;
  923. ipcm->gpr_size = pcm->gpr_size;
  924. ipcm->gpr_ptr = pcm->gpr_ptr;
  925. ipcm->gpr_count = pcm->gpr_count;
  926. ipcm->gpr_tmpcount = pcm->gpr_tmpcount;
  927. ipcm->gpr_trigger = pcm->gpr_trigger;
  928. ipcm->gpr_running = pcm->gpr_running;
  929. for (i = 0; i < pcm->channels; i++)
  930. ipcm->etram[i] = pcm->etram[i];
  931. ipcm->res1 = ipcm->res2 = 0;
  932. ipcm->pad = 0;
  933. spin_unlock_irq(&emu->reg_lock);
  934. mutex_unlock(&emu->fx8010.lock);
  935. return err;
  936. }
  937. #define SND_EMU10K1_GPR_CONTROLS 44
  938. #define SND_EMU10K1_INPUTS 12
  939. #define SND_EMU10K1_PLAYBACK_CHANNELS 8
  940. #define SND_EMU10K1_CAPTURE_CHANNELS 4
  941. static void __devinit
  942. snd_emu10k1_init_mono_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  943. const char *name, int gpr, int defval)
  944. {
  945. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  946. strcpy(ctl->id.name, name);
  947. ctl->vcount = ctl->count = 1;
  948. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  949. ctl->min = 0;
  950. ctl->max = 100;
  951. ctl->tlv.p = snd_emu10k1_db_scale1;
  952. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  953. }
  954. static void __devinit
  955. snd_emu10k1_init_stereo_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  956. const char *name, int gpr, int defval)
  957. {
  958. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  959. strcpy(ctl->id.name, name);
  960. ctl->vcount = ctl->count = 2;
  961. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  962. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  963. ctl->min = 0;
  964. ctl->max = 100;
  965. ctl->tlv.p = snd_emu10k1_db_scale1;
  966. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  967. }
  968. static void __devinit
  969. snd_emu10k1_init_mono_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  970. const char *name, int gpr, int defval)
  971. {
  972. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  973. strcpy(ctl->id.name, name);
  974. ctl->vcount = ctl->count = 1;
  975. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  976. ctl->min = 0;
  977. ctl->max = 1;
  978. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  979. }
  980. static void __devinit
  981. snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  982. const char *name, int gpr, int defval)
  983. {
  984. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  985. strcpy(ctl->id.name, name);
  986. ctl->vcount = ctl->count = 2;
  987. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  988. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  989. ctl->min = 0;
  990. ctl->max = 1;
  991. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  992. }
  993. /*
  994. * initial DSP configuration for Audigy
  995. */
  996. static int __devinit _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu)
  997. {
  998. int err, i, z, gpr, nctl;
  999. const int playback = 10;
  1000. const int capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2); /* we reserve 10 voices */
  1001. const int stereo_mix = capture + 2;
  1002. const int tmp = 0x88;
  1003. u32 ptr;
  1004. struct snd_emu10k1_fx8010_code *icode = NULL;
  1005. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  1006. u32 *gpr_map;
  1007. mm_segment_t seg;
  1008. if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL ||
  1009. (icode->gpr_map = (u_int32_t __user *)
  1010. kcalloc(512 + 256 + 256 + 2 * 1024, sizeof(u_int32_t),
  1011. GFP_KERNEL)) == NULL ||
  1012. (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1013. sizeof(*controls), GFP_KERNEL)) == NULL) {
  1014. err = -ENOMEM;
  1015. goto __err;
  1016. }
  1017. gpr_map = (u32 __force *)icode->gpr_map;
  1018. icode->tram_data_map = icode->gpr_map + 512;
  1019. icode->tram_addr_map = icode->tram_data_map + 256;
  1020. icode->code = icode->tram_addr_map + 256;
  1021. /* clear free GPRs */
  1022. for (i = 0; i < 512; i++)
  1023. set_bit(i, icode->gpr_valid);
  1024. /* clear TRAM data & address lines */
  1025. for (i = 0; i < 256; i++)
  1026. set_bit(i, icode->tram_valid);
  1027. strcpy(icode->name, "Audigy DSP code for ALSA");
  1028. ptr = 0;
  1029. nctl = 0;
  1030. gpr = stereo_mix + 10;
  1031. /* stop FX processor */
  1032. snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP);
  1033. #if 0
  1034. /* FIX: jcd test */
  1035. for (z = 0; z < 80; z=z+2) {
  1036. A_OP(icode, &ptr, iACC3, A_EXTOUT(z), A_FXBUS(FXBUS_PCM_LEFT_FRONT), A_C_00000000, A_C_00000000); /* left */
  1037. A_OP(icode, &ptr, iACC3, A_EXTOUT(z+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT), A_C_00000000, A_C_00000000); /* right */
  1038. }
  1039. #endif /* jcd test */
  1040. #if 1
  1041. /* PCM front Playback Volume (independent from stereo mix) */
  1042. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT));
  1043. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT));
  1044. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100);
  1045. gpr += 2;
  1046. /* PCM Surround Playback (independent from stereo mix) */
  1047. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_REAR));
  1048. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_REAR));
  1049. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Surround Playback Volume", gpr, 100);
  1050. gpr += 2;
  1051. /* PCM Side Playback (independent from stereo mix) */
  1052. if (emu->card_capabilities->spk71) {
  1053. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_SIDE));
  1054. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_SIDE));
  1055. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Side Playback Volume", gpr, 100);
  1056. gpr += 2;
  1057. }
  1058. /* PCM Center Playback (independent from stereo mix) */
  1059. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_CENTER));
  1060. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM Center Playback Volume", gpr, 100);
  1061. gpr++;
  1062. /* PCM LFE Playback (independent from stereo mix) */
  1063. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LFE));
  1064. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM LFE Playback Volume", gpr, 100);
  1065. gpr++;
  1066. /*
  1067. * Stereo Mix
  1068. */
  1069. /* Wave (PCM) Playback Volume (will be renamed later) */
  1070. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1071. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1072. snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Playback Volume", gpr, 100);
  1073. gpr += 2;
  1074. /* Synth Playback */
  1075. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+0), A_GPR(stereo_mix+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1076. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_GPR(stereo_mix+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1077. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Playback Volume", gpr, 100);
  1078. gpr += 2;
  1079. /* Wave (PCM) Capture */
  1080. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1081. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1082. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Capture Volume", gpr, 0);
  1083. gpr += 2;
  1084. /* Synth Capture */
  1085. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1086. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1087. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Capture Volume", gpr, 0);
  1088. gpr += 2;
  1089. /*
  1090. * inputs
  1091. */
  1092. #define A_ADD_VOLUME_IN(var,vol,input) \
  1093. A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
  1094. /* AC'97 Playback Volume - used only for mic (renamed later) */
  1095. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AC97_L);
  1096. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AC97_R);
  1097. snd_emu10k1_init_stereo_control(&controls[nctl++], "AMic Playback Volume", gpr, 0);
  1098. gpr += 2;
  1099. /* AC'97 Capture Volume - used only for mic */
  1100. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AC97_L);
  1101. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AC97_R);
  1102. snd_emu10k1_init_stereo_control(&controls[nctl++], "Mic Capture Volume", gpr, 0);
  1103. gpr += 2;
  1104. /* mic capture buffer */
  1105. A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), 0xcd, A_EXTIN(A_EXTIN_AC97_R));
  1106. /* Audigy CD Playback Volume */
  1107. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_SPDIF_CD_L);
  1108. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1109. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1110. emu->card_capabilities->ac97_chip ? "Audigy CD Playback Volume" : "CD Playback Volume",
  1111. gpr, 0);
  1112. gpr += 2;
  1113. /* Audigy CD Capture Volume */
  1114. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_SPDIF_CD_L);
  1115. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1116. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1117. emu->card_capabilities->ac97_chip ? "Audigy CD Capture Volume" : "CD Capture Volume",
  1118. gpr, 0);
  1119. gpr += 2;
  1120. /* Optical SPDIF Playback Volume */
  1121. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_OPT_SPDIF_L);
  1122. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1123. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",PLAYBACK,VOLUME), gpr, 0);
  1124. gpr += 2;
  1125. /* Optical SPDIF Capture Volume */
  1126. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_OPT_SPDIF_L);
  1127. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1128. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",CAPTURE,VOLUME), gpr, 0);
  1129. gpr += 2;
  1130. /* Line2 Playback Volume */
  1131. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_LINE2_L);
  1132. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_LINE2_R);
  1133. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1134. emu->card_capabilities->ac97_chip ? "Line2 Playback Volume" : "Line Playback Volume",
  1135. gpr, 0);
  1136. gpr += 2;
  1137. /* Line2 Capture Volume */
  1138. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_LINE2_L);
  1139. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_LINE2_R);
  1140. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1141. emu->card_capabilities->ac97_chip ? "Line2 Capture Volume" : "Line Capture Volume",
  1142. gpr, 0);
  1143. gpr += 2;
  1144. /* Philips ADC Playback Volume */
  1145. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_ADC_L);
  1146. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_ADC_R);
  1147. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Playback Volume", gpr, 0);
  1148. gpr += 2;
  1149. /* Philips ADC Capture Volume */
  1150. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_ADC_L);
  1151. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_ADC_R);
  1152. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Capture Volume", gpr, 0);
  1153. gpr += 2;
  1154. /* Aux2 Playback Volume */
  1155. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AUX2_L);
  1156. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AUX2_R);
  1157. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1158. emu->card_capabilities->ac97_chip ? "Aux2 Playback Volume" : "Aux Playback Volume",
  1159. gpr, 0);
  1160. gpr += 2;
  1161. /* Aux2 Capture Volume */
  1162. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AUX2_L);
  1163. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AUX2_R);
  1164. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1165. emu->card_capabilities->ac97_chip ? "Aux2 Capture Volume" : "Aux Capture Volume",
  1166. gpr, 0);
  1167. gpr += 2;
  1168. /* Stereo Mix Front Playback Volume */
  1169. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_GPR(playback), A_GPR(gpr), A_GPR(stereo_mix));
  1170. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_GPR(playback+1), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1171. snd_emu10k1_init_stereo_control(&controls[nctl++], "Front Playback Volume", gpr, 100);
  1172. gpr += 2;
  1173. /* Stereo Mix Surround Playback */
  1174. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_GPR(playback+2), A_GPR(gpr), A_GPR(stereo_mix));
  1175. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_GPR(playback+3), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1176. snd_emu10k1_init_stereo_control(&controls[nctl++], "Surround Playback Volume", gpr, 0);
  1177. gpr += 2;
  1178. /* Stereo Mix Center Playback */
  1179. /* Center = sub = Left/2 + Right/2 */
  1180. A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), 0xcd, A_GPR(stereo_mix+1));
  1181. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_GPR(playback+4), A_GPR(gpr), A_GPR(tmp));
  1182. snd_emu10k1_init_mono_control(&controls[nctl++], "Center Playback Volume", gpr, 0);
  1183. gpr++;
  1184. /* Stereo Mix LFE Playback */
  1185. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_GPR(playback+5), A_GPR(gpr), A_GPR(tmp));
  1186. snd_emu10k1_init_mono_control(&controls[nctl++], "LFE Playback Volume", gpr, 0);
  1187. gpr++;
  1188. if (emu->card_capabilities->spk71) {
  1189. /* Stereo Mix Side Playback */
  1190. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_GPR(playback+6), A_GPR(gpr), A_GPR(stereo_mix));
  1191. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_GPR(playback+7), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1192. snd_emu10k1_init_stereo_control(&controls[nctl++], "Side Playback Volume", gpr, 0);
  1193. gpr += 2;
  1194. }
  1195. /*
  1196. * outputs
  1197. */
  1198. #define A_PUT_OUTPUT(out,src) A_OP(icode, &ptr, iACC3, A_EXTOUT(out), A_C_00000000, A_C_00000000, A_GPR(src))
  1199. #define A_PUT_STEREO_OUTPUT(out1,out2,src) \
  1200. {A_PUT_OUTPUT(out1,src); A_PUT_OUTPUT(out2,src+1);}
  1201. #define _A_SWITCH(icode, ptr, dst, src, sw) \
  1202. A_OP((icode), ptr, iMACINT0, dst, A_C_00000000, src, sw);
  1203. #define A_SWITCH(icode, ptr, dst, src, sw) \
  1204. _A_SWITCH(icode, ptr, A_GPR(dst), A_GPR(src), A_GPR(sw))
  1205. #define _A_SWITCH_NEG(icode, ptr, dst, src) \
  1206. A_OP((icode), ptr, iANDXOR, dst, src, A_C_00000001, A_C_00000001);
  1207. #define A_SWITCH_NEG(icode, ptr, dst, src) \
  1208. _A_SWITCH_NEG(icode, ptr, A_GPR(dst), A_GPR(src))
  1209. /*
  1210. * Process tone control
  1211. */
  1212. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), A_GPR(playback + 0), A_C_00000000, A_C_00000000); /* left */
  1213. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), A_GPR(playback + 1), A_C_00000000, A_C_00000000); /* right */
  1214. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), A_GPR(playback + 2), A_C_00000000, A_C_00000000); /* rear left */
  1215. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), A_GPR(playback + 3), A_C_00000000, A_C_00000000); /* rear right */
  1216. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), A_GPR(playback + 4), A_C_00000000, A_C_00000000); /* center */
  1217. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), A_GPR(playback + 5), A_C_00000000, A_C_00000000); /* LFE */
  1218. if (emu->card_capabilities->spk71) {
  1219. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 6), A_GPR(playback + 6), A_C_00000000, A_C_00000000); /* side left */
  1220. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 7), A_GPR(playback + 7), A_C_00000000, A_C_00000000); /* side right */
  1221. }
  1222. ctl = &controls[nctl + 0];
  1223. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1224. strcpy(ctl->id.name, "Tone Control - Bass");
  1225. ctl->vcount = 2;
  1226. ctl->count = 10;
  1227. ctl->min = 0;
  1228. ctl->max = 40;
  1229. ctl->value[0] = ctl->value[1] = 20;
  1230. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1231. ctl = &controls[nctl + 1];
  1232. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1233. strcpy(ctl->id.name, "Tone Control - Treble");
  1234. ctl->vcount = 2;
  1235. ctl->count = 10;
  1236. ctl->min = 0;
  1237. ctl->max = 40;
  1238. ctl->value[0] = ctl->value[1] = 20;
  1239. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1240. #define BASS_GPR 0x8c
  1241. #define TREBLE_GPR 0x96
  1242. for (z = 0; z < 5; z++) {
  1243. int j;
  1244. for (j = 0; j < 2; j++) {
  1245. controls[nctl + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1246. controls[nctl + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1247. }
  1248. }
  1249. for (z = 0; z < 4; z++) { /* front/rear/center-lfe/side */
  1250. int j, k, l, d;
  1251. for (j = 0; j < 2; j++) { /* left/right */
  1252. k = 0xb0 + (z * 8) + (j * 4);
  1253. l = 0xe0 + (z * 8) + (j * 4);
  1254. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  1255. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(d), A_GPR(BASS_GPR + 0 + j));
  1256. A_OP(icode, &ptr, iMACMV, A_GPR(k+1), A_GPR(k), A_GPR(k+1), A_GPR(BASS_GPR + 4 + j));
  1257. A_OP(icode, &ptr, iMACMV, A_GPR(k), A_GPR(d), A_GPR(k), A_GPR(BASS_GPR + 2 + j));
  1258. A_OP(icode, &ptr, iMACMV, A_GPR(k+3), A_GPR(k+2), A_GPR(k+3), A_GPR(BASS_GPR + 8 + j));
  1259. A_OP(icode, &ptr, iMAC0, A_GPR(k+2), A_GPR_ACCU, A_GPR(k+2), A_GPR(BASS_GPR + 6 + j));
  1260. A_OP(icode, &ptr, iACC3, A_GPR(k+2), A_GPR(k+2), A_GPR(k+2), A_C_00000000);
  1261. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(k+2), A_GPR(TREBLE_GPR + 0 + j));
  1262. A_OP(icode, &ptr, iMACMV, A_GPR(l+1), A_GPR(l), A_GPR(l+1), A_GPR(TREBLE_GPR + 4 + j));
  1263. A_OP(icode, &ptr, iMACMV, A_GPR(l), A_GPR(k+2), A_GPR(l), A_GPR(TREBLE_GPR + 2 + j));
  1264. A_OP(icode, &ptr, iMACMV, A_GPR(l+3), A_GPR(l+2), A_GPR(l+3), A_GPR(TREBLE_GPR + 8 + j));
  1265. A_OP(icode, &ptr, iMAC0, A_GPR(l+2), A_GPR_ACCU, A_GPR(l+2), A_GPR(TREBLE_GPR + 6 + j));
  1266. A_OP(icode, &ptr, iMACINT0, A_GPR(l+2), A_C_00000000, A_GPR(l+2), A_C_00000010);
  1267. A_OP(icode, &ptr, iACC3, A_GPR(d), A_GPR(l+2), A_C_00000000, A_C_00000000);
  1268. if (z == 2) /* center */
  1269. break;
  1270. }
  1271. }
  1272. nctl += 2;
  1273. #undef BASS_GPR
  1274. #undef TREBLE_GPR
  1275. for (z = 0; z < 8; z++) {
  1276. A_SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  1277. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  1278. A_SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  1279. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1280. }
  1281. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, "Tone Control - Switch", gpr, 0);
  1282. gpr += 2;
  1283. /* Master volume (will be renamed later) */
  1284. A_OP(icode, &ptr, iMAC0, A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS));
  1285. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS));
  1286. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS));
  1287. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS));
  1288. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS));
  1289. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS));
  1290. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS));
  1291. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS));
  1292. snd_emu10k1_init_mono_control(&controls[nctl++], "Wave Master Playback Volume", gpr, 0);
  1293. gpr += 2;
  1294. /* analog speakers */
  1295. A_PUT_STEREO_OUTPUT(A_EXTOUT_AFRONT_L, A_EXTOUT_AFRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1296. A_PUT_STEREO_OUTPUT(A_EXTOUT_AREAR_L, A_EXTOUT_AREAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1297. A_PUT_OUTPUT(A_EXTOUT_ACENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1298. A_PUT_OUTPUT(A_EXTOUT_ALFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1299. if (emu->card_capabilities->spk71)
  1300. A_PUT_STEREO_OUTPUT(A_EXTOUT_ASIDE_L, A_EXTOUT_ASIDE_R, playback+6 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1301. /* headphone */
  1302. A_PUT_STEREO_OUTPUT(A_EXTOUT_HEADPHONE_L, A_EXTOUT_HEADPHONE_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1303. /* digital outputs */
  1304. /* A_PUT_STEREO_OUTPUT(A_EXTOUT_FRONT_L, A_EXTOUT_FRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); */
  1305. /* IEC958 Optical Raw Playback Switch */
  1306. gpr_map[gpr++] = 0;
  1307. gpr_map[gpr++] = 0x1008;
  1308. gpr_map[gpr++] = 0xffff0000;
  1309. for (z = 0; z < 2; z++) {
  1310. A_OP(icode, &ptr, iMAC0, A_GPR(tmp + 2), A_FXBUS(FXBUS_PT_LEFT + z), A_C_00000000, A_C_00000000);
  1311. A_OP(icode, &ptr, iSKIP, A_GPR_COND, A_GPR_COND, A_GPR(gpr - 2), A_C_00000001);
  1312. A_OP(icode, &ptr, iACC3, A_GPR(tmp + 2), A_C_00000000, A_C_00010000, A_GPR(tmp + 2));
  1313. A_OP(icode, &ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_GPR(gpr - 1), A_C_00000000);
  1314. A_SWITCH(icode, &ptr, tmp + 0, tmp + 2, gpr + z);
  1315. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  1316. A_SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1317. if ((z==1) && (emu->card_capabilities->spdif_bug)) {
  1318. /* Due to a SPDIF output bug on some Audigy cards, this code delays the Right channel by 1 sample */
  1319. snd_printk(KERN_INFO "Installing spdif_bug patch: %s\n", emu->card_capabilities->name);
  1320. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(gpr - 3), A_C_00000000, A_C_00000000);
  1321. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 3), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1322. } else {
  1323. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1324. }
  1325. }
  1326. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  1327. gpr += 2;
  1328. A_PUT_STEREO_OUTPUT(A_EXTOUT_REAR_L, A_EXTOUT_REAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1329. A_PUT_OUTPUT(A_EXTOUT_CENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1330. A_PUT_OUTPUT(A_EXTOUT_LFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1331. /* ADC buffer */
  1332. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  1333. A_PUT_STEREO_OUTPUT(A_EXTOUT_ADC_CAP_L, A_EXTOUT_ADC_CAP_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1334. #else
  1335. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_L, capture);
  1336. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_R, capture+1);
  1337. #endif
  1338. /* EFX capture - capture the 16 EXTINs */
  1339. for (z = 0; z < 16; z++) {
  1340. A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_EXTIN(z));
  1341. }
  1342. #endif /* JCD test */
  1343. /*
  1344. * ok, set up done..
  1345. */
  1346. if (gpr > tmp) {
  1347. snd_BUG();
  1348. err = -EIO;
  1349. goto __err;
  1350. }
  1351. /* clear remaining instruction memory */
  1352. while (ptr < 0x400)
  1353. A_OP(icode, &ptr, 0x0f, 0xc0, 0xc0, 0xcf, 0xc0);
  1354. seg = snd_enter_user();
  1355. icode->gpr_add_control_count = nctl;
  1356. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  1357. err = snd_emu10k1_icode_poke(emu, icode);
  1358. snd_leave_user(seg);
  1359. __err:
  1360. kfree(controls);
  1361. if (icode != NULL) {
  1362. kfree((void __force *)icode->gpr_map);
  1363. kfree(icode);
  1364. }
  1365. return err;
  1366. }
  1367. /*
  1368. * initial DSP configuration for Emu10k1
  1369. */
  1370. /* when volume = max, then copy only to avoid volume modification */
  1371. /* with iMAC0 (negative values) */
  1372. static void __devinit _volume(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1373. {
  1374. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1375. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1376. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000001);
  1377. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1378. }
  1379. static void __devinit _volume_add(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1380. {
  1381. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1382. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1383. OP(icode, ptr, iMACINT0, dst, dst, src, C_00000001);
  1384. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1385. OP(icode, ptr, iMAC0, dst, dst, src, vol);
  1386. }
  1387. static void __devinit _volume_out(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1388. {
  1389. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1390. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1391. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1392. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1393. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1394. }
  1395. #define VOLUME(icode, ptr, dst, src, vol) \
  1396. _volume(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1397. #define VOLUME_IN(icode, ptr, dst, src, vol) \
  1398. _volume(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1399. #define VOLUME_ADD(icode, ptr, dst, src, vol) \
  1400. _volume_add(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1401. #define VOLUME_ADDIN(icode, ptr, dst, src, vol) \
  1402. _volume_add(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1403. #define VOLUME_OUT(icode, ptr, dst, src, vol) \
  1404. _volume_out(icode, ptr, EXTOUT(dst), GPR(src), GPR(vol))
  1405. #define _SWITCH(icode, ptr, dst, src, sw) \
  1406. OP((icode), ptr, iMACINT0, dst, C_00000000, src, sw);
  1407. #define SWITCH(icode, ptr, dst, src, sw) \
  1408. _SWITCH(icode, ptr, GPR(dst), GPR(src), GPR(sw))
  1409. #define SWITCH_IN(icode, ptr, dst, src, sw) \
  1410. _SWITCH(icode, ptr, GPR(dst), EXTIN(src), GPR(sw))
  1411. #define _SWITCH_NEG(icode, ptr, dst, src) \
  1412. OP((icode), ptr, iANDXOR, dst, src, C_00000001, C_00000001);
  1413. #define SWITCH_NEG(icode, ptr, dst, src) \
  1414. _SWITCH_NEG(icode, ptr, GPR(dst), GPR(src))
  1415. static int __devinit _snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  1416. {
  1417. int err, i, z, gpr, tmp, playback, capture;
  1418. u32 ptr;
  1419. struct snd_emu10k1_fx8010_code *icode;
  1420. struct snd_emu10k1_fx8010_pcm_rec *ipcm = NULL;
  1421. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  1422. u32 *gpr_map;
  1423. mm_segment_t seg;
  1424. if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL)
  1425. return -ENOMEM;
  1426. if ((icode->gpr_map = (u_int32_t __user *)
  1427. kcalloc(256 + 160 + 160 + 2 * 512, sizeof(u_int32_t),
  1428. GFP_KERNEL)) == NULL ||
  1429. (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1430. sizeof(struct snd_emu10k1_fx8010_control_gpr),
  1431. GFP_KERNEL)) == NULL ||
  1432. (ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL)) == NULL) {
  1433. err = -ENOMEM;
  1434. goto __err;
  1435. }
  1436. gpr_map = (u32 __force *)icode->gpr_map;
  1437. icode->tram_data_map = icode->gpr_map + 256;
  1438. icode->tram_addr_map = icode->tram_data_map + 160;
  1439. icode->code = icode->tram_addr_map + 160;
  1440. /* clear free GPRs */
  1441. for (i = 0; i < 256; i++)
  1442. set_bit(i, icode->gpr_valid);
  1443. /* clear TRAM data & address lines */
  1444. for (i = 0; i < 160; i++)
  1445. set_bit(i, icode->tram_valid);
  1446. strcpy(icode->name, "SB Live! FX8010 code for ALSA v1.2 by Jaroslav Kysela");
  1447. ptr = 0; i = 0;
  1448. /* we have 12 inputs */
  1449. playback = SND_EMU10K1_INPUTS;
  1450. /* we have 6 playback channels and tone control doubles */
  1451. capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2);
  1452. gpr = capture + SND_EMU10K1_CAPTURE_CHANNELS;
  1453. tmp = 0x88; /* we need 4 temporary GPR */
  1454. /* from 0x8c to 0xff is the area for tone control */
  1455. /* stop FX processor */
  1456. snd_emu10k1_ptr_write(emu, DBG, 0, (emu->fx8010.dbg = 0) | EMU10K1_DBG_SINGLE_STEP);
  1457. /*
  1458. * Process FX Buses
  1459. */
  1460. OP(icode, &ptr, iMACINT0, GPR(0), C_00000000, FXBUS(FXBUS_PCM_LEFT), C_00000004);
  1461. OP(icode, &ptr, iMACINT0, GPR(1), C_00000000, FXBUS(FXBUS_PCM_RIGHT), C_00000004);
  1462. OP(icode, &ptr, iMACINT0, GPR(2), C_00000000, FXBUS(FXBUS_MIDI_LEFT), C_00000004);
  1463. OP(icode, &ptr, iMACINT0, GPR(3), C_00000000, FXBUS(FXBUS_MIDI_RIGHT), C_00000004);
  1464. OP(icode, &ptr, iMACINT0, GPR(4), C_00000000, FXBUS(FXBUS_PCM_LEFT_REAR), C_00000004);
  1465. OP(icode, &ptr, iMACINT0, GPR(5), C_00000000, FXBUS(FXBUS_PCM_RIGHT_REAR), C_00000004);
  1466. OP(icode, &ptr, iMACINT0, GPR(6), C_00000000, FXBUS(FXBUS_PCM_CENTER), C_00000004);
  1467. OP(icode, &ptr, iMACINT0, GPR(7), C_00000000, FXBUS(FXBUS_PCM_LFE), C_00000004);
  1468. OP(icode, &ptr, iMACINT0, GPR(8), C_00000000, C_00000000, C_00000000); /* S/PDIF left */
  1469. OP(icode, &ptr, iMACINT0, GPR(9), C_00000000, C_00000000, C_00000000); /* S/PDIF right */
  1470. OP(icode, &ptr, iMACINT0, GPR(10), C_00000000, FXBUS(FXBUS_PCM_LEFT_FRONT), C_00000004);
  1471. OP(icode, &ptr, iMACINT0, GPR(11), C_00000000, FXBUS(FXBUS_PCM_RIGHT_FRONT), C_00000004);
  1472. /* Raw S/PDIF PCM */
  1473. ipcm->substream = 0;
  1474. ipcm->channels = 2;
  1475. ipcm->tram_start = 0;
  1476. ipcm->buffer_size = (64 * 1024) / 2;
  1477. ipcm->gpr_size = gpr++;
  1478. ipcm->gpr_ptr = gpr++;
  1479. ipcm->gpr_count = gpr++;
  1480. ipcm->gpr_tmpcount = gpr++;
  1481. ipcm->gpr_trigger = gpr++;
  1482. ipcm->gpr_running = gpr++;
  1483. ipcm->etram[0] = 0;
  1484. ipcm->etram[1] = 1;
  1485. gpr_map[gpr + 0] = 0xfffff000;
  1486. gpr_map[gpr + 1] = 0xffff0000;
  1487. gpr_map[gpr + 2] = 0x70000000;
  1488. gpr_map[gpr + 3] = 0x00000007;
  1489. gpr_map[gpr + 4] = 0x001f << 11;
  1490. gpr_map[gpr + 5] = 0x001c << 11;
  1491. gpr_map[gpr + 6] = (0x22 - 0x01) - 1; /* skip at 01 to 22 */
  1492. gpr_map[gpr + 7] = (0x22 - 0x06) - 1; /* skip at 06 to 22 */
  1493. gpr_map[gpr + 8] = 0x2000000 + (2<<11);
  1494. gpr_map[gpr + 9] = 0x4000000 + (2<<11);
  1495. gpr_map[gpr + 10] = 1<<11;
  1496. gpr_map[gpr + 11] = (0x24 - 0x0a) - 1; /* skip at 0a to 24 */
  1497. gpr_map[gpr + 12] = 0;
  1498. /* if the trigger flag is not set, skip */
  1499. /* 00: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_trigger), C_00000000, C_00000000);
  1500. /* 01: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_ZERO, GPR(gpr + 6));
  1501. /* if the running flag is set, we're running */
  1502. /* 02: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_running), C_00000000, C_00000000);
  1503. /* 03: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000004);
  1504. /* wait until ((GPR_DBAC>>11) & 0x1f) == 0x1c) */
  1505. /* 04: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), GPR_DBAC, GPR(gpr + 4), C_00000000);
  1506. /* 05: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(gpr + 5));
  1507. /* 06: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 7));
  1508. /* 07: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000010, C_00000001, C_00000000);
  1509. /* 08: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000000, C_00000001);
  1510. /* 09: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), GPR(gpr + 12), C_ffffffff, C_00000000);
  1511. /* 0a: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 11));
  1512. /* 0b: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000001, C_00000000, C_00000000);
  1513. /* 0c: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[0]), GPR(gpr + 0), C_00000000);
  1514. /* 0d: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1515. /* 0e: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1516. /* 0f: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1517. /* 10: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(8), GPR(gpr + 1), GPR(gpr + 2));
  1518. /* 11: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[1]), GPR(gpr + 0), C_00000000);
  1519. /* 12: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1520. /* 13: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1521. /* 14: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1522. /* 15: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(9), GPR(gpr + 1), GPR(gpr + 2));
  1523. /* 16: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(ipcm->gpr_ptr), C_00000001, C_00000000);
  1524. /* 17: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(ipcm->gpr_size));
  1525. /* 18: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_MINUS, C_00000001);
  1526. /* 19: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), C_00000000, C_00000000, C_00000000);
  1527. /* 1a: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_ptr), GPR(tmp + 0), C_00000000, C_00000000);
  1528. /* 1b: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_tmpcount), C_ffffffff, C_00000000);
  1529. /* 1c: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1530. /* 1d: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_count), C_00000000, C_00000000);
  1531. /* 1e: */ OP(icode, &ptr, iACC3, GPR_IRQ, C_80000000, C_00000000, C_00000000);
  1532. /* 1f: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000001, C_00010000);
  1533. /* 20: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00010000, C_00000001);
  1534. /* 21: */ OP(icode, &ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000002);
  1535. /* 22: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[0]), GPR(gpr + 8), GPR_DBAC, C_ffffffff);
  1536. /* 23: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[1]), GPR(gpr + 9), GPR_DBAC, C_ffffffff);
  1537. /* 24: */
  1538. gpr += 13;
  1539. /* Wave Playback Volume */
  1540. for (z = 0; z < 2; z++)
  1541. VOLUME(icode, &ptr, playback + z, z, gpr + z);
  1542. snd_emu10k1_init_stereo_control(controls + i++, "Wave Playback Volume", gpr, 100);
  1543. gpr += 2;
  1544. /* Wave Surround Playback Volume */
  1545. for (z = 0; z < 2; z++)
  1546. VOLUME(icode, &ptr, playback + 2 + z, z, gpr + z);
  1547. snd_emu10k1_init_stereo_control(controls + i++, "Wave Surround Playback Volume", gpr, 0);
  1548. gpr += 2;
  1549. /* Wave Center/LFE Playback Volume */
  1550. OP(icode, &ptr, iACC3, GPR(tmp + 0), FXBUS(FXBUS_PCM_LEFT), FXBUS(FXBUS_PCM_RIGHT), C_00000000);
  1551. OP(icode, &ptr, iMACINT0, GPR(tmp + 0), C_00000000, GPR(tmp + 0), C_00000002);
  1552. VOLUME(icode, &ptr, playback + 4, tmp + 0, gpr);
  1553. snd_emu10k1_init_mono_control(controls + i++, "Wave Center Playback Volume", gpr++, 0);
  1554. VOLUME(icode, &ptr, playback + 5, tmp + 0, gpr);
  1555. snd_emu10k1_init_mono_control(controls + i++, "Wave LFE Playback Volume", gpr++, 0);
  1556. /* Wave Capture Volume + Switch */
  1557. for (z = 0; z < 2; z++) {
  1558. SWITCH(icode, &ptr, tmp + 0, z, gpr + 2 + z);
  1559. VOLUME(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1560. }
  1561. snd_emu10k1_init_stereo_control(controls + i++, "Wave Capture Volume", gpr, 0);
  1562. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Wave Capture Switch", gpr + 2, 0);
  1563. gpr += 4;
  1564. /* Synth Playback Volume */
  1565. for (z = 0; z < 2; z++)
  1566. VOLUME_ADD(icode, &ptr, playback + z, 2 + z, gpr + z);
  1567. snd_emu10k1_init_stereo_control(controls + i++, "Synth Playback Volume", gpr, 100);
  1568. gpr += 2;
  1569. /* Synth Capture Volume + Switch */
  1570. for (z = 0; z < 2; z++) {
  1571. SWITCH(icode, &ptr, tmp + 0, 2 + z, gpr + 2 + z);
  1572. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1573. }
  1574. snd_emu10k1_init_stereo_control(controls + i++, "Synth Capture Volume", gpr, 0);
  1575. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Synth Capture Switch", gpr + 2, 0);
  1576. gpr += 4;
  1577. /* Surround Digital Playback Volume (renamed later without Digital) */
  1578. for (z = 0; z < 2; z++)
  1579. VOLUME_ADD(icode, &ptr, playback + 2 + z, 4 + z, gpr + z);
  1580. snd_emu10k1_init_stereo_control(controls + i++, "Surround Digital Playback Volume", gpr, 100);
  1581. gpr += 2;
  1582. /* Surround Capture Volume + Switch */
  1583. for (z = 0; z < 2; z++) {
  1584. SWITCH(icode, &ptr, tmp + 0, 4 + z, gpr + 2 + z);
  1585. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1586. }
  1587. snd_emu10k1_init_stereo_control(controls + i++, "Surround Capture Volume", gpr, 0);
  1588. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Surround Capture Switch", gpr + 2, 0);
  1589. gpr += 4;
  1590. /* Center Playback Volume (renamed later without Digital) */
  1591. VOLUME_ADD(icode, &ptr, playback + 4, 6, gpr);
  1592. snd_emu10k1_init_mono_control(controls + i++, "Center Digital Playback Volume", gpr++, 100);
  1593. /* LFE Playback Volume + Switch (renamed later without Digital) */
  1594. VOLUME_ADD(icode, &ptr, playback + 5, 7, gpr);
  1595. snd_emu10k1_init_mono_control(controls + i++, "LFE Digital Playback Volume", gpr++, 100);
  1596. /* Front Playback Volume */
  1597. for (z = 0; z < 2; z++)
  1598. VOLUME_ADD(icode, &ptr, playback + z, 10 + z, gpr + z);
  1599. snd_emu10k1_init_stereo_control(controls + i++, "Front Playback Volume", gpr, 100);
  1600. gpr += 2;
  1601. /* Front Capture Volume + Switch */
  1602. for (z = 0; z < 2; z++) {
  1603. SWITCH(icode, &ptr, tmp + 0, 10 + z, gpr + 2);
  1604. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1605. }
  1606. snd_emu10k1_init_stereo_control(controls + i++, "Front Capture Volume", gpr, 0);
  1607. snd_emu10k1_init_mono_onoff_control(controls + i++, "Front Capture Switch", gpr + 2, 0);
  1608. gpr += 3;
  1609. /*
  1610. * Process inputs
  1611. */
  1612. if (emu->fx8010.extin_mask & ((1<<EXTIN_AC97_L)|(1<<EXTIN_AC97_R))) {
  1613. /* AC'97 Playback Volume */
  1614. VOLUME_ADDIN(icode, &ptr, playback + 0, EXTIN_AC97_L, gpr); gpr++;
  1615. VOLUME_ADDIN(icode, &ptr, playback + 1, EXTIN_AC97_R, gpr); gpr++;
  1616. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Playback Volume", gpr-2, 0);
  1617. /* AC'97 Capture Volume */
  1618. VOLUME_ADDIN(icode, &ptr, capture + 0, EXTIN_AC97_L, gpr); gpr++;
  1619. VOLUME_ADDIN(icode, &ptr, capture + 1, EXTIN_AC97_R, gpr); gpr++;
  1620. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Capture Volume", gpr-2, 100);
  1621. }
  1622. if (emu->fx8010.extin_mask & ((1<<EXTIN_SPDIF_CD_L)|(1<<EXTIN_SPDIF_CD_R))) {
  1623. /* IEC958 TTL Playback Volume */
  1624. for (z = 0; z < 2; z++)
  1625. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_SPDIF_CD_L + z, gpr + z);
  1626. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",PLAYBACK,VOLUME), gpr, 0);
  1627. gpr += 2;
  1628. /* IEC958 TTL Capture Volume + Switch */
  1629. for (z = 0; z < 2; z++) {
  1630. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_SPDIF_CD_L + z, gpr + 2 + z);
  1631. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1632. }
  1633. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,VOLUME), gpr, 0);
  1634. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,SWITCH), gpr + 2, 0);
  1635. gpr += 4;
  1636. }
  1637. if (emu->fx8010.extin_mask & ((1<<EXTIN_ZOOM_L)|(1<<EXTIN_ZOOM_R))) {
  1638. /* Zoom Video Playback Volume */
  1639. for (z = 0; z < 2; z++)
  1640. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_ZOOM_L + z, gpr + z);
  1641. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Playback Volume", gpr, 0);
  1642. gpr += 2;
  1643. /* Zoom Video Capture Volume + Switch */
  1644. for (z = 0; z < 2; z++) {
  1645. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_ZOOM_L + z, gpr + 2 + z);
  1646. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1647. }
  1648. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Capture Volume", gpr, 0);
  1649. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Zoom Video Capture Switch", gpr + 2, 0);
  1650. gpr += 4;
  1651. }
  1652. if (emu->fx8010.extin_mask & ((1<<EXTIN_TOSLINK_L)|(1<<EXTIN_TOSLINK_R))) {
  1653. /* IEC958 Optical Playback Volume */
  1654. for (z = 0; z < 2; z++)
  1655. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_TOSLINK_L + z, gpr + z);
  1656. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",PLAYBACK,VOLUME), gpr, 0);
  1657. gpr += 2;
  1658. /* IEC958 Optical Capture Volume */
  1659. for (z = 0; z < 2; z++) {
  1660. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_TOSLINK_L + z, gpr + 2 + z);
  1661. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1662. }
  1663. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,VOLUME), gpr, 0);
  1664. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,SWITCH), gpr + 2, 0);
  1665. gpr += 4;
  1666. }
  1667. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE1_L)|(1<<EXTIN_LINE1_R))) {
  1668. /* Line LiveDrive Playback Volume */
  1669. for (z = 0; z < 2; z++)
  1670. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE1_L + z, gpr + z);
  1671. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Playback Volume", gpr, 0);
  1672. gpr += 2;
  1673. /* Line LiveDrive Capture Volume + Switch */
  1674. for (z = 0; z < 2; z++) {
  1675. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE1_L + z, gpr + 2 + z);
  1676. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1677. }
  1678. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Capture Volume", gpr, 0);
  1679. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line LiveDrive Capture Switch", gpr + 2, 0);
  1680. gpr += 4;
  1681. }
  1682. if (emu->fx8010.extin_mask & ((1<<EXTIN_COAX_SPDIF_L)|(1<<EXTIN_COAX_SPDIF_R))) {
  1683. /* IEC958 Coax Playback Volume */
  1684. for (z = 0; z < 2; z++)
  1685. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_COAX_SPDIF_L + z, gpr + z);
  1686. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",PLAYBACK,VOLUME), gpr, 0);
  1687. gpr += 2;
  1688. /* IEC958 Coax Capture Volume + Switch */
  1689. for (z = 0; z < 2; z++) {
  1690. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_COAX_SPDIF_L + z, gpr + 2 + z);
  1691. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1692. }
  1693. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,VOLUME), gpr, 0);
  1694. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,SWITCH), gpr + 2, 0);
  1695. gpr += 4;
  1696. }
  1697. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE2_L)|(1<<EXTIN_LINE2_R))) {
  1698. /* Line LiveDrive Playback Volume */
  1699. for (z = 0; z < 2; z++)
  1700. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE2_L + z, gpr + z);
  1701. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Playback Volume", gpr, 0);
  1702. controls[i-1].id.index = 1;
  1703. gpr += 2;
  1704. /* Line LiveDrive Capture Volume */
  1705. for (z = 0; z < 2; z++) {
  1706. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE2_L + z, gpr + 2 + z);
  1707. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1708. }
  1709. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Capture Volume", gpr, 0);
  1710. controls[i-1].id.index = 1;
  1711. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line2 LiveDrive Capture Switch", gpr + 2, 0);
  1712. controls[i-1].id.index = 1;
  1713. gpr += 4;
  1714. }
  1715. /*
  1716. * Process tone control
  1717. */
  1718. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), GPR(playback + 0), C_00000000, C_00000000); /* left */
  1719. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), GPR(playback + 1), C_00000000, C_00000000); /* right */
  1720. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), GPR(playback + 2), C_00000000, C_00000000); /* rear left */
  1721. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), GPR(playback + 3), C_00000000, C_00000000); /* rear right */
  1722. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), GPR(playback + 4), C_00000000, C_00000000); /* center */
  1723. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), GPR(playback + 5), C_00000000, C_00000000); /* LFE */
  1724. ctl = &controls[i + 0];
  1725. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1726. strcpy(ctl->id.name, "Tone Control - Bass");
  1727. ctl->vcount = 2;
  1728. ctl->count = 10;
  1729. ctl->min = 0;
  1730. ctl->max = 40;
  1731. ctl->value[0] = ctl->value[1] = 20;
  1732. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1733. ctl = &controls[i + 1];
  1734. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1735. strcpy(ctl->id.name, "Tone Control - Treble");
  1736. ctl->vcount = 2;
  1737. ctl->count = 10;
  1738. ctl->min = 0;
  1739. ctl->max = 40;
  1740. ctl->value[0] = ctl->value[1] = 20;
  1741. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1742. #define BASS_GPR 0x8c
  1743. #define TREBLE_GPR 0x96
  1744. for (z = 0; z < 5; z++) {
  1745. int j;
  1746. for (j = 0; j < 2; j++) {
  1747. controls[i + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1748. controls[i + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1749. }
  1750. }
  1751. for (z = 0; z < 3; z++) { /* front/rear/center-lfe */
  1752. int j, k, l, d;
  1753. for (j = 0; j < 2; j++) { /* left/right */
  1754. k = 0xa0 + (z * 8) + (j * 4);
  1755. l = 0xd0 + (z * 8) + (j * 4);
  1756. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  1757. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(d), GPR(BASS_GPR + 0 + j));
  1758. OP(icode, &ptr, iMACMV, GPR(k+1), GPR(k), GPR(k+1), GPR(BASS_GPR + 4 + j));
  1759. OP(icode, &ptr, iMACMV, GPR(k), GPR(d), GPR(k), GPR(BASS_GPR + 2 + j));
  1760. OP(icode, &ptr, iMACMV, GPR(k+3), GPR(k+2), GPR(k+3), GPR(BASS_GPR + 8 + j));
  1761. OP(icode, &ptr, iMAC0, GPR(k+2), GPR_ACCU, GPR(k+2), GPR(BASS_GPR + 6 + j));
  1762. OP(icode, &ptr, iACC3, GPR(k+2), GPR(k+2), GPR(k+2), C_00000000);
  1763. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(k+2), GPR(TREBLE_GPR + 0 + j));
  1764. OP(icode, &ptr, iMACMV, GPR(l+1), GPR(l), GPR(l+1), GPR(TREBLE_GPR + 4 + j));
  1765. OP(icode, &ptr, iMACMV, GPR(l), GPR(k+2), GPR(l), GPR(TREBLE_GPR + 2 + j));
  1766. OP(icode, &ptr, iMACMV, GPR(l+3), GPR(l+2), GPR(l+3), GPR(TREBLE_GPR + 8 + j));
  1767. OP(icode, &ptr, iMAC0, GPR(l+2), GPR_ACCU, GPR(l+2), GPR(TREBLE_GPR + 6 + j));
  1768. OP(icode, &ptr, iMACINT0, GPR(l+2), C_00000000, GPR(l+2), C_00000010);
  1769. OP(icode, &ptr, iACC3, GPR(d), GPR(l+2), C_00000000, C_00000000);
  1770. if (z == 2) /* center */
  1771. break;
  1772. }
  1773. }
  1774. i += 2;
  1775. #undef BASS_GPR
  1776. #undef TREBLE_GPR
  1777. for (z = 0; z < 6; z++) {
  1778. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  1779. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  1780. SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  1781. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1782. }
  1783. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Tone Control - Switch", gpr, 0);
  1784. gpr += 2;
  1785. /*
  1786. * Process outputs
  1787. */
  1788. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_L)|(1<<EXTOUT_AC97_R))) {
  1789. /* AC'97 Playback Volume */
  1790. for (z = 0; z < 2; z++)
  1791. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), C_00000000, C_00000000);
  1792. }
  1793. if (emu->fx8010.extout_mask & ((1<<EXTOUT_TOSLINK_L)|(1<<EXTOUT_TOSLINK_R))) {
  1794. /* IEC958 Optical Raw Playback Switch */
  1795. for (z = 0; z < 2; z++) {
  1796. SWITCH(icode, &ptr, tmp + 0, 8 + z, gpr + z);
  1797. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  1798. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1799. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_TOSLINK_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1800. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  1801. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1802. #endif
  1803. }
  1804. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  1805. gpr += 2;
  1806. }
  1807. if (emu->fx8010.extout_mask & ((1<<EXTOUT_HEADPHONE_L)|(1<<EXTOUT_HEADPHONE_R))) {
  1808. /* Headphone Playback Volume */
  1809. for (z = 0; z < 2; z++) {
  1810. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4 + z, gpr + 2 + z);
  1811. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 2 + z);
  1812. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1813. OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1814. VOLUME_OUT(icode, &ptr, EXTOUT_HEADPHONE_L + z, tmp + 0, gpr + z);
  1815. }
  1816. snd_emu10k1_init_stereo_control(controls + i++, "Headphone Playback Volume", gpr + 0, 0);
  1817. controls[i-1].id.index = 1; /* AC'97 can have also Headphone control */
  1818. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone Center Playback Switch", gpr + 2, 0);
  1819. controls[i-1].id.index = 1;
  1820. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone LFE Playback Switch", gpr + 3, 0);
  1821. controls[i-1].id.index = 1;
  1822. gpr += 4;
  1823. }
  1824. if (emu->fx8010.extout_mask & ((1<<EXTOUT_REAR_L)|(1<<EXTOUT_REAR_R)))
  1825. for (z = 0; z < 2; z++)
  1826. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  1827. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_REAR_L)|(1<<EXTOUT_AC97_REAR_R)))
  1828. for (z = 0; z < 2; z++)
  1829. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  1830. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_CENTER)) {
  1831. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  1832. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  1833. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  1834. #else
  1835. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  1836. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  1837. #endif
  1838. }
  1839. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_LFE)) {
  1840. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  1841. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  1842. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  1843. #else
  1844. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  1845. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  1846. #endif
  1847. }
  1848. #ifndef EMU10K1_CAPTURE_DIGITAL_OUT
  1849. for (z = 0; z < 2; z++)
  1850. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(capture + z), C_00000000, C_00000000);
  1851. #endif
  1852. if (emu->fx8010.extout_mask & (1<<EXTOUT_MIC_CAP))
  1853. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_MIC_CAP), GPR(capture + 2), C_00000000, C_00000000);
  1854. /* EFX capture - capture the 16 EXTINS */
  1855. if (emu->card_capabilities->sblive51) {
  1856. /* On the Live! 5.1, FXBUS2(1) and FXBUS(2) are shared with EXTOUT_ACENTER
  1857. * and EXTOUT_ALFE, so we can't connect inputs to them for multitrack recording.
  1858. *
  1859. * Since only 14 of the 16 EXTINs are used, this is not a big problem.
  1860. * We route AC97L and R to FX capture 14 and 15, SPDIF CD in to FX capture
  1861. * 0 and 3, then the rest of the EXTINs to the corresponding FX capture
  1862. * channel. Multitrack recorders will still see the center/lfe output signal
  1863. * on the second and third channels.
  1864. */
  1865. OP(icode, &ptr, iACC3, FXBUS2(14), C_00000000, C_00000000, EXTIN(0));
  1866. OP(icode, &ptr, iACC3, FXBUS2(15), C_00000000, C_00000000, EXTIN(1));
  1867. OP(icode, &ptr, iACC3, FXBUS2(0), C_00000000, C_00000000, EXTIN(2));
  1868. OP(icode, &ptr, iACC3, FXBUS2(3), C_00000000, C_00000000, EXTIN(3));
  1869. for (z = 4; z < 14; z++)
  1870. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  1871. } else {
  1872. for (z = 0; z < 16; z++)
  1873. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  1874. }
  1875. if (gpr > tmp) {
  1876. snd_BUG();
  1877. err = -EIO;
  1878. goto __err;
  1879. }
  1880. if (i > SND_EMU10K1_GPR_CONTROLS) {
  1881. snd_BUG();
  1882. err = -EIO;
  1883. goto __err;
  1884. }
  1885. /* clear remaining instruction memory */
  1886. while (ptr < 0x200)
  1887. OP(icode, &ptr, iACC3, C_00000000, C_00000000, C_00000000, C_00000000);
  1888. if ((err = snd_emu10k1_fx8010_tram_setup(emu, ipcm->buffer_size)) < 0)
  1889. goto __err;
  1890. seg = snd_enter_user();
  1891. icode->gpr_add_control_count = i;
  1892. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  1893. err = snd_emu10k1_icode_poke(emu, icode);
  1894. snd_leave_user(seg);
  1895. if (err >= 0)
  1896. err = snd_emu10k1_ipcm_poke(emu, ipcm);
  1897. __err:
  1898. kfree(ipcm);
  1899. kfree(controls);
  1900. if (icode != NULL) {
  1901. kfree((void __force *)icode->gpr_map);
  1902. kfree(icode);
  1903. }
  1904. return err;
  1905. }
  1906. int __devinit snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  1907. {
  1908. spin_lock_init(&emu->fx8010.irq_lock);
  1909. INIT_LIST_HEAD(&emu->fx8010.gpr_ctl);
  1910. if (emu->audigy)
  1911. return _snd_emu10k1_audigy_init_efx(emu);
  1912. else
  1913. return _snd_emu10k1_init_efx(emu);
  1914. }
  1915. void snd_emu10k1_free_efx(struct snd_emu10k1 *emu)
  1916. {
  1917. /* stop processor */
  1918. if (emu->audigy)
  1919. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = A_DBG_SINGLE_STEP);
  1920. else
  1921. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = EMU10K1_DBG_SINGLE_STEP);
  1922. }
  1923. #if 0 // FIXME: who use them?
  1924. int snd_emu10k1_fx8010_tone_control_activate(struct snd_emu10k1 *emu, int output)
  1925. {
  1926. if (output < 0 || output >= 6)
  1927. return -EINVAL;
  1928. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 1);
  1929. return 0;
  1930. }
  1931. int snd_emu10k1_fx8010_tone_control_deactivate(struct snd_emu10k1 *emu, int output)
  1932. {
  1933. if (output < 0 || output >= 6)
  1934. return -EINVAL;
  1935. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 0);
  1936. return 0;
  1937. }
  1938. #endif
  1939. int snd_emu10k1_fx8010_tram_setup(struct snd_emu10k1 *emu, u32 size)
  1940. {
  1941. u8 size_reg = 0;
  1942. /* size is in samples */
  1943. if (size != 0) {
  1944. size = (size - 1) >> 13;
  1945. while (size) {
  1946. size >>= 1;
  1947. size_reg++;
  1948. }
  1949. size = 0x2000 << size_reg;
  1950. }
  1951. if ((emu->fx8010.etram_pages.bytes / 2) == size)
  1952. return 0;
  1953. spin_lock_irq(&emu->emu_lock);
  1954. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  1955. spin_unlock_irq(&emu->emu_lock);
  1956. snd_emu10k1_ptr_write(emu, TCB, 0, 0);
  1957. snd_emu10k1_ptr_write(emu, TCBS, 0, 0);
  1958. if (emu->fx8010.etram_pages.area != NULL) {
  1959. snd_dma_free_pages(&emu->fx8010.etram_pages);
  1960. emu->fx8010.etram_pages.area = NULL;
  1961. emu->fx8010.etram_pages.bytes = 0;
  1962. }
  1963. if (size > 0) {
  1964. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(emu->pci),
  1965. size * 2, &emu->fx8010.etram_pages) < 0)
  1966. return -ENOMEM;
  1967. memset(emu->fx8010.etram_pages.area, 0, size * 2);
  1968. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  1969. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  1970. spin_lock_irq(&emu->emu_lock);
  1971. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  1972. spin_unlock_irq(&emu->emu_lock);
  1973. }
  1974. return 0;
  1975. }
  1976. static int snd_emu10k1_fx8010_open(struct snd_hwdep * hw, struct file *file)
  1977. {
  1978. return 0;
  1979. }
  1980. static void copy_string(char *dst, char *src, char *null, int idx)
  1981. {
  1982. if (src == NULL)
  1983. sprintf(dst, "%s %02X", null, idx);
  1984. else
  1985. strcpy(dst, src);
  1986. }
  1987. static int snd_emu10k1_fx8010_info(struct snd_emu10k1 *emu,
  1988. struct snd_emu10k1_fx8010_info *info)
  1989. {
  1990. char **fxbus, **extin, **extout;
  1991. unsigned short fxbus_mask, extin_mask, extout_mask;
  1992. int res;
  1993. memset(info, 0, sizeof(info));
  1994. info->internal_tram_size = emu->fx8010.itram_size;
  1995. info->external_tram_size = emu->fx8010.etram_pages.bytes / 2;
  1996. fxbus = fxbuses;
  1997. extin = emu->audigy ? audigy_ins : creative_ins;
  1998. extout = emu->audigy ? audigy_outs : creative_outs;
  1999. fxbus_mask = emu->fx8010.fxbus_mask;
  2000. extin_mask = emu->fx8010.extin_mask;
  2001. extout_mask = emu->fx8010.extout_mask;
  2002. for (res = 0; res < 16; res++, fxbus++, extin++, extout++) {
  2003. copy_string(info->fxbus_names[res], fxbus_mask & (1 << res) ? *fxbus : NULL, "FXBUS", res);
  2004. copy_string(info->extin_names[res], extin_mask & (1 << res) ? *extin : NULL, "Unused", res);
  2005. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  2006. }
  2007. for (res = 16; res < 32; res++, extout++)
  2008. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  2009. info->gpr_controls = emu->fx8010.gpr_count;
  2010. return 0;
  2011. }
  2012. static int snd_emu10k1_fx8010_ioctl(struct snd_hwdep * hw, struct file *file, unsigned int cmd, unsigned long arg)
  2013. {
  2014. struct snd_emu10k1 *emu = hw->private_data;
  2015. struct snd_emu10k1_fx8010_info *info;
  2016. struct snd_emu10k1_fx8010_code *icode;
  2017. struct snd_emu10k1_fx8010_pcm_rec *ipcm;
  2018. unsigned int addr;
  2019. void __user *argp = (void __user *)arg;
  2020. int res;
  2021. switch (cmd) {
  2022. case SNDRV_EMU10K1_IOCTL_INFO:
  2023. info = kmalloc(sizeof(*info), GFP_KERNEL);
  2024. if (!info)
  2025. return -ENOMEM;
  2026. if ((res = snd_emu10k1_fx8010_info(emu, info)) < 0) {
  2027. kfree(info);
  2028. return res;
  2029. }
  2030. if (copy_to_user(argp, info, sizeof(*info))) {
  2031. kfree(info);
  2032. return -EFAULT;
  2033. }
  2034. kfree(info);
  2035. return 0;
  2036. case SNDRV_EMU10K1_IOCTL_CODE_POKE:
  2037. if (!capable(CAP_SYS_ADMIN))
  2038. return -EPERM;
  2039. icode = kmalloc(sizeof(*icode), GFP_KERNEL);
  2040. if (icode == NULL)
  2041. return -ENOMEM;
  2042. if (copy_from_user(icode, argp, sizeof(*icode))) {
  2043. kfree(icode);
  2044. return -EFAULT;
  2045. }
  2046. res = snd_emu10k1_icode_poke(emu, icode);
  2047. kfree(icode);
  2048. return res;
  2049. case SNDRV_EMU10K1_IOCTL_CODE_PEEK:
  2050. icode = kmalloc(sizeof(*icode), GFP_KERNEL);
  2051. if (icode == NULL)
  2052. return -ENOMEM;
  2053. if (copy_from_user(icode, argp, sizeof(*icode))) {
  2054. kfree(icode);
  2055. return -EFAULT;
  2056. }
  2057. res = snd_emu10k1_icode_peek(emu, icode);
  2058. if (res == 0 && copy_to_user(argp, icode, sizeof(*icode))) {
  2059. kfree(icode);
  2060. return -EFAULT;
  2061. }
  2062. kfree(icode);
  2063. return res;
  2064. case SNDRV_EMU10K1_IOCTL_PCM_POKE:
  2065. ipcm = kmalloc(sizeof(*ipcm), GFP_KERNEL);
  2066. if (ipcm == NULL)
  2067. return -ENOMEM;
  2068. if (copy_from_user(ipcm, argp, sizeof(*ipcm))) {
  2069. kfree(ipcm);
  2070. return -EFAULT;
  2071. }
  2072. res = snd_emu10k1_ipcm_poke(emu, ipcm);
  2073. kfree(ipcm);
  2074. return res;
  2075. case SNDRV_EMU10K1_IOCTL_PCM_PEEK:
  2076. ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL);
  2077. if (ipcm == NULL)
  2078. return -ENOMEM;
  2079. if (copy_from_user(ipcm, argp, sizeof(*ipcm))) {
  2080. kfree(ipcm);
  2081. return -EFAULT;
  2082. }
  2083. res = snd_emu10k1_ipcm_peek(emu, ipcm);
  2084. if (res == 0 && copy_to_user(argp, ipcm, sizeof(*ipcm))) {
  2085. kfree(ipcm);
  2086. return -EFAULT;
  2087. }
  2088. kfree(ipcm);
  2089. return res;
  2090. case SNDRV_EMU10K1_IOCTL_TRAM_SETUP:
  2091. if (!capable(CAP_SYS_ADMIN))
  2092. return -EPERM;
  2093. if (get_user(addr, (unsigned int __user *)argp))
  2094. return -EFAULT;
  2095. mutex_lock(&emu->fx8010.lock);
  2096. res = snd_emu10k1_fx8010_tram_setup(emu, addr);
  2097. mutex_unlock(&emu->fx8010.lock);
  2098. return res;
  2099. case SNDRV_EMU10K1_IOCTL_STOP:
  2100. if (!capable(CAP_SYS_ADMIN))
  2101. return -EPERM;
  2102. if (emu->audigy)
  2103. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP);
  2104. else
  2105. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP);
  2106. return 0;
  2107. case SNDRV_EMU10K1_IOCTL_CONTINUE:
  2108. if (!capable(CAP_SYS_ADMIN))
  2109. return -EPERM;
  2110. if (emu->audigy)
  2111. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = 0);
  2112. else
  2113. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = 0);
  2114. return 0;
  2115. case SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER:
  2116. if (!capable(CAP_SYS_ADMIN))
  2117. return -EPERM;
  2118. if (emu->audigy)
  2119. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_ZC);
  2120. else
  2121. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_ZC);
  2122. udelay(10);
  2123. if (emu->audigy)
  2124. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2125. else
  2126. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2127. return 0;
  2128. case SNDRV_EMU10K1_IOCTL_SINGLE_STEP:
  2129. if (!capable(CAP_SYS_ADMIN))
  2130. return -EPERM;
  2131. if (get_user(addr, (unsigned int __user *)argp))
  2132. return -EFAULT;
  2133. if (addr > 0x1ff)
  2134. return -EINVAL;
  2135. if (emu->audigy)
  2136. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | addr);
  2137. else
  2138. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | addr);
  2139. udelay(10);
  2140. if (emu->audigy)
  2141. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | A_DBG_STEP_ADDR | addr);
  2142. else
  2143. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | EMU10K1_DBG_STEP | addr);
  2144. return 0;
  2145. case SNDRV_EMU10K1_IOCTL_DBG_READ:
  2146. if (emu->audigy)
  2147. addr = snd_emu10k1_ptr_read(emu, A_DBG, 0);
  2148. else
  2149. addr = snd_emu10k1_ptr_read(emu, DBG, 0);
  2150. if (put_user(addr, (unsigned int __user *)argp))
  2151. return -EFAULT;
  2152. return 0;
  2153. }
  2154. return -ENOTTY;
  2155. }
  2156. static int snd_emu10k1_fx8010_release(struct snd_hwdep * hw, struct file *file)
  2157. {
  2158. return 0;
  2159. }
  2160. int __devinit snd_emu10k1_fx8010_new(struct snd_emu10k1 *emu, int device, struct snd_hwdep ** rhwdep)
  2161. {
  2162. struct snd_hwdep *hw;
  2163. int err;
  2164. if (rhwdep)
  2165. *rhwdep = NULL;
  2166. if ((err = snd_hwdep_new(emu->card, "FX8010", device, &hw)) < 0)
  2167. return err;
  2168. strcpy(hw->name, "EMU10K1 (FX8010)");
  2169. hw->iface = SNDRV_HWDEP_IFACE_EMU10K1;
  2170. hw->ops.open = snd_emu10k1_fx8010_open;
  2171. hw->ops.ioctl = snd_emu10k1_fx8010_ioctl;
  2172. hw->ops.release = snd_emu10k1_fx8010_release;
  2173. hw->private_data = emu;
  2174. if (rhwdep)
  2175. *rhwdep = hw;
  2176. return 0;
  2177. }
  2178. #ifdef CONFIG_PM
  2179. int __devinit snd_emu10k1_efx_alloc_pm_buffer(struct snd_emu10k1 *emu)
  2180. {
  2181. int len;
  2182. len = emu->audigy ? 0x200 : 0x100;
  2183. emu->saved_gpr = kmalloc(len * 4, GFP_KERNEL);
  2184. if (! emu->saved_gpr)
  2185. return -ENOMEM;
  2186. len = emu->audigy ? 0x100 : 0xa0;
  2187. emu->tram_val_saved = kmalloc(len * 4, GFP_KERNEL);
  2188. emu->tram_addr_saved = kmalloc(len * 4, GFP_KERNEL);
  2189. if (! emu->tram_val_saved || ! emu->tram_addr_saved)
  2190. return -ENOMEM;
  2191. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2192. emu->saved_icode = vmalloc(len * 4);
  2193. if (! emu->saved_icode)
  2194. return -ENOMEM;
  2195. return 0;
  2196. }
  2197. void snd_emu10k1_efx_free_pm_buffer(struct snd_emu10k1 *emu)
  2198. {
  2199. kfree(emu->saved_gpr);
  2200. kfree(emu->tram_val_saved);
  2201. kfree(emu->tram_addr_saved);
  2202. vfree(emu->saved_icode);
  2203. }
  2204. /*
  2205. * save/restore GPR, TRAM and codes
  2206. */
  2207. void snd_emu10k1_efx_suspend(struct snd_emu10k1 *emu)
  2208. {
  2209. int i, len;
  2210. len = emu->audigy ? 0x200 : 0x100;
  2211. for (i = 0; i < len; i++)
  2212. emu->saved_gpr[i] = snd_emu10k1_ptr_read(emu, emu->gpr_base + i, 0);
  2213. len = emu->audigy ? 0x100 : 0xa0;
  2214. for (i = 0; i < len; i++) {
  2215. emu->tram_val_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + i, 0);
  2216. emu->tram_addr_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + i, 0);
  2217. if (emu->audigy) {
  2218. emu->tram_addr_saved[i] >>= 12;
  2219. emu->tram_addr_saved[i] |=
  2220. snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + i, 0) << 20;
  2221. }
  2222. }
  2223. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2224. for (i = 0; i < len; i++)
  2225. emu->saved_icode[i] = snd_emu10k1_efx_read(emu, i);
  2226. }
  2227. void snd_emu10k1_efx_resume(struct snd_emu10k1 *emu)
  2228. {
  2229. int i, len;
  2230. /* set up TRAM */
  2231. if (emu->fx8010.etram_pages.bytes > 0) {
  2232. unsigned size, size_reg = 0;
  2233. size = emu->fx8010.etram_pages.bytes / 2;
  2234. size = (size - 1) >> 13;
  2235. while (size) {
  2236. size >>= 1;
  2237. size_reg++;
  2238. }
  2239. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  2240. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  2241. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  2242. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  2243. }
  2244. if (emu->audigy)
  2245. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  2246. else
  2247. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  2248. len = emu->audigy ? 0x200 : 0x100;
  2249. for (i = 0; i < len; i++)
  2250. snd_emu10k1_ptr_write(emu, emu->gpr_base + i, 0, emu->saved_gpr[i]);
  2251. len = emu->audigy ? 0x100 : 0xa0;
  2252. for (i = 0; i < len; i++) {
  2253. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + i, 0,
  2254. emu->tram_val_saved[i]);
  2255. if (! emu->audigy)
  2256. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2257. emu->tram_addr_saved[i]);
  2258. else {
  2259. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2260. emu->tram_addr_saved[i] << 12);
  2261. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2262. emu->tram_addr_saved[i] >> 20);
  2263. }
  2264. }
  2265. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2266. for (i = 0; i < len; i++)
  2267. snd_emu10k1_efx_write(emu, i, emu->saved_icode[i]);
  2268. /* start FX processor when the DSP code is updated */
  2269. if (emu->audigy)
  2270. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2271. else
  2272. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2273. }
  2274. #endif