core.c 4.5 KB

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  1. /*
  2. * linux/arch/arm/mach-integrator/core.c
  3. *
  4. * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2, as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/types.h>
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irq.h>
  17. #include <linux/sched.h>
  18. #include <linux/smp.h>
  19. #include <linux/termios.h>
  20. #include <linux/amba/bus.h>
  21. #include <linux/amba/serial.h>
  22. #include <linux/io.h>
  23. #include <asm/clkdev.h>
  24. #include <mach/clkdev.h>
  25. #include <mach/hardware.h>
  26. #include <mach/platform.h>
  27. #include <asm/irq.h>
  28. #include <mach/cm.h>
  29. #include <asm/system.h>
  30. #include <asm/leds.h>
  31. #include <asm/mach/time.h>
  32. static struct amba_pl010_data integrator_uart_data;
  33. static struct amba_device rtc_device = {
  34. .dev = {
  35. .init_name = "mb:15",
  36. },
  37. .res = {
  38. .start = INTEGRATOR_RTC_BASE,
  39. .end = INTEGRATOR_RTC_BASE + SZ_4K - 1,
  40. .flags = IORESOURCE_MEM,
  41. },
  42. .irq = { IRQ_RTCINT, NO_IRQ },
  43. .periphid = 0x00041030,
  44. };
  45. static struct amba_device uart0_device = {
  46. .dev = {
  47. .init_name = "mb:16",
  48. .platform_data = &integrator_uart_data,
  49. },
  50. .res = {
  51. .start = INTEGRATOR_UART0_BASE,
  52. .end = INTEGRATOR_UART0_BASE + SZ_4K - 1,
  53. .flags = IORESOURCE_MEM,
  54. },
  55. .irq = { IRQ_UARTINT0, NO_IRQ },
  56. .periphid = 0x0041010,
  57. };
  58. static struct amba_device uart1_device = {
  59. .dev = {
  60. .init_name = "mb:17",
  61. .platform_data = &integrator_uart_data,
  62. },
  63. .res = {
  64. .start = INTEGRATOR_UART1_BASE,
  65. .end = INTEGRATOR_UART1_BASE + SZ_4K - 1,
  66. .flags = IORESOURCE_MEM,
  67. },
  68. .irq = { IRQ_UARTINT1, NO_IRQ },
  69. .periphid = 0x0041010,
  70. };
  71. static struct amba_device kmi0_device = {
  72. .dev = {
  73. .init_name = "mb:18",
  74. },
  75. .res = {
  76. .start = KMI0_BASE,
  77. .end = KMI0_BASE + SZ_4K - 1,
  78. .flags = IORESOURCE_MEM,
  79. },
  80. .irq = { IRQ_KMIINT0, NO_IRQ },
  81. .periphid = 0x00041050,
  82. };
  83. static struct amba_device kmi1_device = {
  84. .dev = {
  85. .init_name = "mb:19",
  86. },
  87. .res = {
  88. .start = KMI1_BASE,
  89. .end = KMI1_BASE + SZ_4K - 1,
  90. .flags = IORESOURCE_MEM,
  91. },
  92. .irq = { IRQ_KMIINT1, NO_IRQ },
  93. .periphid = 0x00041050,
  94. };
  95. static struct amba_device *amba_devs[] __initdata = {
  96. &rtc_device,
  97. &uart0_device,
  98. &uart1_device,
  99. &kmi0_device,
  100. &kmi1_device,
  101. };
  102. /*
  103. * These are fixed clocks.
  104. */
  105. static struct clk clk24mhz = {
  106. .rate = 24000000,
  107. };
  108. static struct clk uartclk = {
  109. .rate = 14745600,
  110. };
  111. static struct clk dummy_apb_pclk;
  112. static struct clk_lookup lookups[] = {
  113. { /* Bus clock */
  114. .con_id = "apb_pclk",
  115. .clk = &dummy_apb_pclk,
  116. }, { /* UART0 */
  117. .dev_id = "mb:16",
  118. .clk = &uartclk,
  119. }, { /* UART1 */
  120. .dev_id = "mb:17",
  121. .clk = &uartclk,
  122. }, { /* KMI0 */
  123. .dev_id = "mb:18",
  124. .clk = &clk24mhz,
  125. }, { /* KMI1 */
  126. .dev_id = "mb:19",
  127. .clk = &clk24mhz,
  128. }, { /* MMCI - IntegratorCP */
  129. .dev_id = "mb:1c",
  130. .clk = &uartclk,
  131. }
  132. };
  133. static int __init integrator_init(void)
  134. {
  135. int i;
  136. clkdev_add_table(lookups, ARRAY_SIZE(lookups));
  137. for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  138. struct amba_device *d = amba_devs[i];
  139. amba_device_register(d, &iomem_resource);
  140. }
  141. return 0;
  142. }
  143. arch_initcall(integrator_init);
  144. /*
  145. * On the Integrator platform, the port RTS and DTR are provided by
  146. * bits in the following SC_CTRLS register bits:
  147. * RTS DTR
  148. * UART0 7 6
  149. * UART1 5 4
  150. */
  151. #define SC_CTRLC IO_ADDRESS(INTEGRATOR_SC_CTRLC)
  152. #define SC_CTRLS IO_ADDRESS(INTEGRATOR_SC_CTRLS)
  153. static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
  154. {
  155. unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
  156. if (dev == &uart0_device) {
  157. rts_mask = 1 << 4;
  158. dtr_mask = 1 << 5;
  159. } else {
  160. rts_mask = 1 << 6;
  161. dtr_mask = 1 << 7;
  162. }
  163. if (mctrl & TIOCM_RTS)
  164. ctrlc |= rts_mask;
  165. else
  166. ctrls |= rts_mask;
  167. if (mctrl & TIOCM_DTR)
  168. ctrlc |= dtr_mask;
  169. else
  170. ctrls |= dtr_mask;
  171. __raw_writel(ctrls, SC_CTRLS);
  172. __raw_writel(ctrlc, SC_CTRLC);
  173. }
  174. static struct amba_pl010_data integrator_uart_data = {
  175. .set_mctrl = integrator_uart_set_mctrl,
  176. };
  177. #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
  178. static DEFINE_SPINLOCK(cm_lock);
  179. /**
  180. * cm_control - update the CM_CTRL register.
  181. * @mask: bits to change
  182. * @set: bits to set
  183. */
  184. void cm_control(u32 mask, u32 set)
  185. {
  186. unsigned long flags;
  187. u32 val;
  188. spin_lock_irqsave(&cm_lock, flags);
  189. val = readl(CM_CTRL) & ~mask;
  190. writel(val | set, CM_CTRL);
  191. spin_unlock_irqrestore(&cm_lock, flags);
  192. }
  193. EXPORT_SYMBOL(cm_control);