init.c 34 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/sdio_func.h>
  17. #include "core.h"
  18. #include "cfg80211.h"
  19. #include "target.h"
  20. #include "debug.h"
  21. #include "hif-ops.h"
  22. unsigned int debug_mask;
  23. module_param(debug_mask, uint, 0644);
  24. /*
  25. * Include definitions here that can be used to tune the WLAN module
  26. * behavior. Different customers can tune the behavior as per their needs,
  27. * here.
  28. */
  29. /*
  30. * This configuration item enable/disable keepalive support.
  31. * Keepalive support: In the absence of any data traffic to AP, null
  32. * frames will be sent to the AP at periodic interval, to keep the association
  33. * active. This configuration item defines the periodic interval.
  34. * Use value of zero to disable keepalive support
  35. * Default: 60 seconds
  36. */
  37. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  38. /*
  39. * This configuration item sets the value of disconnect timeout
  40. * Firmware delays sending the disconnec event to the host for this
  41. * timeout after is gets disconnected from the current AP.
  42. * If the firmware successly roams within the disconnect timeout
  43. * it sends a new connect event
  44. */
  45. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  46. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  47. enum addr_type {
  48. DATASET_PATCH_ADDR,
  49. APP_LOAD_ADDR,
  50. APP_START_OVERRIDE_ADDR,
  51. };
  52. #define ATH6KL_DATA_OFFSET 64
  53. struct sk_buff *ath6kl_buf_alloc(int size)
  54. {
  55. struct sk_buff *skb;
  56. u16 reserved;
  57. /* Add chacheline space at front and back of buffer */
  58. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  59. sizeof(struct htc_packet);
  60. skb = dev_alloc_skb(size + reserved);
  61. if (skb)
  62. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  63. return skb;
  64. }
  65. void ath6kl_init_profile_info(struct ath6kl *ar)
  66. {
  67. ar->ssid_len = 0;
  68. memset(ar->ssid, 0, sizeof(ar->ssid));
  69. ar->dot11_auth_mode = OPEN_AUTH;
  70. ar->auth_mode = NONE_AUTH;
  71. ar->prwise_crypto = NONE_CRYPT;
  72. ar->prwise_crypto_len = 0;
  73. ar->grp_crypto = NONE_CRYPT;
  74. ar->grp_crpto_len = 0;
  75. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  76. memset(ar->req_bssid, 0, sizeof(ar->req_bssid));
  77. memset(ar->bssid, 0, sizeof(ar->bssid));
  78. ar->bss_ch = 0;
  79. ar->nw_type = ar->next_mode = INFRA_NETWORK;
  80. }
  81. static u8 ath6kl_get_fw_iftype(struct ath6kl *ar)
  82. {
  83. switch (ar->nw_type) {
  84. case INFRA_NETWORK:
  85. return HI_OPTION_FW_MODE_BSS_STA;
  86. case ADHOC_NETWORK:
  87. return HI_OPTION_FW_MODE_IBSS;
  88. case AP_NETWORK:
  89. return HI_OPTION_FW_MODE_AP;
  90. default:
  91. ath6kl_err("Unsupported interface type :%d\n", ar->nw_type);
  92. return 0xff;
  93. }
  94. }
  95. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  96. u32 item_offset)
  97. {
  98. u32 addr = 0;
  99. if (ar->target_type == TARGET_TYPE_AR6003)
  100. addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
  101. else if (ar->target_type == TARGET_TYPE_AR6004)
  102. addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
  103. return addr;
  104. }
  105. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  106. {
  107. u32 address, data;
  108. struct host_app_area host_app_area;
  109. /* Fetch the address of the host_app_area_s
  110. * instance in the host interest area */
  111. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  112. address = TARG_VTOP(ar->target_type, address);
  113. if (ath6kl_read_reg_diag(ar, &address, &data))
  114. return -EIO;
  115. address = TARG_VTOP(ar->target_type, data);
  116. host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
  117. if (ath6kl_access_datadiag(ar, address,
  118. (u8 *)&host_app_area,
  119. sizeof(struct host_app_area), false))
  120. return -EIO;
  121. return 0;
  122. }
  123. static inline void set_ac2_ep_map(struct ath6kl *ar,
  124. u8 ac,
  125. enum htc_endpoint_id ep)
  126. {
  127. ar->ac2ep_map[ac] = ep;
  128. ar->ep2ac_map[ep] = ac;
  129. }
  130. /* connect to a service */
  131. static int ath6kl_connectservice(struct ath6kl *ar,
  132. struct htc_service_connect_req *con_req,
  133. char *desc)
  134. {
  135. int status;
  136. struct htc_service_connect_resp response;
  137. memset(&response, 0, sizeof(response));
  138. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  139. if (status) {
  140. ath6kl_err("failed to connect to %s service status:%d\n",
  141. desc, status);
  142. return status;
  143. }
  144. switch (con_req->svc_id) {
  145. case WMI_CONTROL_SVC:
  146. if (test_bit(WMI_ENABLED, &ar->flag))
  147. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  148. ar->ctrl_ep = response.endpoint;
  149. break;
  150. case WMI_DATA_BE_SVC:
  151. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  152. break;
  153. case WMI_DATA_BK_SVC:
  154. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  155. break;
  156. case WMI_DATA_VI_SVC:
  157. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  158. break;
  159. case WMI_DATA_VO_SVC:
  160. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  161. break;
  162. default:
  163. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  164. return -EINVAL;
  165. }
  166. return 0;
  167. }
  168. static int ath6kl_init_service_ep(struct ath6kl *ar)
  169. {
  170. struct htc_service_connect_req connect;
  171. memset(&connect, 0, sizeof(connect));
  172. /* these fields are the same for all service endpoints */
  173. connect.ep_cb.rx = ath6kl_rx;
  174. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  175. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  176. /*
  177. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  178. * gets called.
  179. */
  180. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  181. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  182. if (!connect.ep_cb.rx_refill_thresh)
  183. connect.ep_cb.rx_refill_thresh++;
  184. /* connect to control service */
  185. connect.svc_id = WMI_CONTROL_SVC;
  186. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  187. return -EIO;
  188. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  189. /*
  190. * Limit the HTC message size on the send path, although e can
  191. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  192. * (802.3) frames on the send path.
  193. */
  194. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  195. /*
  196. * To reduce the amount of committed memory for larger A_MSDU
  197. * frames, use the recv-alloc threshold mechanism for larger
  198. * packets.
  199. */
  200. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  201. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  202. /*
  203. * For the remaining data services set the connection flag to
  204. * reduce dribbling, if configured to do so.
  205. */
  206. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  207. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  208. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  209. connect.svc_id = WMI_DATA_BE_SVC;
  210. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  211. return -EIO;
  212. /* connect to back-ground map this to WMI LOW_PRI */
  213. connect.svc_id = WMI_DATA_BK_SVC;
  214. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  215. return -EIO;
  216. /* connect to Video service, map this to to HI PRI */
  217. connect.svc_id = WMI_DATA_VI_SVC;
  218. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  219. return -EIO;
  220. /*
  221. * Connect to VO service, this is currently not mapped to a WMI
  222. * priority stream due to historical reasons. WMI originally
  223. * defined 3 priorities over 3 mailboxes We can change this when
  224. * WMI is reworked so that priorities are not dependent on
  225. * mailboxes.
  226. */
  227. connect.svc_id = WMI_DATA_VO_SVC;
  228. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  229. return -EIO;
  230. return 0;
  231. }
  232. static void ath6kl_init_control_info(struct ath6kl *ar)
  233. {
  234. u8 ctr;
  235. clear_bit(WMI_ENABLED, &ar->flag);
  236. ath6kl_init_profile_info(ar);
  237. ar->def_txkey_index = 0;
  238. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  239. ar->ch_hint = 0;
  240. ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL;
  241. ar->listen_intvl_b = 0;
  242. ar->tx_pwr = 0;
  243. clear_bit(SKIP_SCAN, &ar->flag);
  244. set_bit(WMM_ENABLED, &ar->flag);
  245. ar->intra_bss = 1;
  246. memset(&ar->sc_params, 0, sizeof(ar->sc_params));
  247. ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT;
  248. ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS;
  249. memset((u8 *)ar->sta_list, 0,
  250. AP_MAX_NUM_STA * sizeof(struct ath6kl_sta));
  251. spin_lock_init(&ar->mcastpsq_lock);
  252. /* Init the PS queues */
  253. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  254. spin_lock_init(&ar->sta_list[ctr].psq_lock);
  255. skb_queue_head_init(&ar->sta_list[ctr].psq);
  256. }
  257. skb_queue_head_init(&ar->mcastpsq);
  258. memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3);
  259. }
  260. /*
  261. * Set HTC/Mbox operational parameters, this can only be called when the
  262. * target is in the BMI phase.
  263. */
  264. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  265. u8 htc_ctrl_buf)
  266. {
  267. int status;
  268. u32 blk_size;
  269. blk_size = ar->mbox_info.block_size;
  270. if (htc_ctrl_buf)
  271. blk_size |= ((u32)htc_ctrl_buf) << 16;
  272. /* set the host interest area for the block size */
  273. status = ath6kl_bmi_write(ar,
  274. ath6kl_get_hi_item_addr(ar,
  275. HI_ITEM(hi_mbox_io_block_sz)),
  276. (u8 *)&blk_size,
  277. 4);
  278. if (status) {
  279. ath6kl_err("bmi_write_memory for IO block size failed\n");
  280. goto out;
  281. }
  282. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  283. blk_size,
  284. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  285. if (mbox_isr_yield_val) {
  286. /* set the host interest area for the mbox ISR yield limit */
  287. status = ath6kl_bmi_write(ar,
  288. ath6kl_get_hi_item_addr(ar,
  289. HI_ITEM(hi_mbox_isr_yield_limit)),
  290. (u8 *)&mbox_isr_yield_val,
  291. 4);
  292. if (status) {
  293. ath6kl_err("bmi_write_memory for yield limit failed\n");
  294. goto out;
  295. }
  296. }
  297. out:
  298. return status;
  299. }
  300. #define REG_DUMP_COUNT_AR6003 60
  301. #define REGISTER_DUMP_LEN_MAX 60
  302. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  303. {
  304. u32 address;
  305. u32 regdump_loc = 0;
  306. int status;
  307. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  308. u32 i;
  309. if (ar->target_type != TARGET_TYPE_AR6003)
  310. return;
  311. /* the reg dump pointer is copied to the host interest area */
  312. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  313. address = TARG_VTOP(ar->target_type, address);
  314. /* read RAM location through diagnostic window */
  315. status = ath6kl_read_reg_diag(ar, &address, &regdump_loc);
  316. if (status || !regdump_loc) {
  317. ath6kl_err("failed to get ptr to register dump area\n");
  318. return;
  319. }
  320. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  321. regdump_loc);
  322. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  323. /* fetch register dump data */
  324. status = ath6kl_access_datadiag(ar,
  325. regdump_loc,
  326. (u8 *)&regdump_val[0],
  327. REG_DUMP_COUNT_AR6003 * (sizeof(u32)),
  328. true);
  329. if (status) {
  330. ath6kl_err("failed to get register dump\n");
  331. return;
  332. }
  333. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  334. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  335. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  336. i, regdump_val[i]);
  337. }
  338. void ath6kl_target_failure(struct ath6kl *ar)
  339. {
  340. ath6kl_err("target asserted\n");
  341. /* try dumping target assertion information (if any) */
  342. ath6kl_dump_target_assert_info(ar);
  343. }
  344. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  345. {
  346. int status = 0;
  347. /*
  348. * Configure the device for rx dot11 header rules. "0,0" are the
  349. * default values. Required if checksum offload is needed. Set
  350. * RxMetaVersion to 2.
  351. */
  352. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  353. ar->rx_meta_ver, 0, 0)) {
  354. ath6kl_err("unable to set the rx frame format\n");
  355. status = -EIO;
  356. }
  357. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  358. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  359. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  360. ath6kl_err("unable to set power save fail event policy\n");
  361. status = -EIO;
  362. }
  363. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  364. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  365. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  366. ath6kl_err("unable to set barker preamble policy\n");
  367. status = -EIO;
  368. }
  369. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  370. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  371. ath6kl_err("unable to set keep alive interval\n");
  372. status = -EIO;
  373. }
  374. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  375. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  376. ath6kl_err("unable to set disconnect timeout\n");
  377. status = -EIO;
  378. }
  379. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  380. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  381. ath6kl_err("unable to set txop bursting\n");
  382. status = -EIO;
  383. }
  384. return status;
  385. }
  386. int ath6kl_configure_target(struct ath6kl *ar)
  387. {
  388. u32 param, ram_reserved_size;
  389. u8 fw_iftype;
  390. fw_iftype = ath6kl_get_fw_iftype(ar);
  391. if (fw_iftype == 0xff)
  392. return -EINVAL;
  393. /* Tell target which HTC version it is used*/
  394. param = HTC_PROTOCOL_VERSION;
  395. if (ath6kl_bmi_write(ar,
  396. ath6kl_get_hi_item_addr(ar,
  397. HI_ITEM(hi_app_host_interest)),
  398. (u8 *)&param, 4) != 0) {
  399. ath6kl_err("bmi_write_memory for htc version failed\n");
  400. return -EIO;
  401. }
  402. /* set the firmware mode to STA/IBSS/AP */
  403. param = 0;
  404. if (ath6kl_bmi_read(ar,
  405. ath6kl_get_hi_item_addr(ar,
  406. HI_ITEM(hi_option_flag)),
  407. (u8 *)&param, 4) != 0) {
  408. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  409. return -EIO;
  410. }
  411. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  412. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  413. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  414. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  415. if (ath6kl_bmi_write(ar,
  416. ath6kl_get_hi_item_addr(ar,
  417. HI_ITEM(hi_option_flag)),
  418. (u8 *)&param,
  419. 4) != 0) {
  420. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  421. return -EIO;
  422. }
  423. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  424. /*
  425. * Hardcode the address use for the extended board data
  426. * Ideally this should be pre-allocate by the OS at boot time
  427. * But since it is a new feature and board data is loaded
  428. * at init time, we have to workaround this from host.
  429. * It is difficult to patch the firmware boot code,
  430. * but possible in theory.
  431. */
  432. if (ar->target_type == TARGET_TYPE_AR6003 ||
  433. ar->target_type == TARGET_TYPE_AR6004) {
  434. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  435. param = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  436. ram_reserved_size = AR6003_REV2_RAM_RESERVE_SIZE;
  437. } else if (ar->version.target_ver == AR6004_REV1_VERSION) {
  438. param = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  439. ram_reserved_size = AR6004_REV1_RAM_RESERVE_SIZE;
  440. } else {
  441. param = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  442. ram_reserved_size = AR6003_REV3_RAM_RESERVE_SIZE;
  443. }
  444. if (ath6kl_bmi_write(ar,
  445. ath6kl_get_hi_item_addr(ar,
  446. HI_ITEM(hi_board_ext_data)),
  447. (u8 *)&param, 4) != 0) {
  448. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  449. return -EIO;
  450. }
  451. if (ath6kl_bmi_write(ar,
  452. ath6kl_get_hi_item_addr(ar,
  453. HI_ITEM(hi_end_ram_reserve_sz)),
  454. (u8 *)&ram_reserved_size, 4) != 0) {
  455. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  456. return -EIO;
  457. }
  458. }
  459. /* set the block size for the target */
  460. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  461. /* use default number of control buffers */
  462. return -EIO;
  463. return 0;
  464. }
  465. struct ath6kl *ath6kl_core_alloc(struct device *sdev)
  466. {
  467. struct net_device *dev;
  468. struct ath6kl *ar;
  469. struct wireless_dev *wdev;
  470. wdev = ath6kl_cfg80211_init(sdev);
  471. if (!wdev) {
  472. ath6kl_err("ath6kl_cfg80211_init failed\n");
  473. return NULL;
  474. }
  475. ar = wdev_priv(wdev);
  476. ar->dev = sdev;
  477. ar->wdev = wdev;
  478. wdev->iftype = NL80211_IFTYPE_STATION;
  479. dev = alloc_netdev(0, "wlan%d", ether_setup);
  480. if (!dev) {
  481. ath6kl_err("no memory for network device instance\n");
  482. ath6kl_cfg80211_deinit(ar);
  483. return NULL;
  484. }
  485. dev->ieee80211_ptr = wdev;
  486. SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy));
  487. wdev->netdev = dev;
  488. ar->sme_state = SME_DISCONNECTED;
  489. ar->auto_auth_stage = AUTH_IDLE;
  490. init_netdev(dev);
  491. ar->net_dev = dev;
  492. set_bit(WLAN_ENABLED, &ar->flag);
  493. ar->wlan_pwr_state = WLAN_POWER_STATE_ON;
  494. spin_lock_init(&ar->lock);
  495. ath6kl_init_control_info(ar);
  496. init_waitqueue_head(&ar->event_wq);
  497. sema_init(&ar->sem, 1);
  498. clear_bit(DESTROY_IN_PROGRESS, &ar->flag);
  499. INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue);
  500. setup_timer(&ar->disconnect_timer, disconnect_timer_handler,
  501. (unsigned long) dev);
  502. return ar;
  503. }
  504. int ath6kl_unavail_ev(struct ath6kl *ar)
  505. {
  506. ath6kl_destroy(ar->net_dev, 1);
  507. return 0;
  508. }
  509. /* firmware upload */
  510. static u32 ath6kl_get_load_address(u32 target_ver, enum addr_type type)
  511. {
  512. WARN_ON(target_ver != AR6003_REV2_VERSION &&
  513. target_ver != AR6003_REV3_VERSION &&
  514. target_ver != AR6004_REV1_VERSION);
  515. switch (type) {
  516. case DATASET_PATCH_ADDR:
  517. return (target_ver == AR6003_REV2_VERSION) ?
  518. AR6003_REV2_DATASET_PATCH_ADDRESS :
  519. AR6003_REV3_DATASET_PATCH_ADDRESS;
  520. case APP_LOAD_ADDR:
  521. return (target_ver == AR6003_REV2_VERSION) ?
  522. AR6003_REV2_APP_LOAD_ADDRESS :
  523. 0x1234;
  524. case APP_START_OVERRIDE_ADDR:
  525. return (target_ver == AR6003_REV2_VERSION) ?
  526. AR6003_REV2_APP_START_OVERRIDE :
  527. AR6003_REV3_APP_START_OVERRIDE;
  528. default:
  529. return 0;
  530. }
  531. }
  532. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  533. u8 **fw, size_t *fw_len)
  534. {
  535. const struct firmware *fw_entry;
  536. int ret;
  537. ret = request_firmware(&fw_entry, filename, ar->dev);
  538. if (ret)
  539. return ret;
  540. *fw_len = fw_entry->size;
  541. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  542. if (*fw == NULL)
  543. ret = -ENOMEM;
  544. release_firmware(fw_entry);
  545. return ret;
  546. }
  547. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  548. {
  549. const char *filename;
  550. int ret;
  551. switch (ar->version.target_ver) {
  552. case AR6003_REV2_VERSION:
  553. filename = AR6003_REV2_BOARD_DATA_FILE;
  554. break;
  555. case AR6004_REV1_VERSION:
  556. filename = AR6004_REV1_BOARD_DATA_FILE;
  557. break;
  558. default:
  559. filename = AR6003_REV3_BOARD_DATA_FILE;
  560. break;
  561. }
  562. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  563. &ar->fw_board_len);
  564. if (ret == 0) {
  565. /* managed to get proper board file */
  566. return 0;
  567. }
  568. /* there was no proper board file, try to use default instead */
  569. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  570. filename, ret);
  571. switch (ar->version.target_ver) {
  572. case AR6003_REV2_VERSION:
  573. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  574. break;
  575. case AR6004_REV1_VERSION:
  576. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  577. break;
  578. default:
  579. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  580. break;
  581. }
  582. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  583. &ar->fw_board_len);
  584. if (ret) {
  585. ath6kl_err("Failed to get default board file %s: %d\n",
  586. filename, ret);
  587. return ret;
  588. }
  589. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  590. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  591. return 0;
  592. }
  593. static int ath6kl_upload_board_file(struct ath6kl *ar)
  594. {
  595. u32 board_address, board_ext_address, param;
  596. u32 board_data_size, board_ext_data_size;
  597. int ret;
  598. if (ar->fw_board == NULL) {
  599. ret = ath6kl_fetch_board_file(ar);
  600. if (ret)
  601. return ret;
  602. }
  603. /*
  604. * Determine where in Target RAM to write Board Data.
  605. * For AR6004, host determine Target RAM address for
  606. * writing board data.
  607. */
  608. if (ar->target_type == TARGET_TYPE_AR6004) {
  609. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  610. ath6kl_bmi_write(ar,
  611. ath6kl_get_hi_item_addr(ar,
  612. HI_ITEM(hi_board_data)),
  613. (u8 *) &board_address, 4);
  614. } else {
  615. ath6kl_bmi_read(ar,
  616. ath6kl_get_hi_item_addr(ar,
  617. HI_ITEM(hi_board_data)),
  618. (u8 *) &board_address, 4);
  619. }
  620. ath6kl_dbg(ATH6KL_DBG_TRC, "board data download addr: 0x%x\n",
  621. board_address);
  622. /* determine where in target ram to write extended board data */
  623. ath6kl_bmi_read(ar,
  624. ath6kl_get_hi_item_addr(ar,
  625. HI_ITEM(hi_board_ext_data)),
  626. (u8 *) &board_ext_address, 4);
  627. ath6kl_dbg(ATH6KL_DBG_TRC, "board file download addr: 0x%x\n",
  628. board_ext_address);
  629. if (board_ext_address == 0) {
  630. ath6kl_err("Failed to get board file target address.\n");
  631. return -EINVAL;
  632. }
  633. switch (ar->target_type) {
  634. case TARGET_TYPE_AR6003:
  635. board_data_size = AR6003_BOARD_DATA_SZ;
  636. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  637. break;
  638. case TARGET_TYPE_AR6004:
  639. board_data_size = AR6004_BOARD_DATA_SZ;
  640. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  641. break;
  642. default:
  643. WARN_ON(1);
  644. return -EINVAL;
  645. break;
  646. }
  647. if (ar->fw_board_len == (board_data_size +
  648. board_ext_data_size)) {
  649. /* write extended board data */
  650. ret = ath6kl_bmi_write(ar, board_ext_address,
  651. ar->fw_board + board_data_size,
  652. board_ext_data_size);
  653. if (ret) {
  654. ath6kl_err("Failed to write extended board data: %d\n",
  655. ret);
  656. return ret;
  657. }
  658. /* record that extended board data is initialized */
  659. param = (board_ext_data_size << 16) | 1;
  660. ath6kl_bmi_write(ar,
  661. ath6kl_get_hi_item_addr(ar,
  662. HI_ITEM(hi_board_ext_data_config)),
  663. (unsigned char *) &param, 4);
  664. }
  665. if (ar->fw_board_len < board_data_size) {
  666. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  667. ret = -EINVAL;
  668. return ret;
  669. }
  670. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  671. board_data_size);
  672. if (ret) {
  673. ath6kl_err("Board file bmi write failed: %d\n", ret);
  674. return ret;
  675. }
  676. /* record the fact that Board Data IS initialized */
  677. param = 1;
  678. ath6kl_bmi_write(ar,
  679. ath6kl_get_hi_item_addr(ar,
  680. HI_ITEM(hi_board_data_initialized)),
  681. (u8 *)&param, 4);
  682. return ret;
  683. }
  684. static int ath6kl_upload_otp(struct ath6kl *ar)
  685. {
  686. const char *filename;
  687. u32 address, param;
  688. int ret;
  689. switch (ar->version.target_ver) {
  690. case AR6003_REV2_VERSION:
  691. filename = AR6003_REV2_OTP_FILE;
  692. break;
  693. case AR6004_REV1_VERSION:
  694. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  695. return 0;
  696. break;
  697. default:
  698. filename = AR6003_REV3_OTP_FILE;
  699. break;
  700. }
  701. if (ar->fw_otp == NULL) {
  702. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  703. &ar->fw_otp_len);
  704. if (ret) {
  705. ath6kl_err("Failed to get OTP file %s: %d\n",
  706. filename, ret);
  707. return ret;
  708. }
  709. }
  710. address = ath6kl_get_load_address(ar->version.target_ver,
  711. APP_LOAD_ADDR);
  712. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  713. ar->fw_otp_len);
  714. if (ret) {
  715. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  716. return ret;
  717. }
  718. /* execute the OTP code */
  719. param = 0;
  720. address = ath6kl_get_load_address(ar->version.target_ver,
  721. APP_START_OVERRIDE_ADDR);
  722. ath6kl_bmi_execute(ar, address, &param);
  723. return ret;
  724. }
  725. static int ath6kl_upload_firmware(struct ath6kl *ar)
  726. {
  727. const char *filename;
  728. u32 address;
  729. int ret;
  730. switch (ar->version.target_ver) {
  731. case AR6003_REV2_VERSION:
  732. filename = AR6003_REV2_FIRMWARE_FILE;
  733. break;
  734. case AR6004_REV1_VERSION:
  735. filename = AR6004_REV1_FIRMWARE_FILE;
  736. break;
  737. default:
  738. filename = AR6003_REV3_FIRMWARE_FILE;
  739. break;
  740. }
  741. if (ar->fw == NULL) {
  742. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  743. if (ret) {
  744. ath6kl_err("Failed to get firmware file %s: %d\n",
  745. filename, ret);
  746. return ret;
  747. }
  748. }
  749. address = ath6kl_get_load_address(ar->version.target_ver,
  750. APP_LOAD_ADDR);
  751. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  752. if (ret) {
  753. ath6kl_err("Failed to write firmware: %d\n", ret);
  754. return ret;
  755. }
  756. /*
  757. * Set starting address for firmware
  758. * Don't need to setup app_start override addr on AR6004
  759. */
  760. if (ar->target_type != TARGET_TYPE_AR6004) {
  761. address = ath6kl_get_load_address(ar->version.target_ver,
  762. APP_START_OVERRIDE_ADDR);
  763. ath6kl_bmi_set_app_start(ar, address);
  764. }
  765. return ret;
  766. }
  767. static int ath6kl_upload_patch(struct ath6kl *ar)
  768. {
  769. const char *filename;
  770. u32 address, param;
  771. int ret;
  772. switch (ar->version.target_ver) {
  773. case AR6003_REV2_VERSION:
  774. filename = AR6003_REV2_PATCH_FILE;
  775. break;
  776. case AR6004_REV1_VERSION:
  777. /* FIXME: implement for AR6004 */
  778. return 0;
  779. break;
  780. default:
  781. filename = AR6003_REV3_PATCH_FILE;
  782. break;
  783. }
  784. if (ar->fw_patch == NULL) {
  785. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  786. &ar->fw_patch_len);
  787. if (ret) {
  788. ath6kl_err("Failed to get patch file %s: %d\n",
  789. filename, ret);
  790. return ret;
  791. }
  792. }
  793. address = ath6kl_get_load_address(ar->version.target_ver,
  794. DATASET_PATCH_ADDR);
  795. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  796. if (ret) {
  797. ath6kl_err("Failed to write patch file: %d\n", ret);
  798. return ret;
  799. }
  800. param = address;
  801. ath6kl_bmi_write(ar,
  802. ath6kl_get_hi_item_addr(ar,
  803. HI_ITEM(hi_dset_list_head)),
  804. (unsigned char *) &param, 4);
  805. return 0;
  806. }
  807. static int ath6kl_init_upload(struct ath6kl *ar)
  808. {
  809. u32 param, options, sleep, address;
  810. int status = 0;
  811. if (ar->target_type != TARGET_TYPE_AR6003 &&
  812. ar->target_type != TARGET_TYPE_AR6004)
  813. return -EINVAL;
  814. /* temporarily disable system sleep */
  815. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  816. status = ath6kl_bmi_reg_read(ar, address, &param);
  817. if (status)
  818. return status;
  819. options = param;
  820. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  821. status = ath6kl_bmi_reg_write(ar, address, param);
  822. if (status)
  823. return status;
  824. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  825. status = ath6kl_bmi_reg_read(ar, address, &param);
  826. if (status)
  827. return status;
  828. sleep = param;
  829. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  830. status = ath6kl_bmi_reg_write(ar, address, param);
  831. if (status)
  832. return status;
  833. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  834. options, sleep);
  835. /* program analog PLL register */
  836. /* no need to control 40/44MHz clock on AR6004 */
  837. if (ar->target_type != TARGET_TYPE_AR6004) {
  838. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  839. 0xF9104001);
  840. if (status)
  841. return status;
  842. /* Run at 80/88MHz by default */
  843. param = SM(CPU_CLOCK_STANDARD, 1);
  844. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  845. status = ath6kl_bmi_reg_write(ar, address, param);
  846. if (status)
  847. return status;
  848. }
  849. param = 0;
  850. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  851. param = SM(LPO_CAL_ENABLE, 1);
  852. status = ath6kl_bmi_reg_write(ar, address, param);
  853. if (status)
  854. return status;
  855. /* WAR to avoid SDIO CRC err */
  856. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  857. ath6kl_err("temporary war to avoid sdio crc error\n");
  858. param = 0x20;
  859. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  860. status = ath6kl_bmi_reg_write(ar, address, param);
  861. if (status)
  862. return status;
  863. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  864. status = ath6kl_bmi_reg_write(ar, address, param);
  865. if (status)
  866. return status;
  867. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  868. status = ath6kl_bmi_reg_write(ar, address, param);
  869. if (status)
  870. return status;
  871. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  872. status = ath6kl_bmi_reg_write(ar, address, param);
  873. if (status)
  874. return status;
  875. }
  876. /* write EEPROM data to Target RAM */
  877. status = ath6kl_upload_board_file(ar);
  878. if (status)
  879. return status;
  880. /* transfer One time Programmable data */
  881. status = ath6kl_upload_otp(ar);
  882. if (status)
  883. return status;
  884. /* Download Target firmware */
  885. status = ath6kl_upload_firmware(ar);
  886. if (status)
  887. return status;
  888. status = ath6kl_upload_patch(ar);
  889. if (status)
  890. return status;
  891. /* Restore system sleep */
  892. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  893. status = ath6kl_bmi_reg_write(ar, address, sleep);
  894. if (status)
  895. return status;
  896. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  897. param = options | 0x20;
  898. status = ath6kl_bmi_reg_write(ar, address, param);
  899. if (status)
  900. return status;
  901. /* Configure GPIO AR6003 UART */
  902. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  903. status = ath6kl_bmi_write(ar,
  904. ath6kl_get_hi_item_addr(ar,
  905. HI_ITEM(hi_dbg_uart_txpin)),
  906. (u8 *)&param, 4);
  907. return status;
  908. }
  909. static int ath6kl_init(struct net_device *dev)
  910. {
  911. struct ath6kl *ar = ath6kl_priv(dev);
  912. int status = 0;
  913. s32 timeleft;
  914. if (!ar)
  915. return -EIO;
  916. /* Do we need to finish the BMI phase */
  917. if (ath6kl_bmi_done(ar)) {
  918. status = -EIO;
  919. goto ath6kl_init_done;
  920. }
  921. /* Indicate that WMI is enabled (although not ready yet) */
  922. set_bit(WMI_ENABLED, &ar->flag);
  923. ar->wmi = ath6kl_wmi_init(ar);
  924. if (!ar->wmi) {
  925. ath6kl_err("failed to initialize wmi\n");
  926. status = -EIO;
  927. goto ath6kl_init_done;
  928. }
  929. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  930. wlan_node_table_init(&ar->scan_table);
  931. /*
  932. * The reason we have to wait for the target here is that the
  933. * driver layer has to init BMI in order to set the host block
  934. * size.
  935. */
  936. if (ath6kl_htc_wait_target(ar->htc_target)) {
  937. status = -EIO;
  938. goto err_node_cleanup;
  939. }
  940. if (ath6kl_init_service_ep(ar)) {
  941. status = -EIO;
  942. goto err_cleanup_scatter;
  943. }
  944. /* setup access class priority mappings */
  945. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  946. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  947. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  948. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  949. /* give our connected endpoints some buffers */
  950. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  951. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  952. /* allocate some buffers that handle larger AMSDU frames */
  953. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  954. /* setup credit distribution */
  955. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  956. ath6kl_cookie_init(ar);
  957. /* start HTC */
  958. status = ath6kl_htc_start(ar->htc_target);
  959. if (status) {
  960. ath6kl_cookie_cleanup(ar);
  961. goto err_rxbuf_cleanup;
  962. }
  963. /* Wait for Wmi event to be ready */
  964. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  965. test_bit(WMI_READY,
  966. &ar->flag),
  967. WMI_TIMEOUT);
  968. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  969. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  970. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  971. status = -EIO;
  972. goto err_htc_stop;
  973. }
  974. if (!timeleft || signal_pending(current)) {
  975. ath6kl_err("wmi is not ready or wait was interrupted\n");
  976. status = -EIO;
  977. goto err_htc_stop;
  978. }
  979. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  980. /* communicate the wmi protocol verision to the target */
  981. if ((ath6kl_set_host_app_area(ar)) != 0)
  982. ath6kl_err("unable to set the host app area\n");
  983. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  984. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  985. status = ath6kl_target_config_wlan_params(ar);
  986. if (!status)
  987. goto ath6kl_init_done;
  988. err_htc_stop:
  989. ath6kl_htc_stop(ar->htc_target);
  990. err_rxbuf_cleanup:
  991. ath6kl_htc_flush_rx_buf(ar->htc_target);
  992. ath6kl_cleanup_amsdu_rxbufs(ar);
  993. err_cleanup_scatter:
  994. ath6kl_hif_cleanup_scatter(ar);
  995. err_node_cleanup:
  996. wlan_node_table_cleanup(&ar->scan_table);
  997. ath6kl_wmi_shutdown(ar->wmi);
  998. clear_bit(WMI_ENABLED, &ar->flag);
  999. ar->wmi = NULL;
  1000. ath6kl_init_done:
  1001. return status;
  1002. }
  1003. int ath6kl_core_init(struct ath6kl *ar)
  1004. {
  1005. int ret = 0;
  1006. struct ath6kl_bmi_target_info targ_info;
  1007. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1008. if (!ar->ath6kl_wq)
  1009. return -ENOMEM;
  1010. ret = ath6kl_bmi_init(ar);
  1011. if (ret)
  1012. goto err_wq;
  1013. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1014. if (ret)
  1015. goto err_bmi_cleanup;
  1016. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1017. ar->target_type = le32_to_cpu(targ_info.type);
  1018. ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1019. ret = ath6kl_configure_target(ar);
  1020. if (ret)
  1021. goto err_bmi_cleanup;
  1022. ar->htc_target = ath6kl_htc_create(ar);
  1023. if (!ar->htc_target) {
  1024. ret = -ENOMEM;
  1025. goto err_bmi_cleanup;
  1026. }
  1027. ar->aggr_cntxt = aggr_init(ar->net_dev);
  1028. if (!ar->aggr_cntxt) {
  1029. ath6kl_err("failed to initialize aggr\n");
  1030. ret = -ENOMEM;
  1031. goto err_htc_cleanup;
  1032. }
  1033. ret = ath6kl_init_upload(ar);
  1034. if (ret)
  1035. goto err_htc_cleanup;
  1036. ret = ath6kl_init(ar->net_dev);
  1037. if (ret)
  1038. goto err_htc_cleanup;
  1039. /* This runs the init function if registered */
  1040. ret = register_netdev(ar->net_dev);
  1041. if (ret) {
  1042. ath6kl_err("register_netdev failed\n");
  1043. ath6kl_destroy(ar->net_dev, 0);
  1044. return ret;
  1045. }
  1046. set_bit(NETDEV_REGISTERED, &ar->flag);
  1047. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1048. __func__, ar->net_dev->name, ar->net_dev, ar);
  1049. return ret;
  1050. err_htc_cleanup:
  1051. ath6kl_htc_cleanup(ar->htc_target);
  1052. err_bmi_cleanup:
  1053. ath6kl_bmi_cleanup(ar);
  1054. err_wq:
  1055. destroy_workqueue(ar->ath6kl_wq);
  1056. return ret;
  1057. }
  1058. void ath6kl_stop_txrx(struct ath6kl *ar)
  1059. {
  1060. struct net_device *ndev = ar->net_dev;
  1061. if (!ndev)
  1062. return;
  1063. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1064. if (down_interruptible(&ar->sem)) {
  1065. ath6kl_err("down_interruptible failed\n");
  1066. return;
  1067. }
  1068. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1069. ath6kl_stop_endpoint(ndev, false, true);
  1070. clear_bit(WLAN_ENABLED, &ar->flag);
  1071. }
  1072. /*
  1073. * We need to differentiate between the surprise and planned removal of the
  1074. * device because of the following consideration:
  1075. *
  1076. * - In case of surprise removal, the hcd already frees up the pending
  1077. * for the device and hence there is no need to unregister the function
  1078. * driver inorder to get these requests. For planned removal, the function
  1079. * driver has to explicitly unregister itself to have the hcd return all the
  1080. * pending requests before the data structures for the devices are freed up.
  1081. * Note that as per the current implementation, the function driver will
  1082. * end up releasing all the devices since there is no API to selectively
  1083. * release a particular device.
  1084. *
  1085. * - Certain commands issued to the target can be skipped for surprise
  1086. * removal since they will anyway not go through.
  1087. */
  1088. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1089. {
  1090. struct ath6kl *ar;
  1091. if (!dev || !ath6kl_priv(dev)) {
  1092. ath6kl_err("failed to get device structure\n");
  1093. return;
  1094. }
  1095. ar = ath6kl_priv(dev);
  1096. destroy_workqueue(ar->ath6kl_wq);
  1097. if (ar->htc_target)
  1098. ath6kl_htc_cleanup(ar->htc_target);
  1099. aggr_module_destroy(ar->aggr_cntxt);
  1100. ath6kl_cookie_cleanup(ar);
  1101. ath6kl_cleanup_amsdu_rxbufs(ar);
  1102. ath6kl_bmi_cleanup(ar);
  1103. if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) {
  1104. unregister_netdev(dev);
  1105. clear_bit(NETDEV_REGISTERED, &ar->flag);
  1106. }
  1107. free_netdev(dev);
  1108. wlan_node_table_cleanup(&ar->scan_table);
  1109. kfree(ar->fw_board);
  1110. kfree(ar->fw_otp);
  1111. kfree(ar->fw);
  1112. kfree(ar->fw_patch);
  1113. ath6kl_cfg80211_deinit(ar);
  1114. }