ide.h 41 KB

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  1. #ifndef _IDE_H
  2. #define _IDE_H
  3. /*
  4. * linux/include/linux/ide.h
  5. *
  6. * Copyright (C) 1994-2002 Linus Torvalds & authors
  7. */
  8. #include <linux/init.h>
  9. #include <linux/ioport.h>
  10. #include <linux/hdreg.h>
  11. #include <linux/blkdev.h>
  12. #include <linux/proc_fs.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/bitops.h>
  15. #include <linux/bio.h>
  16. #include <linux/device.h>
  17. #include <linux/pci.h>
  18. #include <linux/completion.h>
  19. #ifdef CONFIG_BLK_DEV_IDEACPI
  20. #include <acpi/acpi.h>
  21. #endif
  22. #include <asm/byteorder.h>
  23. #include <asm/system.h>
  24. #include <asm/io.h>
  25. #include <asm/mutex.h>
  26. #if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
  27. # define SUPPORT_VLB_SYNC 0
  28. #else
  29. # define SUPPORT_VLB_SYNC 1
  30. #endif
  31. /*
  32. * Used to indicate "no IRQ", should be a value that cannot be an IRQ
  33. * number.
  34. */
  35. #define IDE_NO_IRQ (-1)
  36. typedef unsigned char byte; /* used everywhere */
  37. /*
  38. * Probably not wise to fiddle with these
  39. */
  40. #define ERROR_MAX 8 /* Max read/write errors per sector */
  41. #define ERROR_RESET 3 /* Reset controller every 4th retry */
  42. #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
  43. /*
  44. * state flags
  45. */
  46. #define DMA_PIO_RETRY 1 /* retrying in PIO */
  47. #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
  48. #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
  49. /*
  50. * Definitions for accessing IDE controller registers
  51. */
  52. #define IDE_NR_PORTS (10)
  53. struct ide_io_ports {
  54. unsigned long data_addr;
  55. union {
  56. unsigned long error_addr; /* read: error */
  57. unsigned long feature_addr; /* write: feature */
  58. };
  59. unsigned long nsect_addr;
  60. unsigned long lbal_addr;
  61. unsigned long lbam_addr;
  62. unsigned long lbah_addr;
  63. unsigned long device_addr;
  64. union {
  65. unsigned long status_addr; /*  read: status  */
  66. unsigned long command_addr; /* write: command */
  67. };
  68. unsigned long ctl_addr;
  69. unsigned long irq_addr;
  70. };
  71. #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
  72. #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
  73. #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
  74. #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
  75. #define DRIVE_READY (READY_STAT | SEEK_STAT)
  76. #define BAD_CRC (ABRT_ERR | ICRC_ERR)
  77. #define SATA_NR_PORTS (3) /* 16 possible ?? */
  78. #define SATA_STATUS_OFFSET (0)
  79. #define SATA_ERROR_OFFSET (1)
  80. #define SATA_CONTROL_OFFSET (2)
  81. /*
  82. * Our Physical Region Descriptor (PRD) table should be large enough
  83. * to handle the biggest I/O request we are likely to see. Since requests
  84. * can have no more than 256 sectors, and since the typical blocksize is
  85. * two or more sectors, we could get by with a limit of 128 entries here for
  86. * the usual worst case. Most requests seem to include some contiguous blocks,
  87. * further reducing the number of table entries required.
  88. *
  89. * The driver reverts to PIO mode for individual requests that exceed
  90. * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
  91. * 100% of all crazy scenarios here is not necessary.
  92. *
  93. * As it turns out though, we must allocate a full 4KB page for this,
  94. * so the two PRD tables (ide0 & ide1) will each get half of that,
  95. * allowing each to have about 256 entries (8 bytes each) from this.
  96. */
  97. #define PRD_BYTES 8
  98. #define PRD_ENTRIES 256
  99. /*
  100. * Some more useful definitions
  101. */
  102. #define PARTN_BITS 6 /* number of minor dev bits for partitions */
  103. #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
  104. #define SECTOR_SIZE 512
  105. #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
  106. #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
  107. /*
  108. * Timeouts for various operations:
  109. */
  110. #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
  111. #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
  112. #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
  113. #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
  114. #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
  115. #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
  116. /*
  117. * Check for an interrupt and acknowledge the interrupt status
  118. */
  119. struct hwif_s;
  120. typedef int (ide_ack_intr_t)(struct hwif_s *);
  121. /*
  122. * hwif_chipset_t is used to keep track of the specific hardware
  123. * chipset used by each IDE interface, if known.
  124. */
  125. enum { ide_unknown, ide_generic, ide_pci,
  126. ide_cmd640, ide_dtc2278, ide_ali14xx,
  127. ide_qd65xx, ide_umc8672, ide_ht6560b,
  128. ide_rz1000, ide_trm290,
  129. ide_cmd646, ide_cy82c693, ide_4drives,
  130. ide_pmac, ide_acorn,
  131. ide_au1xxx, ide_palm3710
  132. };
  133. typedef u8 hwif_chipset_t;
  134. /*
  135. * Structure to hold all information about the location of this port
  136. */
  137. typedef struct hw_regs_s {
  138. union {
  139. struct ide_io_ports io_ports;
  140. unsigned long io_ports_array[IDE_NR_PORTS];
  141. };
  142. int irq; /* our irq number */
  143. ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
  144. hwif_chipset_t chipset;
  145. struct device *dev;
  146. } hw_regs_t;
  147. void ide_init_port_data(struct hwif_s *, unsigned int);
  148. void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
  149. static inline void ide_std_init_ports(hw_regs_t *hw,
  150. unsigned long io_addr,
  151. unsigned long ctl_addr)
  152. {
  153. unsigned int i;
  154. for (i = 0; i <= 7; i++)
  155. hw->io_ports_array[i] = io_addr++;
  156. hw->io_ports.ctl_addr = ctl_addr;
  157. }
  158. /* for IDE PCI controllers in legacy mode, temporary */
  159. static inline int __ide_default_irq(unsigned long base)
  160. {
  161. switch (base) {
  162. #ifdef CONFIG_IA64
  163. case 0x1f0: return isa_irq_to_vector(14);
  164. case 0x170: return isa_irq_to_vector(15);
  165. #else
  166. case 0x1f0: return 14;
  167. case 0x170: return 15;
  168. #endif
  169. }
  170. return 0;
  171. }
  172. #include <asm/ide.h>
  173. #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
  174. #undef MAX_HWIFS
  175. #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
  176. #endif
  177. /* Currently only m68k, apus and m8xx need it */
  178. #ifndef IDE_ARCH_ACK_INTR
  179. # define ide_ack_intr(hwif) (1)
  180. #endif
  181. /* Currently only Atari needs it */
  182. #ifndef IDE_ARCH_LOCK
  183. # define ide_release_lock() do {} while (0)
  184. # define ide_get_lock(hdlr, data) do {} while (0)
  185. #endif /* IDE_ARCH_LOCK */
  186. /*
  187. * Now for the data we need to maintain per-drive: ide_drive_t
  188. */
  189. #define ide_scsi 0x21
  190. #define ide_disk 0x20
  191. #define ide_optical 0x7
  192. #define ide_cdrom 0x5
  193. #define ide_tape 0x1
  194. #define ide_floppy 0x0
  195. /*
  196. * Special Driver Flags
  197. *
  198. * set_geometry : respecify drive geometry
  199. * recalibrate : seek to cyl 0
  200. * set_multmode : set multmode count
  201. * set_tune : tune interface for drive
  202. * serviced : service command
  203. * reserved : unused
  204. */
  205. typedef union {
  206. unsigned all : 8;
  207. struct {
  208. unsigned set_geometry : 1;
  209. unsigned recalibrate : 1;
  210. unsigned set_multmode : 1;
  211. unsigned set_tune : 1;
  212. unsigned serviced : 1;
  213. unsigned reserved : 3;
  214. } b;
  215. } special_t;
  216. /*
  217. * ATA-IDE Select Register, aka Device-Head
  218. *
  219. * head : always zeros here
  220. * unit : drive select number: 0/1
  221. * bit5 : always 1
  222. * lba : using LBA instead of CHS
  223. * bit7 : always 1
  224. */
  225. typedef union {
  226. unsigned all : 8;
  227. struct {
  228. #if defined(__LITTLE_ENDIAN_BITFIELD)
  229. unsigned head : 4;
  230. unsigned unit : 1;
  231. unsigned bit5 : 1;
  232. unsigned lba : 1;
  233. unsigned bit7 : 1;
  234. #elif defined(__BIG_ENDIAN_BITFIELD)
  235. unsigned bit7 : 1;
  236. unsigned lba : 1;
  237. unsigned bit5 : 1;
  238. unsigned unit : 1;
  239. unsigned head : 4;
  240. #else
  241. #error "Please fix <asm/byteorder.h>"
  242. #endif
  243. } b;
  244. } select_t, ata_select_t;
  245. /*
  246. * Status returned from various ide_ functions
  247. */
  248. typedef enum {
  249. ide_stopped, /* no drive operation was started */
  250. ide_started, /* a drive operation was started, handler was set */
  251. } ide_startstop_t;
  252. struct ide_driver_s;
  253. struct ide_settings_s;
  254. #ifdef CONFIG_BLK_DEV_IDEACPI
  255. struct ide_acpi_drive_link;
  256. struct ide_acpi_hwif_link;
  257. #endif
  258. typedef struct ide_drive_s {
  259. char name[4]; /* drive name, such as "hda" */
  260. char driver_req[10]; /* requests specific driver */
  261. struct request_queue *queue; /* request queue */
  262. struct request *rq; /* current request */
  263. struct ide_drive_s *next; /* circular list of hwgroup drives */
  264. void *driver_data; /* extra driver data */
  265. struct hd_driveid *id; /* drive model identification info */
  266. #ifdef CONFIG_IDE_PROC_FS
  267. struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
  268. struct ide_settings_s *settings;/* /proc/ide/ drive settings */
  269. #endif
  270. struct hwif_s *hwif; /* actually (ide_hwif_t *) */
  271. unsigned long sleep; /* sleep until this time */
  272. unsigned long service_start; /* time we started last request */
  273. unsigned long service_time; /* service time of last request */
  274. unsigned long timeout; /* max time to wait for irq */
  275. special_t special; /* special action flags */
  276. select_t select; /* basic drive/head select reg value */
  277. u8 keep_settings; /* restore settings after drive reset */
  278. u8 using_dma; /* disk is using dma for read/write */
  279. u8 retry_pio; /* retrying dma capable host in pio */
  280. u8 state; /* retry state */
  281. u8 waiting_for_dma; /* dma currently in progress */
  282. u8 unmask; /* okay to unmask other irqs */
  283. u8 noflush; /* don't attempt flushes */
  284. u8 dsc_overlap; /* DSC overlap */
  285. u8 nice1; /* give potential excess bandwidth */
  286. unsigned present : 1; /* drive is physically present */
  287. unsigned dead : 1; /* device ejected hint */
  288. unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
  289. unsigned noprobe : 1; /* from: hdx=noprobe */
  290. unsigned removable : 1; /* 1 if need to do check_media_change */
  291. unsigned attach : 1; /* needed for removable devices */
  292. unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
  293. unsigned no_unmask : 1; /* disallow setting unmask bit */
  294. unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
  295. unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
  296. unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
  297. unsigned nodma : 1; /* disallow DMA */
  298. unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
  299. unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
  300. unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
  301. unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
  302. unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
  303. unsigned post_reset : 1;
  304. unsigned udma33_warned : 1;
  305. u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
  306. u8 quirk_list; /* considered quirky, set for a specific host */
  307. u8 init_speed; /* transfer rate set at boot */
  308. u8 current_speed; /* current transfer rate set */
  309. u8 desired_speed; /* desired transfer rate set */
  310. u8 dn; /* now wide spread use */
  311. u8 wcache; /* status of write cache */
  312. u8 acoustic; /* acoustic management */
  313. u8 media; /* disk, cdrom, tape, floppy, ... */
  314. u8 ctl; /* "normal" value for Control register */
  315. u8 ready_stat; /* min status value for drive ready */
  316. u8 mult_count; /* current multiple sector setting */
  317. u8 mult_req; /* requested multiple sector setting */
  318. u8 tune_req; /* requested drive tuning setting */
  319. u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
  320. u8 bad_wstat; /* used for ignoring WRERR_STAT */
  321. u8 nowerr; /* used for ignoring WRERR_STAT */
  322. u8 sect0; /* offset of first sector for DM6:DDO */
  323. u8 head; /* "real" number of heads */
  324. u8 sect; /* "real" sectors per track */
  325. u8 bios_head; /* BIOS/fdisk/LILO number of heads */
  326. u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
  327. unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
  328. unsigned int cyl; /* "real" number of cyls */
  329. unsigned int drive_data; /* used by set_pio_mode/selectproc */
  330. unsigned int failures; /* current failure count */
  331. unsigned int max_failures; /* maximum allowed failure count */
  332. u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
  333. u64 capacity64; /* total number of sectors */
  334. int lun; /* logical unit */
  335. int crc_count; /* crc counter to reduce drive speed */
  336. #ifdef CONFIG_BLK_DEV_IDEACPI
  337. struct ide_acpi_drive_link *acpidata;
  338. #endif
  339. struct list_head list;
  340. struct device gendev;
  341. struct completion gendev_rel_comp; /* to deal with device release() */
  342. } ide_drive_t;
  343. #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
  344. #define IDE_CHIPSET_PCI_MASK \
  345. ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
  346. #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
  347. struct ide_port_info;
  348. struct ide_port_ops {
  349. /* host specific initialization of devices on a port */
  350. void (*port_init_devs)(struct hwif_s *);
  351. /* routine to program host for PIO mode */
  352. void (*set_pio_mode)(ide_drive_t *, const u8);
  353. /* routine to program host for DMA mode */
  354. void (*set_dma_mode)(ide_drive_t *, const u8);
  355. /* tweaks hardware to select drive */
  356. void (*selectproc)(ide_drive_t *);
  357. /* chipset polling based on hba specifics */
  358. int (*reset_poll)(ide_drive_t *);
  359. /* chipset specific changes to default for device-hba resets */
  360. void (*pre_reset)(ide_drive_t *);
  361. /* routine to reset controller after a disk reset */
  362. void (*resetproc)(ide_drive_t *);
  363. /* special host masking for drive selection */
  364. void (*maskproc)(ide_drive_t *, int);
  365. /* check host's drive quirk list */
  366. void (*quirkproc)(ide_drive_t *);
  367. u8 (*mdma_filter)(ide_drive_t *);
  368. u8 (*udma_filter)(ide_drive_t *);
  369. u8 (*cable_detect)(struct hwif_s *);
  370. };
  371. struct ide_dma_ops {
  372. void (*dma_host_set)(struct ide_drive_s *, int);
  373. int (*dma_setup)(struct ide_drive_s *);
  374. void (*dma_exec_cmd)(struct ide_drive_s *, u8);
  375. void (*dma_start)(struct ide_drive_s *);
  376. int (*dma_end)(struct ide_drive_s *);
  377. int (*dma_test_irq)(struct ide_drive_s *);
  378. void (*dma_lost_irq)(struct ide_drive_s *);
  379. void (*dma_timeout)(struct ide_drive_s *);
  380. };
  381. struct ide_task_s;
  382. typedef struct hwif_s {
  383. struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
  384. struct hwif_s *mate; /* other hwif from same PCI chip */
  385. struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
  386. struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
  387. char name[6]; /* name of interface, eg. "ide0" */
  388. struct ide_io_ports io_ports;
  389. unsigned long sata_scr[SATA_NR_PORTS];
  390. ide_drive_t drives[MAX_DRIVES]; /* drive info */
  391. u8 major; /* our major number */
  392. u8 index; /* 0 for ide0; 1 for ide1; ... */
  393. u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
  394. u8 bus_state; /* power state of the IDE bus */
  395. u32 host_flags;
  396. u8 pio_mask;
  397. u8 ultra_mask;
  398. u8 mwdma_mask;
  399. u8 swdma_mask;
  400. u8 cbl; /* cable type */
  401. hwif_chipset_t chipset; /* sub-module for tuning.. */
  402. struct device *dev;
  403. ide_ack_intr_t *ack_intr;
  404. void (*rw_disk)(ide_drive_t *, struct request *);
  405. const struct ide_port_ops *port_ops;
  406. const struct ide_dma_ops *dma_ops;
  407. void (*tf_load)(ide_drive_t *, struct ide_task_s *);
  408. void (*tf_read)(ide_drive_t *, struct ide_task_s *);
  409. void (*input_data)(ide_drive_t *, struct request *, void *, unsigned);
  410. void (*output_data)(ide_drive_t *, struct request *, void *, unsigned);
  411. void (*ide_dma_clear_irq)(ide_drive_t *drive);
  412. void (*OUTB)(u8 addr, unsigned long port);
  413. void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
  414. u8 (*INB)(unsigned long port);
  415. /* dma physical region descriptor table (cpu view) */
  416. unsigned int *dmatable_cpu;
  417. /* dma physical region descriptor table (dma view) */
  418. dma_addr_t dmatable_dma;
  419. /* Scatter-gather list used to build the above */
  420. struct scatterlist *sg_table;
  421. int sg_max_nents; /* Maximum number of entries in it */
  422. int sg_nents; /* Current number of entries in it */
  423. int sg_dma_direction; /* dma transfer direction */
  424. /* data phase of the active command (currently only valid for PIO/DMA) */
  425. int data_phase;
  426. unsigned int nsect;
  427. unsigned int nleft;
  428. struct scatterlist *cursg;
  429. unsigned int cursg_ofs;
  430. int rqsize; /* max sectors per request */
  431. int irq; /* our irq number */
  432. unsigned long dma_base; /* base addr for dma ports */
  433. unsigned long dma_command; /* dma command register */
  434. unsigned long dma_status; /* dma status register */
  435. unsigned long config_data; /* for use by chipset-specific code */
  436. unsigned long select_data; /* for use by chipset-specific code */
  437. unsigned long extra_base; /* extra addr for dma ports */
  438. unsigned extra_ports; /* number of extra dma ports */
  439. unsigned present : 1; /* this interface exists */
  440. unsigned serialized : 1; /* serialized all channel operation */
  441. unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
  442. unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
  443. unsigned mmio : 1; /* host uses MMIO */
  444. struct device gendev;
  445. struct device *portdev;
  446. struct completion gendev_rel_comp; /* To deal with device release() */
  447. void *hwif_data; /* extra hwif data */
  448. unsigned dma;
  449. #ifdef CONFIG_BLK_DEV_IDEACPI
  450. struct ide_acpi_hwif_link *acpidata;
  451. #endif
  452. } ____cacheline_internodealigned_in_smp ide_hwif_t;
  453. /*
  454. * internal ide interrupt handler type
  455. */
  456. typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
  457. typedef int (ide_expiry_t)(ide_drive_t *);
  458. /* used by ide-cd, ide-floppy, etc. */
  459. typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
  460. typedef struct hwgroup_s {
  461. /* irq handler, if active */
  462. ide_startstop_t (*handler)(ide_drive_t *);
  463. /* BOOL: protects all fields below */
  464. volatile int busy;
  465. /* BOOL: wake us up on timer expiry */
  466. unsigned int sleeping : 1;
  467. /* BOOL: polling active & poll_timeout field valid */
  468. unsigned int polling : 1;
  469. /* BOOL: in a polling reset situation. Must not trigger another reset yet */
  470. unsigned int resetting : 1;
  471. /* current drive */
  472. ide_drive_t *drive;
  473. /* ptr to current hwif in linked-list */
  474. ide_hwif_t *hwif;
  475. /* current request */
  476. struct request *rq;
  477. /* failsafe timer */
  478. struct timer_list timer;
  479. /* timeout value during long polls */
  480. unsigned long poll_timeout;
  481. /* queried upon timeouts */
  482. int (*expiry)(ide_drive_t *);
  483. int req_gen;
  484. int req_gen_timer;
  485. } ide_hwgroup_t;
  486. typedef struct ide_driver_s ide_driver_t;
  487. extern struct mutex ide_setting_mtx;
  488. int set_io_32bit(ide_drive_t *, int);
  489. int set_pio_mode(ide_drive_t *, int);
  490. int set_using_dma(ide_drive_t *, int);
  491. /* ATAPI packet command flags */
  492. enum {
  493. /* set when an error is considered normal - no retry (ide-tape) */
  494. PC_FLAG_ABORT = (1 << 0),
  495. PC_FLAG_SUPPRESS_ERROR = (1 << 1),
  496. PC_FLAG_WAIT_FOR_DSC = (1 << 2),
  497. PC_FLAG_DMA_OK = (1 << 3),
  498. PC_FLAG_DMA_RECOMMENDED = (1 << 4),
  499. PC_FLAG_DMA_IN_PROGRESS = (1 << 5),
  500. PC_FLAG_DMA_ERROR = (1 << 6),
  501. PC_FLAG_WRITING = (1 << 7),
  502. /* command timed out */
  503. PC_FLAG_TIMEDOUT = (1 << 8),
  504. };
  505. struct ide_atapi_pc {
  506. /* actual packet bytes */
  507. u8 c[12];
  508. /* incremented on each retry */
  509. int retries;
  510. int error;
  511. /* bytes to transfer */
  512. int req_xfer;
  513. /* bytes actually transferred */
  514. int xferred;
  515. /* data buffer */
  516. u8 *buf;
  517. /* current buffer position */
  518. u8 *cur_pos;
  519. int buf_size;
  520. /* missing/available data on the current buffer */
  521. int b_count;
  522. /* the corresponding request */
  523. struct request *rq;
  524. unsigned long flags;
  525. /*
  526. * those are more or less driver-specific and some of them are subject
  527. * to change/removal later.
  528. */
  529. u8 pc_buf[256];
  530. void (*idefloppy_callback) (ide_drive_t *);
  531. ide_startstop_t (*idetape_callback) (ide_drive_t *);
  532. /* idetape only */
  533. struct idetape_bh *bh;
  534. char *b_data;
  535. /* idescsi only for now */
  536. struct scatterlist *sg;
  537. unsigned int sg_cnt;
  538. struct scsi_cmnd *scsi_cmd;
  539. void (*done) (struct scsi_cmnd *);
  540. unsigned long timeout;
  541. };
  542. #ifdef CONFIG_IDE_PROC_FS
  543. /*
  544. * configurable drive settings
  545. */
  546. #define TYPE_INT 0
  547. #define TYPE_BYTE 1
  548. #define TYPE_SHORT 2
  549. #define SETTING_READ (1 << 0)
  550. #define SETTING_WRITE (1 << 1)
  551. #define SETTING_RW (SETTING_READ | SETTING_WRITE)
  552. typedef int (ide_procset_t)(ide_drive_t *, int);
  553. typedef struct ide_settings_s {
  554. char *name;
  555. int rw;
  556. int data_type;
  557. int min;
  558. int max;
  559. int mul_factor;
  560. int div_factor;
  561. void *data;
  562. ide_procset_t *set;
  563. int auto_remove;
  564. struct ide_settings_s *next;
  565. } ide_settings_t;
  566. int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
  567. /*
  568. * /proc/ide interface
  569. */
  570. typedef struct {
  571. const char *name;
  572. mode_t mode;
  573. read_proc_t *read_proc;
  574. write_proc_t *write_proc;
  575. } ide_proc_entry_t;
  576. void proc_ide_create(void);
  577. void proc_ide_destroy(void);
  578. void ide_proc_register_port(ide_hwif_t *);
  579. void ide_proc_port_register_devices(ide_hwif_t *);
  580. void ide_proc_unregister_device(ide_drive_t *);
  581. void ide_proc_unregister_port(ide_hwif_t *);
  582. void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
  583. void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
  584. void ide_add_generic_settings(ide_drive_t *);
  585. read_proc_t proc_ide_read_capacity;
  586. read_proc_t proc_ide_read_geometry;
  587. /*
  588. * Standard exit stuff:
  589. */
  590. #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
  591. { \
  592. len -= off; \
  593. if (len < count) { \
  594. *eof = 1; \
  595. if (len <= 0) \
  596. return 0; \
  597. } else \
  598. len = count; \
  599. *start = page + off; \
  600. return len; \
  601. }
  602. #else
  603. static inline void proc_ide_create(void) { ; }
  604. static inline void proc_ide_destroy(void) { ; }
  605. static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
  606. static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
  607. static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
  608. static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
  609. static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
  610. static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
  611. static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
  612. #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
  613. #endif
  614. /*
  615. * Power Management step value (rq->pm->pm_step).
  616. *
  617. * The step value starts at 0 (ide_pm_state_start_suspend) for a
  618. * suspend operation or 1000 (ide_pm_state_start_resume) for a
  619. * resume operation.
  620. *
  621. * For each step, the core calls the subdriver start_power_step() first.
  622. * This can return:
  623. * - ide_stopped : In this case, the core calls us back again unless
  624. * step have been set to ide_power_state_completed.
  625. * - ide_started : In this case, the channel is left busy until an
  626. * async event (interrupt) occurs.
  627. * Typically, start_power_step() will issue a taskfile request with
  628. * do_rw_taskfile().
  629. *
  630. * Upon reception of the interrupt, the core will call complete_power_step()
  631. * with the error code if any. This routine should update the step value
  632. * and return. It should not start a new request. The core will call
  633. * start_power_step for the new step value, unless step have been set to
  634. * ide_power_state_completed.
  635. *
  636. * Subdrivers are expected to define their own additional power
  637. * steps from 1..999 for suspend and from 1001..1999 for resume,
  638. * other values are reserved for future use.
  639. */
  640. enum {
  641. ide_pm_state_completed = -1,
  642. ide_pm_state_start_suspend = 0,
  643. ide_pm_state_start_resume = 1000,
  644. };
  645. /*
  646. * Subdrivers support.
  647. *
  648. * The gendriver.owner field should be set to the module owner of this driver.
  649. * The gendriver.name field should be set to the name of this driver
  650. */
  651. struct ide_driver_s {
  652. const char *version;
  653. u8 media;
  654. unsigned supports_dsc_overlap : 1;
  655. ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
  656. int (*end_request)(ide_drive_t *, int, int);
  657. ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
  658. ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
  659. struct device_driver gen_driver;
  660. int (*probe)(ide_drive_t *);
  661. void (*remove)(ide_drive_t *);
  662. void (*resume)(ide_drive_t *);
  663. void (*shutdown)(ide_drive_t *);
  664. #ifdef CONFIG_IDE_PROC_FS
  665. ide_proc_entry_t *proc;
  666. #endif
  667. };
  668. #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
  669. int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
  670. /*
  671. * ide_hwifs[] is the master data structure used to keep track
  672. * of just about everything in ide.c. Whenever possible, routines
  673. * should be using pointers to a drive (ide_drive_t *) or
  674. * pointers to a hwif (ide_hwif_t *), rather than indexing this
  675. * structure directly (the allocation/layout may change!).
  676. *
  677. */
  678. #ifndef _IDE_C
  679. extern ide_hwif_t ide_hwifs[]; /* master data repository */
  680. #endif
  681. extern int ide_noacpi;
  682. extern int ide_acpigtf;
  683. extern int ide_acpionboot;
  684. extern int noautodma;
  685. extern int ide_vlb_clk;
  686. extern int ide_pci_clk;
  687. ide_hwif_t *ide_find_port_slot(const struct ide_port_info *);
  688. static inline ide_hwif_t *ide_find_port(void)
  689. {
  690. return ide_find_port_slot(NULL);
  691. }
  692. extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
  693. int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
  694. int uptodate, int nr_sectors);
  695. extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
  696. void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
  697. ide_expiry_t *);
  698. void ide_execute_pkt_cmd(ide_drive_t *);
  699. void ide_pad_transfer(ide_drive_t *, int, int);
  700. ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
  701. ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
  702. ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
  703. extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
  704. extern void ide_fix_driveid(struct hd_driveid *);
  705. extern void ide_fixstring(u8 *, const int, const int);
  706. int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
  707. extern ide_startstop_t ide_do_reset (ide_drive_t *);
  708. /*
  709. * "action" parameter type for ide_do_drive_cmd() below.
  710. */
  711. typedef enum {
  712. ide_wait, /* insert rq at end of list, and wait for it */
  713. ide_preempt, /* insert rq in front of current request */
  714. ide_head_wait, /* insert rq in front of current request and wait for it */
  715. ide_end /* insert rq at end of list, but don't wait for it */
  716. } ide_action_t;
  717. extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
  718. extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
  719. enum {
  720. IDE_TFLAG_LBA48 = (1 << 0),
  721. IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
  722. IDE_TFLAG_FLAGGED = (1 << 2),
  723. IDE_TFLAG_OUT_DATA = (1 << 3),
  724. IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
  725. IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
  726. IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
  727. IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
  728. IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
  729. IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
  730. IDE_TFLAG_OUT_HOB_NSECT |
  731. IDE_TFLAG_OUT_HOB_LBAL |
  732. IDE_TFLAG_OUT_HOB_LBAM |
  733. IDE_TFLAG_OUT_HOB_LBAH,
  734. IDE_TFLAG_OUT_FEATURE = (1 << 9),
  735. IDE_TFLAG_OUT_NSECT = (1 << 10),
  736. IDE_TFLAG_OUT_LBAL = (1 << 11),
  737. IDE_TFLAG_OUT_LBAM = (1 << 12),
  738. IDE_TFLAG_OUT_LBAH = (1 << 13),
  739. IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
  740. IDE_TFLAG_OUT_NSECT |
  741. IDE_TFLAG_OUT_LBAL |
  742. IDE_TFLAG_OUT_LBAM |
  743. IDE_TFLAG_OUT_LBAH,
  744. IDE_TFLAG_OUT_DEVICE = (1 << 14),
  745. IDE_TFLAG_WRITE = (1 << 15),
  746. IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
  747. IDE_TFLAG_IN_DATA = (1 << 17),
  748. IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
  749. IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
  750. IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
  751. IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
  752. IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
  753. IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
  754. IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
  755. IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
  756. IDE_TFLAG_IN_HOB_LBAM |
  757. IDE_TFLAG_IN_HOB_LBAH,
  758. IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
  759. IDE_TFLAG_IN_HOB_NSECT |
  760. IDE_TFLAG_IN_HOB_LBA,
  761. IDE_TFLAG_IN_NSECT = (1 << 25),
  762. IDE_TFLAG_IN_LBAL = (1 << 26),
  763. IDE_TFLAG_IN_LBAM = (1 << 27),
  764. IDE_TFLAG_IN_LBAH = (1 << 28),
  765. IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
  766. IDE_TFLAG_IN_LBAM |
  767. IDE_TFLAG_IN_LBAH,
  768. IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
  769. IDE_TFLAG_IN_LBA,
  770. IDE_TFLAG_IN_DEVICE = (1 << 29),
  771. IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
  772. IDE_TFLAG_IN_HOB,
  773. IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
  774. IDE_TFLAG_IN_TF,
  775. IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
  776. IDE_TFLAG_IN_DEVICE,
  777. /* force 16-bit I/O operations */
  778. IDE_TFLAG_IO_16BIT = (1 << 30),
  779. /* ide_task_t was allocated using kmalloc() */
  780. IDE_TFLAG_DYN = (1 << 31),
  781. };
  782. struct ide_taskfile {
  783. u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
  784. u8 hob_feature; /* 1-5: additional data to support LBA48 */
  785. u8 hob_nsect;
  786. u8 hob_lbal;
  787. u8 hob_lbam;
  788. u8 hob_lbah;
  789. u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
  790. union { /*  7: */
  791. u8 error; /* read: error */
  792. u8 feature; /* write: feature */
  793. };
  794. u8 nsect; /* 8: number of sectors */
  795. u8 lbal; /* 9: LBA low */
  796. u8 lbam; /* 10: LBA mid */
  797. u8 lbah; /* 11: LBA high */
  798. u8 device; /* 12: device select */
  799. union { /* 13: */
  800. u8 status; /*  read: status  */
  801. u8 command; /* write: command */
  802. };
  803. };
  804. typedef struct ide_task_s {
  805. union {
  806. struct ide_taskfile tf;
  807. u8 tf_array[14];
  808. };
  809. u32 tf_flags;
  810. int data_phase;
  811. struct request *rq; /* copy of request */
  812. void *special; /* valid_t generally */
  813. } ide_task_t;
  814. void ide_tf_dump(const char *, struct ide_taskfile *);
  815. extern void SELECT_DRIVE(ide_drive_t *);
  816. extern int drive_is_ready(ide_drive_t *);
  817. void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
  818. ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
  819. void task_end_request(ide_drive_t *, struct request *, u8);
  820. int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
  821. int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
  822. int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
  823. int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
  824. int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
  825. extern int ide_driveid_update(ide_drive_t *);
  826. extern int ide_config_drive_speed(ide_drive_t *, u8);
  827. extern u8 eighty_ninty_three (ide_drive_t *);
  828. extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
  829. extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
  830. extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
  831. extern int ide_spin_wait_hwgroup(ide_drive_t *);
  832. extern void ide_timer_expiry(unsigned long);
  833. extern irqreturn_t ide_intr(int irq, void *dev_id);
  834. extern void do_ide_request(struct request_queue *);
  835. void ide_init_disk(struct gendisk *, ide_drive_t *);
  836. #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
  837. extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
  838. #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
  839. #else
  840. #define ide_pci_register_driver(d) pci_register_driver(d)
  841. #endif
  842. void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
  843. void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
  844. #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
  845. int ide_pci_set_master(struct pci_dev *, const char *);
  846. unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
  847. int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
  848. #else
  849. static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
  850. const struct ide_port_info *d)
  851. {
  852. return -EINVAL;
  853. }
  854. #endif
  855. extern void default_hwif_iops(ide_hwif_t *);
  856. extern void default_hwif_mmiops(ide_hwif_t *);
  857. extern void default_hwif_transport(ide_hwif_t *);
  858. typedef struct ide_pci_enablebit_s {
  859. u8 reg; /* byte pci reg holding the enable-bit */
  860. u8 mask; /* mask to isolate the enable-bit */
  861. u8 val; /* value of masked reg when "enabled" */
  862. } ide_pci_enablebit_t;
  863. enum {
  864. /* Uses ISA control ports not PCI ones. */
  865. IDE_HFLAG_ISA_PORTS = (1 << 0),
  866. /* single port device */
  867. IDE_HFLAG_SINGLE = (1 << 1),
  868. /* don't use legacy PIO blacklist */
  869. IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
  870. /* set for the second port of QD65xx */
  871. IDE_HFLAG_QD_2ND_PORT = (1 << 3),
  872. /* use PIO8/9 for prefetch off/on */
  873. IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
  874. /* use PIO6/7 for fast-devsel off/on */
  875. IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
  876. /* use 100-102 and 200-202 PIO values to set DMA modes */
  877. IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
  878. /*
  879. * keep DMA setting when programming PIO mode, may be used only
  880. * for hosts which have separate PIO and DMA timings (ie. PMAC)
  881. */
  882. IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
  883. /* program host for the transfer mode after programming device */
  884. IDE_HFLAG_POST_SET_MODE = (1 << 8),
  885. /* don't program host/device for the transfer mode ("smart" hosts) */
  886. IDE_HFLAG_NO_SET_MODE = (1 << 9),
  887. /* trust BIOS for programming chipset/device for DMA */
  888. IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
  889. /* host is CS5510/CS5520 */
  890. IDE_HFLAG_CS5520 = (1 << 11),
  891. /* ATAPI DMA is unsupported */
  892. IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
  893. /* set if host is a "non-bootable" controller */
  894. IDE_HFLAG_NON_BOOTABLE = (1 << 13),
  895. /* host doesn't support DMA */
  896. IDE_HFLAG_NO_DMA = (1 << 14),
  897. /* check if host is PCI IDE device before allowing DMA */
  898. IDE_HFLAG_NO_AUTODMA = (1 << 15),
  899. /* host uses MMIO */
  900. IDE_HFLAG_MMIO = (1 << 16),
  901. /* no LBA48 */
  902. IDE_HFLAG_NO_LBA48 = (1 << 17),
  903. /* no LBA48 DMA */
  904. IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
  905. /* data FIFO is cleared by an error */
  906. IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
  907. /* serialize ports */
  908. IDE_HFLAG_SERIALIZE = (1 << 20),
  909. /* use legacy IRQs */
  910. IDE_HFLAG_LEGACY_IRQS = (1 << 21),
  911. /* force use of legacy IRQs */
  912. IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
  913. /* limit LBA48 requests to 256 sectors */
  914. IDE_HFLAG_RQSIZE_256 = (1 << 23),
  915. /* use 32-bit I/O ops */
  916. IDE_HFLAG_IO_32BIT = (1 << 24),
  917. /* unmask IRQs */
  918. IDE_HFLAG_UNMASK_IRQS = (1 << 25),
  919. IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
  920. /* serialize ports if DMA is possible (for sl82c105) */
  921. IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
  922. /* force host out of "simplex" mode */
  923. IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
  924. /* DSC overlap is unsupported */
  925. IDE_HFLAG_NO_DSC = (1 << 29),
  926. /* never use 32-bit I/O ops */
  927. IDE_HFLAG_NO_IO_32BIT = (1 << 30),
  928. /* never unmask IRQs */
  929. IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
  930. /* host uses VDMA (disabled for now) */
  931. IDE_HFLAG_VDMA = 0,
  932. };
  933. #ifdef CONFIG_BLK_DEV_OFFBOARD
  934. # define IDE_HFLAG_OFF_BOARD 0
  935. #else
  936. # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
  937. #endif
  938. struct ide_port_info {
  939. char *name;
  940. unsigned int (*init_chipset)(struct pci_dev *, const char *);
  941. void (*init_iops)(ide_hwif_t *);
  942. void (*init_hwif)(ide_hwif_t *);
  943. int (*init_dma)(ide_hwif_t *,
  944. const struct ide_port_info *);
  945. const struct ide_port_ops *port_ops;
  946. const struct ide_dma_ops *dma_ops;
  947. ide_pci_enablebit_t enablebits[2];
  948. hwif_chipset_t chipset;
  949. u32 host_flags;
  950. u8 pio_mask;
  951. u8 swdma_mask;
  952. u8 mwdma_mask;
  953. u8 udma_mask;
  954. };
  955. int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
  956. int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
  957. void ide_map_sg(ide_drive_t *, struct request *);
  958. void ide_init_sg_cmd(ide_drive_t *, struct request *);
  959. #define BAD_DMA_DRIVE 0
  960. #define GOOD_DMA_DRIVE 1
  961. struct drive_list_entry {
  962. const char *id_model;
  963. const char *id_firmware;
  964. };
  965. int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
  966. #ifdef CONFIG_BLK_DEV_IDEDMA
  967. int __ide_dma_bad_drive(ide_drive_t *);
  968. int ide_id_dma_bug(ide_drive_t *);
  969. u8 ide_find_dma_mode(ide_drive_t *, u8);
  970. static inline u8 ide_max_dma_mode(ide_drive_t *drive)
  971. {
  972. return ide_find_dma_mode(drive, XFER_UDMA_6);
  973. }
  974. void ide_dma_off_quietly(ide_drive_t *);
  975. void ide_dma_off(ide_drive_t *);
  976. void ide_dma_on(ide_drive_t *);
  977. int ide_set_dma(ide_drive_t *);
  978. void ide_check_dma_crc(ide_drive_t *);
  979. ide_startstop_t ide_dma_intr(ide_drive_t *);
  980. int ide_build_sglist(ide_drive_t *, struct request *);
  981. void ide_destroy_dmatable(ide_drive_t *);
  982. #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
  983. extern int ide_build_dmatable(ide_drive_t *, struct request *);
  984. int ide_allocate_dma_engine(ide_hwif_t *);
  985. void ide_release_dma_engine(ide_hwif_t *);
  986. void ide_setup_dma(ide_hwif_t *, unsigned long);
  987. void ide_dma_host_set(ide_drive_t *, int);
  988. extern int ide_dma_setup(ide_drive_t *);
  989. void ide_dma_exec_cmd(ide_drive_t *, u8);
  990. extern void ide_dma_start(ide_drive_t *);
  991. extern int __ide_dma_end(ide_drive_t *);
  992. int ide_dma_test_irq(ide_drive_t *);
  993. extern void ide_dma_lost_irq(ide_drive_t *);
  994. extern void ide_dma_timeout(ide_drive_t *);
  995. #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
  996. #else
  997. static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
  998. static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
  999. static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
  1000. static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
  1001. static inline void ide_dma_off(ide_drive_t *drive) { ; }
  1002. static inline void ide_dma_on(ide_drive_t *drive) { ; }
  1003. static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
  1004. static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
  1005. static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
  1006. #endif /* CONFIG_BLK_DEV_IDEDMA */
  1007. #ifndef CONFIG_BLK_DEV_IDEDMA_SFF
  1008. static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
  1009. #endif
  1010. #ifdef CONFIG_BLK_DEV_IDEACPI
  1011. extern int ide_acpi_exec_tfs(ide_drive_t *drive);
  1012. extern void ide_acpi_get_timing(ide_hwif_t *hwif);
  1013. extern void ide_acpi_push_timing(ide_hwif_t *hwif);
  1014. extern void ide_acpi_init(ide_hwif_t *hwif);
  1015. void ide_acpi_port_init_devices(ide_hwif_t *);
  1016. extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
  1017. #else
  1018. static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
  1019. static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
  1020. static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
  1021. static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
  1022. static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
  1023. static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
  1024. #endif
  1025. void ide_remove_port_from_hwgroup(ide_hwif_t *);
  1026. void ide_unregister(ide_hwif_t *);
  1027. void ide_register_region(struct gendisk *);
  1028. void ide_unregister_region(struct gendisk *);
  1029. void ide_undecoded_slave(ide_drive_t *);
  1030. void ide_port_apply_params(ide_hwif_t *);
  1031. int ide_device_add_all(u8 *idx, const struct ide_port_info *);
  1032. int ide_device_add(u8 idx[4], const struct ide_port_info *);
  1033. int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
  1034. void ide_port_unregister_devices(ide_hwif_t *);
  1035. void ide_port_scan(ide_hwif_t *);
  1036. static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
  1037. {
  1038. return hwif->hwif_data;
  1039. }
  1040. static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
  1041. {
  1042. hwif->hwif_data = data;
  1043. }
  1044. const char *ide_xfer_verbose(u8 mode);
  1045. extern void ide_toggle_bounce(ide_drive_t *drive, int on);
  1046. extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
  1047. static inline int ide_dev_has_iordy(struct hd_driveid *id)
  1048. {
  1049. return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
  1050. }
  1051. static inline int ide_dev_is_sata(struct hd_driveid *id)
  1052. {
  1053. /*
  1054. * See if word 93 is 0 AND drive is at least ATA-5 compatible
  1055. * verifying that word 80 by casting it to a signed type --
  1056. * this trick allows us to filter out the reserved values of
  1057. * 0x0000 and 0xffff along with the earlier ATA revisions...
  1058. */
  1059. if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
  1060. return 1;
  1061. return 0;
  1062. }
  1063. u64 ide_get_lba_addr(struct ide_taskfile *, int);
  1064. u8 ide_dump_status(ide_drive_t *, const char *, u8);
  1065. typedef struct ide_pio_timings_s {
  1066. int setup_time; /* Address setup (ns) minimum */
  1067. int active_time; /* Active pulse (ns) minimum */
  1068. int cycle_time; /* Cycle time (ns) minimum = */
  1069. /* active + recovery (+ setup for some chips) */
  1070. } ide_pio_timings_t;
  1071. unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
  1072. u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
  1073. extern const ide_pio_timings_t ide_pio_timings[6];
  1074. int ide_set_pio_mode(ide_drive_t *, u8);
  1075. int ide_set_dma_mode(ide_drive_t *, u8);
  1076. void ide_set_pio(ide_drive_t *, u8);
  1077. static inline void ide_set_max_pio(ide_drive_t *drive)
  1078. {
  1079. ide_set_pio(drive, 255);
  1080. }
  1081. extern spinlock_t ide_lock;
  1082. extern struct mutex ide_cfg_mtx;
  1083. /*
  1084. * Structure locking:
  1085. *
  1086. * ide_cfg_mtx and ide_lock together protect changes to
  1087. * ide_hwif_t->{next,hwgroup}
  1088. * ide_drive_t->next
  1089. *
  1090. * ide_hwgroup_t->busy: ide_lock
  1091. * ide_hwgroup_t->hwif: ide_lock
  1092. * ide_hwif_t->mate: constant, no locking
  1093. * ide_drive_t->hwif: constant, no locking
  1094. */
  1095. #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
  1096. extern struct bus_type ide_bus_type;
  1097. extern struct class *ide_port_class;
  1098. /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
  1099. #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
  1100. /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
  1101. #define ide_id_has_flush_cache_ext(id) \
  1102. (((id)->cfs_enable_2 & 0x2400) == 0x2400)
  1103. static inline void ide_dump_identify(u8 *id)
  1104. {
  1105. print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
  1106. }
  1107. static inline int hwif_to_node(ide_hwif_t *hwif)
  1108. {
  1109. struct pci_dev *dev = to_pci_dev(hwif->dev);
  1110. return hwif->dev ? pcibus_to_node(dev->bus) : -1;
  1111. }
  1112. static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
  1113. {
  1114. ide_hwif_t *hwif = HWIF(drive);
  1115. return &hwif->drives[(drive->dn ^ 1) & 1];
  1116. }
  1117. static inline void ide_set_irq(ide_drive_t *drive, int on)
  1118. {
  1119. ide_hwif_t *hwif = drive->hwif;
  1120. hwif->OUTB(drive->ctl | (on ? 0 : 2), hwif->io_ports.ctl_addr);
  1121. }
  1122. static inline u8 ide_read_status(ide_drive_t *drive)
  1123. {
  1124. ide_hwif_t *hwif = drive->hwif;
  1125. return hwif->INB(hwif->io_ports.status_addr);
  1126. }
  1127. static inline u8 ide_read_altstatus(ide_drive_t *drive)
  1128. {
  1129. ide_hwif_t *hwif = drive->hwif;
  1130. return hwif->INB(hwif->io_ports.ctl_addr);
  1131. }
  1132. static inline u8 ide_read_error(ide_drive_t *drive)
  1133. {
  1134. ide_hwif_t *hwif = drive->hwif;
  1135. return hwif->INB(hwif->io_ports.error_addr);
  1136. }
  1137. #endif /* _IDE_H */