tegra_spdif.c 8.6 KB

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  1. /*
  2. * tegra_spdif.c - Tegra SPDIF driver
  3. *
  4. * Author: Stephen Warren <swarren@nvidia.com>
  5. * Copyright (C) 2011-2012 - NVIDIA, Inc.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19. * 02110-1301 USA
  20. *
  21. */
  22. #include <linux/clk.h>
  23. #include <linux/module.h>
  24. #include <linux/debugfs.h>
  25. #include <linux/device.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/seq_file.h>
  28. #include <linux/slab.h>
  29. #include <linux/io.h>
  30. #include <mach/iomap.h>
  31. #include <sound/core.h>
  32. #include <sound/pcm.h>
  33. #include <sound/pcm_params.h>
  34. #include <sound/soc.h>
  35. #include "tegra_spdif.h"
  36. #define DRV_NAME "tegra-spdif"
  37. static inline void tegra_spdif_write(struct tegra_spdif *spdif, u32 reg,
  38. u32 val)
  39. {
  40. __raw_writel(val, spdif->regs + reg);
  41. }
  42. static inline u32 tegra_spdif_read(struct tegra_spdif *spdif, u32 reg)
  43. {
  44. return __raw_readl(spdif->regs + reg);
  45. }
  46. #ifdef CONFIG_DEBUG_FS
  47. static int tegra_spdif_show(struct seq_file *s, void *unused)
  48. {
  49. #define REG(r) { r, #r }
  50. static const struct {
  51. int offset;
  52. const char *name;
  53. } regs[] = {
  54. REG(TEGRA_SPDIF_CTRL),
  55. REG(TEGRA_SPDIF_STATUS),
  56. REG(TEGRA_SPDIF_STROBE_CTRL),
  57. REG(TEGRA_SPDIF_DATA_FIFO_CSR),
  58. REG(TEGRA_SPDIF_CH_STA_RX_A),
  59. REG(TEGRA_SPDIF_CH_STA_RX_B),
  60. REG(TEGRA_SPDIF_CH_STA_RX_C),
  61. REG(TEGRA_SPDIF_CH_STA_RX_D),
  62. REG(TEGRA_SPDIF_CH_STA_RX_E),
  63. REG(TEGRA_SPDIF_CH_STA_RX_F),
  64. REG(TEGRA_SPDIF_CH_STA_TX_A),
  65. REG(TEGRA_SPDIF_CH_STA_TX_B),
  66. REG(TEGRA_SPDIF_CH_STA_TX_C),
  67. REG(TEGRA_SPDIF_CH_STA_TX_D),
  68. REG(TEGRA_SPDIF_CH_STA_TX_E),
  69. REG(TEGRA_SPDIF_CH_STA_TX_F),
  70. };
  71. #undef REG
  72. struct tegra_spdif *spdif = s->private;
  73. int i;
  74. for (i = 0; i < ARRAY_SIZE(regs); i++) {
  75. u32 val = tegra_spdif_read(spdif, regs[i].offset);
  76. seq_printf(s, "%s = %08x\n", regs[i].name, val);
  77. }
  78. return 0;
  79. }
  80. static int tegra_spdif_debug_open(struct inode *inode, struct file *file)
  81. {
  82. return single_open(file, tegra_spdif_show, inode->i_private);
  83. }
  84. static const struct file_operations tegra_spdif_debug_fops = {
  85. .open = tegra_spdif_debug_open,
  86. .read = seq_read,
  87. .llseek = seq_lseek,
  88. .release = single_release,
  89. };
  90. static void tegra_spdif_debug_add(struct tegra_spdif *spdif)
  91. {
  92. spdif->debug = debugfs_create_file(DRV_NAME, S_IRUGO,
  93. snd_soc_debugfs_root, spdif,
  94. &tegra_spdif_debug_fops);
  95. }
  96. static void tegra_spdif_debug_remove(struct tegra_spdif *spdif)
  97. {
  98. if (spdif->debug)
  99. debugfs_remove(spdif->debug);
  100. }
  101. #else
  102. static inline void tegra_spdif_debug_add(struct tegra_spdif *spdif)
  103. {
  104. }
  105. static inline void tegra_spdif_debug_remove(struct tegra_spdif *spdif)
  106. {
  107. }
  108. #endif
  109. static int tegra_spdif_hw_params(struct snd_pcm_substream *substream,
  110. struct snd_pcm_hw_params *params,
  111. struct snd_soc_dai *dai)
  112. {
  113. struct device *dev = substream->pcm->card->dev;
  114. struct tegra_spdif *spdif = snd_soc_dai_get_drvdata(dai);
  115. int ret, spdifclock;
  116. spdif->reg_ctrl &= ~TEGRA_SPDIF_CTRL_PACK;
  117. spdif->reg_ctrl &= ~TEGRA_SPDIF_CTRL_BIT_MODE_MASK;
  118. switch (params_format(params)) {
  119. case SNDRV_PCM_FORMAT_S16_LE:
  120. spdif->reg_ctrl |= TEGRA_SPDIF_CTRL_PACK;
  121. spdif->reg_ctrl |= TEGRA_SPDIF_CTRL_BIT_MODE_16BIT;
  122. break;
  123. default:
  124. return -EINVAL;
  125. }
  126. switch (params_rate(params)) {
  127. case 32000:
  128. spdifclock = 4096000;
  129. break;
  130. case 44100:
  131. spdifclock = 5644800;
  132. break;
  133. case 48000:
  134. spdifclock = 6144000;
  135. break;
  136. case 88200:
  137. spdifclock = 11289600;
  138. break;
  139. case 96000:
  140. spdifclock = 12288000;
  141. break;
  142. case 176400:
  143. spdifclock = 22579200;
  144. break;
  145. case 192000:
  146. spdifclock = 24576000;
  147. break;
  148. default:
  149. return -EINVAL;
  150. }
  151. ret = clk_set_rate(spdif->clk_spdif_out, spdifclock);
  152. if (ret) {
  153. dev_err(dev, "Can't set SPDIF clock rate: %d\n", ret);
  154. return ret;
  155. }
  156. return 0;
  157. }
  158. static void tegra_spdif_start_playback(struct tegra_spdif *spdif)
  159. {
  160. spdif->reg_ctrl |= TEGRA_SPDIF_CTRL_TX_EN;
  161. tegra_spdif_write(spdif, TEGRA_SPDIF_CTRL, spdif->reg_ctrl);
  162. }
  163. static void tegra_spdif_stop_playback(struct tegra_spdif *spdif)
  164. {
  165. spdif->reg_ctrl &= ~TEGRA_SPDIF_CTRL_TX_EN;
  166. tegra_spdif_write(spdif, TEGRA_SPDIF_CTRL, spdif->reg_ctrl);
  167. }
  168. static int tegra_spdif_trigger(struct snd_pcm_substream *substream, int cmd,
  169. struct snd_soc_dai *dai)
  170. {
  171. struct tegra_spdif *spdif = snd_soc_dai_get_drvdata(dai);
  172. switch (cmd) {
  173. case SNDRV_PCM_TRIGGER_START:
  174. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  175. case SNDRV_PCM_TRIGGER_RESUME:
  176. clk_enable(spdif->clk_spdif_out);
  177. tegra_spdif_start_playback(spdif);
  178. break;
  179. case SNDRV_PCM_TRIGGER_STOP:
  180. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  181. case SNDRV_PCM_TRIGGER_SUSPEND:
  182. tegra_spdif_stop_playback(spdif);
  183. clk_disable(spdif->clk_spdif_out);
  184. break;
  185. default:
  186. return -EINVAL;
  187. }
  188. return 0;
  189. }
  190. static int tegra_spdif_probe(struct snd_soc_dai *dai)
  191. {
  192. struct tegra_spdif *spdif = snd_soc_dai_get_drvdata(dai);
  193. dai->capture_dma_data = NULL;
  194. dai->playback_dma_data = &spdif->playback_dma_data;
  195. return 0;
  196. }
  197. static const struct snd_soc_dai_ops tegra_spdif_dai_ops = {
  198. .hw_params = tegra_spdif_hw_params,
  199. .trigger = tegra_spdif_trigger,
  200. };
  201. static struct snd_soc_dai_driver tegra_spdif_dai = {
  202. .name = DRV_NAME,
  203. .probe = tegra_spdif_probe,
  204. .playback = {
  205. .channels_min = 2,
  206. .channels_max = 2,
  207. .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
  208. SNDRV_PCM_RATE_48000,
  209. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  210. },
  211. .ops = &tegra_spdif_dai_ops,
  212. };
  213. static __devinit int tegra_spdif_platform_probe(struct platform_device *pdev)
  214. {
  215. struct tegra_spdif *spdif;
  216. struct resource *mem, *memregion, *dmareq;
  217. int ret;
  218. spdif = kzalloc(sizeof(struct tegra_spdif), GFP_KERNEL);
  219. if (!spdif) {
  220. dev_err(&pdev->dev, "Can't allocate tegra_spdif\n");
  221. ret = -ENOMEM;
  222. goto exit;
  223. }
  224. dev_set_drvdata(&pdev->dev, spdif);
  225. spdif->clk_spdif_out = clk_get(&pdev->dev, "spdif_out");
  226. if (IS_ERR(spdif->clk_spdif_out)) {
  227. pr_err("Can't retrieve spdif clock\n");
  228. ret = PTR_ERR(spdif->clk_spdif_out);
  229. goto err_free;
  230. }
  231. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  232. if (!mem) {
  233. dev_err(&pdev->dev, "No memory resource\n");
  234. ret = -ENODEV;
  235. goto err_clk_put;
  236. }
  237. dmareq = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  238. if (!dmareq) {
  239. dev_err(&pdev->dev, "No DMA resource\n");
  240. ret = -ENODEV;
  241. goto err_clk_put;
  242. }
  243. memregion = request_mem_region(mem->start, resource_size(mem),
  244. DRV_NAME);
  245. if (!memregion) {
  246. dev_err(&pdev->dev, "Memory region already claimed\n");
  247. ret = -EBUSY;
  248. goto err_clk_put;
  249. }
  250. spdif->regs = ioremap(mem->start, resource_size(mem));
  251. if (!spdif->regs) {
  252. dev_err(&pdev->dev, "ioremap failed\n");
  253. ret = -ENOMEM;
  254. goto err_release;
  255. }
  256. spdif->playback_dma_data.addr = mem->start + TEGRA_SPDIF_DATA_OUT;
  257. spdif->playback_dma_data.wrap = 4;
  258. spdif->playback_dma_data.width = 32;
  259. spdif->playback_dma_data.req_sel = dmareq->start;
  260. ret = snd_soc_register_dai(&pdev->dev, &tegra_spdif_dai);
  261. if (ret) {
  262. dev_err(&pdev->dev, "Could not register DAI: %d\n", ret);
  263. ret = -ENOMEM;
  264. goto err_unmap;
  265. }
  266. ret = tegra_pcm_platform_register(&pdev->dev);
  267. if (ret) {
  268. dev_err(&pdev->dev, "Could not register PCM: %d\n", ret);
  269. goto err_unregister_dai;
  270. }
  271. tegra_spdif_debug_add(spdif);
  272. return 0;
  273. err_unregister_dai:
  274. snd_soc_unregister_dai(&pdev->dev);
  275. err_unmap:
  276. iounmap(spdif->regs);
  277. err_release:
  278. release_mem_region(mem->start, resource_size(mem));
  279. err_clk_put:
  280. clk_put(spdif->clk_spdif_out);
  281. err_free:
  282. kfree(spdif);
  283. exit:
  284. return ret;
  285. }
  286. static int __devexit tegra_spdif_platform_remove(struct platform_device *pdev)
  287. {
  288. struct tegra_spdif *spdif = dev_get_drvdata(&pdev->dev);
  289. struct resource *res;
  290. tegra_pcm_platform_unregister(&pdev->dev);
  291. snd_soc_unregister_dai(&pdev->dev);
  292. tegra_spdif_debug_remove(spdif);
  293. iounmap(spdif->regs);
  294. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  295. release_mem_region(res->start, resource_size(res));
  296. clk_put(spdif->clk_spdif_out);
  297. kfree(spdif);
  298. return 0;
  299. }
  300. static struct platform_driver tegra_spdif_driver = {
  301. .driver = {
  302. .name = DRV_NAME,
  303. .owner = THIS_MODULE,
  304. },
  305. .probe = tegra_spdif_platform_probe,
  306. .remove = __devexit_p(tegra_spdif_platform_remove),
  307. };
  308. module_platform_driver(tegra_spdif_driver);
  309. MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
  310. MODULE_DESCRIPTION("Tegra SPDIF ASoC driver");
  311. MODULE_LICENSE("GPL");
  312. MODULE_ALIAS("platform:" DRV_NAME);