twl4030.c 71 KB

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  1. /*
  2. * ALSA SoC TWL4030 codec driver
  3. *
  4. * Author: Steve Sakoman, <steve@sakoman.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/pm.h>
  26. #include <linux/i2c.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/i2c/twl.h>
  29. #include <sound/core.h>
  30. #include <sound/pcm.h>
  31. #include <sound/pcm_params.h>
  32. #include <sound/soc.h>
  33. #include <sound/soc-dapm.h>
  34. #include <sound/initval.h>
  35. #include <sound/tlv.h>
  36. #include "twl4030.h"
  37. /*
  38. * twl4030 register cache & default register settings
  39. */
  40. static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
  41. 0x00, /* this register not used */
  42. 0x91, /* REG_CODEC_MODE (0x1) */
  43. 0xc3, /* REG_OPTION (0x2) */
  44. 0x00, /* REG_UNKNOWN (0x3) */
  45. 0x00, /* REG_MICBIAS_CTL (0x4) */
  46. 0x20, /* REG_ANAMICL (0x5) */
  47. 0x00, /* REG_ANAMICR (0x6) */
  48. 0x00, /* REG_AVADC_CTL (0x7) */
  49. 0x00, /* REG_ADCMICSEL (0x8) */
  50. 0x00, /* REG_DIGMIXING (0x9) */
  51. 0x0c, /* REG_ATXL1PGA (0xA) */
  52. 0x0c, /* REG_ATXR1PGA (0xB) */
  53. 0x00, /* REG_AVTXL2PGA (0xC) */
  54. 0x00, /* REG_AVTXR2PGA (0xD) */
  55. 0x00, /* REG_AUDIO_IF (0xE) */
  56. 0x00, /* REG_VOICE_IF (0xF) */
  57. 0x00, /* REG_ARXR1PGA (0x10) */
  58. 0x00, /* REG_ARXL1PGA (0x11) */
  59. 0x6c, /* REG_ARXR2PGA (0x12) */
  60. 0x6c, /* REG_ARXL2PGA (0x13) */
  61. 0x00, /* REG_VRXPGA (0x14) */
  62. 0x00, /* REG_VSTPGA (0x15) */
  63. 0x00, /* REG_VRX2ARXPGA (0x16) */
  64. 0x00, /* REG_AVDAC_CTL (0x17) */
  65. 0x00, /* REG_ARX2VTXPGA (0x18) */
  66. 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
  67. 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
  68. 0x4a, /* REG_ARXL2_APGA_CTL (0x1B) */
  69. 0x4a, /* REG_ARXR2_APGA_CTL (0x1C) */
  70. 0x00, /* REG_ATX2ARXPGA (0x1D) */
  71. 0x00, /* REG_BT_IF (0x1E) */
  72. 0x00, /* REG_BTPGA (0x1F) */
  73. 0x00, /* REG_BTSTPGA (0x20) */
  74. 0x00, /* REG_EAR_CTL (0x21) */
  75. 0x00, /* REG_HS_SEL (0x22) */
  76. 0x00, /* REG_HS_GAIN_SET (0x23) */
  77. 0x00, /* REG_HS_POPN_SET (0x24) */
  78. 0x00, /* REG_PREDL_CTL (0x25) */
  79. 0x00, /* REG_PREDR_CTL (0x26) */
  80. 0x00, /* REG_PRECKL_CTL (0x27) */
  81. 0x00, /* REG_PRECKR_CTL (0x28) */
  82. 0x00, /* REG_HFL_CTL (0x29) */
  83. 0x00, /* REG_HFR_CTL (0x2A) */
  84. 0x00, /* REG_ALC_CTL (0x2B) */
  85. 0x00, /* REG_ALC_SET1 (0x2C) */
  86. 0x00, /* REG_ALC_SET2 (0x2D) */
  87. 0x00, /* REG_BOOST_CTL (0x2E) */
  88. 0x00, /* REG_SOFTVOL_CTL (0x2F) */
  89. 0x00, /* REG_DTMF_FREQSEL (0x30) */
  90. 0x00, /* REG_DTMF_TONEXT1H (0x31) */
  91. 0x00, /* REG_DTMF_TONEXT1L (0x32) */
  92. 0x00, /* REG_DTMF_TONEXT2H (0x33) */
  93. 0x00, /* REG_DTMF_TONEXT2L (0x34) */
  94. 0x00, /* REG_DTMF_TONOFF (0x35) */
  95. 0x00, /* REG_DTMF_WANONOFF (0x36) */
  96. 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
  97. 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
  98. 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
  99. 0x06, /* REG_APLL_CTL (0x3A) */
  100. 0x00, /* REG_DTMF_CTL (0x3B) */
  101. 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
  102. 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
  103. 0x00, /* REG_MISC_SET_1 (0x3E) */
  104. 0x00, /* REG_PCMBTMUX (0x3F) */
  105. 0x00, /* not used (0x40) */
  106. 0x00, /* not used (0x41) */
  107. 0x00, /* not used (0x42) */
  108. 0x00, /* REG_RX_PATH_SEL (0x43) */
  109. 0x00, /* REG_VDL_APGA_CTL (0x44) */
  110. 0x00, /* REG_VIBRA_CTL (0x45) */
  111. 0x00, /* REG_VIBRA_SET (0x46) */
  112. 0x00, /* REG_VIBRA_PWM_SET (0x47) */
  113. 0x00, /* REG_ANAMIC_GAIN (0x48) */
  114. 0x00, /* REG_MISC_SET_2 (0x49) */
  115. 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
  116. };
  117. /* codec private data */
  118. struct twl4030_priv {
  119. struct snd_soc_codec codec;
  120. unsigned int codec_powered;
  121. /* reference counts of AIF/APLL users */
  122. unsigned int apll_enabled;
  123. struct snd_pcm_substream *master_substream;
  124. struct snd_pcm_substream *slave_substream;
  125. unsigned int configured;
  126. unsigned int rate;
  127. unsigned int sample_bits;
  128. unsigned int channels;
  129. unsigned int sysclk;
  130. /* Output (with associated amp) states */
  131. u8 hsl_enabled, hsr_enabled;
  132. u8 earpiece_enabled;
  133. u8 predrivel_enabled, predriver_enabled;
  134. u8 carkitl_enabled, carkitr_enabled;
  135. };
  136. /*
  137. * read twl4030 register cache
  138. */
  139. static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
  140. unsigned int reg)
  141. {
  142. u8 *cache = codec->reg_cache;
  143. if (reg >= TWL4030_CACHEREGNUM)
  144. return -EIO;
  145. return cache[reg];
  146. }
  147. /*
  148. * write twl4030 register cache
  149. */
  150. static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
  151. u8 reg, u8 value)
  152. {
  153. u8 *cache = codec->reg_cache;
  154. if (reg >= TWL4030_CACHEREGNUM)
  155. return;
  156. cache[reg] = value;
  157. }
  158. /*
  159. * write to the twl4030 register space
  160. */
  161. static int twl4030_write(struct snd_soc_codec *codec,
  162. unsigned int reg, unsigned int value)
  163. {
  164. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  165. int write_to_reg = 0;
  166. twl4030_write_reg_cache(codec, reg, value);
  167. if (likely(reg < TWL4030_REG_SW_SHADOW)) {
  168. /* Decide if the given register can be written */
  169. switch (reg) {
  170. case TWL4030_REG_EAR_CTL:
  171. if (twl4030->earpiece_enabled)
  172. write_to_reg = 1;
  173. break;
  174. case TWL4030_REG_PREDL_CTL:
  175. if (twl4030->predrivel_enabled)
  176. write_to_reg = 1;
  177. break;
  178. case TWL4030_REG_PREDR_CTL:
  179. if (twl4030->predriver_enabled)
  180. write_to_reg = 1;
  181. break;
  182. case TWL4030_REG_PRECKL_CTL:
  183. if (twl4030->carkitl_enabled)
  184. write_to_reg = 1;
  185. break;
  186. case TWL4030_REG_PRECKR_CTL:
  187. if (twl4030->carkitr_enabled)
  188. write_to_reg = 1;
  189. break;
  190. case TWL4030_REG_HS_GAIN_SET:
  191. if (twl4030->hsl_enabled || twl4030->hsr_enabled)
  192. write_to_reg = 1;
  193. break;
  194. default:
  195. /* All other register can be written */
  196. write_to_reg = 1;
  197. break;
  198. }
  199. if (write_to_reg)
  200. return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  201. value, reg);
  202. }
  203. return 0;
  204. }
  205. static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
  206. {
  207. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  208. int mode;
  209. if (enable == twl4030->codec_powered)
  210. return;
  211. if (enable)
  212. mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
  213. else
  214. mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
  215. if (mode >= 0) {
  216. twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
  217. twl4030->codec_powered = enable;
  218. }
  219. /* REVISIT: this delay is present in TI sample drivers */
  220. /* but there seems to be no TRM requirement for it */
  221. udelay(10);
  222. }
  223. static void twl4030_init_chip(struct snd_soc_codec *codec)
  224. {
  225. u8 *cache = codec->reg_cache;
  226. int i;
  227. /* clear CODECPDZ prior to setting register defaults */
  228. twl4030_codec_enable(codec, 0);
  229. /* set all audio section registers to reasonable defaults */
  230. for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
  231. if (i != TWL4030_REG_APLL_CTL)
  232. twl4030_write(codec, i, cache[i]);
  233. }
  234. static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
  235. {
  236. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  237. int status = -1;
  238. if (enable) {
  239. twl4030->apll_enabled++;
  240. if (twl4030->apll_enabled == 1)
  241. status = twl4030_codec_enable_resource(
  242. TWL4030_CODEC_RES_APLL);
  243. } else {
  244. twl4030->apll_enabled--;
  245. if (!twl4030->apll_enabled)
  246. status = twl4030_codec_disable_resource(
  247. TWL4030_CODEC_RES_APLL);
  248. }
  249. if (status >= 0)
  250. twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
  251. }
  252. static void twl4030_power_up(struct snd_soc_codec *codec)
  253. {
  254. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  255. u8 anamicl, regmisc1, byte;
  256. int i = 0;
  257. if (twl4030->codec_powered)
  258. return;
  259. /* set CODECPDZ to turn on codec */
  260. twl4030_codec_enable(codec, 1);
  261. /* initiate offset cancellation */
  262. anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
  263. twl4030_write(codec, TWL4030_REG_ANAMICL,
  264. anamicl | TWL4030_CNCL_OFFSET_START);
  265. /* wait for offset cancellation to complete */
  266. do {
  267. /* this takes a little while, so don't slam i2c */
  268. udelay(2000);
  269. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
  270. TWL4030_REG_ANAMICL);
  271. } while ((i++ < 100) &&
  272. ((byte & TWL4030_CNCL_OFFSET_START) ==
  273. TWL4030_CNCL_OFFSET_START));
  274. /* Make sure that the reg_cache has the same value as the HW */
  275. twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
  276. /* anti-pop when changing analog gain */
  277. regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
  278. twl4030_write(codec, TWL4030_REG_MISC_SET_1,
  279. regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
  280. /* toggle CODECPDZ as per TRM */
  281. twl4030_codec_enable(codec, 0);
  282. twl4030_codec_enable(codec, 1);
  283. }
  284. /*
  285. * Unconditional power down
  286. */
  287. static void twl4030_power_down(struct snd_soc_codec *codec)
  288. {
  289. /* power down */
  290. twl4030_codec_enable(codec, 0);
  291. }
  292. /* Earpiece */
  293. static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
  294. SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
  295. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
  296. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
  297. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
  298. };
  299. /* PreDrive Left */
  300. static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
  301. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
  302. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
  303. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
  304. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
  305. };
  306. /* PreDrive Right */
  307. static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
  308. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
  309. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
  310. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
  311. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
  312. };
  313. /* Headset Left */
  314. static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
  315. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
  316. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
  317. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
  318. };
  319. /* Headset Right */
  320. static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
  321. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
  322. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
  323. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
  324. };
  325. /* Carkit Left */
  326. static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
  327. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
  328. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
  329. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
  330. };
  331. /* Carkit Right */
  332. static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
  333. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
  334. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
  335. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
  336. };
  337. /* Handsfree Left */
  338. static const char *twl4030_handsfreel_texts[] =
  339. {"Voice", "AudioL1", "AudioL2", "AudioR2"};
  340. static const struct soc_enum twl4030_handsfreel_enum =
  341. SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
  342. ARRAY_SIZE(twl4030_handsfreel_texts),
  343. twl4030_handsfreel_texts);
  344. static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
  345. SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
  346. /* Handsfree Left virtual mute */
  347. static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
  348. SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
  349. /* Handsfree Right */
  350. static const char *twl4030_handsfreer_texts[] =
  351. {"Voice", "AudioR1", "AudioR2", "AudioL2"};
  352. static const struct soc_enum twl4030_handsfreer_enum =
  353. SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
  354. ARRAY_SIZE(twl4030_handsfreer_texts),
  355. twl4030_handsfreer_texts);
  356. static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
  357. SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
  358. /* Handsfree Right virtual mute */
  359. static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
  360. SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
  361. /* Vibra */
  362. /* Vibra audio path selection */
  363. static const char *twl4030_vibra_texts[] =
  364. {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
  365. static const struct soc_enum twl4030_vibra_enum =
  366. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
  367. ARRAY_SIZE(twl4030_vibra_texts),
  368. twl4030_vibra_texts);
  369. static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
  370. SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
  371. /* Vibra path selection: local vibrator (PWM) or audio driven */
  372. static const char *twl4030_vibrapath_texts[] =
  373. {"Local vibrator", "Audio"};
  374. static const struct soc_enum twl4030_vibrapath_enum =
  375. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
  376. ARRAY_SIZE(twl4030_vibrapath_texts),
  377. twl4030_vibrapath_texts);
  378. static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
  379. SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
  380. /* Left analog microphone selection */
  381. static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
  382. SOC_DAPM_SINGLE("Main Mic Capture Switch",
  383. TWL4030_REG_ANAMICL, 0, 1, 0),
  384. SOC_DAPM_SINGLE("Headset Mic Capture Switch",
  385. TWL4030_REG_ANAMICL, 1, 1, 0),
  386. SOC_DAPM_SINGLE("AUXL Capture Switch",
  387. TWL4030_REG_ANAMICL, 2, 1, 0),
  388. SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
  389. TWL4030_REG_ANAMICL, 3, 1, 0),
  390. };
  391. /* Right analog microphone selection */
  392. static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
  393. SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
  394. SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
  395. };
  396. /* TX1 L/R Analog/Digital microphone selection */
  397. static const char *twl4030_micpathtx1_texts[] =
  398. {"Analog", "Digimic0"};
  399. static const struct soc_enum twl4030_micpathtx1_enum =
  400. SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
  401. ARRAY_SIZE(twl4030_micpathtx1_texts),
  402. twl4030_micpathtx1_texts);
  403. static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
  404. SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
  405. /* TX2 L/R Analog/Digital microphone selection */
  406. static const char *twl4030_micpathtx2_texts[] =
  407. {"Analog", "Digimic1"};
  408. static const struct soc_enum twl4030_micpathtx2_enum =
  409. SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
  410. ARRAY_SIZE(twl4030_micpathtx2_texts),
  411. twl4030_micpathtx2_texts);
  412. static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
  413. SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
  414. /* Analog bypass for AudioR1 */
  415. static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
  416. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
  417. /* Analog bypass for AudioL1 */
  418. static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
  419. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
  420. /* Analog bypass for AudioR2 */
  421. static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
  422. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
  423. /* Analog bypass for AudioL2 */
  424. static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
  425. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
  426. /* Analog bypass for Voice */
  427. static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
  428. SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
  429. /* Digital bypass gain, 0 mutes the bypass */
  430. static const unsigned int twl4030_dapm_dbypass_tlv[] = {
  431. TLV_DB_RANGE_HEAD(2),
  432. 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
  433. 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
  434. };
  435. /* Digital bypass left (TX1L -> RX2L) */
  436. static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
  437. SOC_DAPM_SINGLE_TLV("Volume",
  438. TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
  439. twl4030_dapm_dbypass_tlv);
  440. /* Digital bypass right (TX1R -> RX2R) */
  441. static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
  442. SOC_DAPM_SINGLE_TLV("Volume",
  443. TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
  444. twl4030_dapm_dbypass_tlv);
  445. /*
  446. * Voice Sidetone GAIN volume control:
  447. * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
  448. */
  449. static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
  450. /* Digital bypass voice: sidetone (VUL -> VDL)*/
  451. static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
  452. SOC_DAPM_SINGLE_TLV("Volume",
  453. TWL4030_REG_VSTPGA, 0, 0x29, 0,
  454. twl4030_dapm_dbypassv_tlv);
  455. static int micpath_event(struct snd_soc_dapm_widget *w,
  456. struct snd_kcontrol *kcontrol, int event)
  457. {
  458. struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
  459. unsigned char adcmicsel, micbias_ctl;
  460. adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
  461. micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
  462. /* Prepare the bits for the given TX path:
  463. * shift_l == 0: TX1 microphone path
  464. * shift_l == 2: TX2 microphone path */
  465. if (e->shift_l) {
  466. /* TX2 microphone path */
  467. if (adcmicsel & TWL4030_TX2IN_SEL)
  468. micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
  469. else
  470. micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
  471. } else {
  472. /* TX1 microphone path */
  473. if (adcmicsel & TWL4030_TX1IN_SEL)
  474. micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
  475. else
  476. micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
  477. }
  478. twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
  479. return 0;
  480. }
  481. /*
  482. * Output PGA builder:
  483. * Handle the muting and unmuting of the given output (turning off the
  484. * amplifier associated with the output pin)
  485. * On mute bypass the reg_cache and write 0 to the register
  486. * On unmute: restore the register content from the reg_cache
  487. * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
  488. */
  489. #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
  490. static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
  491. struct snd_kcontrol *kcontrol, int event) \
  492. { \
  493. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
  494. \
  495. switch (event) { \
  496. case SND_SOC_DAPM_POST_PMU: \
  497. twl4030->pin_name##_enabled = 1; \
  498. twl4030_write(w->codec, reg, \
  499. twl4030_read_reg_cache(w->codec, reg)); \
  500. break; \
  501. case SND_SOC_DAPM_POST_PMD: \
  502. twl4030->pin_name##_enabled = 0; \
  503. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
  504. 0, reg); \
  505. break; \
  506. } \
  507. return 0; \
  508. }
  509. TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
  510. TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
  511. TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
  512. TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
  513. TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
  514. static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
  515. {
  516. unsigned char hs_ctl;
  517. hs_ctl = twl4030_read_reg_cache(codec, reg);
  518. if (ramp) {
  519. /* HF ramp-up */
  520. hs_ctl |= TWL4030_HF_CTL_REF_EN;
  521. twl4030_write(codec, reg, hs_ctl);
  522. udelay(10);
  523. hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
  524. twl4030_write(codec, reg, hs_ctl);
  525. udelay(40);
  526. hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
  527. hs_ctl |= TWL4030_HF_CTL_HB_EN;
  528. twl4030_write(codec, reg, hs_ctl);
  529. } else {
  530. /* HF ramp-down */
  531. hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
  532. hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
  533. twl4030_write(codec, reg, hs_ctl);
  534. hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
  535. twl4030_write(codec, reg, hs_ctl);
  536. udelay(40);
  537. hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
  538. twl4030_write(codec, reg, hs_ctl);
  539. }
  540. }
  541. static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
  542. struct snd_kcontrol *kcontrol, int event)
  543. {
  544. switch (event) {
  545. case SND_SOC_DAPM_POST_PMU:
  546. handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
  547. break;
  548. case SND_SOC_DAPM_POST_PMD:
  549. handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
  550. break;
  551. }
  552. return 0;
  553. }
  554. static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
  555. struct snd_kcontrol *kcontrol, int event)
  556. {
  557. switch (event) {
  558. case SND_SOC_DAPM_POST_PMU:
  559. handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
  560. break;
  561. case SND_SOC_DAPM_POST_PMD:
  562. handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
  563. break;
  564. }
  565. return 0;
  566. }
  567. static int vibramux_event(struct snd_soc_dapm_widget *w,
  568. struct snd_kcontrol *kcontrol, int event)
  569. {
  570. twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
  571. return 0;
  572. }
  573. static int apll_event(struct snd_soc_dapm_widget *w,
  574. struct snd_kcontrol *kcontrol, int event)
  575. {
  576. switch (event) {
  577. case SND_SOC_DAPM_PRE_PMU:
  578. twl4030_apll_enable(w->codec, 1);
  579. break;
  580. case SND_SOC_DAPM_POST_PMD:
  581. twl4030_apll_enable(w->codec, 0);
  582. break;
  583. }
  584. return 0;
  585. }
  586. static int aif_event(struct snd_soc_dapm_widget *w,
  587. struct snd_kcontrol *kcontrol, int event)
  588. {
  589. u8 audio_if;
  590. audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
  591. switch (event) {
  592. case SND_SOC_DAPM_PRE_PMU:
  593. /* Enable AIF */
  594. /* enable the PLL before we use it to clock the DAI */
  595. twl4030_apll_enable(w->codec, 1);
  596. twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
  597. audio_if | TWL4030_AIF_EN);
  598. break;
  599. case SND_SOC_DAPM_POST_PMD:
  600. /* disable the DAI before we stop it's source PLL */
  601. twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
  602. audio_if & ~TWL4030_AIF_EN);
  603. twl4030_apll_enable(w->codec, 0);
  604. break;
  605. }
  606. return 0;
  607. }
  608. static void headset_ramp(struct snd_soc_codec *codec, int ramp)
  609. {
  610. struct snd_soc_device *socdev = codec->socdev;
  611. struct twl4030_setup_data *setup = socdev->codec_data;
  612. unsigned char hs_gain, hs_pop;
  613. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  614. /* Base values for ramp delay calculation: 2^19 - 2^26 */
  615. unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
  616. 8388608, 16777216, 33554432, 67108864};
  617. hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
  618. hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
  619. /* Enable external mute control, this dramatically reduces
  620. * the pop-noise */
  621. if (setup && setup->hs_extmute) {
  622. if (setup->set_hs_extmute) {
  623. setup->set_hs_extmute(1);
  624. } else {
  625. hs_pop |= TWL4030_EXTMUTE;
  626. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  627. }
  628. }
  629. if (ramp) {
  630. /* Headset ramp-up according to the TRM */
  631. hs_pop |= TWL4030_VMID_EN;
  632. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  633. /* Actually write to the register */
  634. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  635. hs_gain,
  636. TWL4030_REG_HS_GAIN_SET);
  637. hs_pop |= TWL4030_RAMP_EN;
  638. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  639. /* Wait ramp delay time + 1, so the VMID can settle */
  640. mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
  641. twl4030->sysclk) + 1);
  642. } else {
  643. /* Headset ramp-down _not_ according to
  644. * the TRM, but in a way that it is working */
  645. hs_pop &= ~TWL4030_RAMP_EN;
  646. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  647. /* Wait ramp delay time + 1, so the VMID can settle */
  648. mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
  649. twl4030->sysclk) + 1);
  650. /* Bypass the reg_cache to mute the headset */
  651. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
  652. hs_gain & (~0x0f),
  653. TWL4030_REG_HS_GAIN_SET);
  654. hs_pop &= ~TWL4030_VMID_EN;
  655. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  656. }
  657. /* Disable external mute */
  658. if (setup && setup->hs_extmute) {
  659. if (setup->set_hs_extmute) {
  660. setup->set_hs_extmute(0);
  661. } else {
  662. hs_pop &= ~TWL4030_EXTMUTE;
  663. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  664. }
  665. }
  666. }
  667. static int headsetlpga_event(struct snd_soc_dapm_widget *w,
  668. struct snd_kcontrol *kcontrol, int event)
  669. {
  670. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
  671. switch (event) {
  672. case SND_SOC_DAPM_POST_PMU:
  673. /* Do the ramp-up only once */
  674. if (!twl4030->hsr_enabled)
  675. headset_ramp(w->codec, 1);
  676. twl4030->hsl_enabled = 1;
  677. break;
  678. case SND_SOC_DAPM_POST_PMD:
  679. /* Do the ramp-down only if both headsetL/R is disabled */
  680. if (!twl4030->hsr_enabled)
  681. headset_ramp(w->codec, 0);
  682. twl4030->hsl_enabled = 0;
  683. break;
  684. }
  685. return 0;
  686. }
  687. static int headsetrpga_event(struct snd_soc_dapm_widget *w,
  688. struct snd_kcontrol *kcontrol, int event)
  689. {
  690. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
  691. switch (event) {
  692. case SND_SOC_DAPM_POST_PMU:
  693. /* Do the ramp-up only once */
  694. if (!twl4030->hsl_enabled)
  695. headset_ramp(w->codec, 1);
  696. twl4030->hsr_enabled = 1;
  697. break;
  698. case SND_SOC_DAPM_POST_PMD:
  699. /* Do the ramp-down only if both headsetL/R is disabled */
  700. if (!twl4030->hsl_enabled)
  701. headset_ramp(w->codec, 0);
  702. twl4030->hsr_enabled = 0;
  703. break;
  704. }
  705. return 0;
  706. }
  707. /*
  708. * Some of the gain controls in TWL (mostly those which are associated with
  709. * the outputs) are implemented in an interesting way:
  710. * 0x0 : Power down (mute)
  711. * 0x1 : 6dB
  712. * 0x2 : 0 dB
  713. * 0x3 : -6 dB
  714. * Inverting not going to help with these.
  715. * Custom volsw and volsw_2r get/put functions to handle these gain bits.
  716. */
  717. #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
  718. xinvert, tlv_array) \
  719. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
  720. .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
  721. SNDRV_CTL_ELEM_ACCESS_READWRITE,\
  722. .tlv.p = (tlv_array), \
  723. .info = snd_soc_info_volsw, \
  724. .get = snd_soc_get_volsw_twl4030, \
  725. .put = snd_soc_put_volsw_twl4030, \
  726. .private_value = (unsigned long)&(struct soc_mixer_control) \
  727. {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
  728. .max = xmax, .invert = xinvert} }
  729. #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
  730. xinvert, tlv_array) \
  731. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
  732. .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
  733. SNDRV_CTL_ELEM_ACCESS_READWRITE,\
  734. .tlv.p = (tlv_array), \
  735. .info = snd_soc_info_volsw_2r, \
  736. .get = snd_soc_get_volsw_r2_twl4030,\
  737. .put = snd_soc_put_volsw_r2_twl4030, \
  738. .private_value = (unsigned long)&(struct soc_mixer_control) \
  739. {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
  740. .rshift = xshift, .max = xmax, .invert = xinvert} }
  741. #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
  742. SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
  743. xinvert, tlv_array)
  744. static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
  745. struct snd_ctl_elem_value *ucontrol)
  746. {
  747. struct soc_mixer_control *mc =
  748. (struct soc_mixer_control *)kcontrol->private_value;
  749. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  750. unsigned int reg = mc->reg;
  751. unsigned int shift = mc->shift;
  752. unsigned int rshift = mc->rshift;
  753. int max = mc->max;
  754. int mask = (1 << fls(max)) - 1;
  755. ucontrol->value.integer.value[0] =
  756. (snd_soc_read(codec, reg) >> shift) & mask;
  757. if (ucontrol->value.integer.value[0])
  758. ucontrol->value.integer.value[0] =
  759. max + 1 - ucontrol->value.integer.value[0];
  760. if (shift != rshift) {
  761. ucontrol->value.integer.value[1] =
  762. (snd_soc_read(codec, reg) >> rshift) & mask;
  763. if (ucontrol->value.integer.value[1])
  764. ucontrol->value.integer.value[1] =
  765. max + 1 - ucontrol->value.integer.value[1];
  766. }
  767. return 0;
  768. }
  769. static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
  770. struct snd_ctl_elem_value *ucontrol)
  771. {
  772. struct soc_mixer_control *mc =
  773. (struct soc_mixer_control *)kcontrol->private_value;
  774. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  775. unsigned int reg = mc->reg;
  776. unsigned int shift = mc->shift;
  777. unsigned int rshift = mc->rshift;
  778. int max = mc->max;
  779. int mask = (1 << fls(max)) - 1;
  780. unsigned short val, val2, val_mask;
  781. val = (ucontrol->value.integer.value[0] & mask);
  782. val_mask = mask << shift;
  783. if (val)
  784. val = max + 1 - val;
  785. val = val << shift;
  786. if (shift != rshift) {
  787. val2 = (ucontrol->value.integer.value[1] & mask);
  788. val_mask |= mask << rshift;
  789. if (val2)
  790. val2 = max + 1 - val2;
  791. val |= val2 << rshift;
  792. }
  793. return snd_soc_update_bits(codec, reg, val_mask, val);
  794. }
  795. static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  796. struct snd_ctl_elem_value *ucontrol)
  797. {
  798. struct soc_mixer_control *mc =
  799. (struct soc_mixer_control *)kcontrol->private_value;
  800. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  801. unsigned int reg = mc->reg;
  802. unsigned int reg2 = mc->rreg;
  803. unsigned int shift = mc->shift;
  804. int max = mc->max;
  805. int mask = (1<<fls(max))-1;
  806. ucontrol->value.integer.value[0] =
  807. (snd_soc_read(codec, reg) >> shift) & mask;
  808. ucontrol->value.integer.value[1] =
  809. (snd_soc_read(codec, reg2) >> shift) & mask;
  810. if (ucontrol->value.integer.value[0])
  811. ucontrol->value.integer.value[0] =
  812. max + 1 - ucontrol->value.integer.value[0];
  813. if (ucontrol->value.integer.value[1])
  814. ucontrol->value.integer.value[1] =
  815. max + 1 - ucontrol->value.integer.value[1];
  816. return 0;
  817. }
  818. static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  819. struct snd_ctl_elem_value *ucontrol)
  820. {
  821. struct soc_mixer_control *mc =
  822. (struct soc_mixer_control *)kcontrol->private_value;
  823. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  824. unsigned int reg = mc->reg;
  825. unsigned int reg2 = mc->rreg;
  826. unsigned int shift = mc->shift;
  827. int max = mc->max;
  828. int mask = (1 << fls(max)) - 1;
  829. int err;
  830. unsigned short val, val2, val_mask;
  831. val_mask = mask << shift;
  832. val = (ucontrol->value.integer.value[0] & mask);
  833. val2 = (ucontrol->value.integer.value[1] & mask);
  834. if (val)
  835. val = max + 1 - val;
  836. if (val2)
  837. val2 = max + 1 - val2;
  838. val = val << shift;
  839. val2 = val2 << shift;
  840. err = snd_soc_update_bits(codec, reg, val_mask, val);
  841. if (err < 0)
  842. return err;
  843. err = snd_soc_update_bits(codec, reg2, val_mask, val2);
  844. return err;
  845. }
  846. /* Codec operation modes */
  847. static const char *twl4030_op_modes_texts[] = {
  848. "Option 2 (voice/audio)", "Option 1 (audio)"
  849. };
  850. static const struct soc_enum twl4030_op_modes_enum =
  851. SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
  852. ARRAY_SIZE(twl4030_op_modes_texts),
  853. twl4030_op_modes_texts);
  854. static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
  855. struct snd_ctl_elem_value *ucontrol)
  856. {
  857. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  858. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  859. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  860. unsigned short val;
  861. unsigned short mask, bitmask;
  862. if (twl4030->configured) {
  863. printk(KERN_ERR "twl4030 operation mode cannot be "
  864. "changed on-the-fly\n");
  865. return -EBUSY;
  866. }
  867. for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
  868. ;
  869. if (ucontrol->value.enumerated.item[0] > e->max - 1)
  870. return -EINVAL;
  871. val = ucontrol->value.enumerated.item[0] << e->shift_l;
  872. mask = (bitmask - 1) << e->shift_l;
  873. if (e->shift_l != e->shift_r) {
  874. if (ucontrol->value.enumerated.item[1] > e->max - 1)
  875. return -EINVAL;
  876. val |= ucontrol->value.enumerated.item[1] << e->shift_r;
  877. mask |= (bitmask - 1) << e->shift_r;
  878. }
  879. return snd_soc_update_bits(codec, e->reg, mask, val);
  880. }
  881. /*
  882. * FGAIN volume control:
  883. * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
  884. */
  885. static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
  886. /*
  887. * CGAIN volume control:
  888. * 0 dB to 12 dB in 6 dB steps
  889. * value 2 and 3 means 12 dB
  890. */
  891. static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
  892. /*
  893. * Voice Downlink GAIN volume control:
  894. * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
  895. */
  896. static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
  897. /*
  898. * Analog playback gain
  899. * -24 dB to 12 dB in 2 dB steps
  900. */
  901. static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
  902. /*
  903. * Gain controls tied to outputs
  904. * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
  905. */
  906. static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
  907. /*
  908. * Gain control for earpiece amplifier
  909. * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
  910. */
  911. static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
  912. /*
  913. * Capture gain after the ADCs
  914. * from 0 dB to 31 dB in 1 dB steps
  915. */
  916. static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
  917. /*
  918. * Gain control for input amplifiers
  919. * 0 dB to 30 dB in 6 dB steps
  920. */
  921. static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
  922. /* AVADC clock priority */
  923. static const char *twl4030_avadc_clk_priority_texts[] = {
  924. "Voice high priority", "HiFi high priority"
  925. };
  926. static const struct soc_enum twl4030_avadc_clk_priority_enum =
  927. SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
  928. ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
  929. twl4030_avadc_clk_priority_texts);
  930. static const char *twl4030_rampdelay_texts[] = {
  931. "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
  932. "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
  933. "3495/2581/1748 ms"
  934. };
  935. static const struct soc_enum twl4030_rampdelay_enum =
  936. SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
  937. ARRAY_SIZE(twl4030_rampdelay_texts),
  938. twl4030_rampdelay_texts);
  939. /* Vibra H-bridge direction mode */
  940. static const char *twl4030_vibradirmode_texts[] = {
  941. "Vibra H-bridge direction", "Audio data MSB",
  942. };
  943. static const struct soc_enum twl4030_vibradirmode_enum =
  944. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
  945. ARRAY_SIZE(twl4030_vibradirmode_texts),
  946. twl4030_vibradirmode_texts);
  947. /* Vibra H-bridge direction */
  948. static const char *twl4030_vibradir_texts[] = {
  949. "Positive polarity", "Negative polarity",
  950. };
  951. static const struct soc_enum twl4030_vibradir_enum =
  952. SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
  953. ARRAY_SIZE(twl4030_vibradir_texts),
  954. twl4030_vibradir_texts);
  955. static const struct snd_kcontrol_new twl4030_snd_controls[] = {
  956. /* Codec operation mode control */
  957. SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
  958. snd_soc_get_enum_double,
  959. snd_soc_put_twl4030_opmode_enum_double),
  960. /* Common playback gain controls */
  961. SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
  962. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  963. 0, 0x3f, 0, digital_fine_tlv),
  964. SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
  965. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  966. 0, 0x3f, 0, digital_fine_tlv),
  967. SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
  968. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  969. 6, 0x2, 0, digital_coarse_tlv),
  970. SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
  971. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  972. 6, 0x2, 0, digital_coarse_tlv),
  973. SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
  974. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  975. 3, 0x12, 1, analog_tlv),
  976. SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
  977. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  978. 3, 0x12, 1, analog_tlv),
  979. SOC_DOUBLE_R("DAC1 Analog Playback Switch",
  980. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  981. 1, 1, 0),
  982. SOC_DOUBLE_R("DAC2 Analog Playback Switch",
  983. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  984. 1, 1, 0),
  985. /* Common voice downlink gain controls */
  986. SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
  987. TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
  988. SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
  989. TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
  990. SOC_SINGLE("DAC Voice Analog Downlink Switch",
  991. TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
  992. /* Separate output gain controls */
  993. SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
  994. TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
  995. 4, 3, 0, output_tvl),
  996. SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
  997. TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
  998. SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
  999. TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
  1000. 4, 3, 0, output_tvl),
  1001. SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
  1002. TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
  1003. /* Common capture gain controls */
  1004. SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
  1005. TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
  1006. 0, 0x1f, 0, digital_capture_tlv),
  1007. SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
  1008. TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
  1009. 0, 0x1f, 0, digital_capture_tlv),
  1010. SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
  1011. 0, 3, 5, 0, input_gain_tlv),
  1012. SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
  1013. SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
  1014. SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
  1015. SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
  1016. };
  1017. static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
  1018. /* Left channel inputs */
  1019. SND_SOC_DAPM_INPUT("MAINMIC"),
  1020. SND_SOC_DAPM_INPUT("HSMIC"),
  1021. SND_SOC_DAPM_INPUT("AUXL"),
  1022. SND_SOC_DAPM_INPUT("CARKITMIC"),
  1023. /* Right channel inputs */
  1024. SND_SOC_DAPM_INPUT("SUBMIC"),
  1025. SND_SOC_DAPM_INPUT("AUXR"),
  1026. /* Digital microphones (Stereo) */
  1027. SND_SOC_DAPM_INPUT("DIGIMIC0"),
  1028. SND_SOC_DAPM_INPUT("DIGIMIC1"),
  1029. /* Outputs */
  1030. SND_SOC_DAPM_OUTPUT("EARPIECE"),
  1031. SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
  1032. SND_SOC_DAPM_OUTPUT("PREDRIVER"),
  1033. SND_SOC_DAPM_OUTPUT("HSOL"),
  1034. SND_SOC_DAPM_OUTPUT("HSOR"),
  1035. SND_SOC_DAPM_OUTPUT("CARKITL"),
  1036. SND_SOC_DAPM_OUTPUT("CARKITR"),
  1037. SND_SOC_DAPM_OUTPUT("HFL"),
  1038. SND_SOC_DAPM_OUTPUT("HFR"),
  1039. SND_SOC_DAPM_OUTPUT("VIBRA"),
  1040. /* AIF and APLL clocks for running DAIs (including loopback) */
  1041. SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
  1042. SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
  1043. SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
  1044. /* DACs */
  1045. SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
  1046. SND_SOC_NOPM, 0, 0),
  1047. SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
  1048. SND_SOC_NOPM, 0, 0),
  1049. SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
  1050. SND_SOC_NOPM, 0, 0),
  1051. SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
  1052. SND_SOC_NOPM, 0, 0),
  1053. SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
  1054. SND_SOC_NOPM, 0, 0),
  1055. /* Analog bypasses */
  1056. SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1057. &twl4030_dapm_abypassr1_control),
  1058. SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1059. &twl4030_dapm_abypassl1_control),
  1060. SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1061. &twl4030_dapm_abypassr2_control),
  1062. SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1063. &twl4030_dapm_abypassl2_control),
  1064. SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
  1065. &twl4030_dapm_abypassv_control),
  1066. /* Master analog loopback switch */
  1067. SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
  1068. NULL, 0),
  1069. /* Digital bypasses */
  1070. SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
  1071. &twl4030_dapm_dbypassl_control),
  1072. SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
  1073. &twl4030_dapm_dbypassr_control),
  1074. SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
  1075. &twl4030_dapm_dbypassv_control),
  1076. /* Digital mixers, power control for the physical DACs */
  1077. SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
  1078. TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
  1079. SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
  1080. TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
  1081. SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
  1082. TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
  1083. SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
  1084. TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
  1085. SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
  1086. TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
  1087. /* Analog mixers, power control for the physical PGAs */
  1088. SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
  1089. TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
  1090. SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
  1091. TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
  1092. SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
  1093. TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
  1094. SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
  1095. TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
  1096. SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
  1097. TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
  1098. SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
  1099. SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
  1100. SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
  1101. SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
  1102. /* Output MIXER controls */
  1103. /* Earpiece */
  1104. SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
  1105. &twl4030_dapm_earpiece_controls[0],
  1106. ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
  1107. SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
  1108. 0, 0, NULL, 0, earpiecepga_event,
  1109. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1110. /* PreDrivL/R */
  1111. SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
  1112. &twl4030_dapm_predrivel_controls[0],
  1113. ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
  1114. SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
  1115. 0, 0, NULL, 0, predrivelpga_event,
  1116. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1117. SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
  1118. &twl4030_dapm_predriver_controls[0],
  1119. ARRAY_SIZE(twl4030_dapm_predriver_controls)),
  1120. SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
  1121. 0, 0, NULL, 0, predriverpga_event,
  1122. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1123. /* HeadsetL/R */
  1124. SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
  1125. &twl4030_dapm_hsol_controls[0],
  1126. ARRAY_SIZE(twl4030_dapm_hsol_controls)),
  1127. SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
  1128. 0, 0, NULL, 0, headsetlpga_event,
  1129. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1130. SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
  1131. &twl4030_dapm_hsor_controls[0],
  1132. ARRAY_SIZE(twl4030_dapm_hsor_controls)),
  1133. SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
  1134. 0, 0, NULL, 0, headsetrpga_event,
  1135. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1136. /* CarkitL/R */
  1137. SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
  1138. &twl4030_dapm_carkitl_controls[0],
  1139. ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
  1140. SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
  1141. 0, 0, NULL, 0, carkitlpga_event,
  1142. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1143. SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
  1144. &twl4030_dapm_carkitr_controls[0],
  1145. ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
  1146. SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
  1147. 0, 0, NULL, 0, carkitrpga_event,
  1148. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1149. /* Output MUX controls */
  1150. /* HandsfreeL/R */
  1151. SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
  1152. &twl4030_dapm_handsfreel_control),
  1153. SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
  1154. &twl4030_dapm_handsfreelmute_control),
  1155. SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
  1156. 0, 0, NULL, 0, handsfreelpga_event,
  1157. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1158. SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
  1159. &twl4030_dapm_handsfreer_control),
  1160. SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
  1161. &twl4030_dapm_handsfreermute_control),
  1162. SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
  1163. 0, 0, NULL, 0, handsfreerpga_event,
  1164. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1165. /* Vibra */
  1166. SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
  1167. &twl4030_dapm_vibra_control, vibramux_event,
  1168. SND_SOC_DAPM_PRE_PMU),
  1169. SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
  1170. &twl4030_dapm_vibrapath_control),
  1171. /* Introducing four virtual ADC, since TWL4030 have four channel for
  1172. capture */
  1173. SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
  1174. SND_SOC_NOPM, 0, 0),
  1175. SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
  1176. SND_SOC_NOPM, 0, 0),
  1177. SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
  1178. SND_SOC_NOPM, 0, 0),
  1179. SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
  1180. SND_SOC_NOPM, 0, 0),
  1181. /* Analog/Digital mic path selection.
  1182. TX1 Left/Right: either analog Left/Right or Digimic0
  1183. TX2 Left/Right: either analog Left/Right or Digimic1 */
  1184. SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
  1185. &twl4030_dapm_micpathtx1_control, micpath_event,
  1186. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
  1187. SND_SOC_DAPM_POST_REG),
  1188. SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
  1189. &twl4030_dapm_micpathtx2_control, micpath_event,
  1190. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
  1191. SND_SOC_DAPM_POST_REG),
  1192. /* Analog input mixers for the capture amplifiers */
  1193. SND_SOC_DAPM_MIXER("Analog Left",
  1194. TWL4030_REG_ANAMICL, 4, 0,
  1195. &twl4030_dapm_analoglmic_controls[0],
  1196. ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
  1197. SND_SOC_DAPM_MIXER("Analog Right",
  1198. TWL4030_REG_ANAMICR, 4, 0,
  1199. &twl4030_dapm_analogrmic_controls[0],
  1200. ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
  1201. SND_SOC_DAPM_PGA("ADC Physical Left",
  1202. TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
  1203. SND_SOC_DAPM_PGA("ADC Physical Right",
  1204. TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
  1205. SND_SOC_DAPM_PGA("Digimic0 Enable",
  1206. TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
  1207. SND_SOC_DAPM_PGA("Digimic1 Enable",
  1208. TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
  1209. SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
  1210. SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
  1211. SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
  1212. };
  1213. static const struct snd_soc_dapm_route intercon[] = {
  1214. {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
  1215. {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
  1216. {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
  1217. {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
  1218. {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
  1219. /* Supply for the digital part (APLL) */
  1220. {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
  1221. {"Digital R1 Playback Mixer", NULL, "AIF Enable"},
  1222. {"Digital L1 Playback Mixer", NULL, "AIF Enable"},
  1223. {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
  1224. {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
  1225. {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
  1226. {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
  1227. {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
  1228. {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
  1229. {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
  1230. /* Internal playback routings */
  1231. /* Earpiece */
  1232. {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
  1233. {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1234. {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1235. {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1236. {"Earpiece PGA", NULL, "Earpiece Mixer"},
  1237. /* PreDrivL */
  1238. {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1239. {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1240. {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1241. {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1242. {"PredriveL PGA", NULL, "PredriveL Mixer"},
  1243. /* PreDrivR */
  1244. {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1245. {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1246. {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1247. {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1248. {"PredriveR PGA", NULL, "PredriveR Mixer"},
  1249. /* HeadsetL */
  1250. {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1251. {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1252. {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1253. {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
  1254. /* HeadsetR */
  1255. {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1256. {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1257. {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1258. {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
  1259. /* CarkitL */
  1260. {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1261. {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1262. {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1263. {"CarkitL PGA", NULL, "CarkitL Mixer"},
  1264. /* CarkitR */
  1265. {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1266. {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1267. {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1268. {"CarkitR PGA", NULL, "CarkitR Mixer"},
  1269. /* HandsfreeL */
  1270. {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
  1271. {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
  1272. {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1273. {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1274. {"HandsfreeL", "Switch", "HandsfreeL Mux"},
  1275. {"HandsfreeL PGA", NULL, "HandsfreeL"},
  1276. /* HandsfreeR */
  1277. {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
  1278. {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
  1279. {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1280. {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1281. {"HandsfreeR", "Switch", "HandsfreeR Mux"},
  1282. {"HandsfreeR PGA", NULL, "HandsfreeR"},
  1283. /* Vibra */
  1284. {"Vibra Mux", "AudioL1", "DAC Left1"},
  1285. {"Vibra Mux", "AudioR1", "DAC Right1"},
  1286. {"Vibra Mux", "AudioL2", "DAC Left2"},
  1287. {"Vibra Mux", "AudioR2", "DAC Right2"},
  1288. /* outputs */
  1289. /* Must be always connected (for AIF and APLL) */
  1290. {"Virtual HiFi OUT", NULL, "Digital L1 Playback Mixer"},
  1291. {"Virtual HiFi OUT", NULL, "Digital R1 Playback Mixer"},
  1292. {"Virtual HiFi OUT", NULL, "Digital L2 Playback Mixer"},
  1293. {"Virtual HiFi OUT", NULL, "Digital R2 Playback Mixer"},
  1294. /* Must be always connected (for APLL) */
  1295. {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
  1296. /* Physical outputs */
  1297. {"EARPIECE", NULL, "Earpiece PGA"},
  1298. {"PREDRIVEL", NULL, "PredriveL PGA"},
  1299. {"PREDRIVER", NULL, "PredriveR PGA"},
  1300. {"HSOL", NULL, "HeadsetL PGA"},
  1301. {"HSOR", NULL, "HeadsetR PGA"},
  1302. {"CARKITL", NULL, "CarkitL PGA"},
  1303. {"CARKITR", NULL, "CarkitR PGA"},
  1304. {"HFL", NULL, "HandsfreeL PGA"},
  1305. {"HFR", NULL, "HandsfreeR PGA"},
  1306. {"Vibra Route", "Audio", "Vibra Mux"},
  1307. {"VIBRA", NULL, "Vibra Route"},
  1308. /* Capture path */
  1309. /* Must be always connected (for AIF and APLL) */
  1310. {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
  1311. {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
  1312. {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
  1313. {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
  1314. /* Physical inputs */
  1315. {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
  1316. {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
  1317. {"Analog Left", "AUXL Capture Switch", "AUXL"},
  1318. {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
  1319. {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
  1320. {"Analog Right", "AUXR Capture Switch", "AUXR"},
  1321. {"ADC Physical Left", NULL, "Analog Left"},
  1322. {"ADC Physical Right", NULL, "Analog Right"},
  1323. {"Digimic0 Enable", NULL, "DIGIMIC0"},
  1324. {"Digimic1 Enable", NULL, "DIGIMIC1"},
  1325. /* TX1 Left capture path */
  1326. {"TX1 Capture Route", "Analog", "ADC Physical Left"},
  1327. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1328. /* TX1 Right capture path */
  1329. {"TX1 Capture Route", "Analog", "ADC Physical Right"},
  1330. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1331. /* TX2 Left capture path */
  1332. {"TX2 Capture Route", "Analog", "ADC Physical Left"},
  1333. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1334. /* TX2 Right capture path */
  1335. {"TX2 Capture Route", "Analog", "ADC Physical Right"},
  1336. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1337. {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
  1338. {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
  1339. {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
  1340. {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
  1341. {"ADC Virtual Left1", NULL, "AIF Enable"},
  1342. {"ADC Virtual Right1", NULL, "AIF Enable"},
  1343. {"ADC Virtual Left2", NULL, "AIF Enable"},
  1344. {"ADC Virtual Right2", NULL, "AIF Enable"},
  1345. /* Analog bypass routes */
  1346. {"Right1 Analog Loopback", "Switch", "Analog Right"},
  1347. {"Left1 Analog Loopback", "Switch", "Analog Left"},
  1348. {"Right2 Analog Loopback", "Switch", "Analog Right"},
  1349. {"Left2 Analog Loopback", "Switch", "Analog Left"},
  1350. {"Voice Analog Loopback", "Switch", "Analog Left"},
  1351. /* Supply for the Analog loopbacks */
  1352. {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
  1353. {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
  1354. {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
  1355. {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
  1356. {"Voice Analog Loopback", NULL, "FM Loop Enable"},
  1357. {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
  1358. {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
  1359. {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
  1360. {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
  1361. {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
  1362. /* Digital bypass routes */
  1363. {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
  1364. {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
  1365. {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
  1366. {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
  1367. {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
  1368. {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
  1369. };
  1370. static int twl4030_add_widgets(struct snd_soc_codec *codec)
  1371. {
  1372. snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
  1373. ARRAY_SIZE(twl4030_dapm_widgets));
  1374. snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
  1375. return 0;
  1376. }
  1377. static int twl4030_set_bias_level(struct snd_soc_codec *codec,
  1378. enum snd_soc_bias_level level)
  1379. {
  1380. switch (level) {
  1381. case SND_SOC_BIAS_ON:
  1382. break;
  1383. case SND_SOC_BIAS_PREPARE:
  1384. break;
  1385. case SND_SOC_BIAS_STANDBY:
  1386. if (codec->bias_level == SND_SOC_BIAS_OFF)
  1387. twl4030_power_up(codec);
  1388. break;
  1389. case SND_SOC_BIAS_OFF:
  1390. twl4030_power_down(codec);
  1391. break;
  1392. }
  1393. codec->bias_level = level;
  1394. return 0;
  1395. }
  1396. static void twl4030_constraints(struct twl4030_priv *twl4030,
  1397. struct snd_pcm_substream *mst_substream)
  1398. {
  1399. struct snd_pcm_substream *slv_substream;
  1400. /* Pick the stream, which need to be constrained */
  1401. if (mst_substream == twl4030->master_substream)
  1402. slv_substream = twl4030->slave_substream;
  1403. else if (mst_substream == twl4030->slave_substream)
  1404. slv_substream = twl4030->master_substream;
  1405. else /* This should not happen.. */
  1406. return;
  1407. /* Set the constraints according to the already configured stream */
  1408. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1409. SNDRV_PCM_HW_PARAM_RATE,
  1410. twl4030->rate,
  1411. twl4030->rate);
  1412. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1413. SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
  1414. twl4030->sample_bits,
  1415. twl4030->sample_bits);
  1416. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1417. SNDRV_PCM_HW_PARAM_CHANNELS,
  1418. twl4030->channels,
  1419. twl4030->channels);
  1420. }
  1421. /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
  1422. * capture has to be enabled/disabled. */
  1423. static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
  1424. int enable)
  1425. {
  1426. u8 reg, mask;
  1427. reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
  1428. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1429. mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
  1430. else
  1431. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1432. if (enable)
  1433. reg |= mask;
  1434. else
  1435. reg &= ~mask;
  1436. twl4030_write(codec, TWL4030_REG_OPTION, reg);
  1437. }
  1438. static int twl4030_startup(struct snd_pcm_substream *substream,
  1439. struct snd_soc_dai *dai)
  1440. {
  1441. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1442. struct snd_soc_device *socdev = rtd->socdev;
  1443. struct snd_soc_codec *codec = socdev->card->codec;
  1444. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1445. if (twl4030->master_substream) {
  1446. twl4030->slave_substream = substream;
  1447. /* The DAI has one configuration for playback and capture, so
  1448. * if the DAI has been already configured then constrain this
  1449. * substream to match it. */
  1450. if (twl4030->configured)
  1451. twl4030_constraints(twl4030, twl4030->master_substream);
  1452. } else {
  1453. if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
  1454. TWL4030_OPTION_1)) {
  1455. /* In option2 4 channel is not supported, set the
  1456. * constraint for the first stream for channels, the
  1457. * second stream will 'inherit' this cosntraint */
  1458. snd_pcm_hw_constraint_minmax(substream->runtime,
  1459. SNDRV_PCM_HW_PARAM_CHANNELS,
  1460. 2, 2);
  1461. }
  1462. twl4030->master_substream = substream;
  1463. }
  1464. return 0;
  1465. }
  1466. static void twl4030_shutdown(struct snd_pcm_substream *substream,
  1467. struct snd_soc_dai *dai)
  1468. {
  1469. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1470. struct snd_soc_device *socdev = rtd->socdev;
  1471. struct snd_soc_codec *codec = socdev->card->codec;
  1472. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1473. if (twl4030->master_substream == substream)
  1474. twl4030->master_substream = twl4030->slave_substream;
  1475. twl4030->slave_substream = NULL;
  1476. /* If all streams are closed, or the remaining stream has not yet
  1477. * been configured than set the DAI as not configured. */
  1478. if (!twl4030->master_substream)
  1479. twl4030->configured = 0;
  1480. else if (!twl4030->master_substream->runtime->channels)
  1481. twl4030->configured = 0;
  1482. /* If the closing substream had 4 channel, do the necessary cleanup */
  1483. if (substream->runtime->channels == 4)
  1484. twl4030_tdm_enable(codec, substream->stream, 0);
  1485. }
  1486. static int twl4030_hw_params(struct snd_pcm_substream *substream,
  1487. struct snd_pcm_hw_params *params,
  1488. struct snd_soc_dai *dai)
  1489. {
  1490. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1491. struct snd_soc_device *socdev = rtd->socdev;
  1492. struct snd_soc_codec *codec = socdev->card->codec;
  1493. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1494. u8 mode, old_mode, format, old_format;
  1495. /* If the substream has 4 channel, do the necessary setup */
  1496. if (params_channels(params) == 4) {
  1497. format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1498. mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
  1499. /* Safety check: are we in the correct operating mode and
  1500. * the interface is in TDM mode? */
  1501. if ((mode & TWL4030_OPTION_1) &&
  1502. ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
  1503. twl4030_tdm_enable(codec, substream->stream, 1);
  1504. else
  1505. return -EINVAL;
  1506. }
  1507. if (twl4030->configured)
  1508. /* Ignoring hw_params for already configured DAI */
  1509. return 0;
  1510. /* bit rate */
  1511. old_mode = twl4030_read_reg_cache(codec,
  1512. TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
  1513. mode = old_mode & ~TWL4030_APLL_RATE;
  1514. switch (params_rate(params)) {
  1515. case 8000:
  1516. mode |= TWL4030_APLL_RATE_8000;
  1517. break;
  1518. case 11025:
  1519. mode |= TWL4030_APLL_RATE_11025;
  1520. break;
  1521. case 12000:
  1522. mode |= TWL4030_APLL_RATE_12000;
  1523. break;
  1524. case 16000:
  1525. mode |= TWL4030_APLL_RATE_16000;
  1526. break;
  1527. case 22050:
  1528. mode |= TWL4030_APLL_RATE_22050;
  1529. break;
  1530. case 24000:
  1531. mode |= TWL4030_APLL_RATE_24000;
  1532. break;
  1533. case 32000:
  1534. mode |= TWL4030_APLL_RATE_32000;
  1535. break;
  1536. case 44100:
  1537. mode |= TWL4030_APLL_RATE_44100;
  1538. break;
  1539. case 48000:
  1540. mode |= TWL4030_APLL_RATE_48000;
  1541. break;
  1542. case 96000:
  1543. mode |= TWL4030_APLL_RATE_96000;
  1544. break;
  1545. default:
  1546. printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
  1547. params_rate(params));
  1548. return -EINVAL;
  1549. }
  1550. if (mode != old_mode) {
  1551. /* change rate and set CODECPDZ */
  1552. twl4030_codec_enable(codec, 0);
  1553. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1554. twl4030_codec_enable(codec, 1);
  1555. }
  1556. /* sample size */
  1557. old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1558. format = old_format;
  1559. format &= ~TWL4030_DATA_WIDTH;
  1560. switch (params_format(params)) {
  1561. case SNDRV_PCM_FORMAT_S16_LE:
  1562. format |= TWL4030_DATA_WIDTH_16S_16W;
  1563. break;
  1564. case SNDRV_PCM_FORMAT_S24_LE:
  1565. format |= TWL4030_DATA_WIDTH_32S_24W;
  1566. break;
  1567. default:
  1568. printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
  1569. params_format(params));
  1570. return -EINVAL;
  1571. }
  1572. if (format != old_format) {
  1573. /* clear CODECPDZ before changing format (codec requirement) */
  1574. twl4030_codec_enable(codec, 0);
  1575. /* change format */
  1576. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1577. /* set CODECPDZ afterwards */
  1578. twl4030_codec_enable(codec, 1);
  1579. }
  1580. /* Store the important parameters for the DAI configuration and set
  1581. * the DAI as configured */
  1582. twl4030->configured = 1;
  1583. twl4030->rate = params_rate(params);
  1584. twl4030->sample_bits = hw_param_interval(params,
  1585. SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
  1586. twl4030->channels = params_channels(params);
  1587. /* If both playback and capture streams are open, and one of them
  1588. * is setting the hw parameters right now (since we are here), set
  1589. * constraints to the other stream to match the current one. */
  1590. if (twl4030->slave_substream)
  1591. twl4030_constraints(twl4030, substream);
  1592. return 0;
  1593. }
  1594. static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1595. int clk_id, unsigned int freq, int dir)
  1596. {
  1597. struct snd_soc_codec *codec = codec_dai->codec;
  1598. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1599. switch (freq) {
  1600. case 19200000:
  1601. case 26000000:
  1602. case 38400000:
  1603. break;
  1604. default:
  1605. dev_err(codec->dev, "Unsupported APLL mclk: %u\n", freq);
  1606. return -EINVAL;
  1607. }
  1608. if ((freq / 1000) != twl4030->sysclk) {
  1609. dev_err(codec->dev,
  1610. "Mismatch in APLL mclk: %u (configured: %u)\n",
  1611. freq, twl4030->sysclk * 1000);
  1612. return -EINVAL;
  1613. }
  1614. return 0;
  1615. }
  1616. static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
  1617. unsigned int fmt)
  1618. {
  1619. struct snd_soc_codec *codec = codec_dai->codec;
  1620. u8 old_format, format;
  1621. /* get format */
  1622. old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1623. format = old_format;
  1624. /* set master/slave audio interface */
  1625. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1626. case SND_SOC_DAIFMT_CBM_CFM:
  1627. format &= ~(TWL4030_AIF_SLAVE_EN);
  1628. format &= ~(TWL4030_CLK256FS_EN);
  1629. break;
  1630. case SND_SOC_DAIFMT_CBS_CFS:
  1631. format |= TWL4030_AIF_SLAVE_EN;
  1632. format |= TWL4030_CLK256FS_EN;
  1633. break;
  1634. default:
  1635. return -EINVAL;
  1636. }
  1637. /* interface format */
  1638. format &= ~TWL4030_AIF_FORMAT;
  1639. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1640. case SND_SOC_DAIFMT_I2S:
  1641. format |= TWL4030_AIF_FORMAT_CODEC;
  1642. break;
  1643. case SND_SOC_DAIFMT_DSP_A:
  1644. format |= TWL4030_AIF_FORMAT_TDM;
  1645. break;
  1646. default:
  1647. return -EINVAL;
  1648. }
  1649. if (format != old_format) {
  1650. /* clear CODECPDZ before changing format (codec requirement) */
  1651. twl4030_codec_enable(codec, 0);
  1652. /* change format */
  1653. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1654. /* set CODECPDZ afterwards */
  1655. twl4030_codec_enable(codec, 1);
  1656. }
  1657. return 0;
  1658. }
  1659. static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
  1660. {
  1661. struct snd_soc_codec *codec = dai->codec;
  1662. u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
  1663. if (tristate)
  1664. reg |= TWL4030_AIF_TRI_EN;
  1665. else
  1666. reg &= ~TWL4030_AIF_TRI_EN;
  1667. return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
  1668. }
  1669. /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
  1670. * (VTXL, VTXR) for uplink has to be enabled/disabled. */
  1671. static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
  1672. int enable)
  1673. {
  1674. u8 reg, mask;
  1675. reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
  1676. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1677. mask = TWL4030_ARXL1_VRX_EN;
  1678. else
  1679. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1680. if (enable)
  1681. reg |= mask;
  1682. else
  1683. reg &= ~mask;
  1684. twl4030_write(codec, TWL4030_REG_OPTION, reg);
  1685. }
  1686. static int twl4030_voice_startup(struct snd_pcm_substream *substream,
  1687. struct snd_soc_dai *dai)
  1688. {
  1689. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1690. struct snd_soc_device *socdev = rtd->socdev;
  1691. struct snd_soc_codec *codec = socdev->card->codec;
  1692. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1693. u8 mode;
  1694. /* If the system master clock is not 26MHz, the voice PCM interface is
  1695. * not avilable.
  1696. */
  1697. if (twl4030->sysclk != 26000) {
  1698. dev_err(codec->dev, "The board is configured for %u Hz, while"
  1699. "the Voice interface needs 26MHz APLL mclk\n",
  1700. twl4030->sysclk * 1000);
  1701. return -EINVAL;
  1702. }
  1703. /* If the codec mode is not option2, the voice PCM interface is not
  1704. * avilable.
  1705. */
  1706. mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
  1707. & TWL4030_OPT_MODE;
  1708. if (mode != TWL4030_OPTION_2) {
  1709. printk(KERN_ERR "TWL4030 voice startup: "
  1710. "the codec mode is not option2\n");
  1711. return -EINVAL;
  1712. }
  1713. return 0;
  1714. }
  1715. static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
  1716. struct snd_soc_dai *dai)
  1717. {
  1718. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1719. struct snd_soc_device *socdev = rtd->socdev;
  1720. struct snd_soc_codec *codec = socdev->card->codec;
  1721. /* Enable voice digital filters */
  1722. twl4030_voice_enable(codec, substream->stream, 0);
  1723. }
  1724. static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
  1725. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  1726. {
  1727. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1728. struct snd_soc_device *socdev = rtd->socdev;
  1729. struct snd_soc_codec *codec = socdev->card->codec;
  1730. u8 old_mode, mode;
  1731. /* Enable voice digital filters */
  1732. twl4030_voice_enable(codec, substream->stream, 1);
  1733. /* bit rate */
  1734. old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
  1735. & ~(TWL4030_CODECPDZ);
  1736. mode = old_mode;
  1737. switch (params_rate(params)) {
  1738. case 8000:
  1739. mode &= ~(TWL4030_SEL_16K);
  1740. break;
  1741. case 16000:
  1742. mode |= TWL4030_SEL_16K;
  1743. break;
  1744. default:
  1745. printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
  1746. params_rate(params));
  1747. return -EINVAL;
  1748. }
  1749. if (mode != old_mode) {
  1750. /* change rate and set CODECPDZ */
  1751. twl4030_codec_enable(codec, 0);
  1752. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1753. twl4030_codec_enable(codec, 1);
  1754. }
  1755. return 0;
  1756. }
  1757. static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1758. int clk_id, unsigned int freq, int dir)
  1759. {
  1760. struct snd_soc_codec *codec = codec_dai->codec;
  1761. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1762. if (freq != 26000000) {
  1763. dev_err(codec->dev, "Unsupported APLL mclk: %u, the Voice"
  1764. "interface needs 26MHz APLL mclk\n", freq);
  1765. return -EINVAL;
  1766. }
  1767. if ((freq / 1000) != twl4030->sysclk) {
  1768. dev_err(codec->dev,
  1769. "Mismatch in APLL mclk: %u (configured: %u)\n",
  1770. freq, twl4030->sysclk * 1000);
  1771. return -EINVAL;
  1772. }
  1773. return 0;
  1774. }
  1775. static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
  1776. unsigned int fmt)
  1777. {
  1778. struct snd_soc_codec *codec = codec_dai->codec;
  1779. u8 old_format, format;
  1780. /* get format */
  1781. old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
  1782. format = old_format;
  1783. /* set master/slave audio interface */
  1784. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1785. case SND_SOC_DAIFMT_CBM_CFM:
  1786. format &= ~(TWL4030_VIF_SLAVE_EN);
  1787. break;
  1788. case SND_SOC_DAIFMT_CBS_CFS:
  1789. format |= TWL4030_VIF_SLAVE_EN;
  1790. break;
  1791. default:
  1792. return -EINVAL;
  1793. }
  1794. /* clock inversion */
  1795. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1796. case SND_SOC_DAIFMT_IB_NF:
  1797. format &= ~(TWL4030_VIF_FORMAT);
  1798. break;
  1799. case SND_SOC_DAIFMT_NB_IF:
  1800. format |= TWL4030_VIF_FORMAT;
  1801. break;
  1802. default:
  1803. return -EINVAL;
  1804. }
  1805. if (format != old_format) {
  1806. /* change format and set CODECPDZ */
  1807. twl4030_codec_enable(codec, 0);
  1808. twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
  1809. twl4030_codec_enable(codec, 1);
  1810. }
  1811. return 0;
  1812. }
  1813. static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
  1814. {
  1815. struct snd_soc_codec *codec = dai->codec;
  1816. u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
  1817. if (tristate)
  1818. reg |= TWL4030_VIF_TRI_EN;
  1819. else
  1820. reg &= ~TWL4030_VIF_TRI_EN;
  1821. return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
  1822. }
  1823. #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
  1824. #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
  1825. static struct snd_soc_dai_ops twl4030_dai_ops = {
  1826. .startup = twl4030_startup,
  1827. .shutdown = twl4030_shutdown,
  1828. .hw_params = twl4030_hw_params,
  1829. .set_sysclk = twl4030_set_dai_sysclk,
  1830. .set_fmt = twl4030_set_dai_fmt,
  1831. .set_tristate = twl4030_set_tristate,
  1832. };
  1833. static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
  1834. .startup = twl4030_voice_startup,
  1835. .shutdown = twl4030_voice_shutdown,
  1836. .hw_params = twl4030_voice_hw_params,
  1837. .set_sysclk = twl4030_voice_set_dai_sysclk,
  1838. .set_fmt = twl4030_voice_set_dai_fmt,
  1839. .set_tristate = twl4030_voice_set_tristate,
  1840. };
  1841. struct snd_soc_dai twl4030_dai[] = {
  1842. {
  1843. .name = "twl4030",
  1844. .playback = {
  1845. .stream_name = "HiFi Playback",
  1846. .channels_min = 2,
  1847. .channels_max = 4,
  1848. .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
  1849. .formats = TWL4030_FORMATS,},
  1850. .capture = {
  1851. .stream_name = "Capture",
  1852. .channels_min = 2,
  1853. .channels_max = 4,
  1854. .rates = TWL4030_RATES,
  1855. .formats = TWL4030_FORMATS,},
  1856. .ops = &twl4030_dai_ops,
  1857. },
  1858. {
  1859. .name = "twl4030 Voice",
  1860. .playback = {
  1861. .stream_name = "Voice Playback",
  1862. .channels_min = 1,
  1863. .channels_max = 1,
  1864. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1865. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1866. .capture = {
  1867. .stream_name = "Capture",
  1868. .channels_min = 1,
  1869. .channels_max = 2,
  1870. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1871. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1872. .ops = &twl4030_dai_voice_ops,
  1873. },
  1874. };
  1875. EXPORT_SYMBOL_GPL(twl4030_dai);
  1876. static int twl4030_soc_suspend(struct platform_device *pdev, pm_message_t state)
  1877. {
  1878. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1879. struct snd_soc_codec *codec = socdev->card->codec;
  1880. twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1881. return 0;
  1882. }
  1883. static int twl4030_soc_resume(struct platform_device *pdev)
  1884. {
  1885. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1886. struct snd_soc_codec *codec = socdev->card->codec;
  1887. twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  1888. twl4030_set_bias_level(codec, codec->suspend_bias_level);
  1889. return 0;
  1890. }
  1891. static struct snd_soc_codec *twl4030_codec;
  1892. static int twl4030_soc_probe(struct platform_device *pdev)
  1893. {
  1894. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1895. struct twl4030_setup_data *setup = socdev->codec_data;
  1896. struct snd_soc_codec *codec;
  1897. struct twl4030_priv *twl4030;
  1898. int ret;
  1899. BUG_ON(!twl4030_codec);
  1900. codec = twl4030_codec;
  1901. twl4030 = snd_soc_codec_get_drvdata(codec);
  1902. socdev->card->codec = codec;
  1903. /* Configuration for headset ramp delay from setup data */
  1904. if (setup) {
  1905. unsigned char hs_pop;
  1906. if (setup->sysclk != twl4030->sysclk)
  1907. dev_warn(&pdev->dev,
  1908. "Mismatch in APLL mclk: %u (configured: %u)\n",
  1909. setup->sysclk, twl4030->sysclk);
  1910. hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
  1911. hs_pop &= ~TWL4030_RAMP_DELAY;
  1912. hs_pop |= (setup->ramp_delay_value << 2);
  1913. twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  1914. }
  1915. /* register pcms */
  1916. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  1917. if (ret < 0) {
  1918. dev_err(&pdev->dev, "failed to create pcms\n");
  1919. return ret;
  1920. }
  1921. snd_soc_add_controls(codec, twl4030_snd_controls,
  1922. ARRAY_SIZE(twl4030_snd_controls));
  1923. twl4030_add_widgets(codec);
  1924. return 0;
  1925. }
  1926. static int twl4030_soc_remove(struct platform_device *pdev)
  1927. {
  1928. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1929. struct snd_soc_codec *codec = socdev->card->codec;
  1930. twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1931. snd_soc_free_pcms(socdev);
  1932. snd_soc_dapm_free(socdev);
  1933. return 0;
  1934. }
  1935. static int __devinit twl4030_codec_probe(struct platform_device *pdev)
  1936. {
  1937. struct twl4030_codec_audio_data *pdata = pdev->dev.platform_data;
  1938. struct snd_soc_codec *codec;
  1939. struct twl4030_priv *twl4030;
  1940. int ret;
  1941. if (!pdata) {
  1942. dev_err(&pdev->dev, "platform_data is missing\n");
  1943. return -EINVAL;
  1944. }
  1945. twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
  1946. if (twl4030 == NULL) {
  1947. dev_err(&pdev->dev, "Can not allocate memroy\n");
  1948. return -ENOMEM;
  1949. }
  1950. codec = &twl4030->codec;
  1951. snd_soc_codec_set_drvdata(codec, twl4030);
  1952. codec->dev = &pdev->dev;
  1953. twl4030_dai[0].dev = &pdev->dev;
  1954. twl4030_dai[1].dev = &pdev->dev;
  1955. mutex_init(&codec->mutex);
  1956. INIT_LIST_HEAD(&codec->dapm_widgets);
  1957. INIT_LIST_HEAD(&codec->dapm_paths);
  1958. codec->name = "twl4030";
  1959. codec->owner = THIS_MODULE;
  1960. codec->read = twl4030_read_reg_cache;
  1961. codec->write = twl4030_write;
  1962. codec->set_bias_level = twl4030_set_bias_level;
  1963. codec->dai = twl4030_dai;
  1964. codec->num_dai = ARRAY_SIZE(twl4030_dai);
  1965. codec->reg_cache_size = sizeof(twl4030_reg);
  1966. codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
  1967. GFP_KERNEL);
  1968. if (codec->reg_cache == NULL) {
  1969. ret = -ENOMEM;
  1970. goto error_cache;
  1971. }
  1972. platform_set_drvdata(pdev, twl4030);
  1973. twl4030_codec = codec;
  1974. /* Set the defaults, and power up the codec */
  1975. twl4030->sysclk = twl4030_codec_get_mclk() / 1000;
  1976. twl4030_init_chip(codec);
  1977. codec->bias_level = SND_SOC_BIAS_OFF;
  1978. twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  1979. ret = snd_soc_register_codec(codec);
  1980. if (ret != 0) {
  1981. dev_err(codec->dev, "Failed to register codec: %d\n", ret);
  1982. goto error_codec;
  1983. }
  1984. ret = snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
  1985. if (ret != 0) {
  1986. dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
  1987. snd_soc_unregister_codec(codec);
  1988. goto error_codec;
  1989. }
  1990. return 0;
  1991. error_codec:
  1992. twl4030_power_down(codec);
  1993. kfree(codec->reg_cache);
  1994. error_cache:
  1995. kfree(twl4030);
  1996. return ret;
  1997. }
  1998. static int __devexit twl4030_codec_remove(struct platform_device *pdev)
  1999. {
  2000. struct twl4030_priv *twl4030 = platform_get_drvdata(pdev);
  2001. snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
  2002. snd_soc_unregister_codec(&twl4030->codec);
  2003. kfree(twl4030->codec.reg_cache);
  2004. kfree(twl4030);
  2005. twl4030_codec = NULL;
  2006. return 0;
  2007. }
  2008. MODULE_ALIAS("platform:twl4030_codec_audio");
  2009. static struct platform_driver twl4030_codec_driver = {
  2010. .probe = twl4030_codec_probe,
  2011. .remove = __devexit_p(twl4030_codec_remove),
  2012. .driver = {
  2013. .name = "twl4030_codec_audio",
  2014. .owner = THIS_MODULE,
  2015. },
  2016. };
  2017. static int __init twl4030_modinit(void)
  2018. {
  2019. return platform_driver_register(&twl4030_codec_driver);
  2020. }
  2021. module_init(twl4030_modinit);
  2022. static void __exit twl4030_exit(void)
  2023. {
  2024. platform_driver_unregister(&twl4030_codec_driver);
  2025. }
  2026. module_exit(twl4030_exit);
  2027. struct snd_soc_codec_device soc_codec_dev_twl4030 = {
  2028. .probe = twl4030_soc_probe,
  2029. .remove = twl4030_soc_remove,
  2030. .suspend = twl4030_soc_suspend,
  2031. .resume = twl4030_soc_resume,
  2032. };
  2033. EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
  2034. MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
  2035. MODULE_AUTHOR("Steve Sakoman");
  2036. MODULE_LICENSE("GPL");