i387.c 14 KB

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  1. /*
  2. * Copyright (C) 1994 Linus Torvalds
  3. *
  4. * Pentium III FXSR, SSE support
  5. * General FPU state handling cleanups
  6. * Gareth Hughes <gareth@valinux.com>, May 2000
  7. */
  8. #include <linux/module.h>
  9. #include <linux/regset.h>
  10. #include <linux/sched.h>
  11. #include <linux/slab.h>
  12. #include <asm/sigcontext.h>
  13. #include <asm/processor.h>
  14. #include <asm/math_emu.h>
  15. #include <asm/uaccess.h>
  16. #include <asm/ptrace.h>
  17. #include <asm/i387.h>
  18. #include <asm/fpu-internal.h>
  19. #include <asm/user.h>
  20. /*
  21. * Were we in an interrupt that interrupted kernel mode?
  22. *
  23. * For now, on xsave platforms we will return interrupted
  24. * kernel FPU as not-idle. TBD: As we use non-lazy FPU restore
  25. * for xsave platforms, ideally we can change the return value
  26. * to something like __thread_has_fpu(current). But we need to
  27. * be careful of doing __thread_clear_has_fpu() before saving
  28. * the FPU etc for supporting nested uses etc. For now, take
  29. * the simple route!
  30. *
  31. * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
  32. * pair does nothing at all: the thread must not have fpu (so
  33. * that we don't try to save the FPU state), and TS must
  34. * be set (so that the clts/stts pair does nothing that is
  35. * visible in the interrupted kernel thread).
  36. */
  37. static inline bool interrupted_kernel_fpu_idle(void)
  38. {
  39. if (use_xsave())
  40. return 0;
  41. return !__thread_has_fpu(current) &&
  42. (read_cr0() & X86_CR0_TS);
  43. }
  44. /*
  45. * Were we in user mode (or vm86 mode) when we were
  46. * interrupted?
  47. *
  48. * Doing kernel_fpu_begin/end() is ok if we are running
  49. * in an interrupt context from user mode - we'll just
  50. * save the FPU state as required.
  51. */
  52. static inline bool interrupted_user_mode(void)
  53. {
  54. struct pt_regs *regs = get_irq_regs();
  55. return regs && user_mode_vm(regs);
  56. }
  57. /*
  58. * Can we use the FPU in kernel mode with the
  59. * whole "kernel_fpu_begin/end()" sequence?
  60. *
  61. * It's always ok in process context (ie "not interrupt")
  62. * but it is sometimes ok even from an irq.
  63. */
  64. bool irq_fpu_usable(void)
  65. {
  66. return !in_interrupt() ||
  67. interrupted_user_mode() ||
  68. interrupted_kernel_fpu_idle();
  69. }
  70. EXPORT_SYMBOL(irq_fpu_usable);
  71. void kernel_fpu_begin(void)
  72. {
  73. struct task_struct *me = current;
  74. WARN_ON_ONCE(!irq_fpu_usable());
  75. preempt_disable();
  76. if (__thread_has_fpu(me)) {
  77. __save_init_fpu(me);
  78. __thread_clear_has_fpu(me);
  79. /* We do 'stts()' in kernel_fpu_end() */
  80. } else if (!use_xsave()) {
  81. this_cpu_write(fpu_owner_task, NULL);
  82. clts();
  83. }
  84. }
  85. EXPORT_SYMBOL(kernel_fpu_begin);
  86. void kernel_fpu_end(void)
  87. {
  88. if (use_xsave())
  89. math_state_restore();
  90. else
  91. stts();
  92. preempt_enable();
  93. }
  94. EXPORT_SYMBOL(kernel_fpu_end);
  95. void unlazy_fpu(struct task_struct *tsk)
  96. {
  97. preempt_disable();
  98. if (__thread_has_fpu(tsk)) {
  99. __save_init_fpu(tsk);
  100. __thread_fpu_end(tsk);
  101. } else
  102. tsk->fpu_counter = 0;
  103. preempt_enable();
  104. }
  105. EXPORT_SYMBOL(unlazy_fpu);
  106. unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
  107. unsigned int xstate_size;
  108. EXPORT_SYMBOL_GPL(xstate_size);
  109. static struct i387_fxsave_struct fx_scratch __cpuinitdata;
  110. static void __cpuinit mxcsr_feature_mask_init(void)
  111. {
  112. unsigned long mask = 0;
  113. clts();
  114. if (cpu_has_fxsr) {
  115. memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
  116. asm volatile("fxsave %0" : : "m" (fx_scratch));
  117. mask = fx_scratch.mxcsr_mask;
  118. if (mask == 0)
  119. mask = 0x0000ffbf;
  120. }
  121. mxcsr_feature_mask &= mask;
  122. stts();
  123. }
  124. static void __cpuinit init_thread_xstate(void)
  125. {
  126. /*
  127. * Note that xstate_size might be overwriten later during
  128. * xsave_init().
  129. */
  130. if (!HAVE_HWFP) {
  131. /*
  132. * Disable xsave as we do not support it if i387
  133. * emulation is enabled.
  134. */
  135. setup_clear_cpu_cap(X86_FEATURE_XSAVE);
  136. setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
  137. xstate_size = sizeof(struct i387_soft_struct);
  138. return;
  139. }
  140. if (cpu_has_fxsr)
  141. xstate_size = sizeof(struct i387_fxsave_struct);
  142. else
  143. xstate_size = sizeof(struct i387_fsave_struct);
  144. }
  145. /*
  146. * Called at bootup to set up the initial FPU state that is later cloned
  147. * into all processes.
  148. */
  149. void __cpuinit fpu_init(void)
  150. {
  151. unsigned long cr0;
  152. unsigned long cr4_mask = 0;
  153. if (cpu_has_fxsr)
  154. cr4_mask |= X86_CR4_OSFXSR;
  155. if (cpu_has_xmm)
  156. cr4_mask |= X86_CR4_OSXMMEXCPT;
  157. if (cr4_mask)
  158. set_in_cr4(cr4_mask);
  159. cr0 = read_cr0();
  160. cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
  161. if (!HAVE_HWFP)
  162. cr0 |= X86_CR0_EM;
  163. write_cr0(cr0);
  164. if (!smp_processor_id())
  165. init_thread_xstate();
  166. mxcsr_feature_mask_init();
  167. /* clean state in init */
  168. current_thread_info()->status = 0;
  169. clear_used_math();
  170. }
  171. void fpu_finit(struct fpu *fpu)
  172. {
  173. if (!HAVE_HWFP) {
  174. finit_soft_fpu(&fpu->state->soft);
  175. return;
  176. }
  177. if (cpu_has_fxsr) {
  178. struct i387_fxsave_struct *fx = &fpu->state->fxsave;
  179. memset(fx, 0, xstate_size);
  180. fx->cwd = 0x37f;
  181. if (cpu_has_xmm)
  182. fx->mxcsr = MXCSR_DEFAULT;
  183. } else {
  184. struct i387_fsave_struct *fp = &fpu->state->fsave;
  185. memset(fp, 0, xstate_size);
  186. fp->cwd = 0xffff037fu;
  187. fp->swd = 0xffff0000u;
  188. fp->twd = 0xffffffffu;
  189. fp->fos = 0xffff0000u;
  190. }
  191. }
  192. EXPORT_SYMBOL_GPL(fpu_finit);
  193. /*
  194. * The _current_ task is using the FPU for the first time
  195. * so initialize it and set the mxcsr to its default
  196. * value at reset if we support XMM instructions and then
  197. * remember the current task has used the FPU.
  198. */
  199. int init_fpu(struct task_struct *tsk)
  200. {
  201. int ret;
  202. if (tsk_used_math(tsk)) {
  203. if (HAVE_HWFP && tsk == current)
  204. unlazy_fpu(tsk);
  205. tsk->thread.fpu.last_cpu = ~0;
  206. return 0;
  207. }
  208. /*
  209. * Memory allocation at the first usage of the FPU and other state.
  210. */
  211. ret = fpu_alloc(&tsk->thread.fpu);
  212. if (ret)
  213. return ret;
  214. fpu_finit(&tsk->thread.fpu);
  215. set_stopped_child_used_math(tsk);
  216. return 0;
  217. }
  218. EXPORT_SYMBOL_GPL(init_fpu);
  219. /*
  220. * The xstateregs_active() routine is the same as the fpregs_active() routine,
  221. * as the "regset->n" for the xstate regset will be updated based on the feature
  222. * capabilites supported by the xsave.
  223. */
  224. int fpregs_active(struct task_struct *target, const struct user_regset *regset)
  225. {
  226. return tsk_used_math(target) ? regset->n : 0;
  227. }
  228. int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
  229. {
  230. return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
  231. }
  232. int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
  233. unsigned int pos, unsigned int count,
  234. void *kbuf, void __user *ubuf)
  235. {
  236. int ret;
  237. if (!cpu_has_fxsr)
  238. return -ENODEV;
  239. ret = init_fpu(target);
  240. if (ret)
  241. return ret;
  242. sanitize_i387_state(target);
  243. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  244. &target->thread.fpu.state->fxsave, 0, -1);
  245. }
  246. int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
  247. unsigned int pos, unsigned int count,
  248. const void *kbuf, const void __user *ubuf)
  249. {
  250. int ret;
  251. if (!cpu_has_fxsr)
  252. return -ENODEV;
  253. ret = init_fpu(target);
  254. if (ret)
  255. return ret;
  256. sanitize_i387_state(target);
  257. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  258. &target->thread.fpu.state->fxsave, 0, -1);
  259. /*
  260. * mxcsr reserved bits must be masked to zero for security reasons.
  261. */
  262. target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
  263. /*
  264. * update the header bits in the xsave header, indicating the
  265. * presence of FP and SSE state.
  266. */
  267. if (cpu_has_xsave)
  268. target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
  269. return ret;
  270. }
  271. int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
  272. unsigned int pos, unsigned int count,
  273. void *kbuf, void __user *ubuf)
  274. {
  275. int ret;
  276. if (!cpu_has_xsave)
  277. return -ENODEV;
  278. ret = init_fpu(target);
  279. if (ret)
  280. return ret;
  281. /*
  282. * Copy the 48bytes defined by the software first into the xstate
  283. * memory layout in the thread struct, so that we can copy the entire
  284. * xstateregs to the user using one user_regset_copyout().
  285. */
  286. memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
  287. xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
  288. /*
  289. * Copy the xstate memory layout.
  290. */
  291. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  292. &target->thread.fpu.state->xsave, 0, -1);
  293. return ret;
  294. }
  295. int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
  296. unsigned int pos, unsigned int count,
  297. const void *kbuf, const void __user *ubuf)
  298. {
  299. int ret;
  300. struct xsave_hdr_struct *xsave_hdr;
  301. if (!cpu_has_xsave)
  302. return -ENODEV;
  303. ret = init_fpu(target);
  304. if (ret)
  305. return ret;
  306. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  307. &target->thread.fpu.state->xsave, 0, -1);
  308. /*
  309. * mxcsr reserved bits must be masked to zero for security reasons.
  310. */
  311. target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
  312. xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
  313. xsave_hdr->xstate_bv &= pcntxt_mask;
  314. /*
  315. * These bits must be zero.
  316. */
  317. xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
  318. return ret;
  319. }
  320. #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
  321. /*
  322. * FPU tag word conversions.
  323. */
  324. static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
  325. {
  326. unsigned int tmp; /* to avoid 16 bit prefixes in the code */
  327. /* Transform each pair of bits into 01 (valid) or 00 (empty) */
  328. tmp = ~twd;
  329. tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
  330. /* and move the valid bits to the lower byte. */
  331. tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
  332. tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
  333. tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
  334. return tmp;
  335. }
  336. #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
  337. #define FP_EXP_TAG_VALID 0
  338. #define FP_EXP_TAG_ZERO 1
  339. #define FP_EXP_TAG_SPECIAL 2
  340. #define FP_EXP_TAG_EMPTY 3
  341. static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
  342. {
  343. struct _fpxreg *st;
  344. u32 tos = (fxsave->swd >> 11) & 7;
  345. u32 twd = (unsigned long) fxsave->twd;
  346. u32 tag;
  347. u32 ret = 0xffff0000u;
  348. int i;
  349. for (i = 0; i < 8; i++, twd >>= 1) {
  350. if (twd & 0x1) {
  351. st = FPREG_ADDR(fxsave, (i - tos) & 7);
  352. switch (st->exponent & 0x7fff) {
  353. case 0x7fff:
  354. tag = FP_EXP_TAG_SPECIAL;
  355. break;
  356. case 0x0000:
  357. if (!st->significand[0] &&
  358. !st->significand[1] &&
  359. !st->significand[2] &&
  360. !st->significand[3])
  361. tag = FP_EXP_TAG_ZERO;
  362. else
  363. tag = FP_EXP_TAG_SPECIAL;
  364. break;
  365. default:
  366. if (st->significand[3] & 0x8000)
  367. tag = FP_EXP_TAG_VALID;
  368. else
  369. tag = FP_EXP_TAG_SPECIAL;
  370. break;
  371. }
  372. } else {
  373. tag = FP_EXP_TAG_EMPTY;
  374. }
  375. ret |= tag << (2 * i);
  376. }
  377. return ret;
  378. }
  379. /*
  380. * FXSR floating point environment conversions.
  381. */
  382. void
  383. convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
  384. {
  385. struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
  386. struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
  387. struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
  388. int i;
  389. env->cwd = fxsave->cwd | 0xffff0000u;
  390. env->swd = fxsave->swd | 0xffff0000u;
  391. env->twd = twd_fxsr_to_i387(fxsave);
  392. #ifdef CONFIG_X86_64
  393. env->fip = fxsave->rip;
  394. env->foo = fxsave->rdp;
  395. /*
  396. * should be actually ds/cs at fpu exception time, but
  397. * that information is not available in 64bit mode.
  398. */
  399. env->fcs = task_pt_regs(tsk)->cs;
  400. if (tsk == current) {
  401. savesegment(ds, env->fos);
  402. } else {
  403. env->fos = tsk->thread.ds;
  404. }
  405. env->fos |= 0xffff0000;
  406. #else
  407. env->fip = fxsave->fip;
  408. env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
  409. env->foo = fxsave->foo;
  410. env->fos = fxsave->fos;
  411. #endif
  412. for (i = 0; i < 8; ++i)
  413. memcpy(&to[i], &from[i], sizeof(to[0]));
  414. }
  415. void convert_to_fxsr(struct task_struct *tsk,
  416. const struct user_i387_ia32_struct *env)
  417. {
  418. struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
  419. struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
  420. struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
  421. int i;
  422. fxsave->cwd = env->cwd;
  423. fxsave->swd = env->swd;
  424. fxsave->twd = twd_i387_to_fxsr(env->twd);
  425. fxsave->fop = (u16) ((u32) env->fcs >> 16);
  426. #ifdef CONFIG_X86_64
  427. fxsave->rip = env->fip;
  428. fxsave->rdp = env->foo;
  429. /* cs and ds ignored */
  430. #else
  431. fxsave->fip = env->fip;
  432. fxsave->fcs = (env->fcs & 0xffff);
  433. fxsave->foo = env->foo;
  434. fxsave->fos = env->fos;
  435. #endif
  436. for (i = 0; i < 8; ++i)
  437. memcpy(&to[i], &from[i], sizeof(from[0]));
  438. }
  439. int fpregs_get(struct task_struct *target, const struct user_regset *regset,
  440. unsigned int pos, unsigned int count,
  441. void *kbuf, void __user *ubuf)
  442. {
  443. struct user_i387_ia32_struct env;
  444. int ret;
  445. ret = init_fpu(target);
  446. if (ret)
  447. return ret;
  448. if (!HAVE_HWFP)
  449. return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
  450. if (!cpu_has_fxsr) {
  451. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  452. &target->thread.fpu.state->fsave, 0,
  453. -1);
  454. }
  455. sanitize_i387_state(target);
  456. if (kbuf && pos == 0 && count == sizeof(env)) {
  457. convert_from_fxsr(kbuf, target);
  458. return 0;
  459. }
  460. convert_from_fxsr(&env, target);
  461. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
  462. }
  463. int fpregs_set(struct task_struct *target, const struct user_regset *regset,
  464. unsigned int pos, unsigned int count,
  465. const void *kbuf, const void __user *ubuf)
  466. {
  467. struct user_i387_ia32_struct env;
  468. int ret;
  469. ret = init_fpu(target);
  470. if (ret)
  471. return ret;
  472. sanitize_i387_state(target);
  473. if (!HAVE_HWFP)
  474. return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
  475. if (!cpu_has_fxsr) {
  476. return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  477. &target->thread.fpu.state->fsave, 0, -1);
  478. }
  479. if (pos > 0 || count < sizeof(env))
  480. convert_from_fxsr(&env, target);
  481. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
  482. if (!ret)
  483. convert_to_fxsr(target, &env);
  484. /*
  485. * update the header bit in the xsave header, indicating the
  486. * presence of FP.
  487. */
  488. if (cpu_has_xsave)
  489. target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
  490. return ret;
  491. }
  492. /*
  493. * FPU state for core dumps.
  494. * This is only used for a.out dumps now.
  495. * It is declared generically using elf_fpregset_t (which is
  496. * struct user_i387_struct) but is in fact only used for 32-bit
  497. * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
  498. */
  499. int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
  500. {
  501. struct task_struct *tsk = current;
  502. int fpvalid;
  503. fpvalid = !!used_math();
  504. if (fpvalid)
  505. fpvalid = !fpregs_get(tsk, NULL,
  506. 0, sizeof(struct user_i387_ia32_struct),
  507. fpu, NULL);
  508. return fpvalid;
  509. }
  510. EXPORT_SYMBOL(dump_fpu);
  511. #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */