e1000_main.c 132 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.3.9 12/16/2005
  23. * o incorporate fix for recycled skbs from IBM LTC
  24. * 6.3.7 11/18/2005
  25. * o Honor eeprom setting for enabling/disabling Wake On Lan
  26. * 6.3.5 11/17/2005
  27. * o Fix memory leak in rx ring handling for PCI Express adapters
  28. * 6.3.4 11/8/05
  29. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  30. * 6.3.2 9/20/05
  31. * o Render logic that sets/resets DRV_LOAD as inline functions to
  32. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  33. * network interface is open.
  34. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  35. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  36. * rx_buffer_len
  37. * 6.3.1 9/19/05
  38. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  39. (e1000_clean_tx_irq)
  40. * o Support for 8086:10B5 device (Quad Port)
  41. * 6.2.14 9/15/05
  42. * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
  43. * open/close
  44. * 6.2.13 9/14/05
  45. * o Invoke e1000_check_mng_mode only for 8257x controllers since it
  46. * accesses the FWSM that is not supported in other controllers
  47. * 6.2.12 9/9/05
  48. * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
  49. * o set RCTL:SECRC only for controllers newer than 82543.
  50. * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
  51. * This code was moved from e1000_remove to e1000_close
  52. * 6.2.10 9/6/05
  53. * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
  54. * o Enable fc by default on 82573 controllers (do not read eeprom)
  55. * o Fix rx_errors statistic not to include missed_packet_count
  56. * o Fix rx_dropped statistic not to include missed_packet_count
  57. (Padraig Brady)
  58. * 6.2.9 8/30/05
  59. * o Remove call to update statistics from the controller ib e1000_get_stats
  60. * 6.2.8 8/30/05
  61. * o Improved algorithm for rx buffer allocation/rdt update
  62. * o Flow control watermarks relative to rx PBA size
  63. * o Simplified 'Tx Hung' detect logic
  64. * 6.2.7 8/17/05
  65. * o Report rx buffer allocation failures and tx timeout counts in stats
  66. * 6.2.6 8/16/05
  67. * o Implement workaround for controller erratum -- linear non-tso packet
  68. * following a TSO gets written back prematurely
  69. * 6.2.5 8/15/05
  70. * o Set netdev->tx_queue_len based on link speed/duplex settings.
  71. * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
  72. * o Do not power off PHY if SoL/IDER session is active
  73. * 6.2.4 8/10/05
  74. * o Fix loopback test setup/cleanup for 82571/3 controllers
  75. * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
  76. * all packets as raw
  77. * o Prevent operations that will cause the PHY to be reset if SoL/IDER
  78. * sessions are active and log a message
  79. * 6.2.2 7/21/05
  80. * o used fixed size descriptors for all MTU sizes, reduces memory load
  81. * 6.1.2 4/13/05
  82. * o Fixed ethtool diagnostics
  83. * o Enabled flow control to take default eeprom settings
  84. * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
  85. * calls, one from mii_ioctl and other from within update_stats while
  86. * processing MIIREG ioctl.
  87. */
  88. char e1000_driver_name[] = "e1000";
  89. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  90. #ifndef CONFIG_E1000_NAPI
  91. #define DRIVERNAPI
  92. #else
  93. #define DRIVERNAPI "-NAPI"
  94. #endif
  95. #define DRV_VERSION "7.0.33-k2"DRIVERNAPI
  96. char e1000_driver_version[] = DRV_VERSION;
  97. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  98. /* e1000_pci_tbl - PCI Device ID Table
  99. *
  100. * Last entry must be all 0s
  101. *
  102. * Macro expands to...
  103. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  104. */
  105. static struct pci_device_id e1000_pci_tbl[] = {
  106. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  107. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  108. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  110. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  111. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  112. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  113. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  114. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  115. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  116. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  117. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  118. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  119. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  122. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  123. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  124. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  125. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  126. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  127. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  128. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  129. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  130. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  131. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  132. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  133. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  134. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  135. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  136. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  137. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  138. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  139. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  140. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  141. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  142. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  143. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  144. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  145. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  146. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  147. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  148. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  149. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  150. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  151. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  152. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  153. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  154. /* required last entry */
  155. {0,}
  156. };
  157. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  158. int e1000_up(struct e1000_adapter *adapter);
  159. void e1000_down(struct e1000_adapter *adapter);
  160. void e1000_reset(struct e1000_adapter *adapter);
  161. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  162. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  163. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  164. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  165. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  166. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  167. struct e1000_tx_ring *txdr);
  168. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  169. struct e1000_rx_ring *rxdr);
  170. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  171. struct e1000_tx_ring *tx_ring);
  172. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  173. struct e1000_rx_ring *rx_ring);
  174. void e1000_update_stats(struct e1000_adapter *adapter);
  175. /* Local Function Prototypes */
  176. static int e1000_init_module(void);
  177. static void e1000_exit_module(void);
  178. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  179. static void __devexit e1000_remove(struct pci_dev *pdev);
  180. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  181. static int e1000_sw_init(struct e1000_adapter *adapter);
  182. static int e1000_open(struct net_device *netdev);
  183. static int e1000_close(struct net_device *netdev);
  184. static void e1000_configure_tx(struct e1000_adapter *adapter);
  185. static void e1000_configure_rx(struct e1000_adapter *adapter);
  186. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  187. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  188. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  189. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  190. struct e1000_tx_ring *tx_ring);
  191. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  192. struct e1000_rx_ring *rx_ring);
  193. static void e1000_set_multi(struct net_device *netdev);
  194. static void e1000_update_phy_info(unsigned long data);
  195. static void e1000_watchdog(unsigned long data);
  196. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  197. static void e1000_82547_tx_fifo_stall(unsigned long data);
  198. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  199. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  200. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  201. static int e1000_set_mac(struct net_device *netdev, void *p);
  202. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  203. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  204. struct e1000_tx_ring *tx_ring);
  205. #ifdef CONFIG_E1000_NAPI
  206. static int e1000_clean(struct net_device *poll_dev, int *budget);
  207. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  208. struct e1000_rx_ring *rx_ring,
  209. int *work_done, int work_to_do);
  210. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  211. struct e1000_rx_ring *rx_ring,
  212. int *work_done, int work_to_do);
  213. #else
  214. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  215. struct e1000_rx_ring *rx_ring);
  216. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  217. struct e1000_rx_ring *rx_ring);
  218. #endif
  219. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  220. struct e1000_rx_ring *rx_ring,
  221. int cleaned_count);
  222. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  223. struct e1000_rx_ring *rx_ring,
  224. int cleaned_count);
  225. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  226. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  227. int cmd);
  228. void e1000_set_ethtool_ops(struct net_device *netdev);
  229. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  230. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  231. static void e1000_tx_timeout(struct net_device *dev);
  232. static void e1000_reset_task(struct net_device *dev);
  233. static void e1000_smartspeed(struct e1000_adapter *adapter);
  234. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  235. struct sk_buff *skb);
  236. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  237. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  238. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  239. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  240. #ifdef CONFIG_PM
  241. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  242. static int e1000_resume(struct pci_dev *pdev);
  243. #endif
  244. #ifdef CONFIG_NET_POLL_CONTROLLER
  245. /* for netdump / net console */
  246. static void e1000_netpoll (struct net_device *netdev);
  247. #endif
  248. /* Exported from other modules */
  249. extern void e1000_check_options(struct e1000_adapter *adapter);
  250. static struct pci_driver e1000_driver = {
  251. .name = e1000_driver_name,
  252. .id_table = e1000_pci_tbl,
  253. .probe = e1000_probe,
  254. .remove = __devexit_p(e1000_remove),
  255. /* Power Managment Hooks */
  256. #ifdef CONFIG_PM
  257. .suspend = e1000_suspend,
  258. .resume = e1000_resume
  259. #endif
  260. };
  261. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  262. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  263. MODULE_LICENSE("GPL");
  264. MODULE_VERSION(DRV_VERSION);
  265. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  266. module_param(debug, int, 0);
  267. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  268. /**
  269. * e1000_init_module - Driver Registration Routine
  270. *
  271. * e1000_init_module is the first routine called when the driver is
  272. * loaded. All it does is register with the PCI subsystem.
  273. **/
  274. static int __init
  275. e1000_init_module(void)
  276. {
  277. int ret;
  278. printk(KERN_INFO "%s - version %s\n",
  279. e1000_driver_string, e1000_driver_version);
  280. printk(KERN_INFO "%s\n", e1000_copyright);
  281. ret = pci_module_init(&e1000_driver);
  282. return ret;
  283. }
  284. module_init(e1000_init_module);
  285. /**
  286. * e1000_exit_module - Driver Exit Cleanup Routine
  287. *
  288. * e1000_exit_module is called just before the driver is removed
  289. * from memory.
  290. **/
  291. static void __exit
  292. e1000_exit_module(void)
  293. {
  294. pci_unregister_driver(&e1000_driver);
  295. }
  296. module_exit(e1000_exit_module);
  297. /**
  298. * e1000_irq_disable - Mask off interrupt generation on the NIC
  299. * @adapter: board private structure
  300. **/
  301. static inline void
  302. e1000_irq_disable(struct e1000_adapter *adapter)
  303. {
  304. atomic_inc(&adapter->irq_sem);
  305. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  306. E1000_WRITE_FLUSH(&adapter->hw);
  307. synchronize_irq(adapter->pdev->irq);
  308. }
  309. /**
  310. * e1000_irq_enable - Enable default interrupt generation settings
  311. * @adapter: board private structure
  312. **/
  313. static inline void
  314. e1000_irq_enable(struct e1000_adapter *adapter)
  315. {
  316. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  317. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  318. E1000_WRITE_FLUSH(&adapter->hw);
  319. }
  320. }
  321. static void
  322. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  323. {
  324. struct net_device *netdev = adapter->netdev;
  325. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  326. uint16_t old_vid = adapter->mng_vlan_id;
  327. if (adapter->vlgrp) {
  328. if (!adapter->vlgrp->vlan_devices[vid]) {
  329. if (adapter->hw.mng_cookie.status &
  330. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  331. e1000_vlan_rx_add_vid(netdev, vid);
  332. adapter->mng_vlan_id = vid;
  333. } else
  334. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  335. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  336. (vid != old_vid) &&
  337. !adapter->vlgrp->vlan_devices[old_vid])
  338. e1000_vlan_rx_kill_vid(netdev, old_vid);
  339. } else
  340. adapter->mng_vlan_id = vid;
  341. }
  342. }
  343. /**
  344. * e1000_release_hw_control - release control of the h/w to f/w
  345. * @adapter: address of board private structure
  346. *
  347. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  348. * For ASF and Pass Through versions of f/w this means that the
  349. * driver is no longer loaded. For AMT version (only with 82573) i
  350. * of the f/w this means that the netowrk i/f is closed.
  351. *
  352. **/
  353. static inline void
  354. e1000_release_hw_control(struct e1000_adapter *adapter)
  355. {
  356. uint32_t ctrl_ext;
  357. uint32_t swsm;
  358. /* Let firmware taken over control of h/w */
  359. switch (adapter->hw.mac_type) {
  360. case e1000_82571:
  361. case e1000_82572:
  362. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  363. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  364. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  365. break;
  366. case e1000_82573:
  367. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  368. E1000_WRITE_REG(&adapter->hw, SWSM,
  369. swsm & ~E1000_SWSM_DRV_LOAD);
  370. default:
  371. break;
  372. }
  373. }
  374. /**
  375. * e1000_get_hw_control - get control of the h/w from f/w
  376. * @adapter: address of board private structure
  377. *
  378. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  379. * For ASF and Pass Through versions of f/w this means that
  380. * the driver is loaded. For AMT version (only with 82573)
  381. * of the f/w this means that the netowrk i/f is open.
  382. *
  383. **/
  384. static inline void
  385. e1000_get_hw_control(struct e1000_adapter *adapter)
  386. {
  387. uint32_t ctrl_ext;
  388. uint32_t swsm;
  389. /* Let firmware know the driver has taken over */
  390. switch (adapter->hw.mac_type) {
  391. case e1000_82571:
  392. case e1000_82572:
  393. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  394. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  395. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  396. break;
  397. case e1000_82573:
  398. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  399. E1000_WRITE_REG(&adapter->hw, SWSM,
  400. swsm | E1000_SWSM_DRV_LOAD);
  401. break;
  402. default:
  403. break;
  404. }
  405. }
  406. int
  407. e1000_up(struct e1000_adapter *adapter)
  408. {
  409. struct net_device *netdev = adapter->netdev;
  410. int i, err;
  411. /* hardware has been reset, we need to reload some things */
  412. /* Reset the PHY if it was previously powered down */
  413. if (adapter->hw.media_type == e1000_media_type_copper) {
  414. uint16_t mii_reg;
  415. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  416. if (mii_reg & MII_CR_POWER_DOWN)
  417. e1000_phy_reset(&adapter->hw);
  418. }
  419. e1000_set_multi(netdev);
  420. e1000_restore_vlan(adapter);
  421. e1000_configure_tx(adapter);
  422. e1000_setup_rctl(adapter);
  423. e1000_configure_rx(adapter);
  424. /* call E1000_DESC_UNUSED which always leaves
  425. * at least 1 descriptor unused to make sure
  426. * next_to_use != next_to_clean */
  427. for (i = 0; i < adapter->num_rx_queues; i++) {
  428. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  429. adapter->alloc_rx_buf(adapter, ring,
  430. E1000_DESC_UNUSED(ring));
  431. }
  432. #ifdef CONFIG_PCI_MSI
  433. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  434. adapter->have_msi = TRUE;
  435. if ((err = pci_enable_msi(adapter->pdev))) {
  436. DPRINTK(PROBE, ERR,
  437. "Unable to allocate MSI interrupt Error: %d\n", err);
  438. adapter->have_msi = FALSE;
  439. }
  440. }
  441. #endif
  442. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  443. SA_SHIRQ | SA_SAMPLE_RANDOM,
  444. netdev->name, netdev))) {
  445. DPRINTK(PROBE, ERR,
  446. "Unable to allocate interrupt Error: %d\n", err);
  447. return err;
  448. }
  449. adapter->tx_queue_len = netdev->tx_queue_len;
  450. mod_timer(&adapter->watchdog_timer, jiffies);
  451. #ifdef CONFIG_E1000_NAPI
  452. netif_poll_enable(netdev);
  453. #endif
  454. e1000_irq_enable(adapter);
  455. return 0;
  456. }
  457. void
  458. e1000_down(struct e1000_adapter *adapter)
  459. {
  460. struct net_device *netdev = adapter->netdev;
  461. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  462. e1000_check_mng_mode(&adapter->hw);
  463. e1000_irq_disable(adapter);
  464. free_irq(adapter->pdev->irq, netdev);
  465. #ifdef CONFIG_PCI_MSI
  466. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  467. adapter->have_msi == TRUE)
  468. pci_disable_msi(adapter->pdev);
  469. #endif
  470. del_timer_sync(&adapter->tx_fifo_stall_timer);
  471. del_timer_sync(&adapter->watchdog_timer);
  472. del_timer_sync(&adapter->phy_info_timer);
  473. #ifdef CONFIG_E1000_NAPI
  474. netif_poll_disable(netdev);
  475. #endif
  476. netdev->tx_queue_len = adapter->tx_queue_len;
  477. adapter->link_speed = 0;
  478. adapter->link_duplex = 0;
  479. netif_carrier_off(netdev);
  480. netif_stop_queue(netdev);
  481. e1000_reset(adapter);
  482. e1000_clean_all_tx_rings(adapter);
  483. e1000_clean_all_rx_rings(adapter);
  484. /* Power down the PHY so no link is implied when interface is down *
  485. * The PHY cannot be powered down if any of the following is TRUE *
  486. * (a) WoL is enabled
  487. * (b) AMT is active
  488. * (c) SoL/IDER session is active */
  489. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  490. adapter->hw.media_type == e1000_media_type_copper &&
  491. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  492. !mng_mode_enabled &&
  493. !e1000_check_phy_reset_block(&adapter->hw)) {
  494. uint16_t mii_reg;
  495. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  496. mii_reg |= MII_CR_POWER_DOWN;
  497. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  498. mdelay(1);
  499. }
  500. }
  501. void
  502. e1000_reset(struct e1000_adapter *adapter)
  503. {
  504. uint32_t pba, manc;
  505. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  506. /* Repartition Pba for greater than 9k mtu
  507. * To take effect CTRL.RST is required.
  508. */
  509. switch (adapter->hw.mac_type) {
  510. case e1000_82547:
  511. case e1000_82547_rev_2:
  512. pba = E1000_PBA_30K;
  513. break;
  514. case e1000_82571:
  515. case e1000_82572:
  516. case e1000_80003es2lan:
  517. pba = E1000_PBA_38K;
  518. break;
  519. case e1000_82573:
  520. pba = E1000_PBA_12K;
  521. break;
  522. default:
  523. pba = E1000_PBA_48K;
  524. break;
  525. }
  526. if ((adapter->hw.mac_type != e1000_82573) &&
  527. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  528. pba -= 8; /* allocate more FIFO for Tx */
  529. if (adapter->hw.mac_type == e1000_82547) {
  530. adapter->tx_fifo_head = 0;
  531. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  532. adapter->tx_fifo_size =
  533. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  534. atomic_set(&adapter->tx_fifo_stall, 0);
  535. }
  536. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  537. /* flow control settings */
  538. /* Set the FC high water mark to 90% of the FIFO size.
  539. * Required to clear last 3 LSB */
  540. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  541. adapter->hw.fc_high_water = fc_high_water_mark;
  542. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  543. if (adapter->hw.mac_type == e1000_80003es2lan)
  544. adapter->hw.fc_pause_time = 0xFFFF;
  545. else
  546. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  547. adapter->hw.fc_send_xon = 1;
  548. adapter->hw.fc = adapter->hw.original_fc;
  549. /* Allow time for pending master requests to run */
  550. e1000_reset_hw(&adapter->hw);
  551. if (adapter->hw.mac_type >= e1000_82544)
  552. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  553. if (e1000_init_hw(&adapter->hw))
  554. DPRINTK(PROBE, ERR, "Hardware Error\n");
  555. e1000_update_mng_vlan(adapter);
  556. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  557. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  558. e1000_reset_adaptive(&adapter->hw);
  559. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  560. if (adapter->en_mng_pt) {
  561. manc = E1000_READ_REG(&adapter->hw, MANC);
  562. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  563. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  564. }
  565. }
  566. /**
  567. * e1000_probe - Device Initialization Routine
  568. * @pdev: PCI device information struct
  569. * @ent: entry in e1000_pci_tbl
  570. *
  571. * Returns 0 on success, negative on failure
  572. *
  573. * e1000_probe initializes an adapter identified by a pci_dev structure.
  574. * The OS initialization, configuring of the adapter private structure,
  575. * and a hardware reset occur.
  576. **/
  577. static int __devinit
  578. e1000_probe(struct pci_dev *pdev,
  579. const struct pci_device_id *ent)
  580. {
  581. struct net_device *netdev;
  582. struct e1000_adapter *adapter;
  583. unsigned long mmio_start, mmio_len;
  584. static int cards_found = 0;
  585. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  586. int i, err, pci_using_dac;
  587. uint16_t eeprom_data;
  588. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  589. if ((err = pci_enable_device(pdev)))
  590. return err;
  591. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  592. pci_using_dac = 1;
  593. } else {
  594. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  595. E1000_ERR("No usable DMA configuration, aborting\n");
  596. return err;
  597. }
  598. pci_using_dac = 0;
  599. }
  600. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  601. return err;
  602. pci_set_master(pdev);
  603. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  604. if (!netdev) {
  605. err = -ENOMEM;
  606. goto err_alloc_etherdev;
  607. }
  608. SET_MODULE_OWNER(netdev);
  609. SET_NETDEV_DEV(netdev, &pdev->dev);
  610. pci_set_drvdata(pdev, netdev);
  611. adapter = netdev_priv(netdev);
  612. adapter->netdev = netdev;
  613. adapter->pdev = pdev;
  614. adapter->hw.back = adapter;
  615. adapter->msg_enable = (1 << debug) - 1;
  616. mmio_start = pci_resource_start(pdev, BAR_0);
  617. mmio_len = pci_resource_len(pdev, BAR_0);
  618. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  619. if (!adapter->hw.hw_addr) {
  620. err = -EIO;
  621. goto err_ioremap;
  622. }
  623. for (i = BAR_1; i <= BAR_5; i++) {
  624. if (pci_resource_len(pdev, i) == 0)
  625. continue;
  626. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  627. adapter->hw.io_base = pci_resource_start(pdev, i);
  628. break;
  629. }
  630. }
  631. netdev->open = &e1000_open;
  632. netdev->stop = &e1000_close;
  633. netdev->hard_start_xmit = &e1000_xmit_frame;
  634. netdev->get_stats = &e1000_get_stats;
  635. netdev->set_multicast_list = &e1000_set_multi;
  636. netdev->set_mac_address = &e1000_set_mac;
  637. netdev->change_mtu = &e1000_change_mtu;
  638. netdev->do_ioctl = &e1000_ioctl;
  639. e1000_set_ethtool_ops(netdev);
  640. netdev->tx_timeout = &e1000_tx_timeout;
  641. netdev->watchdog_timeo = 5 * HZ;
  642. #ifdef CONFIG_E1000_NAPI
  643. netdev->poll = &e1000_clean;
  644. netdev->weight = 64;
  645. #endif
  646. netdev->vlan_rx_register = e1000_vlan_rx_register;
  647. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  648. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  649. #ifdef CONFIG_NET_POLL_CONTROLLER
  650. netdev->poll_controller = e1000_netpoll;
  651. #endif
  652. strcpy(netdev->name, pci_name(pdev));
  653. netdev->mem_start = mmio_start;
  654. netdev->mem_end = mmio_start + mmio_len;
  655. netdev->base_addr = adapter->hw.io_base;
  656. adapter->bd_number = cards_found;
  657. /* setup the private structure */
  658. if ((err = e1000_sw_init(adapter)))
  659. goto err_sw_init;
  660. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  661. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  662. /* if ksp3, indicate if it's port a being setup */
  663. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  664. e1000_ksp3_port_a == 0)
  665. adapter->ksp3_port_a = 1;
  666. e1000_ksp3_port_a++;
  667. /* Reset for multiple KP3 adapters */
  668. if (e1000_ksp3_port_a == 4)
  669. e1000_ksp3_port_a = 0;
  670. if (adapter->hw.mac_type >= e1000_82543) {
  671. netdev->features = NETIF_F_SG |
  672. NETIF_F_HW_CSUM |
  673. NETIF_F_HW_VLAN_TX |
  674. NETIF_F_HW_VLAN_RX |
  675. NETIF_F_HW_VLAN_FILTER;
  676. }
  677. #ifdef NETIF_F_TSO
  678. if ((adapter->hw.mac_type >= e1000_82544) &&
  679. (adapter->hw.mac_type != e1000_82547))
  680. netdev->features |= NETIF_F_TSO;
  681. #ifdef NETIF_F_TSO_IPV6
  682. if (adapter->hw.mac_type > e1000_82547_rev_2)
  683. netdev->features |= NETIF_F_TSO_IPV6;
  684. #endif
  685. #endif
  686. if (pci_using_dac)
  687. netdev->features |= NETIF_F_HIGHDMA;
  688. /* hard_start_xmit is safe against parallel locking */
  689. netdev->features |= NETIF_F_LLTX;
  690. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  691. /* before reading the EEPROM, reset the controller to
  692. * put the device in a known good starting state */
  693. e1000_reset_hw(&adapter->hw);
  694. /* make sure the EEPROM is good */
  695. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  696. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  697. err = -EIO;
  698. goto err_eeprom;
  699. }
  700. /* copy the MAC address out of the EEPROM */
  701. if (e1000_read_mac_addr(&adapter->hw))
  702. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  703. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  704. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  705. if (!is_valid_ether_addr(netdev->perm_addr)) {
  706. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  707. err = -EIO;
  708. goto err_eeprom;
  709. }
  710. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  711. e1000_get_bus_info(&adapter->hw);
  712. init_timer(&adapter->tx_fifo_stall_timer);
  713. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  714. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  715. init_timer(&adapter->watchdog_timer);
  716. adapter->watchdog_timer.function = &e1000_watchdog;
  717. adapter->watchdog_timer.data = (unsigned long) adapter;
  718. INIT_WORK(&adapter->watchdog_task,
  719. (void (*)(void *))e1000_watchdog_task, adapter);
  720. init_timer(&adapter->phy_info_timer);
  721. adapter->phy_info_timer.function = &e1000_update_phy_info;
  722. adapter->phy_info_timer.data = (unsigned long) adapter;
  723. INIT_WORK(&adapter->reset_task,
  724. (void (*)(void *))e1000_reset_task, netdev);
  725. /* we're going to reset, so assume we have no link for now */
  726. netif_carrier_off(netdev);
  727. netif_stop_queue(netdev);
  728. e1000_check_options(adapter);
  729. /* Initial Wake on LAN setting
  730. * If APM wake is enabled in the EEPROM,
  731. * enable the ACPI Magic Packet filter
  732. */
  733. switch (adapter->hw.mac_type) {
  734. case e1000_82542_rev2_0:
  735. case e1000_82542_rev2_1:
  736. case e1000_82543:
  737. break;
  738. case e1000_82544:
  739. e1000_read_eeprom(&adapter->hw,
  740. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  741. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  742. break;
  743. case e1000_82546:
  744. case e1000_82546_rev_3:
  745. case e1000_82571:
  746. case e1000_80003es2lan:
  747. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  748. e1000_read_eeprom(&adapter->hw,
  749. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  750. break;
  751. }
  752. /* Fall Through */
  753. default:
  754. e1000_read_eeprom(&adapter->hw,
  755. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  756. break;
  757. }
  758. if (eeprom_data & eeprom_apme_mask)
  759. adapter->wol |= E1000_WUFC_MAG;
  760. /* print bus type/speed/width info */
  761. {
  762. struct e1000_hw *hw = &adapter->hw;
  763. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  764. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  765. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  766. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  767. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  768. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  769. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  770. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  771. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  772. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  773. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  774. "32-bit"));
  775. }
  776. for (i = 0; i < 6; i++)
  777. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  778. /* reset the hardware with the new settings */
  779. e1000_reset(adapter);
  780. /* If the controller is 82573 and f/w is AMT, do not set
  781. * DRV_LOAD until the interface is up. For all other cases,
  782. * let the f/w know that the h/w is now under the control
  783. * of the driver. */
  784. if (adapter->hw.mac_type != e1000_82573 ||
  785. !e1000_check_mng_mode(&adapter->hw))
  786. e1000_get_hw_control(adapter);
  787. strcpy(netdev->name, "eth%d");
  788. if ((err = register_netdev(netdev)))
  789. goto err_register;
  790. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  791. cards_found++;
  792. return 0;
  793. err_register:
  794. err_sw_init:
  795. err_eeprom:
  796. iounmap(adapter->hw.hw_addr);
  797. err_ioremap:
  798. free_netdev(netdev);
  799. err_alloc_etherdev:
  800. pci_release_regions(pdev);
  801. return err;
  802. }
  803. /**
  804. * e1000_remove - Device Removal Routine
  805. * @pdev: PCI device information struct
  806. *
  807. * e1000_remove is called by the PCI subsystem to alert the driver
  808. * that it should release a PCI device. The could be caused by a
  809. * Hot-Plug event, or because the driver is going to be removed from
  810. * memory.
  811. **/
  812. static void __devexit
  813. e1000_remove(struct pci_dev *pdev)
  814. {
  815. struct net_device *netdev = pci_get_drvdata(pdev);
  816. struct e1000_adapter *adapter = netdev_priv(netdev);
  817. uint32_t manc;
  818. #ifdef CONFIG_E1000_NAPI
  819. int i;
  820. #endif
  821. flush_scheduled_work();
  822. if (adapter->hw.mac_type >= e1000_82540 &&
  823. adapter->hw.media_type == e1000_media_type_copper) {
  824. manc = E1000_READ_REG(&adapter->hw, MANC);
  825. if (manc & E1000_MANC_SMBUS_EN) {
  826. manc |= E1000_MANC_ARP_EN;
  827. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  828. }
  829. }
  830. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  831. * would have already happened in close and is redundant. */
  832. e1000_release_hw_control(adapter);
  833. unregister_netdev(netdev);
  834. #ifdef CONFIG_E1000_NAPI
  835. for (i = 0; i < adapter->num_rx_queues; i++)
  836. __dev_put(&adapter->polling_netdev[i]);
  837. #endif
  838. if (!e1000_check_phy_reset_block(&adapter->hw))
  839. e1000_phy_hw_reset(&adapter->hw);
  840. kfree(adapter->tx_ring);
  841. kfree(adapter->rx_ring);
  842. #ifdef CONFIG_E1000_NAPI
  843. kfree(adapter->polling_netdev);
  844. #endif
  845. iounmap(adapter->hw.hw_addr);
  846. pci_release_regions(pdev);
  847. free_netdev(netdev);
  848. pci_disable_device(pdev);
  849. }
  850. /**
  851. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  852. * @adapter: board private structure to initialize
  853. *
  854. * e1000_sw_init initializes the Adapter private data structure.
  855. * Fields are initialized based on PCI device information and
  856. * OS network device settings (MTU size).
  857. **/
  858. static int __devinit
  859. e1000_sw_init(struct e1000_adapter *adapter)
  860. {
  861. struct e1000_hw *hw = &adapter->hw;
  862. struct net_device *netdev = adapter->netdev;
  863. struct pci_dev *pdev = adapter->pdev;
  864. #ifdef CONFIG_E1000_NAPI
  865. int i;
  866. #endif
  867. /* PCI config space info */
  868. hw->vendor_id = pdev->vendor;
  869. hw->device_id = pdev->device;
  870. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  871. hw->subsystem_id = pdev->subsystem_device;
  872. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  873. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  874. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  875. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  876. hw->max_frame_size = netdev->mtu +
  877. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  878. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  879. /* identify the MAC */
  880. if (e1000_set_mac_type(hw)) {
  881. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  882. return -EIO;
  883. }
  884. /* initialize eeprom parameters */
  885. if (e1000_init_eeprom_params(hw)) {
  886. E1000_ERR("EEPROM initialization failed\n");
  887. return -EIO;
  888. }
  889. switch (hw->mac_type) {
  890. default:
  891. break;
  892. case e1000_82541:
  893. case e1000_82547:
  894. case e1000_82541_rev_2:
  895. case e1000_82547_rev_2:
  896. hw->phy_init_script = 1;
  897. break;
  898. }
  899. e1000_set_media_type(hw);
  900. hw->wait_autoneg_complete = FALSE;
  901. hw->tbi_compatibility_en = TRUE;
  902. hw->adaptive_ifs = TRUE;
  903. /* Copper options */
  904. if (hw->media_type == e1000_media_type_copper) {
  905. hw->mdix = AUTO_ALL_MODES;
  906. hw->disable_polarity_correction = FALSE;
  907. hw->master_slave = E1000_MASTER_SLAVE;
  908. }
  909. adapter->num_tx_queues = 1;
  910. adapter->num_rx_queues = 1;
  911. if (e1000_alloc_queues(adapter)) {
  912. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  913. return -ENOMEM;
  914. }
  915. #ifdef CONFIG_E1000_NAPI
  916. for (i = 0; i < adapter->num_rx_queues; i++) {
  917. adapter->polling_netdev[i].priv = adapter;
  918. adapter->polling_netdev[i].poll = &e1000_clean;
  919. adapter->polling_netdev[i].weight = 64;
  920. dev_hold(&adapter->polling_netdev[i]);
  921. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  922. }
  923. spin_lock_init(&adapter->tx_queue_lock);
  924. #endif
  925. atomic_set(&adapter->irq_sem, 1);
  926. spin_lock_init(&adapter->stats_lock);
  927. return 0;
  928. }
  929. /**
  930. * e1000_alloc_queues - Allocate memory for all rings
  931. * @adapter: board private structure to initialize
  932. *
  933. * We allocate one ring per queue at run-time since we don't know the
  934. * number of queues at compile-time. The polling_netdev array is
  935. * intended for Multiqueue, but should work fine with a single queue.
  936. **/
  937. static int __devinit
  938. e1000_alloc_queues(struct e1000_adapter *adapter)
  939. {
  940. int size;
  941. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  942. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  943. if (!adapter->tx_ring)
  944. return -ENOMEM;
  945. memset(adapter->tx_ring, 0, size);
  946. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  947. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  948. if (!adapter->rx_ring) {
  949. kfree(adapter->tx_ring);
  950. return -ENOMEM;
  951. }
  952. memset(adapter->rx_ring, 0, size);
  953. #ifdef CONFIG_E1000_NAPI
  954. size = sizeof(struct net_device) * adapter->num_rx_queues;
  955. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  956. if (!adapter->polling_netdev) {
  957. kfree(adapter->tx_ring);
  958. kfree(adapter->rx_ring);
  959. return -ENOMEM;
  960. }
  961. memset(adapter->polling_netdev, 0, size);
  962. #endif
  963. return E1000_SUCCESS;
  964. }
  965. /**
  966. * e1000_open - Called when a network interface is made active
  967. * @netdev: network interface device structure
  968. *
  969. * Returns 0 on success, negative value on failure
  970. *
  971. * The open entry point is called when a network interface is made
  972. * active by the system (IFF_UP). At this point all resources needed
  973. * for transmit and receive operations are allocated, the interrupt
  974. * handler is registered with the OS, the watchdog timer is started,
  975. * and the stack is notified that the interface is ready.
  976. **/
  977. static int
  978. e1000_open(struct net_device *netdev)
  979. {
  980. struct e1000_adapter *adapter = netdev_priv(netdev);
  981. int err;
  982. /* allocate transmit descriptors */
  983. if ((err = e1000_setup_all_tx_resources(adapter)))
  984. goto err_setup_tx;
  985. /* allocate receive descriptors */
  986. if ((err = e1000_setup_all_rx_resources(adapter)))
  987. goto err_setup_rx;
  988. if ((err = e1000_up(adapter)))
  989. goto err_up;
  990. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  991. if ((adapter->hw.mng_cookie.status &
  992. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  993. e1000_update_mng_vlan(adapter);
  994. }
  995. /* If AMT is enabled, let the firmware know that the network
  996. * interface is now open */
  997. if (adapter->hw.mac_type == e1000_82573 &&
  998. e1000_check_mng_mode(&adapter->hw))
  999. e1000_get_hw_control(adapter);
  1000. return E1000_SUCCESS;
  1001. err_up:
  1002. e1000_free_all_rx_resources(adapter);
  1003. err_setup_rx:
  1004. e1000_free_all_tx_resources(adapter);
  1005. err_setup_tx:
  1006. e1000_reset(adapter);
  1007. return err;
  1008. }
  1009. /**
  1010. * e1000_close - Disables a network interface
  1011. * @netdev: network interface device structure
  1012. *
  1013. * Returns 0, this is not allowed to fail
  1014. *
  1015. * The close entry point is called when an interface is de-activated
  1016. * by the OS. The hardware is still under the drivers control, but
  1017. * needs to be disabled. A global MAC reset is issued to stop the
  1018. * hardware, and all transmit and receive resources are freed.
  1019. **/
  1020. static int
  1021. e1000_close(struct net_device *netdev)
  1022. {
  1023. struct e1000_adapter *adapter = netdev_priv(netdev);
  1024. e1000_down(adapter);
  1025. e1000_free_all_tx_resources(adapter);
  1026. e1000_free_all_rx_resources(adapter);
  1027. if ((adapter->hw.mng_cookie.status &
  1028. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1029. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1030. }
  1031. /* If AMT is enabled, let the firmware know that the network
  1032. * interface is now closed */
  1033. if (adapter->hw.mac_type == e1000_82573 &&
  1034. e1000_check_mng_mode(&adapter->hw))
  1035. e1000_release_hw_control(adapter);
  1036. return 0;
  1037. }
  1038. /**
  1039. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1040. * @adapter: address of board private structure
  1041. * @start: address of beginning of memory
  1042. * @len: length of memory
  1043. **/
  1044. static inline boolean_t
  1045. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1046. void *start, unsigned long len)
  1047. {
  1048. unsigned long begin = (unsigned long) start;
  1049. unsigned long end = begin + len;
  1050. /* First rev 82545 and 82546 need to not allow any memory
  1051. * write location to cross 64k boundary due to errata 23 */
  1052. if (adapter->hw.mac_type == e1000_82545 ||
  1053. adapter->hw.mac_type == e1000_82546) {
  1054. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1055. }
  1056. return TRUE;
  1057. }
  1058. /**
  1059. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1060. * @adapter: board private structure
  1061. * @txdr: tx descriptor ring (for a specific queue) to setup
  1062. *
  1063. * Return 0 on success, negative on failure
  1064. **/
  1065. static int
  1066. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1067. struct e1000_tx_ring *txdr)
  1068. {
  1069. struct pci_dev *pdev = adapter->pdev;
  1070. int size;
  1071. size = sizeof(struct e1000_buffer) * txdr->count;
  1072. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1073. if (!txdr->buffer_info) {
  1074. DPRINTK(PROBE, ERR,
  1075. "Unable to allocate memory for the transmit descriptor ring\n");
  1076. return -ENOMEM;
  1077. }
  1078. memset(txdr->buffer_info, 0, size);
  1079. /* round up to nearest 4K */
  1080. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1081. E1000_ROUNDUP(txdr->size, 4096);
  1082. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1083. if (!txdr->desc) {
  1084. setup_tx_desc_die:
  1085. vfree(txdr->buffer_info);
  1086. DPRINTK(PROBE, ERR,
  1087. "Unable to allocate memory for the transmit descriptor ring\n");
  1088. return -ENOMEM;
  1089. }
  1090. /* Fix for errata 23, can't cross 64kB boundary */
  1091. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1092. void *olddesc = txdr->desc;
  1093. dma_addr_t olddma = txdr->dma;
  1094. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1095. "at %p\n", txdr->size, txdr->desc);
  1096. /* Try again, without freeing the previous */
  1097. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1098. /* Failed allocation, critical failure */
  1099. if (!txdr->desc) {
  1100. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1101. goto setup_tx_desc_die;
  1102. }
  1103. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1104. /* give up */
  1105. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1106. txdr->dma);
  1107. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1108. DPRINTK(PROBE, ERR,
  1109. "Unable to allocate aligned memory "
  1110. "for the transmit descriptor ring\n");
  1111. vfree(txdr->buffer_info);
  1112. return -ENOMEM;
  1113. } else {
  1114. /* Free old allocation, new allocation was successful */
  1115. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1116. }
  1117. }
  1118. memset(txdr->desc, 0, txdr->size);
  1119. txdr->next_to_use = 0;
  1120. txdr->next_to_clean = 0;
  1121. spin_lock_init(&txdr->tx_lock);
  1122. return 0;
  1123. }
  1124. /**
  1125. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1126. * (Descriptors) for all queues
  1127. * @adapter: board private structure
  1128. *
  1129. * If this function returns with an error, then it's possible one or
  1130. * more of the rings is populated (while the rest are not). It is the
  1131. * callers duty to clean those orphaned rings.
  1132. *
  1133. * Return 0 on success, negative on failure
  1134. **/
  1135. int
  1136. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1137. {
  1138. int i, err = 0;
  1139. for (i = 0; i < adapter->num_tx_queues; i++) {
  1140. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1141. if (err) {
  1142. DPRINTK(PROBE, ERR,
  1143. "Allocation for Tx Queue %u failed\n", i);
  1144. break;
  1145. }
  1146. }
  1147. return err;
  1148. }
  1149. /**
  1150. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1151. * @adapter: board private structure
  1152. *
  1153. * Configure the Tx unit of the MAC after a reset.
  1154. **/
  1155. static void
  1156. e1000_configure_tx(struct e1000_adapter *adapter)
  1157. {
  1158. uint64_t tdba;
  1159. struct e1000_hw *hw = &adapter->hw;
  1160. uint32_t tdlen, tctl, tipg, tarc;
  1161. uint32_t ipgr1, ipgr2;
  1162. /* Setup the HW Tx Head and Tail descriptor pointers */
  1163. switch (adapter->num_tx_queues) {
  1164. case 1:
  1165. default:
  1166. tdba = adapter->tx_ring[0].dma;
  1167. tdlen = adapter->tx_ring[0].count *
  1168. sizeof(struct e1000_tx_desc);
  1169. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1170. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1171. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1172. E1000_WRITE_REG(hw, TDH, 0);
  1173. E1000_WRITE_REG(hw, TDT, 0);
  1174. adapter->tx_ring[0].tdh = E1000_TDH;
  1175. adapter->tx_ring[0].tdt = E1000_TDT;
  1176. break;
  1177. }
  1178. /* Set the default values for the Tx Inter Packet Gap timer */
  1179. if (hw->media_type == e1000_media_type_fiber ||
  1180. hw->media_type == e1000_media_type_internal_serdes)
  1181. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1182. else
  1183. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1184. switch (hw->mac_type) {
  1185. case e1000_82542_rev2_0:
  1186. case e1000_82542_rev2_1:
  1187. tipg = DEFAULT_82542_TIPG_IPGT;
  1188. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1189. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1190. break;
  1191. case e1000_80003es2lan:
  1192. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1193. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1194. break;
  1195. default:
  1196. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1197. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1198. break;
  1199. }
  1200. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1201. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1202. E1000_WRITE_REG(hw, TIPG, tipg);
  1203. /* Set the Tx Interrupt Delay register */
  1204. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1205. if (hw->mac_type >= e1000_82540)
  1206. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1207. /* Program the Transmit Control Register */
  1208. tctl = E1000_READ_REG(hw, TCTL);
  1209. tctl &= ~E1000_TCTL_CT;
  1210. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1211. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1212. #ifdef DISABLE_MULR
  1213. /* disable Multiple Reads for debugging */
  1214. tctl &= ~E1000_TCTL_MULR;
  1215. #endif
  1216. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1217. tarc = E1000_READ_REG(hw, TARC0);
  1218. tarc |= ((1 << 25) | (1 << 21));
  1219. E1000_WRITE_REG(hw, TARC0, tarc);
  1220. tarc = E1000_READ_REG(hw, TARC1);
  1221. tarc |= (1 << 25);
  1222. if (tctl & E1000_TCTL_MULR)
  1223. tarc &= ~(1 << 28);
  1224. else
  1225. tarc |= (1 << 28);
  1226. E1000_WRITE_REG(hw, TARC1, tarc);
  1227. } else if (hw->mac_type == e1000_80003es2lan) {
  1228. tarc = E1000_READ_REG(hw, TARC0);
  1229. tarc |= 1;
  1230. if (hw->media_type == e1000_media_type_internal_serdes)
  1231. tarc |= (1 << 20);
  1232. E1000_WRITE_REG(hw, TARC0, tarc);
  1233. tarc = E1000_READ_REG(hw, TARC1);
  1234. tarc |= 1;
  1235. E1000_WRITE_REG(hw, TARC1, tarc);
  1236. }
  1237. e1000_config_collision_dist(hw);
  1238. /* Setup Transmit Descriptor Settings for eop descriptor */
  1239. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1240. E1000_TXD_CMD_IFCS;
  1241. if (hw->mac_type < e1000_82543)
  1242. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1243. else
  1244. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1245. /* Cache if we're 82544 running in PCI-X because we'll
  1246. * need this to apply a workaround later in the send path. */
  1247. if (hw->mac_type == e1000_82544 &&
  1248. hw->bus_type == e1000_bus_type_pcix)
  1249. adapter->pcix_82544 = 1;
  1250. E1000_WRITE_REG(hw, TCTL, tctl);
  1251. }
  1252. /**
  1253. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1254. * @adapter: board private structure
  1255. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1256. *
  1257. * Returns 0 on success, negative on failure
  1258. **/
  1259. static int
  1260. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1261. struct e1000_rx_ring *rxdr)
  1262. {
  1263. struct pci_dev *pdev = adapter->pdev;
  1264. int size, desc_len;
  1265. size = sizeof(struct e1000_buffer) * rxdr->count;
  1266. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1267. if (!rxdr->buffer_info) {
  1268. DPRINTK(PROBE, ERR,
  1269. "Unable to allocate memory for the receive descriptor ring\n");
  1270. return -ENOMEM;
  1271. }
  1272. memset(rxdr->buffer_info, 0, size);
  1273. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1274. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1275. if (!rxdr->ps_page) {
  1276. vfree(rxdr->buffer_info);
  1277. DPRINTK(PROBE, ERR,
  1278. "Unable to allocate memory for the receive descriptor ring\n");
  1279. return -ENOMEM;
  1280. }
  1281. memset(rxdr->ps_page, 0, size);
  1282. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1283. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1284. if (!rxdr->ps_page_dma) {
  1285. vfree(rxdr->buffer_info);
  1286. kfree(rxdr->ps_page);
  1287. DPRINTK(PROBE, ERR,
  1288. "Unable to allocate memory for the receive descriptor ring\n");
  1289. return -ENOMEM;
  1290. }
  1291. memset(rxdr->ps_page_dma, 0, size);
  1292. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1293. desc_len = sizeof(struct e1000_rx_desc);
  1294. else
  1295. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1296. /* Round up to nearest 4K */
  1297. rxdr->size = rxdr->count * desc_len;
  1298. E1000_ROUNDUP(rxdr->size, 4096);
  1299. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1300. if (!rxdr->desc) {
  1301. DPRINTK(PROBE, ERR,
  1302. "Unable to allocate memory for the receive descriptor ring\n");
  1303. setup_rx_desc_die:
  1304. vfree(rxdr->buffer_info);
  1305. kfree(rxdr->ps_page);
  1306. kfree(rxdr->ps_page_dma);
  1307. return -ENOMEM;
  1308. }
  1309. /* Fix for errata 23, can't cross 64kB boundary */
  1310. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1311. void *olddesc = rxdr->desc;
  1312. dma_addr_t olddma = rxdr->dma;
  1313. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1314. "at %p\n", rxdr->size, rxdr->desc);
  1315. /* Try again, without freeing the previous */
  1316. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1317. /* Failed allocation, critical failure */
  1318. if (!rxdr->desc) {
  1319. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1320. DPRINTK(PROBE, ERR,
  1321. "Unable to allocate memory "
  1322. "for the receive descriptor ring\n");
  1323. goto setup_rx_desc_die;
  1324. }
  1325. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1326. /* give up */
  1327. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1328. rxdr->dma);
  1329. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1330. DPRINTK(PROBE, ERR,
  1331. "Unable to allocate aligned memory "
  1332. "for the receive descriptor ring\n");
  1333. goto setup_rx_desc_die;
  1334. } else {
  1335. /* Free old allocation, new allocation was successful */
  1336. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1337. }
  1338. }
  1339. memset(rxdr->desc, 0, rxdr->size);
  1340. rxdr->next_to_clean = 0;
  1341. rxdr->next_to_use = 0;
  1342. return 0;
  1343. }
  1344. /**
  1345. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1346. * (Descriptors) for all queues
  1347. * @adapter: board private structure
  1348. *
  1349. * If this function returns with an error, then it's possible one or
  1350. * more of the rings is populated (while the rest are not). It is the
  1351. * callers duty to clean those orphaned rings.
  1352. *
  1353. * Return 0 on success, negative on failure
  1354. **/
  1355. int
  1356. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1357. {
  1358. int i, err = 0;
  1359. for (i = 0; i < adapter->num_rx_queues; i++) {
  1360. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1361. if (err) {
  1362. DPRINTK(PROBE, ERR,
  1363. "Allocation for Rx Queue %u failed\n", i);
  1364. break;
  1365. }
  1366. }
  1367. return err;
  1368. }
  1369. /**
  1370. * e1000_setup_rctl - configure the receive control registers
  1371. * @adapter: Board private structure
  1372. **/
  1373. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1374. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1375. static void
  1376. e1000_setup_rctl(struct e1000_adapter *adapter)
  1377. {
  1378. uint32_t rctl, rfctl;
  1379. uint32_t psrctl = 0;
  1380. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1381. uint32_t pages = 0;
  1382. #endif
  1383. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1384. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1385. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1386. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1387. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1388. if (adapter->hw.mac_type > e1000_82543)
  1389. rctl |= E1000_RCTL_SECRC;
  1390. if (adapter->hw.tbi_compatibility_on == 1)
  1391. rctl |= E1000_RCTL_SBP;
  1392. else
  1393. rctl &= ~E1000_RCTL_SBP;
  1394. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1395. rctl &= ~E1000_RCTL_LPE;
  1396. else
  1397. rctl |= E1000_RCTL_LPE;
  1398. /* Setup buffer sizes */
  1399. if (adapter->hw.mac_type >= e1000_82571) {
  1400. /* We can now specify buffers in 1K increments.
  1401. * BSIZE and BSEX are ignored in this case. */
  1402. rctl |= adapter->rx_buffer_len << 0x11;
  1403. } else {
  1404. rctl &= ~E1000_RCTL_SZ_4096;
  1405. rctl |= E1000_RCTL_BSEX;
  1406. switch (adapter->rx_buffer_len) {
  1407. case E1000_RXBUFFER_2048:
  1408. default:
  1409. rctl |= E1000_RCTL_SZ_2048;
  1410. rctl &= ~E1000_RCTL_BSEX;
  1411. break;
  1412. case E1000_RXBUFFER_4096:
  1413. rctl |= E1000_RCTL_SZ_4096;
  1414. break;
  1415. case E1000_RXBUFFER_8192:
  1416. rctl |= E1000_RCTL_SZ_8192;
  1417. break;
  1418. case E1000_RXBUFFER_16384:
  1419. rctl |= E1000_RCTL_SZ_16384;
  1420. break;
  1421. }
  1422. }
  1423. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1424. /* 82571 and greater support packet-split where the protocol
  1425. * header is placed in skb->data and the packet data is
  1426. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1427. * In the case of a non-split, skb->data is linearly filled,
  1428. * followed by the page buffers. Therefore, skb->data is
  1429. * sized to hold the largest protocol header.
  1430. */
  1431. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1432. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1433. PAGE_SIZE <= 16384)
  1434. adapter->rx_ps_pages = pages;
  1435. else
  1436. adapter->rx_ps_pages = 0;
  1437. #endif
  1438. if (adapter->rx_ps_pages) {
  1439. /* Configure extra packet-split registers */
  1440. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1441. rfctl |= E1000_RFCTL_EXTEN;
  1442. /* disable IPv6 packet split support */
  1443. rfctl |= E1000_RFCTL_IPV6_DIS;
  1444. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1445. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1446. psrctl |= adapter->rx_ps_bsize0 >>
  1447. E1000_PSRCTL_BSIZE0_SHIFT;
  1448. switch (adapter->rx_ps_pages) {
  1449. case 3:
  1450. psrctl |= PAGE_SIZE <<
  1451. E1000_PSRCTL_BSIZE3_SHIFT;
  1452. case 2:
  1453. psrctl |= PAGE_SIZE <<
  1454. E1000_PSRCTL_BSIZE2_SHIFT;
  1455. case 1:
  1456. psrctl |= PAGE_SIZE >>
  1457. E1000_PSRCTL_BSIZE1_SHIFT;
  1458. break;
  1459. }
  1460. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1461. }
  1462. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1463. }
  1464. /**
  1465. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1466. * @adapter: board private structure
  1467. *
  1468. * Configure the Rx unit of the MAC after a reset.
  1469. **/
  1470. static void
  1471. e1000_configure_rx(struct e1000_adapter *adapter)
  1472. {
  1473. uint64_t rdba;
  1474. struct e1000_hw *hw = &adapter->hw;
  1475. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1476. if (adapter->rx_ps_pages) {
  1477. rdlen = adapter->rx_ring[0].count *
  1478. sizeof(union e1000_rx_desc_packet_split);
  1479. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1480. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1481. } else {
  1482. rdlen = adapter->rx_ring[0].count *
  1483. sizeof(struct e1000_rx_desc);
  1484. adapter->clean_rx = e1000_clean_rx_irq;
  1485. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1486. }
  1487. /* disable receives while setting up the descriptors */
  1488. rctl = E1000_READ_REG(hw, RCTL);
  1489. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1490. /* set the Receive Delay Timer Register */
  1491. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1492. if (hw->mac_type >= e1000_82540) {
  1493. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1494. if (adapter->itr > 1)
  1495. E1000_WRITE_REG(hw, ITR,
  1496. 1000000000 / (adapter->itr * 256));
  1497. }
  1498. if (hw->mac_type >= e1000_82571) {
  1499. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1500. /* Reset delay timers after every interrupt */
  1501. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1502. #ifdef CONFIG_E1000_NAPI
  1503. /* Auto-Mask interrupts upon ICR read. */
  1504. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1505. #endif
  1506. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1507. E1000_WRITE_REG(hw, IAM, ~0);
  1508. E1000_WRITE_FLUSH(hw);
  1509. }
  1510. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1511. * the Base and Length of the Rx Descriptor Ring */
  1512. switch (adapter->num_rx_queues) {
  1513. case 1:
  1514. default:
  1515. rdba = adapter->rx_ring[0].dma;
  1516. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1517. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1518. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1519. E1000_WRITE_REG(hw, RDH, 0);
  1520. E1000_WRITE_REG(hw, RDT, 0);
  1521. adapter->rx_ring[0].rdh = E1000_RDH;
  1522. adapter->rx_ring[0].rdt = E1000_RDT;
  1523. break;
  1524. }
  1525. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1526. if (hw->mac_type >= e1000_82543) {
  1527. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1528. if (adapter->rx_csum == TRUE) {
  1529. rxcsum |= E1000_RXCSUM_TUOFL;
  1530. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1531. * Must be used in conjunction with packet-split. */
  1532. if ((hw->mac_type >= e1000_82571) &&
  1533. (adapter->rx_ps_pages)) {
  1534. rxcsum |= E1000_RXCSUM_IPPCSE;
  1535. }
  1536. } else {
  1537. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1538. /* don't need to clear IPPCSE as it defaults to 0 */
  1539. }
  1540. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1541. }
  1542. if (hw->mac_type == e1000_82573)
  1543. E1000_WRITE_REG(hw, ERT, 0x0100);
  1544. /* Enable Receives */
  1545. E1000_WRITE_REG(hw, RCTL, rctl);
  1546. }
  1547. /**
  1548. * e1000_free_tx_resources - Free Tx Resources per Queue
  1549. * @adapter: board private structure
  1550. * @tx_ring: Tx descriptor ring for a specific queue
  1551. *
  1552. * Free all transmit software resources
  1553. **/
  1554. static void
  1555. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1556. struct e1000_tx_ring *tx_ring)
  1557. {
  1558. struct pci_dev *pdev = adapter->pdev;
  1559. e1000_clean_tx_ring(adapter, tx_ring);
  1560. vfree(tx_ring->buffer_info);
  1561. tx_ring->buffer_info = NULL;
  1562. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1563. tx_ring->desc = NULL;
  1564. }
  1565. /**
  1566. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1567. * @adapter: board private structure
  1568. *
  1569. * Free all transmit software resources
  1570. **/
  1571. void
  1572. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1573. {
  1574. int i;
  1575. for (i = 0; i < adapter->num_tx_queues; i++)
  1576. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1577. }
  1578. static inline void
  1579. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1580. struct e1000_buffer *buffer_info)
  1581. {
  1582. if (buffer_info->dma) {
  1583. pci_unmap_page(adapter->pdev,
  1584. buffer_info->dma,
  1585. buffer_info->length,
  1586. PCI_DMA_TODEVICE);
  1587. }
  1588. if (buffer_info->skb)
  1589. dev_kfree_skb_any(buffer_info->skb);
  1590. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1591. }
  1592. /**
  1593. * e1000_clean_tx_ring - Free Tx Buffers
  1594. * @adapter: board private structure
  1595. * @tx_ring: ring to be cleaned
  1596. **/
  1597. static void
  1598. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1599. struct e1000_tx_ring *tx_ring)
  1600. {
  1601. struct e1000_buffer *buffer_info;
  1602. unsigned long size;
  1603. unsigned int i;
  1604. /* Free all the Tx ring sk_buffs */
  1605. for (i = 0; i < tx_ring->count; i++) {
  1606. buffer_info = &tx_ring->buffer_info[i];
  1607. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1608. }
  1609. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1610. memset(tx_ring->buffer_info, 0, size);
  1611. /* Zero out the descriptor ring */
  1612. memset(tx_ring->desc, 0, tx_ring->size);
  1613. tx_ring->next_to_use = 0;
  1614. tx_ring->next_to_clean = 0;
  1615. tx_ring->last_tx_tso = 0;
  1616. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1617. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1618. }
  1619. /**
  1620. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1621. * @adapter: board private structure
  1622. **/
  1623. static void
  1624. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1625. {
  1626. int i;
  1627. for (i = 0; i < adapter->num_tx_queues; i++)
  1628. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1629. }
  1630. /**
  1631. * e1000_free_rx_resources - Free Rx Resources
  1632. * @adapter: board private structure
  1633. * @rx_ring: ring to clean the resources from
  1634. *
  1635. * Free all receive software resources
  1636. **/
  1637. static void
  1638. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1639. struct e1000_rx_ring *rx_ring)
  1640. {
  1641. struct pci_dev *pdev = adapter->pdev;
  1642. e1000_clean_rx_ring(adapter, rx_ring);
  1643. vfree(rx_ring->buffer_info);
  1644. rx_ring->buffer_info = NULL;
  1645. kfree(rx_ring->ps_page);
  1646. rx_ring->ps_page = NULL;
  1647. kfree(rx_ring->ps_page_dma);
  1648. rx_ring->ps_page_dma = NULL;
  1649. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1650. rx_ring->desc = NULL;
  1651. }
  1652. /**
  1653. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1654. * @adapter: board private structure
  1655. *
  1656. * Free all receive software resources
  1657. **/
  1658. void
  1659. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1660. {
  1661. int i;
  1662. for (i = 0; i < adapter->num_rx_queues; i++)
  1663. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1664. }
  1665. /**
  1666. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1667. * @adapter: board private structure
  1668. * @rx_ring: ring to free buffers from
  1669. **/
  1670. static void
  1671. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1672. struct e1000_rx_ring *rx_ring)
  1673. {
  1674. struct e1000_buffer *buffer_info;
  1675. struct e1000_ps_page *ps_page;
  1676. struct e1000_ps_page_dma *ps_page_dma;
  1677. struct pci_dev *pdev = adapter->pdev;
  1678. unsigned long size;
  1679. unsigned int i, j;
  1680. /* Free all the Rx ring sk_buffs */
  1681. for (i = 0; i < rx_ring->count; i++) {
  1682. buffer_info = &rx_ring->buffer_info[i];
  1683. if (buffer_info->skb) {
  1684. pci_unmap_single(pdev,
  1685. buffer_info->dma,
  1686. buffer_info->length,
  1687. PCI_DMA_FROMDEVICE);
  1688. dev_kfree_skb(buffer_info->skb);
  1689. buffer_info->skb = NULL;
  1690. }
  1691. ps_page = &rx_ring->ps_page[i];
  1692. ps_page_dma = &rx_ring->ps_page_dma[i];
  1693. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1694. if (!ps_page->ps_page[j]) break;
  1695. pci_unmap_page(pdev,
  1696. ps_page_dma->ps_page_dma[j],
  1697. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1698. ps_page_dma->ps_page_dma[j] = 0;
  1699. put_page(ps_page->ps_page[j]);
  1700. ps_page->ps_page[j] = NULL;
  1701. }
  1702. }
  1703. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1704. memset(rx_ring->buffer_info, 0, size);
  1705. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1706. memset(rx_ring->ps_page, 0, size);
  1707. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1708. memset(rx_ring->ps_page_dma, 0, size);
  1709. /* Zero out the descriptor ring */
  1710. memset(rx_ring->desc, 0, rx_ring->size);
  1711. rx_ring->next_to_clean = 0;
  1712. rx_ring->next_to_use = 0;
  1713. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1714. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1715. }
  1716. /**
  1717. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1718. * @adapter: board private structure
  1719. **/
  1720. static void
  1721. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1722. {
  1723. int i;
  1724. for (i = 0; i < adapter->num_rx_queues; i++)
  1725. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1726. }
  1727. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1728. * and memory write and invalidate disabled for certain operations
  1729. */
  1730. static void
  1731. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1732. {
  1733. struct net_device *netdev = adapter->netdev;
  1734. uint32_t rctl;
  1735. e1000_pci_clear_mwi(&adapter->hw);
  1736. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1737. rctl |= E1000_RCTL_RST;
  1738. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1739. E1000_WRITE_FLUSH(&adapter->hw);
  1740. mdelay(5);
  1741. if (netif_running(netdev))
  1742. e1000_clean_all_rx_rings(adapter);
  1743. }
  1744. static void
  1745. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1746. {
  1747. struct net_device *netdev = adapter->netdev;
  1748. uint32_t rctl;
  1749. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1750. rctl &= ~E1000_RCTL_RST;
  1751. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1752. E1000_WRITE_FLUSH(&adapter->hw);
  1753. mdelay(5);
  1754. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1755. e1000_pci_set_mwi(&adapter->hw);
  1756. if (netif_running(netdev)) {
  1757. /* No need to loop, because 82542 supports only 1 queue */
  1758. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1759. e1000_configure_rx(adapter);
  1760. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1761. }
  1762. }
  1763. /**
  1764. * e1000_set_mac - Change the Ethernet Address of the NIC
  1765. * @netdev: network interface device structure
  1766. * @p: pointer to an address structure
  1767. *
  1768. * Returns 0 on success, negative on failure
  1769. **/
  1770. static int
  1771. e1000_set_mac(struct net_device *netdev, void *p)
  1772. {
  1773. struct e1000_adapter *adapter = netdev_priv(netdev);
  1774. struct sockaddr *addr = p;
  1775. if (!is_valid_ether_addr(addr->sa_data))
  1776. return -EADDRNOTAVAIL;
  1777. /* 82542 2.0 needs to be in reset to write receive address registers */
  1778. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1779. e1000_enter_82542_rst(adapter);
  1780. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1781. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1782. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1783. /* With 82571 controllers, LAA may be overwritten (with the default)
  1784. * due to controller reset from the other port. */
  1785. if (adapter->hw.mac_type == e1000_82571) {
  1786. /* activate the work around */
  1787. adapter->hw.laa_is_present = 1;
  1788. /* Hold a copy of the LAA in RAR[14] This is done so that
  1789. * between the time RAR[0] gets clobbered and the time it
  1790. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1791. * of the RARs and no incoming packets directed to this port
  1792. * are dropped. Eventaully the LAA will be in RAR[0] and
  1793. * RAR[14] */
  1794. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1795. E1000_RAR_ENTRIES - 1);
  1796. }
  1797. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1798. e1000_leave_82542_rst(adapter);
  1799. return 0;
  1800. }
  1801. /**
  1802. * e1000_set_multi - Multicast and Promiscuous mode set
  1803. * @netdev: network interface device structure
  1804. *
  1805. * The set_multi entry point is called whenever the multicast address
  1806. * list or the network interface flags are updated. This routine is
  1807. * responsible for configuring the hardware for proper multicast,
  1808. * promiscuous mode, and all-multi behavior.
  1809. **/
  1810. static void
  1811. e1000_set_multi(struct net_device *netdev)
  1812. {
  1813. struct e1000_adapter *adapter = netdev_priv(netdev);
  1814. struct e1000_hw *hw = &adapter->hw;
  1815. struct dev_mc_list *mc_ptr;
  1816. uint32_t rctl;
  1817. uint32_t hash_value;
  1818. int i, rar_entries = E1000_RAR_ENTRIES;
  1819. /* reserve RAR[14] for LAA over-write work-around */
  1820. if (adapter->hw.mac_type == e1000_82571)
  1821. rar_entries--;
  1822. /* Check for Promiscuous and All Multicast modes */
  1823. rctl = E1000_READ_REG(hw, RCTL);
  1824. if (netdev->flags & IFF_PROMISC) {
  1825. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1826. } else if (netdev->flags & IFF_ALLMULTI) {
  1827. rctl |= E1000_RCTL_MPE;
  1828. rctl &= ~E1000_RCTL_UPE;
  1829. } else {
  1830. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1831. }
  1832. E1000_WRITE_REG(hw, RCTL, rctl);
  1833. /* 82542 2.0 needs to be in reset to write receive address registers */
  1834. if (hw->mac_type == e1000_82542_rev2_0)
  1835. e1000_enter_82542_rst(adapter);
  1836. /* load the first 14 multicast address into the exact filters 1-14
  1837. * RAR 0 is used for the station MAC adddress
  1838. * if there are not 14 addresses, go ahead and clear the filters
  1839. * -- with 82571 controllers only 0-13 entries are filled here
  1840. */
  1841. mc_ptr = netdev->mc_list;
  1842. for (i = 1; i < rar_entries; i++) {
  1843. if (mc_ptr) {
  1844. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1845. mc_ptr = mc_ptr->next;
  1846. } else {
  1847. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1848. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1849. }
  1850. }
  1851. /* clear the old settings from the multicast hash table */
  1852. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1853. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1854. /* load any remaining addresses into the hash table */
  1855. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1856. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1857. e1000_mta_set(hw, hash_value);
  1858. }
  1859. if (hw->mac_type == e1000_82542_rev2_0)
  1860. e1000_leave_82542_rst(adapter);
  1861. }
  1862. /* Need to wait a few seconds after link up to get diagnostic information from
  1863. * the phy */
  1864. static void
  1865. e1000_update_phy_info(unsigned long data)
  1866. {
  1867. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1868. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1869. }
  1870. /**
  1871. * e1000_82547_tx_fifo_stall - Timer Call-back
  1872. * @data: pointer to adapter cast into an unsigned long
  1873. **/
  1874. static void
  1875. e1000_82547_tx_fifo_stall(unsigned long data)
  1876. {
  1877. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1878. struct net_device *netdev = adapter->netdev;
  1879. uint32_t tctl;
  1880. if (atomic_read(&adapter->tx_fifo_stall)) {
  1881. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1882. E1000_READ_REG(&adapter->hw, TDH)) &&
  1883. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1884. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1885. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1886. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1887. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1888. E1000_WRITE_REG(&adapter->hw, TCTL,
  1889. tctl & ~E1000_TCTL_EN);
  1890. E1000_WRITE_REG(&adapter->hw, TDFT,
  1891. adapter->tx_head_addr);
  1892. E1000_WRITE_REG(&adapter->hw, TDFH,
  1893. adapter->tx_head_addr);
  1894. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1895. adapter->tx_head_addr);
  1896. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1897. adapter->tx_head_addr);
  1898. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1899. E1000_WRITE_FLUSH(&adapter->hw);
  1900. adapter->tx_fifo_head = 0;
  1901. atomic_set(&adapter->tx_fifo_stall, 0);
  1902. netif_wake_queue(netdev);
  1903. } else {
  1904. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1905. }
  1906. }
  1907. }
  1908. /**
  1909. * e1000_watchdog - Timer Call-back
  1910. * @data: pointer to adapter cast into an unsigned long
  1911. **/
  1912. static void
  1913. e1000_watchdog(unsigned long data)
  1914. {
  1915. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1916. /* Do the rest outside of interrupt context */
  1917. schedule_work(&adapter->watchdog_task);
  1918. }
  1919. static void
  1920. e1000_watchdog_task(struct e1000_adapter *adapter)
  1921. {
  1922. struct net_device *netdev = adapter->netdev;
  1923. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1924. uint32_t link, tctl;
  1925. e1000_check_for_link(&adapter->hw);
  1926. if (adapter->hw.mac_type == e1000_82573) {
  1927. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1928. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1929. e1000_update_mng_vlan(adapter);
  1930. }
  1931. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1932. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1933. link = !adapter->hw.serdes_link_down;
  1934. else
  1935. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1936. if (link) {
  1937. if (!netif_carrier_ok(netdev)) {
  1938. e1000_get_speed_and_duplex(&adapter->hw,
  1939. &adapter->link_speed,
  1940. &adapter->link_duplex);
  1941. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1942. adapter->link_speed,
  1943. adapter->link_duplex == FULL_DUPLEX ?
  1944. "Full Duplex" : "Half Duplex");
  1945. /* tweak tx_queue_len according to speed/duplex
  1946. * and adjust the timeout factor */
  1947. netdev->tx_queue_len = adapter->tx_queue_len;
  1948. adapter->tx_timeout_factor = 1;
  1949. adapter->txb2b = 1;
  1950. switch (adapter->link_speed) {
  1951. case SPEED_10:
  1952. adapter->txb2b = 0;
  1953. netdev->tx_queue_len = 10;
  1954. adapter->tx_timeout_factor = 8;
  1955. break;
  1956. case SPEED_100:
  1957. adapter->txb2b = 0;
  1958. netdev->tx_queue_len = 100;
  1959. /* maybe add some timeout factor ? */
  1960. break;
  1961. }
  1962. if ((adapter->hw.mac_type == e1000_82571 ||
  1963. adapter->hw.mac_type == e1000_82572) &&
  1964. adapter->txb2b == 0) {
  1965. #define SPEED_MODE_BIT (1 << 21)
  1966. uint32_t tarc0;
  1967. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  1968. tarc0 &= ~SPEED_MODE_BIT;
  1969. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  1970. }
  1971. #ifdef NETIF_F_TSO
  1972. /* disable TSO for pcie and 10/100 speeds, to avoid
  1973. * some hardware issues */
  1974. if (!adapter->tso_force &&
  1975. adapter->hw.bus_type == e1000_bus_type_pci_express){
  1976. switch (adapter->link_speed) {
  1977. case SPEED_10:
  1978. case SPEED_100:
  1979. DPRINTK(PROBE,INFO,
  1980. "10/100 speed: disabling TSO\n");
  1981. netdev->features &= ~NETIF_F_TSO;
  1982. break;
  1983. case SPEED_1000:
  1984. netdev->features |= NETIF_F_TSO;
  1985. break;
  1986. default:
  1987. /* oops */
  1988. break;
  1989. }
  1990. }
  1991. #endif
  1992. /* enable transmits in the hardware, need to do this
  1993. * after setting TARC0 */
  1994. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1995. tctl |= E1000_TCTL_EN;
  1996. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1997. netif_carrier_on(netdev);
  1998. netif_wake_queue(netdev);
  1999. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2000. adapter->smartspeed = 0;
  2001. }
  2002. } else {
  2003. if (netif_carrier_ok(netdev)) {
  2004. adapter->link_speed = 0;
  2005. adapter->link_duplex = 0;
  2006. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2007. netif_carrier_off(netdev);
  2008. netif_stop_queue(netdev);
  2009. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2010. /* 80003ES2LAN workaround--
  2011. * For packet buffer work-around on link down event;
  2012. * disable receives in the ISR and
  2013. * reset device here in the watchdog
  2014. */
  2015. if (adapter->hw.mac_type == e1000_80003es2lan) {
  2016. /* reset device */
  2017. schedule_work(&adapter->reset_task);
  2018. }
  2019. }
  2020. e1000_smartspeed(adapter);
  2021. }
  2022. e1000_update_stats(adapter);
  2023. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2024. adapter->tpt_old = adapter->stats.tpt;
  2025. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2026. adapter->colc_old = adapter->stats.colc;
  2027. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2028. adapter->gorcl_old = adapter->stats.gorcl;
  2029. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2030. adapter->gotcl_old = adapter->stats.gotcl;
  2031. e1000_update_adaptive(&adapter->hw);
  2032. if (!netif_carrier_ok(netdev)) {
  2033. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2034. /* We've lost link, so the controller stops DMA,
  2035. * but we've got queued Tx work that's never going
  2036. * to get done, so reset controller to flush Tx.
  2037. * (Do the reset outside of interrupt context). */
  2038. adapter->tx_timeout_count++;
  2039. schedule_work(&adapter->reset_task);
  2040. }
  2041. }
  2042. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2043. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2044. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2045. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2046. * else is between 2000-8000. */
  2047. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2048. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2049. adapter->gotcl - adapter->gorcl :
  2050. adapter->gorcl - adapter->gotcl) / 10000;
  2051. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2052. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2053. }
  2054. /* Cause software interrupt to ensure rx ring is cleaned */
  2055. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2056. /* Force detection of hung controller every watchdog period */
  2057. adapter->detect_tx_hung = TRUE;
  2058. /* With 82571 controllers, LAA may be overwritten due to controller
  2059. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2060. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2061. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2062. /* Reset the timer */
  2063. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2064. }
  2065. #define E1000_TX_FLAGS_CSUM 0x00000001
  2066. #define E1000_TX_FLAGS_VLAN 0x00000002
  2067. #define E1000_TX_FLAGS_TSO 0x00000004
  2068. #define E1000_TX_FLAGS_IPV4 0x00000008
  2069. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2070. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2071. static inline int
  2072. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2073. struct sk_buff *skb)
  2074. {
  2075. #ifdef NETIF_F_TSO
  2076. struct e1000_context_desc *context_desc;
  2077. struct e1000_buffer *buffer_info;
  2078. unsigned int i;
  2079. uint32_t cmd_length = 0;
  2080. uint16_t ipcse = 0, tucse, mss;
  2081. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2082. int err;
  2083. if (skb_shinfo(skb)->tso_size) {
  2084. if (skb_header_cloned(skb)) {
  2085. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2086. if (err)
  2087. return err;
  2088. }
  2089. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2090. mss = skb_shinfo(skb)->tso_size;
  2091. if (skb->protocol == ntohs(ETH_P_IP)) {
  2092. skb->nh.iph->tot_len = 0;
  2093. skb->nh.iph->check = 0;
  2094. skb->h.th->check =
  2095. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2096. skb->nh.iph->daddr,
  2097. 0,
  2098. IPPROTO_TCP,
  2099. 0);
  2100. cmd_length = E1000_TXD_CMD_IP;
  2101. ipcse = skb->h.raw - skb->data - 1;
  2102. #ifdef NETIF_F_TSO_IPV6
  2103. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2104. skb->nh.ipv6h->payload_len = 0;
  2105. skb->h.th->check =
  2106. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2107. &skb->nh.ipv6h->daddr,
  2108. 0,
  2109. IPPROTO_TCP,
  2110. 0);
  2111. ipcse = 0;
  2112. #endif
  2113. }
  2114. ipcss = skb->nh.raw - skb->data;
  2115. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2116. tucss = skb->h.raw - skb->data;
  2117. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2118. tucse = 0;
  2119. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2120. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2121. i = tx_ring->next_to_use;
  2122. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2123. buffer_info = &tx_ring->buffer_info[i];
  2124. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2125. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2126. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2127. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2128. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2129. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2130. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2131. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2132. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2133. buffer_info->time_stamp = jiffies;
  2134. if (++i == tx_ring->count) i = 0;
  2135. tx_ring->next_to_use = i;
  2136. return TRUE;
  2137. }
  2138. #endif
  2139. return FALSE;
  2140. }
  2141. static inline boolean_t
  2142. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2143. struct sk_buff *skb)
  2144. {
  2145. struct e1000_context_desc *context_desc;
  2146. struct e1000_buffer *buffer_info;
  2147. unsigned int i;
  2148. uint8_t css;
  2149. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2150. css = skb->h.raw - skb->data;
  2151. i = tx_ring->next_to_use;
  2152. buffer_info = &tx_ring->buffer_info[i];
  2153. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2154. context_desc->upper_setup.tcp_fields.tucss = css;
  2155. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2156. context_desc->upper_setup.tcp_fields.tucse = 0;
  2157. context_desc->tcp_seg_setup.data = 0;
  2158. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2159. buffer_info->time_stamp = jiffies;
  2160. if (unlikely(++i == tx_ring->count)) i = 0;
  2161. tx_ring->next_to_use = i;
  2162. return TRUE;
  2163. }
  2164. return FALSE;
  2165. }
  2166. #define E1000_MAX_TXD_PWR 12
  2167. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2168. static inline int
  2169. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2170. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2171. unsigned int nr_frags, unsigned int mss)
  2172. {
  2173. struct e1000_buffer *buffer_info;
  2174. unsigned int len = skb->len;
  2175. unsigned int offset = 0, size, count = 0, i;
  2176. unsigned int f;
  2177. len -= skb->data_len;
  2178. i = tx_ring->next_to_use;
  2179. while (len) {
  2180. buffer_info = &tx_ring->buffer_info[i];
  2181. size = min(len, max_per_txd);
  2182. #ifdef NETIF_F_TSO
  2183. /* Workaround for Controller erratum --
  2184. * descriptor for non-tso packet in a linear SKB that follows a
  2185. * tso gets written back prematurely before the data is fully
  2186. * DMAd to the controller */
  2187. if (!skb->data_len && tx_ring->last_tx_tso &&
  2188. !skb_shinfo(skb)->tso_size) {
  2189. tx_ring->last_tx_tso = 0;
  2190. size -= 4;
  2191. }
  2192. /* Workaround for premature desc write-backs
  2193. * in TSO mode. Append 4-byte sentinel desc */
  2194. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2195. size -= 4;
  2196. #endif
  2197. /* work-around for errata 10 and it applies
  2198. * to all controllers in PCI-X mode
  2199. * The fix is to make sure that the first descriptor of a
  2200. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2201. */
  2202. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2203. (size > 2015) && count == 0))
  2204. size = 2015;
  2205. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2206. * terminating buffers within evenly-aligned dwords. */
  2207. if (unlikely(adapter->pcix_82544 &&
  2208. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2209. size > 4))
  2210. size -= 4;
  2211. buffer_info->length = size;
  2212. buffer_info->dma =
  2213. pci_map_single(adapter->pdev,
  2214. skb->data + offset,
  2215. size,
  2216. PCI_DMA_TODEVICE);
  2217. buffer_info->time_stamp = jiffies;
  2218. len -= size;
  2219. offset += size;
  2220. count++;
  2221. if (unlikely(++i == tx_ring->count)) i = 0;
  2222. }
  2223. for (f = 0; f < nr_frags; f++) {
  2224. struct skb_frag_struct *frag;
  2225. frag = &skb_shinfo(skb)->frags[f];
  2226. len = frag->size;
  2227. offset = frag->page_offset;
  2228. while (len) {
  2229. buffer_info = &tx_ring->buffer_info[i];
  2230. size = min(len, max_per_txd);
  2231. #ifdef NETIF_F_TSO
  2232. /* Workaround for premature desc write-backs
  2233. * in TSO mode. Append 4-byte sentinel desc */
  2234. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2235. size -= 4;
  2236. #endif
  2237. /* Workaround for potential 82544 hang in PCI-X.
  2238. * Avoid terminating buffers within evenly-aligned
  2239. * dwords. */
  2240. if (unlikely(adapter->pcix_82544 &&
  2241. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2242. size > 4))
  2243. size -= 4;
  2244. buffer_info->length = size;
  2245. buffer_info->dma =
  2246. pci_map_page(adapter->pdev,
  2247. frag->page,
  2248. offset,
  2249. size,
  2250. PCI_DMA_TODEVICE);
  2251. buffer_info->time_stamp = jiffies;
  2252. len -= size;
  2253. offset += size;
  2254. count++;
  2255. if (unlikely(++i == tx_ring->count)) i = 0;
  2256. }
  2257. }
  2258. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2259. tx_ring->buffer_info[i].skb = skb;
  2260. tx_ring->buffer_info[first].next_to_watch = i;
  2261. return count;
  2262. }
  2263. static inline void
  2264. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2265. int tx_flags, int count)
  2266. {
  2267. struct e1000_tx_desc *tx_desc = NULL;
  2268. struct e1000_buffer *buffer_info;
  2269. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2270. unsigned int i;
  2271. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2272. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2273. E1000_TXD_CMD_TSE;
  2274. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2275. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2276. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2277. }
  2278. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2279. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2280. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2281. }
  2282. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2283. txd_lower |= E1000_TXD_CMD_VLE;
  2284. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2285. }
  2286. i = tx_ring->next_to_use;
  2287. while (count--) {
  2288. buffer_info = &tx_ring->buffer_info[i];
  2289. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2290. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2291. tx_desc->lower.data =
  2292. cpu_to_le32(txd_lower | buffer_info->length);
  2293. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2294. if (unlikely(++i == tx_ring->count)) i = 0;
  2295. }
  2296. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2297. /* Force memory writes to complete before letting h/w
  2298. * know there are new descriptors to fetch. (Only
  2299. * applicable for weak-ordered memory model archs,
  2300. * such as IA-64). */
  2301. wmb();
  2302. tx_ring->next_to_use = i;
  2303. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2304. }
  2305. /**
  2306. * 82547 workaround to avoid controller hang in half-duplex environment.
  2307. * The workaround is to avoid queuing a large packet that would span
  2308. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2309. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2310. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2311. * to the beginning of the Tx FIFO.
  2312. **/
  2313. #define E1000_FIFO_HDR 0x10
  2314. #define E1000_82547_PAD_LEN 0x3E0
  2315. static inline int
  2316. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2317. {
  2318. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2319. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2320. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2321. if (adapter->link_duplex != HALF_DUPLEX)
  2322. goto no_fifo_stall_required;
  2323. if (atomic_read(&adapter->tx_fifo_stall))
  2324. return 1;
  2325. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2326. atomic_set(&adapter->tx_fifo_stall, 1);
  2327. return 1;
  2328. }
  2329. no_fifo_stall_required:
  2330. adapter->tx_fifo_head += skb_fifo_len;
  2331. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2332. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2333. return 0;
  2334. }
  2335. #define MINIMUM_DHCP_PACKET_SIZE 282
  2336. static inline int
  2337. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2338. {
  2339. struct e1000_hw *hw = &adapter->hw;
  2340. uint16_t length, offset;
  2341. if (vlan_tx_tag_present(skb)) {
  2342. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2343. ( adapter->hw.mng_cookie.status &
  2344. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2345. return 0;
  2346. }
  2347. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2348. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2349. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2350. const struct iphdr *ip =
  2351. (struct iphdr *)((uint8_t *)skb->data+14);
  2352. if (IPPROTO_UDP == ip->protocol) {
  2353. struct udphdr *udp =
  2354. (struct udphdr *)((uint8_t *)ip +
  2355. (ip->ihl << 2));
  2356. if (ntohs(udp->dest) == 67) {
  2357. offset = (uint8_t *)udp + 8 - skb->data;
  2358. length = skb->len - offset;
  2359. return e1000_mng_write_dhcp_info(hw,
  2360. (uint8_t *)udp + 8,
  2361. length);
  2362. }
  2363. }
  2364. }
  2365. }
  2366. return 0;
  2367. }
  2368. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2369. static int
  2370. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2371. {
  2372. struct e1000_adapter *adapter = netdev_priv(netdev);
  2373. struct e1000_tx_ring *tx_ring;
  2374. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2375. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2376. unsigned int tx_flags = 0;
  2377. unsigned int len = skb->len;
  2378. unsigned long flags;
  2379. unsigned int nr_frags = 0;
  2380. unsigned int mss = 0;
  2381. int count = 0;
  2382. int tso;
  2383. unsigned int f;
  2384. len -= skb->data_len;
  2385. tx_ring = adapter->tx_ring;
  2386. if (unlikely(skb->len <= 0)) {
  2387. dev_kfree_skb_any(skb);
  2388. return NETDEV_TX_OK;
  2389. }
  2390. #ifdef NETIF_F_TSO
  2391. mss = skb_shinfo(skb)->tso_size;
  2392. /* The controller does a simple calculation to
  2393. * make sure there is enough room in the FIFO before
  2394. * initiating the DMA for each buffer. The calc is:
  2395. * 4 = ceil(buffer len/mss). To make sure we don't
  2396. * overrun the FIFO, adjust the max buffer len if mss
  2397. * drops. */
  2398. if (mss) {
  2399. uint8_t hdr_len;
  2400. max_per_txd = min(mss << 2, max_per_txd);
  2401. max_txd_pwr = fls(max_per_txd) - 1;
  2402. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2403. * points to just header, pull a few bytes of payload from
  2404. * frags into skb->data */
  2405. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2406. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2407. switch (adapter->hw.mac_type) {
  2408. unsigned int pull_size;
  2409. case e1000_82571:
  2410. case e1000_82572:
  2411. case e1000_82573:
  2412. pull_size = min((unsigned int)4, skb->data_len);
  2413. if (!__pskb_pull_tail(skb, pull_size)) {
  2414. printk(KERN_ERR
  2415. "__pskb_pull_tail failed.\n");
  2416. dev_kfree_skb_any(skb);
  2417. return -EFAULT;
  2418. }
  2419. len = skb->len - skb->data_len;
  2420. break;
  2421. default:
  2422. /* do nothing */
  2423. break;
  2424. }
  2425. }
  2426. }
  2427. /* reserve a descriptor for the offload context */
  2428. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2429. count++;
  2430. count++;
  2431. #else
  2432. if (skb->ip_summed == CHECKSUM_HW)
  2433. count++;
  2434. #endif
  2435. #ifdef NETIF_F_TSO
  2436. /* Controller Erratum workaround */
  2437. if (!skb->data_len && tx_ring->last_tx_tso &&
  2438. !skb_shinfo(skb)->tso_size)
  2439. count++;
  2440. #endif
  2441. count += TXD_USE_COUNT(len, max_txd_pwr);
  2442. if (adapter->pcix_82544)
  2443. count++;
  2444. /* work-around for errata 10 and it applies to all controllers
  2445. * in PCI-X mode, so add one more descriptor to the count
  2446. */
  2447. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2448. (len > 2015)))
  2449. count++;
  2450. nr_frags = skb_shinfo(skb)->nr_frags;
  2451. for (f = 0; f < nr_frags; f++)
  2452. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2453. max_txd_pwr);
  2454. if (adapter->pcix_82544)
  2455. count += nr_frags;
  2456. if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2457. e1000_transfer_dhcp_info(adapter, skb);
  2458. local_irq_save(flags);
  2459. if (!spin_trylock(&tx_ring->tx_lock)) {
  2460. /* Collision - tell upper layer to requeue */
  2461. local_irq_restore(flags);
  2462. return NETDEV_TX_LOCKED;
  2463. }
  2464. /* need: count + 2 desc gap to keep tail from touching
  2465. * head, otherwise try next time */
  2466. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2467. netif_stop_queue(netdev);
  2468. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2469. return NETDEV_TX_BUSY;
  2470. }
  2471. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2472. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2473. netif_stop_queue(netdev);
  2474. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2475. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2476. return NETDEV_TX_BUSY;
  2477. }
  2478. }
  2479. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2480. tx_flags |= E1000_TX_FLAGS_VLAN;
  2481. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2482. }
  2483. first = tx_ring->next_to_use;
  2484. tso = e1000_tso(adapter, tx_ring, skb);
  2485. if (tso < 0) {
  2486. dev_kfree_skb_any(skb);
  2487. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2488. return NETDEV_TX_OK;
  2489. }
  2490. if (likely(tso)) {
  2491. tx_ring->last_tx_tso = 1;
  2492. tx_flags |= E1000_TX_FLAGS_TSO;
  2493. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2494. tx_flags |= E1000_TX_FLAGS_CSUM;
  2495. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2496. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2497. * no longer assume, we must. */
  2498. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2499. tx_flags |= E1000_TX_FLAGS_IPV4;
  2500. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2501. e1000_tx_map(adapter, tx_ring, skb, first,
  2502. max_per_txd, nr_frags, mss));
  2503. netdev->trans_start = jiffies;
  2504. /* Make sure there is space in the ring for the next send. */
  2505. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2506. netif_stop_queue(netdev);
  2507. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2508. return NETDEV_TX_OK;
  2509. }
  2510. /**
  2511. * e1000_tx_timeout - Respond to a Tx Hang
  2512. * @netdev: network interface device structure
  2513. **/
  2514. static void
  2515. e1000_tx_timeout(struct net_device *netdev)
  2516. {
  2517. struct e1000_adapter *adapter = netdev_priv(netdev);
  2518. /* Do the reset outside of interrupt context */
  2519. adapter->tx_timeout_count++;
  2520. schedule_work(&adapter->reset_task);
  2521. }
  2522. static void
  2523. e1000_reset_task(struct net_device *netdev)
  2524. {
  2525. struct e1000_adapter *adapter = netdev_priv(netdev);
  2526. e1000_down(adapter);
  2527. e1000_up(adapter);
  2528. }
  2529. /**
  2530. * e1000_get_stats - Get System Network Statistics
  2531. * @netdev: network interface device structure
  2532. *
  2533. * Returns the address of the device statistics structure.
  2534. * The statistics are actually updated from the timer callback.
  2535. **/
  2536. static struct net_device_stats *
  2537. e1000_get_stats(struct net_device *netdev)
  2538. {
  2539. struct e1000_adapter *adapter = netdev_priv(netdev);
  2540. /* only return the current stats */
  2541. return &adapter->net_stats;
  2542. }
  2543. /**
  2544. * e1000_change_mtu - Change the Maximum Transfer Unit
  2545. * @netdev: network interface device structure
  2546. * @new_mtu: new value for maximum frame size
  2547. *
  2548. * Returns 0 on success, negative on failure
  2549. **/
  2550. static int
  2551. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2552. {
  2553. struct e1000_adapter *adapter = netdev_priv(netdev);
  2554. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2555. uint16_t eeprom_data = 0;
  2556. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2557. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2558. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2559. return -EINVAL;
  2560. }
  2561. /* Adapter-specific max frame size limits. */
  2562. switch (adapter->hw.mac_type) {
  2563. case e1000_82542_rev2_0:
  2564. case e1000_82542_rev2_1:
  2565. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2566. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2567. return -EINVAL;
  2568. }
  2569. break;
  2570. case e1000_82573:
  2571. /* only enable jumbo frames if ASPM is disabled completely
  2572. * this means both bits must be zero in 0x1A bits 3:2 */
  2573. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2574. &eeprom_data);
  2575. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2576. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2577. DPRINTK(PROBE, ERR,
  2578. "Jumbo Frames not supported.\n");
  2579. return -EINVAL;
  2580. }
  2581. break;
  2582. }
  2583. /* fall through to get support */
  2584. case e1000_82571:
  2585. case e1000_82572:
  2586. case e1000_80003es2lan:
  2587. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2588. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2589. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2590. return -EINVAL;
  2591. }
  2592. break;
  2593. default:
  2594. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2595. break;
  2596. }
  2597. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2598. adapter->rx_buffer_len = max_frame;
  2599. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2600. } else {
  2601. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2602. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2603. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2604. "on 82542\n");
  2605. return -EINVAL;
  2606. } else {
  2607. if(max_frame <= E1000_RXBUFFER_2048)
  2608. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2609. else if(max_frame <= E1000_RXBUFFER_4096)
  2610. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2611. else if(max_frame <= E1000_RXBUFFER_8192)
  2612. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2613. else if(max_frame <= E1000_RXBUFFER_16384)
  2614. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2615. }
  2616. }
  2617. netdev->mtu = new_mtu;
  2618. if (netif_running(netdev)) {
  2619. e1000_down(adapter);
  2620. e1000_up(adapter);
  2621. }
  2622. adapter->hw.max_frame_size = max_frame;
  2623. return 0;
  2624. }
  2625. /**
  2626. * e1000_update_stats - Update the board statistics counters
  2627. * @adapter: board private structure
  2628. **/
  2629. void
  2630. e1000_update_stats(struct e1000_adapter *adapter)
  2631. {
  2632. struct e1000_hw *hw = &adapter->hw;
  2633. unsigned long flags;
  2634. uint16_t phy_tmp;
  2635. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2636. spin_lock_irqsave(&adapter->stats_lock, flags);
  2637. /* these counters are modified from e1000_adjust_tbi_stats,
  2638. * called from the interrupt context, so they must only
  2639. * be written while holding adapter->stats_lock
  2640. */
  2641. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2642. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2643. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2644. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2645. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2646. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2647. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2648. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2649. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2650. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2651. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2652. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2653. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2654. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2655. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2656. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2657. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2658. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2659. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2660. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2661. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2662. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2663. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2664. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2665. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2666. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2667. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2668. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2669. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2670. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2671. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2672. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2673. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2674. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2675. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2676. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2677. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2678. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2679. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2680. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2681. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2682. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2683. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2684. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2685. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2686. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2687. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2688. /* used for adaptive IFS */
  2689. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2690. adapter->stats.tpt += hw->tx_packet_delta;
  2691. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2692. adapter->stats.colc += hw->collision_delta;
  2693. if (hw->mac_type >= e1000_82543) {
  2694. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2695. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2696. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2697. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2698. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2699. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2700. }
  2701. if (hw->mac_type > e1000_82547_rev_2) {
  2702. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2703. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2704. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2705. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2706. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2707. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2708. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2709. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2710. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2711. }
  2712. /* Fill out the OS statistics structure */
  2713. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2714. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2715. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2716. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2717. adapter->net_stats.multicast = adapter->stats.mprc;
  2718. adapter->net_stats.collisions = adapter->stats.colc;
  2719. /* Rx Errors */
  2720. /* RLEC on some newer hardware can be incorrect so build
  2721. * our own version based on RUC and ROC */
  2722. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2723. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2724. adapter->stats.ruc + adapter->stats.roc +
  2725. adapter->stats.cexterr;
  2726. adapter->net_stats.rx_dropped = 0;
  2727. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2728. adapter->stats.roc;
  2729. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2730. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2731. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2732. /* Tx Errors */
  2733. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2734. adapter->stats.latecol;
  2735. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2736. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2737. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2738. /* Tx Dropped needs to be maintained elsewhere */
  2739. /* Phy Stats */
  2740. if (hw->media_type == e1000_media_type_copper) {
  2741. if ((adapter->link_speed == SPEED_1000) &&
  2742. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2743. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2744. adapter->phy_stats.idle_errors += phy_tmp;
  2745. }
  2746. if ((hw->mac_type <= e1000_82546) &&
  2747. (hw->phy_type == e1000_phy_m88) &&
  2748. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2749. adapter->phy_stats.receive_errors += phy_tmp;
  2750. }
  2751. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2752. }
  2753. /**
  2754. * e1000_intr - Interrupt Handler
  2755. * @irq: interrupt number
  2756. * @data: pointer to a network interface device structure
  2757. * @pt_regs: CPU registers structure
  2758. **/
  2759. static irqreturn_t
  2760. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2761. {
  2762. struct net_device *netdev = data;
  2763. struct e1000_adapter *adapter = netdev_priv(netdev);
  2764. struct e1000_hw *hw = &adapter->hw;
  2765. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2766. #ifndef CONFIG_E1000_NAPI
  2767. int i;
  2768. #else
  2769. /* Interrupt Auto-Mask...upon reading ICR,
  2770. * interrupts are masked. No need for the
  2771. * IMC write, but it does mean we should
  2772. * account for it ASAP. */
  2773. if (likely(hw->mac_type >= e1000_82571))
  2774. atomic_inc(&adapter->irq_sem);
  2775. #endif
  2776. if (unlikely(!icr)) {
  2777. #ifdef CONFIG_E1000_NAPI
  2778. if (hw->mac_type >= e1000_82571)
  2779. e1000_irq_enable(adapter);
  2780. #endif
  2781. return IRQ_NONE; /* Not our interrupt */
  2782. }
  2783. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2784. hw->get_link_status = 1;
  2785. /* 80003ES2LAN workaround--
  2786. * For packet buffer work-around on link down event;
  2787. * disable receives here in the ISR and
  2788. * reset adapter in watchdog
  2789. */
  2790. if (netif_carrier_ok(netdev) &&
  2791. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2792. /* disable receives */
  2793. rctl = E1000_READ_REG(hw, RCTL);
  2794. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2795. }
  2796. mod_timer(&adapter->watchdog_timer, jiffies);
  2797. }
  2798. #ifdef CONFIG_E1000_NAPI
  2799. if (unlikely(hw->mac_type < e1000_82571)) {
  2800. atomic_inc(&adapter->irq_sem);
  2801. E1000_WRITE_REG(hw, IMC, ~0);
  2802. E1000_WRITE_FLUSH(hw);
  2803. }
  2804. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2805. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2806. else
  2807. e1000_irq_enable(adapter);
  2808. #else
  2809. /* Writing IMC and IMS is needed for 82547.
  2810. * Due to Hub Link bus being occupied, an interrupt
  2811. * de-assertion message is not able to be sent.
  2812. * When an interrupt assertion message is generated later,
  2813. * two messages are re-ordered and sent out.
  2814. * That causes APIC to think 82547 is in de-assertion
  2815. * state, while 82547 is in assertion state, resulting
  2816. * in dead lock. Writing IMC forces 82547 into
  2817. * de-assertion state.
  2818. */
  2819. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2820. atomic_inc(&adapter->irq_sem);
  2821. E1000_WRITE_REG(hw, IMC, ~0);
  2822. }
  2823. for (i = 0; i < E1000_MAX_INTR; i++)
  2824. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2825. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2826. break;
  2827. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2828. e1000_irq_enable(adapter);
  2829. #endif
  2830. return IRQ_HANDLED;
  2831. }
  2832. #ifdef CONFIG_E1000_NAPI
  2833. /**
  2834. * e1000_clean - NAPI Rx polling callback
  2835. * @adapter: board private structure
  2836. **/
  2837. static int
  2838. e1000_clean(struct net_device *poll_dev, int *budget)
  2839. {
  2840. struct e1000_adapter *adapter;
  2841. int work_to_do = min(*budget, poll_dev->quota);
  2842. int tx_cleaned = 0, i = 0, work_done = 0;
  2843. /* Must NOT use netdev_priv macro here. */
  2844. adapter = poll_dev->priv;
  2845. /* Keep link state information with original netdev */
  2846. if (!netif_carrier_ok(adapter->netdev))
  2847. goto quit_polling;
  2848. while (poll_dev != &adapter->polling_netdev[i]) {
  2849. i++;
  2850. if (unlikely(i == adapter->num_rx_queues))
  2851. BUG();
  2852. }
  2853. if (likely(adapter->num_tx_queues == 1)) {
  2854. /* e1000_clean is called per-cpu. This lock protects
  2855. * tx_ring[0] from being cleaned by multiple cpus
  2856. * simultaneously. A failure obtaining the lock means
  2857. * tx_ring[0] is currently being cleaned anyway. */
  2858. if (spin_trylock(&adapter->tx_queue_lock)) {
  2859. tx_cleaned = e1000_clean_tx_irq(adapter,
  2860. &adapter->tx_ring[0]);
  2861. spin_unlock(&adapter->tx_queue_lock);
  2862. }
  2863. } else
  2864. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2865. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2866. &work_done, work_to_do);
  2867. *budget -= work_done;
  2868. poll_dev->quota -= work_done;
  2869. /* If no Tx and not enough Rx work done, exit the polling mode */
  2870. if ((!tx_cleaned && (work_done == 0)) ||
  2871. !netif_running(adapter->netdev)) {
  2872. quit_polling:
  2873. netif_rx_complete(poll_dev);
  2874. e1000_irq_enable(adapter);
  2875. return 0;
  2876. }
  2877. return 1;
  2878. }
  2879. #endif
  2880. /**
  2881. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2882. * @adapter: board private structure
  2883. **/
  2884. static boolean_t
  2885. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2886. struct e1000_tx_ring *tx_ring)
  2887. {
  2888. struct net_device *netdev = adapter->netdev;
  2889. struct e1000_tx_desc *tx_desc, *eop_desc;
  2890. struct e1000_buffer *buffer_info;
  2891. unsigned int i, eop;
  2892. #ifdef CONFIG_E1000_NAPI
  2893. unsigned int count = 0;
  2894. #endif
  2895. boolean_t cleaned = FALSE;
  2896. i = tx_ring->next_to_clean;
  2897. eop = tx_ring->buffer_info[i].next_to_watch;
  2898. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2899. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2900. for (cleaned = FALSE; !cleaned; ) {
  2901. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2902. buffer_info = &tx_ring->buffer_info[i];
  2903. cleaned = (i == eop);
  2904. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2905. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2906. if (unlikely(++i == tx_ring->count)) i = 0;
  2907. }
  2908. eop = tx_ring->buffer_info[i].next_to_watch;
  2909. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2910. #ifdef CONFIG_E1000_NAPI
  2911. #define E1000_TX_WEIGHT 64
  2912. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2913. if (count++ == E1000_TX_WEIGHT) break;
  2914. #endif
  2915. }
  2916. tx_ring->next_to_clean = i;
  2917. spin_lock(&tx_ring->tx_lock);
  2918. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2919. netif_carrier_ok(netdev)))
  2920. netif_wake_queue(netdev);
  2921. spin_unlock(&tx_ring->tx_lock);
  2922. if (adapter->detect_tx_hung) {
  2923. /* Detect a transmit hang in hardware, this serializes the
  2924. * check with the clearing of time_stamp and movement of i */
  2925. adapter->detect_tx_hung = FALSE;
  2926. if (tx_ring->buffer_info[eop].dma &&
  2927. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2928. (adapter->tx_timeout_factor * HZ))
  2929. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2930. E1000_STATUS_TXOFF)) {
  2931. /* detected Tx unit hang */
  2932. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2933. " Tx Queue <%lu>\n"
  2934. " TDH <%x>\n"
  2935. " TDT <%x>\n"
  2936. " next_to_use <%x>\n"
  2937. " next_to_clean <%x>\n"
  2938. "buffer_info[next_to_clean]\n"
  2939. " time_stamp <%lx>\n"
  2940. " next_to_watch <%x>\n"
  2941. " jiffies <%lx>\n"
  2942. " next_to_watch.status <%x>\n",
  2943. (unsigned long)((tx_ring - adapter->tx_ring) /
  2944. sizeof(struct e1000_tx_ring)),
  2945. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2946. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2947. tx_ring->next_to_use,
  2948. tx_ring->next_to_clean,
  2949. tx_ring->buffer_info[eop].time_stamp,
  2950. eop,
  2951. jiffies,
  2952. eop_desc->upper.fields.status);
  2953. netif_stop_queue(netdev);
  2954. }
  2955. }
  2956. return cleaned;
  2957. }
  2958. /**
  2959. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2960. * @adapter: board private structure
  2961. * @status_err: receive descriptor status and error fields
  2962. * @csum: receive descriptor csum field
  2963. * @sk_buff: socket buffer with received data
  2964. **/
  2965. static inline void
  2966. e1000_rx_checksum(struct e1000_adapter *adapter,
  2967. uint32_t status_err, uint32_t csum,
  2968. struct sk_buff *skb)
  2969. {
  2970. uint16_t status = (uint16_t)status_err;
  2971. uint8_t errors = (uint8_t)(status_err >> 24);
  2972. skb->ip_summed = CHECKSUM_NONE;
  2973. /* 82543 or newer only */
  2974. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2975. /* Ignore Checksum bit is set */
  2976. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2977. /* TCP/UDP checksum error bit is set */
  2978. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2979. /* let the stack verify checksum errors */
  2980. adapter->hw_csum_err++;
  2981. return;
  2982. }
  2983. /* TCP/UDP Checksum has not been calculated */
  2984. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2985. if (!(status & E1000_RXD_STAT_TCPCS))
  2986. return;
  2987. } else {
  2988. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2989. return;
  2990. }
  2991. /* It must be a TCP or UDP packet with a valid checksum */
  2992. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2993. /* TCP checksum is good */
  2994. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2995. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2996. /* IP fragment with UDP payload */
  2997. /* Hardware complements the payload checksum, so we undo it
  2998. * and then put the value in host order for further stack use.
  2999. */
  3000. csum = ntohl(csum ^ 0xFFFF);
  3001. skb->csum = csum;
  3002. skb->ip_summed = CHECKSUM_HW;
  3003. }
  3004. adapter->hw_csum_good++;
  3005. }
  3006. /**
  3007. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3008. * @adapter: board private structure
  3009. **/
  3010. static boolean_t
  3011. #ifdef CONFIG_E1000_NAPI
  3012. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3013. struct e1000_rx_ring *rx_ring,
  3014. int *work_done, int work_to_do)
  3015. #else
  3016. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3017. struct e1000_rx_ring *rx_ring)
  3018. #endif
  3019. {
  3020. struct net_device *netdev = adapter->netdev;
  3021. struct pci_dev *pdev = adapter->pdev;
  3022. struct e1000_rx_desc *rx_desc, *next_rxd;
  3023. struct e1000_buffer *buffer_info, *next_buffer;
  3024. unsigned long flags;
  3025. uint32_t length;
  3026. uint8_t last_byte;
  3027. unsigned int i;
  3028. int cleaned_count = 0;
  3029. boolean_t cleaned = FALSE;
  3030. i = rx_ring->next_to_clean;
  3031. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3032. buffer_info = &rx_ring->buffer_info[i];
  3033. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3034. struct sk_buff *skb, *next_skb;
  3035. u8 status;
  3036. #ifdef CONFIG_E1000_NAPI
  3037. if (*work_done >= work_to_do)
  3038. break;
  3039. (*work_done)++;
  3040. #endif
  3041. status = rx_desc->status;
  3042. skb = buffer_info->skb;
  3043. buffer_info->skb = NULL;
  3044. prefetch(skb->data - NET_IP_ALIGN);
  3045. if (++i == rx_ring->count) i = 0;
  3046. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3047. prefetch(next_rxd);
  3048. next_buffer = &rx_ring->buffer_info[i];
  3049. next_skb = next_buffer->skb;
  3050. prefetch(next_skb->data - NET_IP_ALIGN);
  3051. cleaned = TRUE;
  3052. cleaned_count++;
  3053. pci_unmap_single(pdev,
  3054. buffer_info->dma,
  3055. buffer_info->length,
  3056. PCI_DMA_FROMDEVICE);
  3057. length = le16_to_cpu(rx_desc->length);
  3058. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3059. /* All receives must fit into a single buffer */
  3060. E1000_DBG("%s: Receive packet consumed multiple"
  3061. " buffers\n", netdev->name);
  3062. dev_kfree_skb_irq(skb);
  3063. goto next_desc;
  3064. }
  3065. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3066. last_byte = *(skb->data + length - 1);
  3067. if (TBI_ACCEPT(&adapter->hw, status,
  3068. rx_desc->errors, length, last_byte)) {
  3069. spin_lock_irqsave(&adapter->stats_lock, flags);
  3070. e1000_tbi_adjust_stats(&adapter->hw,
  3071. &adapter->stats,
  3072. length, skb->data);
  3073. spin_unlock_irqrestore(&adapter->stats_lock,
  3074. flags);
  3075. length--;
  3076. } else {
  3077. dev_kfree_skb_irq(skb);
  3078. goto next_desc;
  3079. }
  3080. }
  3081. /* code added for copybreak, this should improve
  3082. * performance for small packets with large amounts
  3083. * of reassembly being done in the stack */
  3084. #define E1000_CB_LENGTH 256
  3085. if (length < E1000_CB_LENGTH) {
  3086. struct sk_buff *new_skb =
  3087. dev_alloc_skb(length + NET_IP_ALIGN);
  3088. if (new_skb) {
  3089. skb_reserve(new_skb, NET_IP_ALIGN);
  3090. new_skb->dev = netdev;
  3091. memcpy(new_skb->data - NET_IP_ALIGN,
  3092. skb->data - NET_IP_ALIGN,
  3093. length + NET_IP_ALIGN);
  3094. /* save the skb in buffer_info as good */
  3095. buffer_info->skb = skb;
  3096. skb = new_skb;
  3097. skb_put(skb, length);
  3098. }
  3099. } else
  3100. skb_put(skb, length);
  3101. /* end copybreak code */
  3102. /* Receive Checksum Offload */
  3103. e1000_rx_checksum(adapter,
  3104. (uint32_t)(status) |
  3105. ((uint32_t)(rx_desc->errors) << 24),
  3106. rx_desc->csum, skb);
  3107. skb->protocol = eth_type_trans(skb, netdev);
  3108. #ifdef CONFIG_E1000_NAPI
  3109. if (unlikely(adapter->vlgrp &&
  3110. (status & E1000_RXD_STAT_VP))) {
  3111. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3112. le16_to_cpu(rx_desc->special) &
  3113. E1000_RXD_SPC_VLAN_MASK);
  3114. } else {
  3115. netif_receive_skb(skb);
  3116. }
  3117. #else /* CONFIG_E1000_NAPI */
  3118. if (unlikely(adapter->vlgrp &&
  3119. (status & E1000_RXD_STAT_VP))) {
  3120. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3121. le16_to_cpu(rx_desc->special) &
  3122. E1000_RXD_SPC_VLAN_MASK);
  3123. } else {
  3124. netif_rx(skb);
  3125. }
  3126. #endif /* CONFIG_E1000_NAPI */
  3127. netdev->last_rx = jiffies;
  3128. next_desc:
  3129. rx_desc->status = 0;
  3130. /* return some buffers to hardware, one at a time is too slow */
  3131. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3132. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3133. cleaned_count = 0;
  3134. }
  3135. /* use prefetched values */
  3136. rx_desc = next_rxd;
  3137. buffer_info = next_buffer;
  3138. }
  3139. rx_ring->next_to_clean = i;
  3140. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3141. if (cleaned_count)
  3142. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3143. return cleaned;
  3144. }
  3145. /**
  3146. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3147. * @adapter: board private structure
  3148. **/
  3149. static boolean_t
  3150. #ifdef CONFIG_E1000_NAPI
  3151. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3152. struct e1000_rx_ring *rx_ring,
  3153. int *work_done, int work_to_do)
  3154. #else
  3155. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3156. struct e1000_rx_ring *rx_ring)
  3157. #endif
  3158. {
  3159. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3160. struct net_device *netdev = adapter->netdev;
  3161. struct pci_dev *pdev = adapter->pdev;
  3162. struct e1000_buffer *buffer_info, *next_buffer;
  3163. struct e1000_ps_page *ps_page;
  3164. struct e1000_ps_page_dma *ps_page_dma;
  3165. struct sk_buff *skb, *next_skb;
  3166. unsigned int i, j;
  3167. uint32_t length, staterr;
  3168. int cleaned_count = 0;
  3169. boolean_t cleaned = FALSE;
  3170. i = rx_ring->next_to_clean;
  3171. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3172. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3173. while (staterr & E1000_RXD_STAT_DD) {
  3174. buffer_info = &rx_ring->buffer_info[i];
  3175. ps_page = &rx_ring->ps_page[i];
  3176. ps_page_dma = &rx_ring->ps_page_dma[i];
  3177. #ifdef CONFIG_E1000_NAPI
  3178. if (unlikely(*work_done >= work_to_do))
  3179. break;
  3180. (*work_done)++;
  3181. #endif
  3182. skb = buffer_info->skb;
  3183. /* in the packet split case this is header only */
  3184. prefetch(skb->data - NET_IP_ALIGN);
  3185. if (++i == rx_ring->count) i = 0;
  3186. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3187. prefetch(next_rxd);
  3188. next_buffer = &rx_ring->buffer_info[i];
  3189. next_skb = next_buffer->skb;
  3190. prefetch(next_skb->data - NET_IP_ALIGN);
  3191. cleaned = TRUE;
  3192. cleaned_count++;
  3193. pci_unmap_single(pdev, buffer_info->dma,
  3194. buffer_info->length,
  3195. PCI_DMA_FROMDEVICE);
  3196. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3197. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3198. " the full packet\n", netdev->name);
  3199. dev_kfree_skb_irq(skb);
  3200. goto next_desc;
  3201. }
  3202. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3203. dev_kfree_skb_irq(skb);
  3204. goto next_desc;
  3205. }
  3206. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3207. if (unlikely(!length)) {
  3208. E1000_DBG("%s: Last part of the packet spanning"
  3209. " multiple descriptors\n", netdev->name);
  3210. dev_kfree_skb_irq(skb);
  3211. goto next_desc;
  3212. }
  3213. /* Good Receive */
  3214. skb_put(skb, length);
  3215. {
  3216. /* this looks ugly, but it seems compiler issues make it
  3217. more efficient than reusing j */
  3218. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3219. /* page alloc/put takes too long and effects small packet
  3220. * throughput, so unsplit small packets and save the alloc/put*/
  3221. if (l1 && ((length + l1) < E1000_CB_LENGTH)) {
  3222. u8 *vaddr;
  3223. /* there is no documentation about how to call
  3224. * kmap_atomic, so we can't hold the mapping
  3225. * very long */
  3226. pci_dma_sync_single_for_cpu(pdev,
  3227. ps_page_dma->ps_page_dma[0],
  3228. PAGE_SIZE,
  3229. PCI_DMA_FROMDEVICE);
  3230. vaddr = kmap_atomic(ps_page->ps_page[0],
  3231. KM_SKB_DATA_SOFTIRQ);
  3232. memcpy(skb->tail, vaddr, l1);
  3233. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3234. pci_dma_sync_single_for_device(pdev,
  3235. ps_page_dma->ps_page_dma[0],
  3236. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3237. skb_put(skb, l1);
  3238. length += l1;
  3239. goto copydone;
  3240. } /* if */
  3241. }
  3242. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3243. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3244. break;
  3245. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3246. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3247. ps_page_dma->ps_page_dma[j] = 0;
  3248. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3249. length);
  3250. ps_page->ps_page[j] = NULL;
  3251. skb->len += length;
  3252. skb->data_len += length;
  3253. }
  3254. copydone:
  3255. e1000_rx_checksum(adapter, staterr,
  3256. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3257. skb->protocol = eth_type_trans(skb, netdev);
  3258. if (likely(rx_desc->wb.upper.header_status &
  3259. E1000_RXDPS_HDRSTAT_HDRSP))
  3260. adapter->rx_hdr_split++;
  3261. #ifdef CONFIG_E1000_NAPI
  3262. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3263. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3264. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3265. E1000_RXD_SPC_VLAN_MASK);
  3266. } else {
  3267. netif_receive_skb(skb);
  3268. }
  3269. #else /* CONFIG_E1000_NAPI */
  3270. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3271. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3272. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3273. E1000_RXD_SPC_VLAN_MASK);
  3274. } else {
  3275. netif_rx(skb);
  3276. }
  3277. #endif /* CONFIG_E1000_NAPI */
  3278. netdev->last_rx = jiffies;
  3279. next_desc:
  3280. rx_desc->wb.middle.status_error &= ~0xFF;
  3281. buffer_info->skb = NULL;
  3282. /* return some buffers to hardware, one at a time is too slow */
  3283. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3284. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3285. cleaned_count = 0;
  3286. }
  3287. /* use prefetched values */
  3288. rx_desc = next_rxd;
  3289. buffer_info = next_buffer;
  3290. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3291. }
  3292. rx_ring->next_to_clean = i;
  3293. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3294. if (cleaned_count)
  3295. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3296. return cleaned;
  3297. }
  3298. /**
  3299. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3300. * @adapter: address of board private structure
  3301. **/
  3302. static void
  3303. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3304. struct e1000_rx_ring *rx_ring,
  3305. int cleaned_count)
  3306. {
  3307. struct net_device *netdev = adapter->netdev;
  3308. struct pci_dev *pdev = adapter->pdev;
  3309. struct e1000_rx_desc *rx_desc;
  3310. struct e1000_buffer *buffer_info;
  3311. struct sk_buff *skb;
  3312. unsigned int i;
  3313. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3314. i = rx_ring->next_to_use;
  3315. buffer_info = &rx_ring->buffer_info[i];
  3316. while (cleaned_count--) {
  3317. if (!(skb = buffer_info->skb))
  3318. skb = dev_alloc_skb(bufsz);
  3319. else {
  3320. skb_trim(skb, 0);
  3321. goto map_skb;
  3322. }
  3323. if (unlikely(!skb)) {
  3324. /* Better luck next round */
  3325. adapter->alloc_rx_buff_failed++;
  3326. break;
  3327. }
  3328. /* Fix for errata 23, can't cross 64kB boundary */
  3329. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3330. struct sk_buff *oldskb = skb;
  3331. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3332. "at %p\n", bufsz, skb->data);
  3333. /* Try again, without freeing the previous */
  3334. skb = dev_alloc_skb(bufsz);
  3335. /* Failed allocation, critical failure */
  3336. if (!skb) {
  3337. dev_kfree_skb(oldskb);
  3338. break;
  3339. }
  3340. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3341. /* give up */
  3342. dev_kfree_skb(skb);
  3343. dev_kfree_skb(oldskb);
  3344. break; /* while !buffer_info->skb */
  3345. } else {
  3346. /* Use new allocation */
  3347. dev_kfree_skb(oldskb);
  3348. }
  3349. }
  3350. /* Make buffer alignment 2 beyond a 16 byte boundary
  3351. * this will result in a 16 byte aligned IP header after
  3352. * the 14 byte MAC header is removed
  3353. */
  3354. skb_reserve(skb, NET_IP_ALIGN);
  3355. skb->dev = netdev;
  3356. buffer_info->skb = skb;
  3357. buffer_info->length = adapter->rx_buffer_len;
  3358. map_skb:
  3359. buffer_info->dma = pci_map_single(pdev,
  3360. skb->data,
  3361. adapter->rx_buffer_len,
  3362. PCI_DMA_FROMDEVICE);
  3363. /* Fix for errata 23, can't cross 64kB boundary */
  3364. if (!e1000_check_64k_bound(adapter,
  3365. (void *)(unsigned long)buffer_info->dma,
  3366. adapter->rx_buffer_len)) {
  3367. DPRINTK(RX_ERR, ERR,
  3368. "dma align check failed: %u bytes at %p\n",
  3369. adapter->rx_buffer_len,
  3370. (void *)(unsigned long)buffer_info->dma);
  3371. dev_kfree_skb(skb);
  3372. buffer_info->skb = NULL;
  3373. pci_unmap_single(pdev, buffer_info->dma,
  3374. adapter->rx_buffer_len,
  3375. PCI_DMA_FROMDEVICE);
  3376. break; /* while !buffer_info->skb */
  3377. }
  3378. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3379. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3380. if (unlikely(++i == rx_ring->count))
  3381. i = 0;
  3382. buffer_info = &rx_ring->buffer_info[i];
  3383. }
  3384. if (likely(rx_ring->next_to_use != i)) {
  3385. rx_ring->next_to_use = i;
  3386. if (unlikely(i-- == 0))
  3387. i = (rx_ring->count - 1);
  3388. /* Force memory writes to complete before letting h/w
  3389. * know there are new descriptors to fetch. (Only
  3390. * applicable for weak-ordered memory model archs,
  3391. * such as IA-64). */
  3392. wmb();
  3393. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3394. }
  3395. }
  3396. /**
  3397. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3398. * @adapter: address of board private structure
  3399. **/
  3400. static void
  3401. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3402. struct e1000_rx_ring *rx_ring,
  3403. int cleaned_count)
  3404. {
  3405. struct net_device *netdev = adapter->netdev;
  3406. struct pci_dev *pdev = adapter->pdev;
  3407. union e1000_rx_desc_packet_split *rx_desc;
  3408. struct e1000_buffer *buffer_info;
  3409. struct e1000_ps_page *ps_page;
  3410. struct e1000_ps_page_dma *ps_page_dma;
  3411. struct sk_buff *skb;
  3412. unsigned int i, j;
  3413. i = rx_ring->next_to_use;
  3414. buffer_info = &rx_ring->buffer_info[i];
  3415. ps_page = &rx_ring->ps_page[i];
  3416. ps_page_dma = &rx_ring->ps_page_dma[i];
  3417. while (cleaned_count--) {
  3418. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3419. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3420. if (j < adapter->rx_ps_pages) {
  3421. if (likely(!ps_page->ps_page[j])) {
  3422. ps_page->ps_page[j] =
  3423. alloc_page(GFP_ATOMIC);
  3424. if (unlikely(!ps_page->ps_page[j])) {
  3425. adapter->alloc_rx_buff_failed++;
  3426. goto no_buffers;
  3427. }
  3428. ps_page_dma->ps_page_dma[j] =
  3429. pci_map_page(pdev,
  3430. ps_page->ps_page[j],
  3431. 0, PAGE_SIZE,
  3432. PCI_DMA_FROMDEVICE);
  3433. }
  3434. /* Refresh the desc even if buffer_addrs didn't
  3435. * change because each write-back erases
  3436. * this info.
  3437. */
  3438. rx_desc->read.buffer_addr[j+1] =
  3439. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3440. } else
  3441. rx_desc->read.buffer_addr[j+1] = ~0;
  3442. }
  3443. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3444. if (unlikely(!skb)) {
  3445. adapter->alloc_rx_buff_failed++;
  3446. break;
  3447. }
  3448. /* Make buffer alignment 2 beyond a 16 byte boundary
  3449. * this will result in a 16 byte aligned IP header after
  3450. * the 14 byte MAC header is removed
  3451. */
  3452. skb_reserve(skb, NET_IP_ALIGN);
  3453. skb->dev = netdev;
  3454. buffer_info->skb = skb;
  3455. buffer_info->length = adapter->rx_ps_bsize0;
  3456. buffer_info->dma = pci_map_single(pdev, skb->data,
  3457. adapter->rx_ps_bsize0,
  3458. PCI_DMA_FROMDEVICE);
  3459. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3460. if (unlikely(++i == rx_ring->count)) i = 0;
  3461. buffer_info = &rx_ring->buffer_info[i];
  3462. ps_page = &rx_ring->ps_page[i];
  3463. ps_page_dma = &rx_ring->ps_page_dma[i];
  3464. }
  3465. no_buffers:
  3466. if (likely(rx_ring->next_to_use != i)) {
  3467. rx_ring->next_to_use = i;
  3468. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3469. /* Force memory writes to complete before letting h/w
  3470. * know there are new descriptors to fetch. (Only
  3471. * applicable for weak-ordered memory model archs,
  3472. * such as IA-64). */
  3473. wmb();
  3474. /* Hardware increments by 16 bytes, but packet split
  3475. * descriptors are 32 bytes...so we increment tail
  3476. * twice as much.
  3477. */
  3478. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3479. }
  3480. }
  3481. /**
  3482. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3483. * @adapter:
  3484. **/
  3485. static void
  3486. e1000_smartspeed(struct e1000_adapter *adapter)
  3487. {
  3488. uint16_t phy_status;
  3489. uint16_t phy_ctrl;
  3490. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3491. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3492. return;
  3493. if (adapter->smartspeed == 0) {
  3494. /* If Master/Slave config fault is asserted twice,
  3495. * we assume back-to-back */
  3496. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3497. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3498. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3499. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3500. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3501. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3502. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3503. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3504. phy_ctrl);
  3505. adapter->smartspeed++;
  3506. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3507. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3508. &phy_ctrl)) {
  3509. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3510. MII_CR_RESTART_AUTO_NEG);
  3511. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3512. phy_ctrl);
  3513. }
  3514. }
  3515. return;
  3516. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3517. /* If still no link, perhaps using 2/3 pair cable */
  3518. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3519. phy_ctrl |= CR_1000T_MS_ENABLE;
  3520. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3521. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3522. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3523. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3524. MII_CR_RESTART_AUTO_NEG);
  3525. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3526. }
  3527. }
  3528. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3529. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3530. adapter->smartspeed = 0;
  3531. }
  3532. /**
  3533. * e1000_ioctl -
  3534. * @netdev:
  3535. * @ifreq:
  3536. * @cmd:
  3537. **/
  3538. static int
  3539. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3540. {
  3541. switch (cmd) {
  3542. case SIOCGMIIPHY:
  3543. case SIOCGMIIREG:
  3544. case SIOCSMIIREG:
  3545. return e1000_mii_ioctl(netdev, ifr, cmd);
  3546. default:
  3547. return -EOPNOTSUPP;
  3548. }
  3549. }
  3550. /**
  3551. * e1000_mii_ioctl -
  3552. * @netdev:
  3553. * @ifreq:
  3554. * @cmd:
  3555. **/
  3556. static int
  3557. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3558. {
  3559. struct e1000_adapter *adapter = netdev_priv(netdev);
  3560. struct mii_ioctl_data *data = if_mii(ifr);
  3561. int retval;
  3562. uint16_t mii_reg;
  3563. uint16_t spddplx;
  3564. unsigned long flags;
  3565. if (adapter->hw.media_type != e1000_media_type_copper)
  3566. return -EOPNOTSUPP;
  3567. switch (cmd) {
  3568. case SIOCGMIIPHY:
  3569. data->phy_id = adapter->hw.phy_addr;
  3570. break;
  3571. case SIOCGMIIREG:
  3572. if (!capable(CAP_NET_ADMIN))
  3573. return -EPERM;
  3574. spin_lock_irqsave(&adapter->stats_lock, flags);
  3575. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3576. &data->val_out)) {
  3577. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3578. return -EIO;
  3579. }
  3580. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3581. break;
  3582. case SIOCSMIIREG:
  3583. if (!capable(CAP_NET_ADMIN))
  3584. return -EPERM;
  3585. if (data->reg_num & ~(0x1F))
  3586. return -EFAULT;
  3587. mii_reg = data->val_in;
  3588. spin_lock_irqsave(&adapter->stats_lock, flags);
  3589. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3590. mii_reg)) {
  3591. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3592. return -EIO;
  3593. }
  3594. if (adapter->hw.phy_type == e1000_phy_m88) {
  3595. switch (data->reg_num) {
  3596. case PHY_CTRL:
  3597. if (mii_reg & MII_CR_POWER_DOWN)
  3598. break;
  3599. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3600. adapter->hw.autoneg = 1;
  3601. adapter->hw.autoneg_advertised = 0x2F;
  3602. } else {
  3603. if (mii_reg & 0x40)
  3604. spddplx = SPEED_1000;
  3605. else if (mii_reg & 0x2000)
  3606. spddplx = SPEED_100;
  3607. else
  3608. spddplx = SPEED_10;
  3609. spddplx += (mii_reg & 0x100)
  3610. ? FULL_DUPLEX :
  3611. HALF_DUPLEX;
  3612. retval = e1000_set_spd_dplx(adapter,
  3613. spddplx);
  3614. if (retval) {
  3615. spin_unlock_irqrestore(
  3616. &adapter->stats_lock,
  3617. flags);
  3618. return retval;
  3619. }
  3620. }
  3621. if (netif_running(adapter->netdev)) {
  3622. e1000_down(adapter);
  3623. e1000_up(adapter);
  3624. } else
  3625. e1000_reset(adapter);
  3626. break;
  3627. case M88E1000_PHY_SPEC_CTRL:
  3628. case M88E1000_EXT_PHY_SPEC_CTRL:
  3629. if (e1000_phy_reset(&adapter->hw)) {
  3630. spin_unlock_irqrestore(
  3631. &adapter->stats_lock, flags);
  3632. return -EIO;
  3633. }
  3634. break;
  3635. }
  3636. } else {
  3637. switch (data->reg_num) {
  3638. case PHY_CTRL:
  3639. if (mii_reg & MII_CR_POWER_DOWN)
  3640. break;
  3641. if (netif_running(adapter->netdev)) {
  3642. e1000_down(adapter);
  3643. e1000_up(adapter);
  3644. } else
  3645. e1000_reset(adapter);
  3646. break;
  3647. }
  3648. }
  3649. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3650. break;
  3651. default:
  3652. return -EOPNOTSUPP;
  3653. }
  3654. return E1000_SUCCESS;
  3655. }
  3656. void
  3657. e1000_pci_set_mwi(struct e1000_hw *hw)
  3658. {
  3659. struct e1000_adapter *adapter = hw->back;
  3660. int ret_val = pci_set_mwi(adapter->pdev);
  3661. if (ret_val)
  3662. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3663. }
  3664. void
  3665. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3666. {
  3667. struct e1000_adapter *adapter = hw->back;
  3668. pci_clear_mwi(adapter->pdev);
  3669. }
  3670. void
  3671. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3672. {
  3673. struct e1000_adapter *adapter = hw->back;
  3674. pci_read_config_word(adapter->pdev, reg, value);
  3675. }
  3676. void
  3677. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3678. {
  3679. struct e1000_adapter *adapter = hw->back;
  3680. pci_write_config_word(adapter->pdev, reg, *value);
  3681. }
  3682. uint32_t
  3683. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3684. {
  3685. return inl(port);
  3686. }
  3687. void
  3688. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3689. {
  3690. outl(value, port);
  3691. }
  3692. static void
  3693. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3694. {
  3695. struct e1000_adapter *adapter = netdev_priv(netdev);
  3696. uint32_t ctrl, rctl;
  3697. e1000_irq_disable(adapter);
  3698. adapter->vlgrp = grp;
  3699. if (grp) {
  3700. /* enable VLAN tag insert/strip */
  3701. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3702. ctrl |= E1000_CTRL_VME;
  3703. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3704. /* enable VLAN receive filtering */
  3705. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3706. rctl |= E1000_RCTL_VFE;
  3707. rctl &= ~E1000_RCTL_CFIEN;
  3708. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3709. e1000_update_mng_vlan(adapter);
  3710. } else {
  3711. /* disable VLAN tag insert/strip */
  3712. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3713. ctrl &= ~E1000_CTRL_VME;
  3714. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3715. /* disable VLAN filtering */
  3716. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3717. rctl &= ~E1000_RCTL_VFE;
  3718. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3719. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3720. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3721. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3722. }
  3723. }
  3724. e1000_irq_enable(adapter);
  3725. }
  3726. static void
  3727. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3728. {
  3729. struct e1000_adapter *adapter = netdev_priv(netdev);
  3730. uint32_t vfta, index;
  3731. if ((adapter->hw.mng_cookie.status &
  3732. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3733. (vid == adapter->mng_vlan_id))
  3734. return;
  3735. /* add VID to filter table */
  3736. index = (vid >> 5) & 0x7F;
  3737. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3738. vfta |= (1 << (vid & 0x1F));
  3739. e1000_write_vfta(&adapter->hw, index, vfta);
  3740. }
  3741. static void
  3742. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3743. {
  3744. struct e1000_adapter *adapter = netdev_priv(netdev);
  3745. uint32_t vfta, index;
  3746. e1000_irq_disable(adapter);
  3747. if (adapter->vlgrp)
  3748. adapter->vlgrp->vlan_devices[vid] = NULL;
  3749. e1000_irq_enable(adapter);
  3750. if ((adapter->hw.mng_cookie.status &
  3751. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3752. (vid == adapter->mng_vlan_id)) {
  3753. /* release control to f/w */
  3754. e1000_release_hw_control(adapter);
  3755. return;
  3756. }
  3757. /* remove VID from filter table */
  3758. index = (vid >> 5) & 0x7F;
  3759. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3760. vfta &= ~(1 << (vid & 0x1F));
  3761. e1000_write_vfta(&adapter->hw, index, vfta);
  3762. }
  3763. static void
  3764. e1000_restore_vlan(struct e1000_adapter *adapter)
  3765. {
  3766. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3767. if (adapter->vlgrp) {
  3768. uint16_t vid;
  3769. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3770. if (!adapter->vlgrp->vlan_devices[vid])
  3771. continue;
  3772. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3773. }
  3774. }
  3775. }
  3776. int
  3777. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3778. {
  3779. adapter->hw.autoneg = 0;
  3780. /* Fiber NICs only allow 1000 gbps Full duplex */
  3781. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3782. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3783. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3784. return -EINVAL;
  3785. }
  3786. switch (spddplx) {
  3787. case SPEED_10 + DUPLEX_HALF:
  3788. adapter->hw.forced_speed_duplex = e1000_10_half;
  3789. break;
  3790. case SPEED_10 + DUPLEX_FULL:
  3791. adapter->hw.forced_speed_duplex = e1000_10_full;
  3792. break;
  3793. case SPEED_100 + DUPLEX_HALF:
  3794. adapter->hw.forced_speed_duplex = e1000_100_half;
  3795. break;
  3796. case SPEED_100 + DUPLEX_FULL:
  3797. adapter->hw.forced_speed_duplex = e1000_100_full;
  3798. break;
  3799. case SPEED_1000 + DUPLEX_FULL:
  3800. adapter->hw.autoneg = 1;
  3801. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3802. break;
  3803. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3804. default:
  3805. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3806. return -EINVAL;
  3807. }
  3808. return 0;
  3809. }
  3810. #ifdef CONFIG_PM
  3811. /* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
  3812. * space versus the 64 bytes that pci_[save|restore]_state handle
  3813. */
  3814. #define PCIE_CONFIG_SPACE_LEN 256
  3815. #define PCI_CONFIG_SPACE_LEN 64
  3816. static int
  3817. e1000_pci_save_state(struct e1000_adapter *adapter)
  3818. {
  3819. struct pci_dev *dev = adapter->pdev;
  3820. int size;
  3821. int i;
  3822. if (adapter->hw.mac_type >= e1000_82571)
  3823. size = PCIE_CONFIG_SPACE_LEN;
  3824. else
  3825. size = PCI_CONFIG_SPACE_LEN;
  3826. WARN_ON(adapter->config_space != NULL);
  3827. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3828. if (!adapter->config_space) {
  3829. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3830. return -ENOMEM;
  3831. }
  3832. for (i = 0; i < (size / 4); i++)
  3833. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3834. return 0;
  3835. }
  3836. static void
  3837. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3838. {
  3839. struct pci_dev *dev = adapter->pdev;
  3840. int size;
  3841. int i;
  3842. if (adapter->config_space == NULL)
  3843. return;
  3844. if (adapter->hw.mac_type >= e1000_82571)
  3845. size = PCIE_CONFIG_SPACE_LEN;
  3846. else
  3847. size = PCI_CONFIG_SPACE_LEN;
  3848. for (i = 0; i < (size / 4); i++)
  3849. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3850. kfree(adapter->config_space);
  3851. adapter->config_space = NULL;
  3852. return;
  3853. }
  3854. #endif /* CONFIG_PM */
  3855. static int
  3856. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3857. {
  3858. struct net_device *netdev = pci_get_drvdata(pdev);
  3859. struct e1000_adapter *adapter = netdev_priv(netdev);
  3860. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3861. uint32_t wufc = adapter->wol;
  3862. int retval = 0;
  3863. netif_device_detach(netdev);
  3864. if (netif_running(netdev))
  3865. e1000_down(adapter);
  3866. #ifdef CONFIG_PM
  3867. /* implement our own version of pci_save_state(pdev) because pci
  3868. * express adapters have larger 256 byte config spaces */
  3869. retval = e1000_pci_save_state(adapter);
  3870. if (retval)
  3871. return retval;
  3872. #endif
  3873. status = E1000_READ_REG(&adapter->hw, STATUS);
  3874. if (status & E1000_STATUS_LU)
  3875. wufc &= ~E1000_WUFC_LNKC;
  3876. if (wufc) {
  3877. e1000_setup_rctl(adapter);
  3878. e1000_set_multi(netdev);
  3879. /* turn on all-multi mode if wake on multicast is enabled */
  3880. if (adapter->wol & E1000_WUFC_MC) {
  3881. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3882. rctl |= E1000_RCTL_MPE;
  3883. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3884. }
  3885. if (adapter->hw.mac_type >= e1000_82540) {
  3886. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3887. /* advertise wake from D3Cold */
  3888. #define E1000_CTRL_ADVD3WUC 0x00100000
  3889. /* phy power management enable */
  3890. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3891. ctrl |= E1000_CTRL_ADVD3WUC |
  3892. E1000_CTRL_EN_PHY_PWR_MGMT;
  3893. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3894. }
  3895. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3896. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3897. /* keep the laser running in D3 */
  3898. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3899. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3900. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3901. }
  3902. /* Allow time for pending master requests to run */
  3903. e1000_disable_pciex_master(&adapter->hw);
  3904. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3905. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3906. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3907. if (retval)
  3908. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3909. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3910. if (retval)
  3911. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3912. } else {
  3913. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3914. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3915. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3916. if (retval)
  3917. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3918. retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
  3919. if (retval)
  3920. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3921. }
  3922. if (adapter->hw.mac_type >= e1000_82540 &&
  3923. adapter->hw.media_type == e1000_media_type_copper) {
  3924. manc = E1000_READ_REG(&adapter->hw, MANC);
  3925. if (manc & E1000_MANC_SMBUS_EN) {
  3926. manc |= E1000_MANC_ARP_EN;
  3927. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3928. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3929. if (retval)
  3930. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3931. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3932. if (retval)
  3933. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3934. }
  3935. }
  3936. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3937. * would have already happened in close and is redundant. */
  3938. e1000_release_hw_control(adapter);
  3939. pci_disable_device(pdev);
  3940. retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3941. if (retval)
  3942. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3943. return 0;
  3944. }
  3945. #ifdef CONFIG_PM
  3946. static int
  3947. e1000_resume(struct pci_dev *pdev)
  3948. {
  3949. struct net_device *netdev = pci_get_drvdata(pdev);
  3950. struct e1000_adapter *adapter = netdev_priv(netdev);
  3951. int retval;
  3952. uint32_t manc, ret_val;
  3953. retval = pci_set_power_state(pdev, PCI_D0);
  3954. if (retval)
  3955. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3956. e1000_pci_restore_state(adapter);
  3957. ret_val = pci_enable_device(pdev);
  3958. pci_set_master(pdev);
  3959. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3960. if (retval)
  3961. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3962. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  3963. if (retval)
  3964. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3965. e1000_reset(adapter);
  3966. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3967. if (netif_running(netdev))
  3968. e1000_up(adapter);
  3969. netif_device_attach(netdev);
  3970. if (adapter->hw.mac_type >= e1000_82540 &&
  3971. adapter->hw.media_type == e1000_media_type_copper) {
  3972. manc = E1000_READ_REG(&adapter->hw, MANC);
  3973. manc &= ~(E1000_MANC_ARP_EN);
  3974. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3975. }
  3976. /* If the controller is 82573 and f/w is AMT, do not set
  3977. * DRV_LOAD until the interface is up. For all other cases,
  3978. * let the f/w know that the h/w is now under the control
  3979. * of the driver. */
  3980. if (adapter->hw.mac_type != e1000_82573 ||
  3981. !e1000_check_mng_mode(&adapter->hw))
  3982. e1000_get_hw_control(adapter);
  3983. return 0;
  3984. }
  3985. #endif
  3986. #ifdef CONFIG_NET_POLL_CONTROLLER
  3987. /*
  3988. * Polling 'interrupt' - used by things like netconsole to send skbs
  3989. * without having to re-enable interrupts. It's not called while
  3990. * the interrupt routine is executing.
  3991. */
  3992. static void
  3993. e1000_netpoll(struct net_device *netdev)
  3994. {
  3995. struct e1000_adapter *adapter = netdev_priv(netdev);
  3996. disable_irq(adapter->pdev->irq);
  3997. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3998. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3999. #ifndef CONFIG_E1000_NAPI
  4000. adapter->clean_rx(adapter, adapter->rx_ring);
  4001. #endif
  4002. enable_irq(adapter->pdev->irq);
  4003. }
  4004. #endif
  4005. /* e1000_main.c */