cx18-streams.c 18 KB

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  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@radix.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-av-core.h"
  35. #include "cx18-dvb.h"
  36. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  37. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  38. .owner = THIS_MODULE,
  39. .read = cx18_v4l2_read,
  40. .open = cx18_v4l2_open,
  41. /* FIXME change to video_ioctl2 if serialization lock can be removed */
  42. .ioctl = cx18_v4l2_ioctl,
  43. .release = cx18_v4l2_close,
  44. .poll = cx18_v4l2_enc_poll,
  45. };
  46. /* offset from 0 to register ts v4l2 minors on */
  47. #define CX18_V4L2_ENC_TS_OFFSET 16
  48. /* offset from 0 to register pcm v4l2 minors on */
  49. #define CX18_V4L2_ENC_PCM_OFFSET 24
  50. /* offset from 0 to register yuv v4l2 minors on */
  51. #define CX18_V4L2_ENC_YUV_OFFSET 32
  52. static struct {
  53. const char *name;
  54. int vfl_type;
  55. int num_offset;
  56. int dma;
  57. enum v4l2_buf_type buf_type;
  58. } cx18_stream_info[] = {
  59. { /* CX18_ENC_STREAM_TYPE_MPG */
  60. "encoder MPEG",
  61. VFL_TYPE_GRABBER, 0,
  62. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  63. },
  64. { /* CX18_ENC_STREAM_TYPE_TS */
  65. "TS",
  66. VFL_TYPE_GRABBER, -1,
  67. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  68. },
  69. { /* CX18_ENC_STREAM_TYPE_YUV */
  70. "encoder YUV",
  71. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  72. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  73. },
  74. { /* CX18_ENC_STREAM_TYPE_VBI */
  75. "encoder VBI",
  76. VFL_TYPE_VBI, 0,
  77. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
  78. },
  79. { /* CX18_ENC_STREAM_TYPE_PCM */
  80. "encoder PCM audio",
  81. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  82. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
  83. },
  84. { /* CX18_ENC_STREAM_TYPE_IDX */
  85. "encoder IDX",
  86. VFL_TYPE_GRABBER, -1,
  87. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  88. },
  89. { /* CX18_ENC_STREAM_TYPE_RAD */
  90. "encoder radio",
  91. VFL_TYPE_RADIO, 0,
  92. PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
  93. },
  94. };
  95. static void cx18_stream_init(struct cx18 *cx, int type)
  96. {
  97. struct cx18_stream *s = &cx->streams[type];
  98. struct video_device *video_dev = s->video_dev;
  99. /* we need to keep video_dev, so restore it afterwards */
  100. memset(s, 0, sizeof(*s));
  101. s->video_dev = video_dev;
  102. /* initialize cx18_stream fields */
  103. s->cx = cx;
  104. s->type = type;
  105. s->name = cx18_stream_info[type].name;
  106. s->handle = CX18_INVALID_TASK_HANDLE;
  107. s->dma = cx18_stream_info[type].dma;
  108. s->buffers = cx->stream_buffers[type];
  109. s->buf_size = cx->stream_buf_size[type];
  110. mutex_init(&s->qlock);
  111. init_waitqueue_head(&s->waitq);
  112. s->id = -1;
  113. cx18_queue_init(&s->q_free);
  114. cx18_queue_init(&s->q_busy);
  115. cx18_queue_init(&s->q_full);
  116. }
  117. static int cx18_prep_dev(struct cx18 *cx, int type)
  118. {
  119. struct cx18_stream *s = &cx->streams[type];
  120. u32 cap = cx->v4l2_cap;
  121. int num_offset = cx18_stream_info[type].num_offset;
  122. int num = cx->num + cx18_first_minor + num_offset;
  123. /* These four fields are always initialized. If video_dev == NULL, then
  124. this stream is not in use. In that case no other fields but these
  125. four can be used. */
  126. s->video_dev = NULL;
  127. s->cx = cx;
  128. s->type = type;
  129. s->name = cx18_stream_info[type].name;
  130. /* Check whether the radio is supported */
  131. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  132. return 0;
  133. /* Check whether VBI is supported */
  134. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  135. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  136. return 0;
  137. /* User explicitly selected 0 buffers for these streams, so don't
  138. create them. */
  139. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  140. cx->stream_buffers[type] == 0) {
  141. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  142. return 0;
  143. }
  144. cx18_stream_init(cx, type);
  145. if (num_offset == -1)
  146. return 0;
  147. /* allocate and initialize the v4l2 video device structure */
  148. s->video_dev = video_device_alloc();
  149. if (s->video_dev == NULL) {
  150. CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
  151. s->name);
  152. return -ENOMEM;
  153. }
  154. snprintf(s->video_dev->name, sizeof(s->video_dev->name), "cx18-%d",
  155. cx->num);
  156. s->video_dev->num = num;
  157. s->video_dev->parent = &cx->pci_dev->dev;
  158. s->video_dev->fops = &cx18_v4l2_enc_fops;
  159. s->video_dev->release = video_device_release;
  160. s->video_dev->tvnorms = V4L2_STD_ALL;
  161. cx18_set_funcs(s->video_dev);
  162. return 0;
  163. }
  164. /* Initialize v4l2 variables and register v4l2 devices */
  165. int cx18_streams_setup(struct cx18 *cx)
  166. {
  167. int type, ret;
  168. /* Setup V4L2 Devices */
  169. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  170. /* Prepare device */
  171. ret = cx18_prep_dev(cx, type);
  172. if (ret < 0)
  173. break;
  174. /* Allocate Stream */
  175. ret = cx18_stream_alloc(&cx->streams[type]);
  176. if (ret < 0)
  177. break;
  178. }
  179. if (type == CX18_MAX_STREAMS)
  180. return 0;
  181. /* One or more streams could not be initialized. Clean 'em all up. */
  182. cx18_streams_cleanup(cx, 0);
  183. return ret;
  184. }
  185. static int cx18_reg_dev(struct cx18 *cx, int type)
  186. {
  187. struct cx18_stream *s = &cx->streams[type];
  188. int vfl_type = cx18_stream_info[type].vfl_type;
  189. int num, ret;
  190. /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something?
  191. * We need a VFL_TYPE_TS defined.
  192. */
  193. if (strcmp("TS", s->name) == 0) {
  194. /* just return if no DVB is supported */
  195. if ((cx->card->hw_all & CX18_HW_DVB) == 0)
  196. return 0;
  197. ret = cx18_dvb_register(s);
  198. if (ret < 0) {
  199. CX18_ERR("DVB failed to register\n");
  200. return ret;
  201. }
  202. }
  203. if (s->video_dev == NULL)
  204. return 0;
  205. num = s->video_dev->num;
  206. /* card number + user defined offset + device offset */
  207. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  208. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  209. if (s_mpg->video_dev)
  210. num = s_mpg->video_dev->num
  211. + cx18_stream_info[type].num_offset;
  212. }
  213. /* Register device. First try the desired minor, then any free one. */
  214. ret = video_register_device(s->video_dev, vfl_type, num);
  215. if (ret < 0) {
  216. CX18_ERR("Couldn't register v4l2 device for %s kernel number %d\n",
  217. s->name, num);
  218. video_device_release(s->video_dev);
  219. s->video_dev = NULL;
  220. return ret;
  221. }
  222. num = s->video_dev->num;
  223. switch (vfl_type) {
  224. case VFL_TYPE_GRABBER:
  225. CX18_INFO("Registered device video%d for %s (%d x %d kB)\n",
  226. num, s->name, cx->stream_buffers[type],
  227. cx->stream_buf_size[type]/1024);
  228. break;
  229. case VFL_TYPE_RADIO:
  230. CX18_INFO("Registered device radio%d for %s\n",
  231. num, s->name);
  232. break;
  233. case VFL_TYPE_VBI:
  234. if (cx->stream_buffers[type])
  235. CX18_INFO("Registered device vbi%d for %s "
  236. "(%d x %d bytes)\n",
  237. num, s->name, cx->stream_buffers[type],
  238. cx->stream_buf_size[type]);
  239. else
  240. CX18_INFO("Registered device vbi%d for %s\n",
  241. num, s->name);
  242. break;
  243. }
  244. return 0;
  245. }
  246. /* Register v4l2 devices */
  247. int cx18_streams_register(struct cx18 *cx)
  248. {
  249. int type;
  250. int err;
  251. int ret = 0;
  252. /* Register V4L2 devices */
  253. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  254. err = cx18_reg_dev(cx, type);
  255. if (err && ret == 0)
  256. ret = err;
  257. }
  258. if (ret == 0)
  259. return 0;
  260. /* One or more streams could not be initialized. Clean 'em all up. */
  261. cx18_streams_cleanup(cx, 1);
  262. return ret;
  263. }
  264. /* Unregister v4l2 devices */
  265. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  266. {
  267. struct video_device *vdev;
  268. int type;
  269. /* Teardown all streams */
  270. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  271. if (cx->streams[type].dvb.enabled) {
  272. cx18_dvb_unregister(&cx->streams[type]);
  273. cx->streams[type].dvb.enabled = false;
  274. }
  275. vdev = cx->streams[type].video_dev;
  276. cx->streams[type].video_dev = NULL;
  277. if (vdev == NULL)
  278. continue;
  279. cx18_stream_free(&cx->streams[type]);
  280. /* Unregister or release device */
  281. if (unregister)
  282. video_unregister_device(vdev);
  283. else
  284. video_device_release(vdev);
  285. }
  286. }
  287. static void cx18_vbi_setup(struct cx18_stream *s)
  288. {
  289. struct cx18 *cx = s->cx;
  290. int raw = cx18_raw_vbi(cx);
  291. u32 data[CX2341X_MBOX_MAX_DATA];
  292. int lines;
  293. if (cx->is_60hz) {
  294. cx->vbi.count = 12;
  295. cx->vbi.start[0] = 10;
  296. cx->vbi.start[1] = 273;
  297. } else { /* PAL/SECAM */
  298. cx->vbi.count = 18;
  299. cx->vbi.start[0] = 6;
  300. cx->vbi.start[1] = 318;
  301. }
  302. /* setup VBI registers */
  303. cx18_av_cmd(cx, VIDIOC_S_FMT, &cx->vbi.in);
  304. if (raw) {
  305. lines = cx->vbi.count * 2;
  306. } else {
  307. lines = cx->is_60hz ? 24 : 38;
  308. if (cx->is_60hz)
  309. lines += 2;
  310. }
  311. data[0] = s->handle;
  312. /* Lines per field */
  313. data[1] = (lines / 2) | ((lines / 2) << 16);
  314. /* bytes per line */
  315. data[2] = (raw ? vbi_active_samples
  316. : (cx->is_60hz ? vbi_hblank_samples_60Hz
  317. : vbi_hblank_samples_50Hz));
  318. /* Every X number of frames a VBI interrupt arrives
  319. (frames as in 25 or 30 fps) */
  320. data[3] = 1;
  321. /*
  322. * Set the SAV/EAV RP codes to look for as start/stop points
  323. * when in VIP-1.1 mode
  324. */
  325. if (raw) {
  326. /*
  327. * Start codes for beginning of "active" line in vertical blank
  328. * 0x20 ( VerticalBlank )
  329. * 0x60 ( EvenField VerticalBlank )
  330. */
  331. data[4] = 0x20602060;
  332. /*
  333. * End codes for end of "active" raw lines and regular lines
  334. * 0x30 ( VerticalBlank HorizontalBlank)
  335. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  336. * 0x90 (Task HorizontalBlank)
  337. * 0xd0 (Task EvenField HorizontalBlank)
  338. */
  339. data[5] = 0x307090d0;
  340. } else {
  341. /*
  342. * End codes for active video, we want data in the hblank region
  343. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  344. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  345. *
  346. * Since the V bit is only allowed to toggle in the EAV RP code,
  347. * just before the first active region line, these two
  348. * are problematic and we have to ignore them:
  349. * 0x90 (Task HorizontalBlank)
  350. * 0xd0 (Task EvenField HorizontalBlank)
  351. */
  352. data[4] = 0xB0F0B0F0;
  353. /*
  354. * Start codes for beginning of active line in vertical blank
  355. * 0xa0 (Task VerticalBlank )
  356. * 0xe0 (Task EvenField VerticalBlank )
  357. */
  358. data[5] = 0xA0E0A0E0;
  359. }
  360. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  361. data[0], data[1], data[2], data[3], data[4], data[5]);
  362. if (s->type == CX18_ENC_STREAM_TYPE_VBI)
  363. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  364. }
  365. struct cx18_queue *cx18_stream_put_buf_fw(struct cx18_stream *s,
  366. struct cx18_buffer *buf)
  367. {
  368. struct cx18 *cx = s->cx;
  369. struct cx18_queue *q;
  370. /* Don't give it to the firmware, if we're not running a capture */
  371. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  372. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  373. return cx18_enqueue(s, buf, &s->q_free);
  374. q = cx18_enqueue(s, buf, &s->q_busy);
  375. if (q != &s->q_busy)
  376. return q; /* The firmware has the max buffers it can handle */
  377. cx18_buf_sync_for_device(s, buf);
  378. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  379. (void __iomem *) &cx->scb->cpu_mdl[buf->id] - cx->enc_mem,
  380. 1, buf->id, s->buf_size);
  381. return q;
  382. }
  383. void cx18_stream_load_fw_queue(struct cx18_stream *s)
  384. {
  385. struct cx18_queue *q;
  386. struct cx18_buffer *buf;
  387. if (atomic_read(&s->q_free.buffers) == 0 ||
  388. atomic_read(&s->q_busy.buffers) >= CX18_MAX_FW_MDLS_PER_STREAM)
  389. return;
  390. /* Move from q_free to q_busy notifying the firmware, until the limit */
  391. do {
  392. buf = cx18_dequeue(s, &s->q_free);
  393. if (buf == NULL)
  394. break;
  395. q = cx18_stream_put_buf_fw(s, buf);
  396. } while (atomic_read(&s->q_busy.buffers) < CX18_MAX_FW_MDLS_PER_STREAM
  397. && q == &s->q_busy);
  398. }
  399. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  400. {
  401. u32 data[MAX_MB_ARGUMENTS];
  402. struct cx18 *cx = s->cx;
  403. struct cx18_buffer *buf;
  404. int ts = 0;
  405. int captype = 0;
  406. if (s->video_dev == NULL && s->dvb.enabled == 0)
  407. return -EINVAL;
  408. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  409. switch (s->type) {
  410. case CX18_ENC_STREAM_TYPE_MPG:
  411. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  412. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  413. cx->dualwatch_jiffies = jiffies;
  414. cx->dualwatch_stereo_mode = cx->params.audio_properties & 0x300;
  415. cx->search_pack_header = 0;
  416. break;
  417. case CX18_ENC_STREAM_TYPE_TS:
  418. captype = CAPTURE_CHANNEL_TYPE_TS;
  419. ts = 1;
  420. break;
  421. case CX18_ENC_STREAM_TYPE_YUV:
  422. captype = CAPTURE_CHANNEL_TYPE_YUV;
  423. break;
  424. case CX18_ENC_STREAM_TYPE_PCM:
  425. captype = CAPTURE_CHANNEL_TYPE_PCM;
  426. break;
  427. case CX18_ENC_STREAM_TYPE_VBI:
  428. captype = cx18_raw_vbi(cx) ?
  429. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  430. cx->vbi.frame = 0;
  431. cx->vbi.inserted_frame = 0;
  432. memset(cx->vbi.sliced_mpeg_size,
  433. 0, sizeof(cx->vbi.sliced_mpeg_size));
  434. break;
  435. default:
  436. return -EINVAL;
  437. }
  438. /* mute/unmute video */
  439. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2,
  440. s->handle, !!test_bit(CX18_F_I_RADIO_USER, &cx->i_flags));
  441. /* Clear Streamoff flags in case left from last capture */
  442. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  443. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  444. s->handle = data[0];
  445. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  446. if (atomic_read(&cx->ana_capturing) == 0 && !ts) {
  447. struct cx18_api_func_private priv;
  448. /* Stuff from Windows, we don't know what it is */
  449. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  450. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  451. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  452. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  453. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2, s->handle, 12);
  454. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  455. s->handle, cx->digitizer, cx->digitizer);
  456. /* Setup VBI */
  457. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  458. cx18_vbi_setup(s);
  459. /* assign program index info.
  460. Mask 7: select I/P/B, Num_req: 400 max */
  461. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 1, 0);
  462. /* Setup API for Stream */
  463. priv.cx = cx;
  464. priv.s = s;
  465. cx2341x_update(&priv, cx18_api_func, NULL, &cx->params);
  466. }
  467. if (atomic_read(&cx->tot_capturing) == 0) {
  468. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  469. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  470. }
  471. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  472. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  473. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  474. /* Init all the cpu_mdls for this stream */
  475. cx18_flush_queues(s);
  476. mutex_lock(&s->qlock);
  477. list_for_each_entry(buf, &s->q_free.list, list) {
  478. cx18_writel(cx, buf->dma_handle,
  479. &cx->scb->cpu_mdl[buf->id].paddr);
  480. cx18_writel(cx, s->buf_size, &cx->scb->cpu_mdl[buf->id].length);
  481. }
  482. mutex_unlock(&s->qlock);
  483. cx18_stream_load_fw_queue(s);
  484. /* begin_capture */
  485. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  486. CX18_DEBUG_WARN("Error starting capture!\n");
  487. /* Ensure we're really not capturing before releasing MDLs */
  488. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  489. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  490. else
  491. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  492. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  493. /* FIXME - CX18_F_S_STREAMOFF as well? */
  494. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  495. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  496. s->handle = CX18_INVALID_TASK_HANDLE;
  497. if (atomic_read(&cx->tot_capturing) == 0) {
  498. set_bit(CX18_F_I_EOS, &cx->i_flags);
  499. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  500. }
  501. return -EINVAL;
  502. }
  503. /* you're live! sit back and await interrupts :) */
  504. if (!ts)
  505. atomic_inc(&cx->ana_capturing);
  506. atomic_inc(&cx->tot_capturing);
  507. return 0;
  508. }
  509. void cx18_stop_all_captures(struct cx18 *cx)
  510. {
  511. int i;
  512. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  513. struct cx18_stream *s = &cx->streams[i];
  514. if (s->video_dev == NULL && s->dvb.enabled == 0)
  515. continue;
  516. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  517. cx18_stop_v4l2_encode_stream(s, 0);
  518. }
  519. }
  520. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  521. {
  522. struct cx18 *cx = s->cx;
  523. unsigned long then;
  524. if (s->video_dev == NULL && s->dvb.enabled == 0)
  525. return -EINVAL;
  526. /* This function assumes that you are allowed to stop the capture
  527. and that we are actually capturing */
  528. CX18_DEBUG_INFO("Stop Capture\n");
  529. if (atomic_read(&cx->tot_capturing) == 0)
  530. return 0;
  531. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  532. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  533. else
  534. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  535. then = jiffies;
  536. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  537. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  538. }
  539. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  540. atomic_dec(&cx->ana_capturing);
  541. atomic_dec(&cx->tot_capturing);
  542. /* Clear capture and no-read bits */
  543. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  544. /* Tell the CX23418 it can't use our buffers anymore */
  545. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  546. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  547. s->handle = CX18_INVALID_TASK_HANDLE;
  548. if (atomic_read(&cx->tot_capturing) > 0)
  549. return 0;
  550. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  551. wake_up(&s->waitq);
  552. return 0;
  553. }
  554. u32 cx18_find_handle(struct cx18 *cx)
  555. {
  556. int i;
  557. /* find first available handle to be used for global settings */
  558. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  559. struct cx18_stream *s = &cx->streams[i];
  560. if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  561. return s->handle;
  562. }
  563. return CX18_INVALID_TASK_HANDLE;
  564. }
  565. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  566. {
  567. int i;
  568. struct cx18_stream *s;
  569. if (handle == CX18_INVALID_TASK_HANDLE)
  570. return NULL;
  571. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  572. s = &cx->streams[i];
  573. if (s->handle != handle)
  574. continue;
  575. if (s->video_dev || s->dvb.enabled)
  576. return s;
  577. }
  578. return NULL;
  579. }