pci200syn.c 13 KB

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  1. /*
  2. * Goramo PCI200SYN synchronous serial card driver for Linux
  3. *
  4. * Copyright (C) 2002-2003 Krzysztof Halasa <khc@pm.waw.pl>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of version 2 of the GNU General Public License
  8. * as published by the Free Software Foundation.
  9. *
  10. * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/>
  11. *
  12. * Sources of information:
  13. * Hitachi HD64572 SCA-II User's Manual
  14. * PLX Technology Inc. PCI9052 Data Book
  15. */
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/types.h>
  20. #include <linux/fcntl.h>
  21. #include <linux/in.h>
  22. #include <linux/string.h>
  23. #include <linux/errno.h>
  24. #include <linux/init.h>
  25. #include <linux/ioport.h>
  26. #include <linux/moduleparam.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/hdlc.h>
  29. #include <linux/pci.h>
  30. #include <linux/delay.h>
  31. #include <asm/io.h>
  32. #include "hd64572.h"
  33. static const char* version = "Goramo PCI200SYN driver version: 1.16";
  34. static const char* devname = "PCI200SYN";
  35. #undef DEBUG_PKT
  36. #define DEBUG_RINGS
  37. #define PCI200SYN_PLX_SIZE 0x80 /* PLX control window size (128b) */
  38. #define PCI200SYN_SCA_SIZE 0x400 /* SCA window size (1Kb) */
  39. #define MAX_TX_BUFFERS 10
  40. static int pci_clock_freq = 33000000;
  41. #define CLOCK_BASE pci_clock_freq
  42. /*
  43. * PLX PCI9052 local configuration and shared runtime registers.
  44. * This structure can be used to access 9052 registers (memory mapped).
  45. */
  46. typedef struct {
  47. u32 loc_addr_range[4]; /* 00-0Ch : Local Address Ranges */
  48. u32 loc_rom_range; /* 10h : Local ROM Range */
  49. u32 loc_addr_base[4]; /* 14-20h : Local Address Base Addrs */
  50. u32 loc_rom_base; /* 24h : Local ROM Base */
  51. u32 loc_bus_descr[4]; /* 28-34h : Local Bus Descriptors */
  52. u32 rom_bus_descr; /* 38h : ROM Bus Descriptor */
  53. u32 cs_base[4]; /* 3C-48h : Chip Select Base Addrs */
  54. u32 intr_ctrl_stat; /* 4Ch : Interrupt Control/Status */
  55. u32 init_ctrl; /* 50h : EEPROM ctrl, Init Ctrl, etc */
  56. }plx9052;
  57. typedef struct port_s {
  58. struct net_device *dev;
  59. struct card_s *card;
  60. spinlock_t lock; /* TX lock */
  61. sync_serial_settings settings;
  62. int rxpart; /* partial frame received, next frame invalid*/
  63. unsigned short encoding;
  64. unsigned short parity;
  65. u16 rxin; /* rx ring buffer 'in' pointer */
  66. u16 txin; /* tx ring buffer 'in' and 'last' pointers */
  67. u16 txlast;
  68. u8 rxs, txs, tmc; /* SCA registers */
  69. u8 phy_node; /* physical port # - 0 or 1 */
  70. }port_t;
  71. typedef struct card_s {
  72. u8 __iomem *rambase; /* buffer memory base (virtual) */
  73. u8 __iomem *scabase; /* SCA memory base (virtual) */
  74. plx9052 __iomem *plxbase;/* PLX registers memory base (virtual) */
  75. u16 rx_ring_buffers; /* number of buffers in a ring */
  76. u16 tx_ring_buffers;
  77. u16 buff_offset; /* offset of first buffer of first channel */
  78. u8 irq; /* interrupt request level */
  79. port_t ports[2];
  80. }card_t;
  81. #define sca_in(reg, card) readb(card->scabase + (reg))
  82. #define sca_out(value, reg, card) writeb(value, card->scabase + (reg))
  83. #define sca_inw(reg, card) readw(card->scabase + (reg))
  84. #define sca_outw(value, reg, card) writew(value, card->scabase + (reg))
  85. #define sca_inl(reg, card) readl(card->scabase + (reg))
  86. #define sca_outl(value, reg, card) writel(value, card->scabase + (reg))
  87. #define port_to_card(port) (port->card)
  88. #define log_node(port) (port->phy_node)
  89. #define phy_node(port) (port->phy_node)
  90. #define winbase(card) (card->rambase)
  91. #define get_port(card, port) (&card->ports[port])
  92. #define sca_flush(card) (sca_in(IER0, card));
  93. static inline void new_memcpy_toio(char __iomem *dest, char *src, int length)
  94. {
  95. int len;
  96. do {
  97. len = length > 256 ? 256 : length;
  98. memcpy_toio(dest, src, len);
  99. dest += len;
  100. src += len;
  101. length -= len;
  102. readb(dest);
  103. } while (len);
  104. }
  105. #undef memcpy_toio
  106. #define memcpy_toio new_memcpy_toio
  107. #include "hd64572.c"
  108. static void pci200_set_iface(port_t *port)
  109. {
  110. card_t *card = port->card;
  111. u16 msci = get_msci(port);
  112. u8 rxs = port->rxs & CLK_BRG_MASK;
  113. u8 txs = port->txs & CLK_BRG_MASK;
  114. sca_out(EXS_TES1, (phy_node(port) ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS,
  115. port_to_card(port));
  116. switch(port->settings.clock_type) {
  117. case CLOCK_INT:
  118. rxs |= CLK_BRG; /* BRG output */
  119. txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
  120. break;
  121. case CLOCK_TXINT:
  122. rxs |= CLK_LINE; /* RXC input */
  123. txs |= CLK_PIN_OUT | CLK_BRG; /* BRG output */
  124. break;
  125. case CLOCK_TXFROMRX:
  126. rxs |= CLK_LINE; /* RXC input */
  127. txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
  128. break;
  129. default: /* EXTernal clock */
  130. rxs |= CLK_LINE; /* RXC input */
  131. txs |= CLK_PIN_OUT | CLK_LINE; /* TXC input */
  132. break;
  133. }
  134. port->rxs = rxs;
  135. port->txs = txs;
  136. sca_out(rxs, msci + RXS, card);
  137. sca_out(txs, msci + TXS, card);
  138. sca_set_port(port);
  139. }
  140. static int pci200_open(struct net_device *dev)
  141. {
  142. port_t *port = dev_to_port(dev);
  143. int result = hdlc_open(dev);
  144. if (result)
  145. return result;
  146. sca_open(dev);
  147. pci200_set_iface(port);
  148. sca_flush(port_to_card(port));
  149. return 0;
  150. }
  151. static int pci200_close(struct net_device *dev)
  152. {
  153. sca_close(dev);
  154. sca_flush(port_to_card(dev_to_port(dev)));
  155. hdlc_close(dev);
  156. return 0;
  157. }
  158. static int pci200_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  159. {
  160. const size_t size = sizeof(sync_serial_settings);
  161. sync_serial_settings new_line;
  162. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  163. port_t *port = dev_to_port(dev);
  164. #ifdef DEBUG_RINGS
  165. if (cmd == SIOCDEVPRIVATE) {
  166. sca_dump_rings(dev);
  167. return 0;
  168. }
  169. #endif
  170. if (cmd != SIOCWANDEV)
  171. return hdlc_ioctl(dev, ifr, cmd);
  172. switch(ifr->ifr_settings.type) {
  173. case IF_GET_IFACE:
  174. ifr->ifr_settings.type = IF_IFACE_V35;
  175. if (ifr->ifr_settings.size < size) {
  176. ifr->ifr_settings.size = size; /* data size wanted */
  177. return -ENOBUFS;
  178. }
  179. if (copy_to_user(line, &port->settings, size))
  180. return -EFAULT;
  181. return 0;
  182. case IF_IFACE_V35:
  183. case IF_IFACE_SYNC_SERIAL:
  184. if (!capable(CAP_NET_ADMIN))
  185. return -EPERM;
  186. if (copy_from_user(&new_line, line, size))
  187. return -EFAULT;
  188. if (new_line.clock_type != CLOCK_EXT &&
  189. new_line.clock_type != CLOCK_TXFROMRX &&
  190. new_line.clock_type != CLOCK_INT &&
  191. new_line.clock_type != CLOCK_TXINT)
  192. return -EINVAL; /* No such clock setting */
  193. if (new_line.loopback != 0 && new_line.loopback != 1)
  194. return -EINVAL;
  195. memcpy(&port->settings, &new_line, size); /* Update settings */
  196. pci200_set_iface(port);
  197. sca_flush(port_to_card(port));
  198. return 0;
  199. default:
  200. return hdlc_ioctl(dev, ifr, cmd);
  201. }
  202. }
  203. static void pci200_pci_remove_one(struct pci_dev *pdev)
  204. {
  205. int i;
  206. card_t *card = pci_get_drvdata(pdev);
  207. for (i = 0; i < 2; i++)
  208. if (card->ports[i].card) {
  209. struct net_device *dev = port_to_dev(&card->ports[i]);
  210. unregister_hdlc_device(dev);
  211. }
  212. if (card->irq)
  213. free_irq(card->irq, card);
  214. if (card->rambase)
  215. iounmap(card->rambase);
  216. if (card->scabase)
  217. iounmap(card->scabase);
  218. if (card->plxbase)
  219. iounmap(card->plxbase);
  220. pci_release_regions(pdev);
  221. pci_disable_device(pdev);
  222. pci_set_drvdata(pdev, NULL);
  223. if (card->ports[0].dev)
  224. free_netdev(card->ports[0].dev);
  225. if (card->ports[1].dev)
  226. free_netdev(card->ports[1].dev);
  227. kfree(card);
  228. }
  229. static int __devinit pci200_pci_init_one(struct pci_dev *pdev,
  230. const struct pci_device_id *ent)
  231. {
  232. card_t *card;
  233. u32 __iomem *p;
  234. int i;
  235. u32 ramsize;
  236. u32 ramphys; /* buffer memory base */
  237. u32 scaphys; /* SCA memory base */
  238. u32 plxphys; /* PLX registers memory base */
  239. #ifndef MODULE
  240. static int printed_version;
  241. if (!printed_version++)
  242. printk(KERN_INFO "%s\n", version);
  243. #endif
  244. i = pci_enable_device(pdev);
  245. if (i)
  246. return i;
  247. i = pci_request_regions(pdev, "PCI200SYN");
  248. if (i) {
  249. pci_disable_device(pdev);
  250. return i;
  251. }
  252. card = kzalloc(sizeof(card_t), GFP_KERNEL);
  253. if (card == NULL) {
  254. printk(KERN_ERR "pci200syn: unable to allocate memory\n");
  255. pci_release_regions(pdev);
  256. pci_disable_device(pdev);
  257. return -ENOBUFS;
  258. }
  259. pci_set_drvdata(pdev, card);
  260. card->ports[0].dev = alloc_hdlcdev(&card->ports[0]);
  261. card->ports[1].dev = alloc_hdlcdev(&card->ports[1]);
  262. if (!card->ports[0].dev || !card->ports[1].dev) {
  263. printk(KERN_ERR "pci200syn: unable to allocate memory\n");
  264. pci200_pci_remove_one(pdev);
  265. return -ENOMEM;
  266. }
  267. if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE ||
  268. pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE ||
  269. pci_resource_len(pdev, 3) < 16384) {
  270. printk(KERN_ERR "pci200syn: invalid card EEPROM parameters\n");
  271. pci200_pci_remove_one(pdev);
  272. return -EFAULT;
  273. }
  274. plxphys = pci_resource_start(pdev,0) & PCI_BASE_ADDRESS_MEM_MASK;
  275. card->plxbase = ioremap(plxphys, PCI200SYN_PLX_SIZE);
  276. scaphys = pci_resource_start(pdev,2) & PCI_BASE_ADDRESS_MEM_MASK;
  277. card->scabase = ioremap(scaphys, PCI200SYN_SCA_SIZE);
  278. ramphys = pci_resource_start(pdev,3) & PCI_BASE_ADDRESS_MEM_MASK;
  279. card->rambase = pci_ioremap_bar(pdev, 3);
  280. if (card->plxbase == NULL ||
  281. card->scabase == NULL ||
  282. card->rambase == NULL) {
  283. printk(KERN_ERR "pci200syn: ioremap() failed\n");
  284. pci200_pci_remove_one(pdev);
  285. return -EFAULT;
  286. }
  287. /* Reset PLX */
  288. p = &card->plxbase->init_ctrl;
  289. writel(readl(p) | 0x40000000, p);
  290. readl(p); /* Flush the write - do not use sca_flush */
  291. udelay(1);
  292. writel(readl(p) & ~0x40000000, p);
  293. readl(p); /* Flush the write - do not use sca_flush */
  294. udelay(1);
  295. ramsize = sca_detect_ram(card, card->rambase,
  296. pci_resource_len(pdev, 3));
  297. /* number of TX + RX buffers for one port - this is dual port card */
  298. i = ramsize / (2 * (sizeof(pkt_desc) + HDLC_MAX_MRU));
  299. card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
  300. card->rx_ring_buffers = i - card->tx_ring_buffers;
  301. card->buff_offset = 2 * sizeof(pkt_desc) * (card->tx_ring_buffers +
  302. card->rx_ring_buffers);
  303. printk(KERN_INFO "pci200syn: %u KB RAM at 0x%x, IRQ%u, using %u TX +"
  304. " %u RX packets rings\n", ramsize / 1024, ramphys,
  305. pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers);
  306. if (pdev->subsystem_device == PCI_DEVICE_ID_PLX_9050) {
  307. printk(KERN_ERR "Detected PCI200SYN card with old "
  308. "configuration data.\n");
  309. printk(KERN_ERR "See <http://www.kernel.org/pub/"
  310. "linux/utils/net/hdlc/pci200syn/> for update.\n");
  311. printk(KERN_ERR "The card will stop working with"
  312. " future versions of Linux if not updated.\n");
  313. }
  314. if (card->tx_ring_buffers < 1) {
  315. printk(KERN_ERR "pci200syn: RAM test failed\n");
  316. pci200_pci_remove_one(pdev);
  317. return -EFAULT;
  318. }
  319. /* Enable interrupts on the PCI bridge */
  320. p = &card->plxbase->intr_ctrl_stat;
  321. writew(readw(p) | 0x0040, p);
  322. /* Allocate IRQ */
  323. if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, devname, card)) {
  324. printk(KERN_WARNING "pci200syn: could not allocate IRQ%d.\n",
  325. pdev->irq);
  326. pci200_pci_remove_one(pdev);
  327. return -EBUSY;
  328. }
  329. card->irq = pdev->irq;
  330. sca_init(card, 0);
  331. for (i = 0; i < 2; i++) {
  332. port_t *port = &card->ports[i];
  333. struct net_device *dev = port_to_dev(port);
  334. hdlc_device *hdlc = dev_to_hdlc(dev);
  335. port->phy_node = i;
  336. spin_lock_init(&port->lock);
  337. dev->irq = card->irq;
  338. dev->mem_start = ramphys;
  339. dev->mem_end = ramphys + ramsize - 1;
  340. dev->tx_queue_len = 50;
  341. dev->do_ioctl = pci200_ioctl;
  342. dev->open = pci200_open;
  343. dev->stop = pci200_close;
  344. hdlc->attach = sca_attach;
  345. hdlc->xmit = sca_xmit;
  346. port->settings.clock_type = CLOCK_EXT;
  347. port->card = card;
  348. if (register_hdlc_device(dev)) {
  349. printk(KERN_ERR "pci200syn: unable to register hdlc "
  350. "device\n");
  351. port->card = NULL;
  352. pci200_pci_remove_one(pdev);
  353. return -ENOBUFS;
  354. }
  355. sca_init_port(port); /* Set up SCA memory */
  356. printk(KERN_INFO "%s: PCI200SYN node %d\n",
  357. dev->name, port->phy_node);
  358. }
  359. sca_flush(card);
  360. return 0;
  361. }
  362. static struct pci_device_id pci200_pci_tbl[] __devinitdata = {
  363. { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX,
  364. PCI_DEVICE_ID_PLX_9050, 0, 0, 0 },
  365. { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX,
  366. PCI_DEVICE_ID_PLX_PCI200SYN, 0, 0, 0 },
  367. { 0, }
  368. };
  369. static struct pci_driver pci200_pci_driver = {
  370. .name = "PCI200SYN",
  371. .id_table = pci200_pci_tbl,
  372. .probe = pci200_pci_init_one,
  373. .remove = pci200_pci_remove_one,
  374. };
  375. static int __init pci200_init_module(void)
  376. {
  377. #ifdef MODULE
  378. printk(KERN_INFO "%s\n", version);
  379. #endif
  380. if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) {
  381. printk(KERN_ERR "pci200syn: Invalid PCI clock frequency\n");
  382. return -EINVAL;
  383. }
  384. return pci_register_driver(&pci200_pci_driver);
  385. }
  386. static void __exit pci200_cleanup_module(void)
  387. {
  388. pci_unregister_driver(&pci200_pci_driver);
  389. }
  390. MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
  391. MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver");
  392. MODULE_LICENSE("GPL v2");
  393. MODULE_DEVICE_TABLE(pci, pci200_pci_tbl);
  394. module_param(pci_clock_freq, int, 0444);
  395. MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz");
  396. module_init(pci200_init_module);
  397. module_exit(pci200_cleanup_module);