mcdi.c 30 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172
  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2008-2011 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. #include <linux/delay.h>
  10. #include "net_driver.h"
  11. #include "nic.h"
  12. #include "io.h"
  13. #include "regs.h"
  14. #include "mcdi_pcol.h"
  15. #include "phy.h"
  16. /**************************************************************************
  17. *
  18. * Management-Controller-to-Driver Interface
  19. *
  20. **************************************************************************
  21. */
  22. #define MCDI_RPC_TIMEOUT 10 /*seconds */
  23. #define MCDI_PDU(efx) \
  24. (efx_port_num(efx) ? MC_SMEM_P1_PDU_OFST : MC_SMEM_P0_PDU_OFST)
  25. #define MCDI_DOORBELL(efx) \
  26. (efx_port_num(efx) ? MC_SMEM_P1_DOORBELL_OFST : MC_SMEM_P0_DOORBELL_OFST)
  27. #define MCDI_STATUS(efx) \
  28. (efx_port_num(efx) ? MC_SMEM_P1_STATUS_OFST : MC_SMEM_P0_STATUS_OFST)
  29. /* A reboot/assertion causes the MCDI status word to be set after the
  30. * command word is set or a REBOOT event is sent. If we notice a reboot
  31. * via these mechanisms then wait 10ms for the status word to be set. */
  32. #define MCDI_STATUS_DELAY_US 100
  33. #define MCDI_STATUS_DELAY_COUNT 100
  34. #define MCDI_STATUS_SLEEP_MS \
  35. (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
  36. #define SEQ_MASK \
  37. EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
  38. static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
  39. {
  40. struct siena_nic_data *nic_data;
  41. EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
  42. nic_data = efx->nic_data;
  43. return &nic_data->mcdi;
  44. }
  45. void efx_mcdi_init(struct efx_nic *efx)
  46. {
  47. struct efx_mcdi_iface *mcdi;
  48. if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
  49. return;
  50. mcdi = efx_mcdi(efx);
  51. init_waitqueue_head(&mcdi->wq);
  52. spin_lock_init(&mcdi->iface_lock);
  53. atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
  54. mcdi->mode = MCDI_MODE_POLL;
  55. (void) efx_mcdi_poll_reboot(efx);
  56. }
  57. static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd,
  58. const u8 *inbuf, size_t inlen)
  59. {
  60. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  61. unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
  62. unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx);
  63. unsigned int i;
  64. efx_dword_t hdr;
  65. u32 xflags, seqno;
  66. BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
  67. BUG_ON(inlen & 3 || inlen >= MC_SMEM_PDU_LEN);
  68. seqno = mcdi->seqno & SEQ_MASK;
  69. xflags = 0;
  70. if (mcdi->mode == MCDI_MODE_EVENTS)
  71. xflags |= MCDI_HEADER_XFLAGS_EVREQ;
  72. EFX_POPULATE_DWORD_6(hdr,
  73. MCDI_HEADER_RESPONSE, 0,
  74. MCDI_HEADER_RESYNC, 1,
  75. MCDI_HEADER_CODE, cmd,
  76. MCDI_HEADER_DATALEN, inlen,
  77. MCDI_HEADER_SEQ, seqno,
  78. MCDI_HEADER_XFLAGS, xflags);
  79. efx_writed(efx, &hdr, pdu);
  80. for (i = 0; i < inlen; i += 4)
  81. _efx_writed(efx, *((__le32 *)(inbuf + i)), pdu + 4 + i);
  82. /* Ensure the payload is written out before the header */
  83. wmb();
  84. /* ring the doorbell with a distinctive value */
  85. _efx_writed(efx, (__force __le32) 0x45789abc, doorbell);
  86. }
  87. static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen)
  88. {
  89. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  90. unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
  91. int i;
  92. BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
  93. BUG_ON(outlen & 3 || outlen >= MC_SMEM_PDU_LEN);
  94. for (i = 0; i < outlen; i += 4)
  95. *((__le32 *)(outbuf + i)) = _efx_readd(efx, pdu + 4 + i);
  96. }
  97. static int efx_mcdi_poll(struct efx_nic *efx)
  98. {
  99. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  100. unsigned int time, finish;
  101. unsigned int respseq, respcmd, error;
  102. unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
  103. unsigned int rc, spins;
  104. efx_dword_t reg;
  105. /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
  106. rc = -efx_mcdi_poll_reboot(efx);
  107. if (rc)
  108. goto out;
  109. /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
  110. * because generally mcdi responses are fast. After that, back off
  111. * and poll once a jiffy (approximately)
  112. */
  113. spins = TICK_USEC;
  114. finish = get_seconds() + MCDI_RPC_TIMEOUT;
  115. while (1) {
  116. if (spins != 0) {
  117. --spins;
  118. udelay(1);
  119. } else {
  120. schedule_timeout_uninterruptible(1);
  121. }
  122. time = get_seconds();
  123. rmb();
  124. efx_readd(efx, &reg, pdu);
  125. /* All 1's indicates that shared memory is in reset (and is
  126. * not a valid header). Wait for it to come out reset before
  127. * completing the command */
  128. if (EFX_DWORD_FIELD(reg, EFX_DWORD_0) != 0xffffffff &&
  129. EFX_DWORD_FIELD(reg, MCDI_HEADER_RESPONSE))
  130. break;
  131. if (time >= finish)
  132. return -ETIMEDOUT;
  133. }
  134. mcdi->resplen = EFX_DWORD_FIELD(reg, MCDI_HEADER_DATALEN);
  135. respseq = EFX_DWORD_FIELD(reg, MCDI_HEADER_SEQ);
  136. respcmd = EFX_DWORD_FIELD(reg, MCDI_HEADER_CODE);
  137. error = EFX_DWORD_FIELD(reg, MCDI_HEADER_ERROR);
  138. if (error && mcdi->resplen == 0) {
  139. netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
  140. rc = EIO;
  141. } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
  142. netif_err(efx, hw, efx->net_dev,
  143. "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
  144. respseq, mcdi->seqno);
  145. rc = EIO;
  146. } else if (error) {
  147. efx_readd(efx, &reg, pdu + 4);
  148. switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) {
  149. #define TRANSLATE_ERROR(name) \
  150. case MC_CMD_ERR_ ## name: \
  151. rc = name; \
  152. break
  153. TRANSLATE_ERROR(ENOENT);
  154. TRANSLATE_ERROR(EINTR);
  155. TRANSLATE_ERROR(EACCES);
  156. TRANSLATE_ERROR(EBUSY);
  157. TRANSLATE_ERROR(EINVAL);
  158. TRANSLATE_ERROR(EDEADLK);
  159. TRANSLATE_ERROR(ENOSYS);
  160. TRANSLATE_ERROR(ETIME);
  161. #undef TRANSLATE_ERROR
  162. default:
  163. rc = EIO;
  164. break;
  165. }
  166. } else
  167. rc = 0;
  168. out:
  169. mcdi->resprc = rc;
  170. if (rc)
  171. mcdi->resplen = 0;
  172. /* Return rc=0 like wait_event_timeout() */
  173. return 0;
  174. }
  175. /* Test and clear MC-rebooted flag for this port/function */
  176. int efx_mcdi_poll_reboot(struct efx_nic *efx)
  177. {
  178. unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_STATUS(efx);
  179. efx_dword_t reg;
  180. uint32_t value;
  181. if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
  182. return false;
  183. efx_readd(efx, &reg, addr);
  184. value = EFX_DWORD_FIELD(reg, EFX_DWORD_0);
  185. if (value == 0)
  186. return 0;
  187. EFX_ZERO_DWORD(reg);
  188. efx_writed(efx, &reg, addr);
  189. if (value == MC_STATUS_DWORD_ASSERT)
  190. return -EINTR;
  191. else
  192. return -EIO;
  193. }
  194. static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi)
  195. {
  196. /* Wait until the interface becomes QUIESCENT and we win the race
  197. * to mark it RUNNING. */
  198. wait_event(mcdi->wq,
  199. atomic_cmpxchg(&mcdi->state,
  200. MCDI_STATE_QUIESCENT,
  201. MCDI_STATE_RUNNING)
  202. == MCDI_STATE_QUIESCENT);
  203. }
  204. static int efx_mcdi_await_completion(struct efx_nic *efx)
  205. {
  206. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  207. if (wait_event_timeout(
  208. mcdi->wq,
  209. atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED,
  210. msecs_to_jiffies(MCDI_RPC_TIMEOUT * 1000)) == 0)
  211. return -ETIMEDOUT;
  212. /* Check if efx_mcdi_set_mode() switched us back to polled completions.
  213. * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
  214. * completed the request first, then we'll just end up completing the
  215. * request again, which is safe.
  216. *
  217. * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
  218. * wait_event_timeout() implicitly provides.
  219. */
  220. if (mcdi->mode == MCDI_MODE_POLL)
  221. return efx_mcdi_poll(efx);
  222. return 0;
  223. }
  224. static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi)
  225. {
  226. /* If the interface is RUNNING, then move to COMPLETED and wake any
  227. * waiters. If the interface isn't in RUNNING then we've received a
  228. * duplicate completion after we've already transitioned back to
  229. * QUIESCENT. [A subsequent invocation would increment seqno, so would
  230. * have failed the seqno check].
  231. */
  232. if (atomic_cmpxchg(&mcdi->state,
  233. MCDI_STATE_RUNNING,
  234. MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) {
  235. wake_up(&mcdi->wq);
  236. return true;
  237. }
  238. return false;
  239. }
  240. static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
  241. {
  242. atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
  243. wake_up(&mcdi->wq);
  244. }
  245. static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
  246. unsigned int datalen, unsigned int errno)
  247. {
  248. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  249. bool wake = false;
  250. spin_lock(&mcdi->iface_lock);
  251. if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
  252. if (mcdi->credits)
  253. /* The request has been cancelled */
  254. --mcdi->credits;
  255. else
  256. netif_err(efx, hw, efx->net_dev,
  257. "MC response mismatch tx seq 0x%x rx "
  258. "seq 0x%x\n", seqno, mcdi->seqno);
  259. } else {
  260. mcdi->resprc = errno;
  261. mcdi->resplen = datalen;
  262. wake = true;
  263. }
  264. spin_unlock(&mcdi->iface_lock);
  265. if (wake)
  266. efx_mcdi_complete(mcdi);
  267. }
  268. /* Issue the given command by writing the data into the shared memory PDU,
  269. * ring the doorbell and wait for completion. Copyout the result. */
  270. int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
  271. const u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen,
  272. size_t *outlen_actual)
  273. {
  274. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  275. int rc;
  276. BUG_ON(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
  277. efx_mcdi_acquire(mcdi);
  278. /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
  279. spin_lock_bh(&mcdi->iface_lock);
  280. ++mcdi->seqno;
  281. spin_unlock_bh(&mcdi->iface_lock);
  282. efx_mcdi_copyin(efx, cmd, inbuf, inlen);
  283. if (mcdi->mode == MCDI_MODE_POLL)
  284. rc = efx_mcdi_poll(efx);
  285. else
  286. rc = efx_mcdi_await_completion(efx);
  287. if (rc != 0) {
  288. /* Close the race with efx_mcdi_ev_cpl() executing just too late
  289. * and completing a request we've just cancelled, by ensuring
  290. * that the seqno check therein fails.
  291. */
  292. spin_lock_bh(&mcdi->iface_lock);
  293. ++mcdi->seqno;
  294. ++mcdi->credits;
  295. spin_unlock_bh(&mcdi->iface_lock);
  296. netif_err(efx, hw, efx->net_dev,
  297. "MC command 0x%x inlen %d mode %d timed out\n",
  298. cmd, (int)inlen, mcdi->mode);
  299. } else {
  300. size_t resplen;
  301. /* At the very least we need a memory barrier here to ensure
  302. * we pick up changes from efx_mcdi_ev_cpl(). Protect against
  303. * a spurious efx_mcdi_ev_cpl() running concurrently by
  304. * acquiring the iface_lock. */
  305. spin_lock_bh(&mcdi->iface_lock);
  306. rc = -mcdi->resprc;
  307. resplen = mcdi->resplen;
  308. spin_unlock_bh(&mcdi->iface_lock);
  309. if (rc == 0) {
  310. efx_mcdi_copyout(efx, outbuf,
  311. min(outlen, mcdi->resplen + 3) & ~0x3);
  312. if (outlen_actual != NULL)
  313. *outlen_actual = resplen;
  314. } else if (cmd == MC_CMD_REBOOT && rc == -EIO)
  315. ; /* Don't reset if MC_CMD_REBOOT returns EIO */
  316. else if (rc == -EIO || rc == -EINTR) {
  317. netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
  318. -rc);
  319. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  320. } else
  321. netif_dbg(efx, hw, efx->net_dev,
  322. "MC command 0x%x inlen %d failed rc=%d\n",
  323. cmd, (int)inlen, -rc);
  324. if (rc == -EIO || rc == -EINTR) {
  325. msleep(MCDI_STATUS_SLEEP_MS);
  326. efx_mcdi_poll_reboot(efx);
  327. }
  328. }
  329. efx_mcdi_release(mcdi);
  330. return rc;
  331. }
  332. void efx_mcdi_mode_poll(struct efx_nic *efx)
  333. {
  334. struct efx_mcdi_iface *mcdi;
  335. if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
  336. return;
  337. mcdi = efx_mcdi(efx);
  338. if (mcdi->mode == MCDI_MODE_POLL)
  339. return;
  340. /* We can switch from event completion to polled completion, because
  341. * mcdi requests are always completed in shared memory. We do this by
  342. * switching the mode to POLL'd then completing the request.
  343. * efx_mcdi_await_completion() will then call efx_mcdi_poll().
  344. *
  345. * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
  346. * which efx_mcdi_complete() provides for us.
  347. */
  348. mcdi->mode = MCDI_MODE_POLL;
  349. efx_mcdi_complete(mcdi);
  350. }
  351. void efx_mcdi_mode_event(struct efx_nic *efx)
  352. {
  353. struct efx_mcdi_iface *mcdi;
  354. if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
  355. return;
  356. mcdi = efx_mcdi(efx);
  357. if (mcdi->mode == MCDI_MODE_EVENTS)
  358. return;
  359. /* We can't switch from polled to event completion in the middle of a
  360. * request, because the completion method is specified in the request.
  361. * So acquire the interface to serialise the requestors. We don't need
  362. * to acquire the iface_lock to change the mode here, but we do need a
  363. * write memory barrier ensure that efx_mcdi_rpc() sees it, which
  364. * efx_mcdi_acquire() provides.
  365. */
  366. efx_mcdi_acquire(mcdi);
  367. mcdi->mode = MCDI_MODE_EVENTS;
  368. efx_mcdi_release(mcdi);
  369. }
  370. static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
  371. {
  372. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  373. /* If there is an outstanding MCDI request, it has been terminated
  374. * either by a BADASSERT or REBOOT event. If the mcdi interface is
  375. * in polled mode, then do nothing because the MC reboot handler will
  376. * set the header correctly. However, if the mcdi interface is waiting
  377. * for a CMDDONE event it won't receive it [and since all MCDI events
  378. * are sent to the same queue, we can't be racing with
  379. * efx_mcdi_ev_cpl()]
  380. *
  381. * There's a race here with efx_mcdi_rpc(), because we might receive
  382. * a REBOOT event *before* the request has been copied out. In polled
  383. * mode (during startup) this is irrelevant, because efx_mcdi_complete()
  384. * is ignored. In event mode, this condition is just an edge-case of
  385. * receiving a REBOOT event after posting the MCDI request. Did the mc
  386. * reboot before or after the copyout? The best we can do always is
  387. * just return failure.
  388. */
  389. spin_lock(&mcdi->iface_lock);
  390. if (efx_mcdi_complete(mcdi)) {
  391. if (mcdi->mode == MCDI_MODE_EVENTS) {
  392. mcdi->resprc = rc;
  393. mcdi->resplen = 0;
  394. ++mcdi->credits;
  395. }
  396. } else {
  397. int count;
  398. /* Nobody was waiting for an MCDI request, so trigger a reset */
  399. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  400. /* Consume the status word since efx_mcdi_rpc_finish() won't */
  401. for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
  402. if (efx_mcdi_poll_reboot(efx))
  403. break;
  404. udelay(MCDI_STATUS_DELAY_US);
  405. }
  406. }
  407. spin_unlock(&mcdi->iface_lock);
  408. }
  409. static unsigned int efx_mcdi_event_link_speed[] = {
  410. [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100,
  411. [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000,
  412. [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000,
  413. };
  414. static void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev)
  415. {
  416. u32 flags, fcntl, speed, lpa;
  417. speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED);
  418. EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed));
  419. speed = efx_mcdi_event_link_speed[speed];
  420. flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS);
  421. fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL);
  422. lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP);
  423. /* efx->link_state is only modified by efx_mcdi_phy_get_link(),
  424. * which is only run after flushing the event queues. Therefore, it
  425. * is safe to modify the link state outside of the mac_lock here.
  426. */
  427. efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl);
  428. efx_mcdi_phy_check_fcntl(efx, lpa);
  429. efx_link_status_changed(efx);
  430. }
  431. /* Called from falcon_process_eventq for MCDI events */
  432. void efx_mcdi_process_event(struct efx_channel *channel,
  433. efx_qword_t *event)
  434. {
  435. struct efx_nic *efx = channel->efx;
  436. int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
  437. u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
  438. switch (code) {
  439. case MCDI_EVENT_CODE_BADSSERT:
  440. netif_err(efx, hw, efx->net_dev,
  441. "MC watchdog or assertion failure at 0x%x\n", data);
  442. efx_mcdi_ev_death(efx, EINTR);
  443. break;
  444. case MCDI_EVENT_CODE_PMNOTICE:
  445. netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
  446. break;
  447. case MCDI_EVENT_CODE_CMDDONE:
  448. efx_mcdi_ev_cpl(efx,
  449. MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
  450. MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
  451. MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
  452. break;
  453. case MCDI_EVENT_CODE_LINKCHANGE:
  454. efx_mcdi_process_link_change(efx, event);
  455. break;
  456. case MCDI_EVENT_CODE_SENSOREVT:
  457. efx_mcdi_sensor_event(efx, event);
  458. break;
  459. case MCDI_EVENT_CODE_SCHEDERR:
  460. netif_info(efx, hw, efx->net_dev,
  461. "MC Scheduler error address=0x%x\n", data);
  462. break;
  463. case MCDI_EVENT_CODE_REBOOT:
  464. netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
  465. efx_mcdi_ev_death(efx, EIO);
  466. break;
  467. case MCDI_EVENT_CODE_MAC_STATS_DMA:
  468. /* MAC stats are gather lazily. We can ignore this. */
  469. break;
  470. default:
  471. netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
  472. code);
  473. }
  474. }
  475. /**************************************************************************
  476. *
  477. * Specific request functions
  478. *
  479. **************************************************************************
  480. */
  481. void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
  482. {
  483. u8 outbuf[ALIGN(MC_CMD_GET_VERSION_OUT_LEN, 4)];
  484. size_t outlength;
  485. const __le16 *ver_words;
  486. int rc;
  487. BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
  488. rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
  489. outbuf, sizeof(outbuf), &outlength);
  490. if (rc)
  491. goto fail;
  492. if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
  493. rc = -EIO;
  494. goto fail;
  495. }
  496. ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
  497. snprintf(buf, len, "%u.%u.%u.%u",
  498. le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
  499. le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
  500. return;
  501. fail:
  502. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  503. buf[0] = 0;
  504. }
  505. int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  506. bool *was_attached)
  507. {
  508. u8 inbuf[MC_CMD_DRV_ATTACH_IN_LEN];
  509. u8 outbuf[MC_CMD_DRV_ATTACH_OUT_LEN];
  510. size_t outlen;
  511. int rc;
  512. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
  513. driver_operating ? 1 : 0);
  514. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
  515. rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
  516. outbuf, sizeof(outbuf), &outlen);
  517. if (rc)
  518. goto fail;
  519. if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
  520. rc = -EIO;
  521. goto fail;
  522. }
  523. if (was_attached != NULL)
  524. *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
  525. return 0;
  526. fail:
  527. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  528. return rc;
  529. }
  530. int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
  531. u16 *fw_subtype_list, u32 *capabilities)
  532. {
  533. uint8_t outbuf[MC_CMD_GET_BOARD_CFG_OUT_LENMIN];
  534. size_t outlen;
  535. int port_num = efx_port_num(efx);
  536. int offset;
  537. int rc;
  538. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
  539. rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
  540. outbuf, sizeof(outbuf), &outlen);
  541. if (rc)
  542. goto fail;
  543. if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
  544. rc = -EIO;
  545. goto fail;
  546. }
  547. offset = (port_num)
  548. ? MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST
  549. : MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST;
  550. if (mac_address)
  551. memcpy(mac_address, outbuf + offset, ETH_ALEN);
  552. if (fw_subtype_list)
  553. memcpy(fw_subtype_list,
  554. outbuf + MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST,
  555. MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MINNUM *
  556. sizeof(fw_subtype_list[0]));
  557. if (capabilities) {
  558. if (port_num)
  559. *capabilities = MCDI_DWORD(outbuf,
  560. GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
  561. else
  562. *capabilities = MCDI_DWORD(outbuf,
  563. GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
  564. }
  565. return 0;
  566. fail:
  567. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
  568. __func__, rc, (int)outlen);
  569. return rc;
  570. }
  571. int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
  572. {
  573. u8 inbuf[MC_CMD_LOG_CTRL_IN_LEN];
  574. u32 dest = 0;
  575. int rc;
  576. if (uart)
  577. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
  578. if (evq)
  579. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
  580. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
  581. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
  582. BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
  583. rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
  584. NULL, 0, NULL);
  585. if (rc)
  586. goto fail;
  587. return 0;
  588. fail:
  589. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  590. return rc;
  591. }
  592. int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
  593. {
  594. u8 outbuf[MC_CMD_NVRAM_TYPES_OUT_LEN];
  595. size_t outlen;
  596. int rc;
  597. BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
  598. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
  599. outbuf, sizeof(outbuf), &outlen);
  600. if (rc)
  601. goto fail;
  602. if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
  603. rc = -EIO;
  604. goto fail;
  605. }
  606. *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
  607. return 0;
  608. fail:
  609. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  610. __func__, rc);
  611. return rc;
  612. }
  613. int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
  614. size_t *size_out, size_t *erase_size_out,
  615. bool *protected_out)
  616. {
  617. u8 inbuf[MC_CMD_NVRAM_INFO_IN_LEN];
  618. u8 outbuf[MC_CMD_NVRAM_INFO_OUT_LEN];
  619. size_t outlen;
  620. int rc;
  621. MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
  622. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
  623. outbuf, sizeof(outbuf), &outlen);
  624. if (rc)
  625. goto fail;
  626. if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
  627. rc = -EIO;
  628. goto fail;
  629. }
  630. *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
  631. *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
  632. *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
  633. (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
  634. return 0;
  635. fail:
  636. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  637. return rc;
  638. }
  639. int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
  640. {
  641. u8 inbuf[MC_CMD_NVRAM_UPDATE_START_IN_LEN];
  642. int rc;
  643. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
  644. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
  645. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
  646. NULL, 0, NULL);
  647. if (rc)
  648. goto fail;
  649. return 0;
  650. fail:
  651. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  652. return rc;
  653. }
  654. int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
  655. loff_t offset, u8 *buffer, size_t length)
  656. {
  657. u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN];
  658. u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
  659. size_t outlen;
  660. int rc;
  661. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
  662. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
  663. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
  664. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
  665. outbuf, sizeof(outbuf), &outlen);
  666. if (rc)
  667. goto fail;
  668. memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
  669. return 0;
  670. fail:
  671. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  672. return rc;
  673. }
  674. int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
  675. loff_t offset, const u8 *buffer, size_t length)
  676. {
  677. u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
  678. int rc;
  679. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
  680. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
  681. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
  682. memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
  683. BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
  684. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
  685. ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
  686. NULL, 0, NULL);
  687. if (rc)
  688. goto fail;
  689. return 0;
  690. fail:
  691. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  692. return rc;
  693. }
  694. int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
  695. loff_t offset, size_t length)
  696. {
  697. u8 inbuf[MC_CMD_NVRAM_ERASE_IN_LEN];
  698. int rc;
  699. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
  700. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
  701. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
  702. BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
  703. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
  704. NULL, 0, NULL);
  705. if (rc)
  706. goto fail;
  707. return 0;
  708. fail:
  709. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  710. return rc;
  711. }
  712. int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
  713. {
  714. u8 inbuf[MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN];
  715. int rc;
  716. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
  717. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
  718. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
  719. NULL, 0, NULL);
  720. if (rc)
  721. goto fail;
  722. return 0;
  723. fail:
  724. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  725. return rc;
  726. }
  727. static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
  728. {
  729. u8 inbuf[MC_CMD_NVRAM_TEST_IN_LEN];
  730. u8 outbuf[MC_CMD_NVRAM_TEST_OUT_LEN];
  731. int rc;
  732. MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
  733. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
  734. outbuf, sizeof(outbuf), NULL);
  735. if (rc)
  736. return rc;
  737. switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
  738. case MC_CMD_NVRAM_TEST_PASS:
  739. case MC_CMD_NVRAM_TEST_NOTSUPP:
  740. return 0;
  741. default:
  742. return -EIO;
  743. }
  744. }
  745. int efx_mcdi_nvram_test_all(struct efx_nic *efx)
  746. {
  747. u32 nvram_types;
  748. unsigned int type;
  749. int rc;
  750. rc = efx_mcdi_nvram_types(efx, &nvram_types);
  751. if (rc)
  752. goto fail1;
  753. type = 0;
  754. while (nvram_types != 0) {
  755. if (nvram_types & 1) {
  756. rc = efx_mcdi_nvram_test(efx, type);
  757. if (rc)
  758. goto fail2;
  759. }
  760. type++;
  761. nvram_types >>= 1;
  762. }
  763. return 0;
  764. fail2:
  765. netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
  766. __func__, type);
  767. fail1:
  768. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  769. return rc;
  770. }
  771. static int efx_mcdi_read_assertion(struct efx_nic *efx)
  772. {
  773. u8 inbuf[MC_CMD_GET_ASSERTS_IN_LEN];
  774. u8 outbuf[MC_CMD_GET_ASSERTS_OUT_LEN];
  775. unsigned int flags, index, ofst;
  776. const char *reason;
  777. size_t outlen;
  778. int retry;
  779. int rc;
  780. /* Attempt to read any stored assertion state before we reboot
  781. * the mcfw out of the assertion handler. Retry twice, once
  782. * because a boot-time assertion might cause this command to fail
  783. * with EINTR. And once again because GET_ASSERTS can race with
  784. * MC_CMD_REBOOT running on the other port. */
  785. retry = 2;
  786. do {
  787. MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
  788. rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
  789. inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
  790. outbuf, sizeof(outbuf), &outlen);
  791. } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
  792. if (rc)
  793. return rc;
  794. if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
  795. return -EIO;
  796. /* Print out any recorded assertion state */
  797. flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
  798. if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
  799. return 0;
  800. reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
  801. ? "system-level assertion"
  802. : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
  803. ? "thread-level assertion"
  804. : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
  805. ? "watchdog reset"
  806. : "unknown assertion";
  807. netif_err(efx, hw, efx->net_dev,
  808. "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
  809. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
  810. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
  811. /* Print out the registers */
  812. ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
  813. for (index = 1; index < 32; index++) {
  814. netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", index,
  815. MCDI_DWORD2(outbuf, ofst));
  816. ofst += sizeof(efx_dword_t);
  817. }
  818. return 0;
  819. }
  820. static void efx_mcdi_exit_assertion(struct efx_nic *efx)
  821. {
  822. u8 inbuf[MC_CMD_REBOOT_IN_LEN];
  823. /* Atomically reboot the mcfw out of the assertion handler */
  824. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  825. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
  826. MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
  827. efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
  828. NULL, 0, NULL);
  829. }
  830. int efx_mcdi_handle_assertion(struct efx_nic *efx)
  831. {
  832. int rc;
  833. rc = efx_mcdi_read_assertion(efx);
  834. if (rc)
  835. return rc;
  836. efx_mcdi_exit_assertion(efx);
  837. return 0;
  838. }
  839. void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  840. {
  841. u8 inbuf[MC_CMD_SET_ID_LED_IN_LEN];
  842. int rc;
  843. BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
  844. BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
  845. BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
  846. BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
  847. MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
  848. rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
  849. NULL, 0, NULL);
  850. if (rc)
  851. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  852. __func__, rc);
  853. }
  854. int efx_mcdi_reset_port(struct efx_nic *efx)
  855. {
  856. int rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL);
  857. if (rc)
  858. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  859. __func__, rc);
  860. return rc;
  861. }
  862. int efx_mcdi_reset_mc(struct efx_nic *efx)
  863. {
  864. u8 inbuf[MC_CMD_REBOOT_IN_LEN];
  865. int rc;
  866. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  867. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
  868. rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
  869. NULL, 0, NULL);
  870. /* White is black, and up is down */
  871. if (rc == -EIO)
  872. return 0;
  873. if (rc == 0)
  874. rc = -EIO;
  875. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  876. return rc;
  877. }
  878. static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
  879. const u8 *mac, int *id_out)
  880. {
  881. u8 inbuf[MC_CMD_WOL_FILTER_SET_IN_LEN];
  882. u8 outbuf[MC_CMD_WOL_FILTER_SET_OUT_LEN];
  883. size_t outlen;
  884. int rc;
  885. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
  886. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
  887. MC_CMD_FILTER_MODE_SIMPLE);
  888. memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
  889. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
  890. outbuf, sizeof(outbuf), &outlen);
  891. if (rc)
  892. goto fail;
  893. if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
  894. rc = -EIO;
  895. goto fail;
  896. }
  897. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
  898. return 0;
  899. fail:
  900. *id_out = -1;
  901. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  902. return rc;
  903. }
  904. int
  905. efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
  906. {
  907. return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
  908. }
  909. int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
  910. {
  911. u8 outbuf[MC_CMD_WOL_FILTER_GET_OUT_LEN];
  912. size_t outlen;
  913. int rc;
  914. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
  915. outbuf, sizeof(outbuf), &outlen);
  916. if (rc)
  917. goto fail;
  918. if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
  919. rc = -EIO;
  920. goto fail;
  921. }
  922. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
  923. return 0;
  924. fail:
  925. *id_out = -1;
  926. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  927. return rc;
  928. }
  929. int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
  930. {
  931. u8 inbuf[MC_CMD_WOL_FILTER_REMOVE_IN_LEN];
  932. int rc;
  933. MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
  934. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
  935. NULL, 0, NULL);
  936. if (rc)
  937. goto fail;
  938. return 0;
  939. fail:
  940. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  941. return rc;
  942. }
  943. int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
  944. {
  945. int rc;
  946. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
  947. if (rc)
  948. goto fail;
  949. return 0;
  950. fail:
  951. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  952. return rc;
  953. }