irq.c 8.0 KB

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  1. /*
  2. * linux/arch/i386/kernel/irq.c
  3. *
  4. * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
  5. *
  6. * This file contains the lowest level x86-specific interrupt
  7. * entry, irq-stacks and irq statistics code. All the remaining
  8. * irq logic is done by the generic kernel/irq/ code and
  9. * by the x86-specific irq controller code. (e.g. i8259.c and
  10. * io_apic.c.)
  11. */
  12. #include <asm/uaccess.h>
  13. #include <linux/module.h>
  14. #include <linux/seq_file.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include <linux/notifier.h>
  18. #include <linux/cpu.h>
  19. #include <linux/delay.h>
  20. #include <asm/idle.h>
  21. DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_internodealigned_in_smp;
  22. EXPORT_PER_CPU_SYMBOL(irq_stat);
  23. #ifndef CONFIG_X86_LOCAL_APIC
  24. /*
  25. * 'what should we do if we get a hw irq event on an illegal vector'.
  26. * each architecture has to answer this themselves.
  27. */
  28. void ack_bad_irq(unsigned int irq)
  29. {
  30. printk("unexpected IRQ trap at vector %02x\n", irq);
  31. }
  32. #endif
  33. #ifdef CONFIG_4KSTACKS
  34. /*
  35. * per-CPU IRQ handling contexts (thread information and stack)
  36. */
  37. union irq_ctx {
  38. struct thread_info tinfo;
  39. u32 stack[THREAD_SIZE/sizeof(u32)];
  40. };
  41. static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly;
  42. static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
  43. #endif
  44. /*
  45. * do_IRQ handles all normal device IRQ's (the special
  46. * SMP cross-CPU interrupts have their own specific
  47. * handlers).
  48. */
  49. fastcall unsigned int do_IRQ(struct pt_regs *regs)
  50. {
  51. struct pt_regs *old_regs;
  52. /* high bit used in ret_from_ code */
  53. int irq = ~regs->orig_eax;
  54. struct irq_desc *desc = irq_desc + irq;
  55. #ifdef CONFIG_4KSTACKS
  56. union irq_ctx *curctx, *irqctx;
  57. u32 *isp;
  58. #endif
  59. exit_idle();
  60. if (unlikely((unsigned)irq >= NR_IRQS)) {
  61. printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
  62. __FUNCTION__, irq);
  63. BUG();
  64. }
  65. old_regs = set_irq_regs(regs);
  66. irq_enter();
  67. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  68. /* Debugging check for stack overflow: is there less than 1KB free? */
  69. {
  70. long esp;
  71. __asm__ __volatile__("andl %%esp,%0" :
  72. "=r" (esp) : "0" (THREAD_SIZE - 1));
  73. if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) {
  74. printk("do_IRQ: stack overflow: %ld\n",
  75. esp - sizeof(struct thread_info));
  76. dump_stack();
  77. }
  78. }
  79. #endif
  80. #ifdef CONFIG_4KSTACKS
  81. curctx = (union irq_ctx *) current_thread_info();
  82. irqctx = hardirq_ctx[smp_processor_id()];
  83. /*
  84. * this is where we switch to the IRQ stack. However, if we are
  85. * already using the IRQ stack (because we interrupted a hardirq
  86. * handler) we can't do that and just have to keep using the
  87. * current stack (which is the irq stack already after all)
  88. */
  89. if (curctx != irqctx) {
  90. int arg1, arg2, ebx;
  91. /* build the stack frame on the IRQ stack */
  92. isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
  93. irqctx->tinfo.task = curctx->tinfo.task;
  94. irqctx->tinfo.previous_esp = current_stack_pointer;
  95. /*
  96. * Copy the softirq bits in preempt_count so that the
  97. * softirq checks work in the hardirq context.
  98. */
  99. irqctx->tinfo.preempt_count =
  100. (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
  101. (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
  102. asm volatile(
  103. " xchgl %%ebx,%%esp \n"
  104. " call *%%edi \n"
  105. " movl %%ebx,%%esp \n"
  106. : "=a" (arg1), "=d" (arg2), "=b" (ebx)
  107. : "0" (irq), "1" (desc), "2" (isp),
  108. "D" (desc->handle_irq)
  109. : "memory", "cc"
  110. );
  111. } else
  112. #endif
  113. desc->handle_irq(irq, desc);
  114. irq_exit();
  115. set_irq_regs(old_regs);
  116. return 1;
  117. }
  118. #ifdef CONFIG_4KSTACKS
  119. /*
  120. * These should really be __section__(".bss.page_aligned") as well, but
  121. * gcc's 3.0 and earlier don't handle that correctly.
  122. */
  123. static char softirq_stack[NR_CPUS * THREAD_SIZE]
  124. __attribute__((__aligned__(THREAD_SIZE)));
  125. static char hardirq_stack[NR_CPUS * THREAD_SIZE]
  126. __attribute__((__aligned__(THREAD_SIZE)));
  127. /*
  128. * allocate per-cpu stacks for hardirq and for softirq processing
  129. */
  130. void irq_ctx_init(int cpu)
  131. {
  132. union irq_ctx *irqctx;
  133. if (hardirq_ctx[cpu])
  134. return;
  135. irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
  136. irqctx->tinfo.task = NULL;
  137. irqctx->tinfo.exec_domain = NULL;
  138. irqctx->tinfo.cpu = cpu;
  139. irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
  140. irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
  141. hardirq_ctx[cpu] = irqctx;
  142. irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
  143. irqctx->tinfo.task = NULL;
  144. irqctx->tinfo.exec_domain = NULL;
  145. irqctx->tinfo.cpu = cpu;
  146. irqctx->tinfo.preempt_count = 0;
  147. irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
  148. softirq_ctx[cpu] = irqctx;
  149. printk("CPU %u irqstacks, hard=%p soft=%p\n",
  150. cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
  151. }
  152. void irq_ctx_exit(int cpu)
  153. {
  154. hardirq_ctx[cpu] = NULL;
  155. }
  156. extern asmlinkage void __do_softirq(void);
  157. asmlinkage void do_softirq(void)
  158. {
  159. unsigned long flags;
  160. struct thread_info *curctx;
  161. union irq_ctx *irqctx;
  162. u32 *isp;
  163. if (in_interrupt())
  164. return;
  165. local_irq_save(flags);
  166. if (local_softirq_pending()) {
  167. curctx = current_thread_info();
  168. irqctx = softirq_ctx[smp_processor_id()];
  169. irqctx->tinfo.task = curctx->task;
  170. irqctx->tinfo.previous_esp = current_stack_pointer;
  171. /* build the stack frame on the softirq stack */
  172. isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
  173. asm volatile(
  174. " xchgl %%ebx,%%esp \n"
  175. " call __do_softirq \n"
  176. " movl %%ebx,%%esp \n"
  177. : "=b"(isp)
  178. : "0"(isp)
  179. : "memory", "cc", "edx", "ecx", "eax"
  180. );
  181. /*
  182. * Shouldnt happen, we returned above if in_interrupt():
  183. */
  184. WARN_ON_ONCE(softirq_count());
  185. }
  186. local_irq_restore(flags);
  187. }
  188. EXPORT_SYMBOL(do_softirq);
  189. #endif
  190. /*
  191. * Interrupt statistics:
  192. */
  193. atomic_t irq_err_count;
  194. /*
  195. * /proc/interrupts printing:
  196. */
  197. int show_interrupts(struct seq_file *p, void *v)
  198. {
  199. int i = *(loff_t *) v, j;
  200. struct irqaction * action;
  201. unsigned long flags;
  202. if (i == 0) {
  203. seq_printf(p, " ");
  204. for_each_online_cpu(j)
  205. seq_printf(p, "CPU%-8d",j);
  206. seq_putc(p, '\n');
  207. }
  208. if (i < NR_IRQS) {
  209. spin_lock_irqsave(&irq_desc[i].lock, flags);
  210. action = irq_desc[i].action;
  211. if (!action)
  212. goto skip;
  213. seq_printf(p, "%3d: ",i);
  214. #ifndef CONFIG_SMP
  215. seq_printf(p, "%10u ", kstat_irqs(i));
  216. #else
  217. for_each_online_cpu(j)
  218. seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
  219. #endif
  220. seq_printf(p, " %8s", irq_desc[i].chip->name);
  221. seq_printf(p, "-%-8s", irq_desc[i].name);
  222. seq_printf(p, " %s", action->name);
  223. for (action=action->next; action; action = action->next)
  224. seq_printf(p, ", %s", action->name);
  225. seq_putc(p, '\n');
  226. skip:
  227. spin_unlock_irqrestore(&irq_desc[i].lock, flags);
  228. } else if (i == NR_IRQS) {
  229. seq_printf(p, "NMI: ");
  230. for_each_online_cpu(j)
  231. seq_printf(p, "%10u ", nmi_count(j));
  232. seq_putc(p, '\n');
  233. #ifdef CONFIG_X86_LOCAL_APIC
  234. seq_printf(p, "LOC: ");
  235. for_each_online_cpu(j)
  236. seq_printf(p, "%10u ",
  237. per_cpu(irq_stat,j).apic_timer_irqs);
  238. seq_putc(p, '\n');
  239. #endif
  240. seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
  241. #if defined(CONFIG_X86_IO_APIC)
  242. seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
  243. #endif
  244. }
  245. return 0;
  246. }
  247. #ifdef CONFIG_HOTPLUG_CPU
  248. #include <mach_apic.h>
  249. void fixup_irqs(cpumask_t map)
  250. {
  251. unsigned int irq;
  252. static int warned;
  253. for (irq = 0; irq < NR_IRQS; irq++) {
  254. cpumask_t mask;
  255. if (irq == 2)
  256. continue;
  257. cpus_and(mask, irq_desc[irq].affinity, map);
  258. if (any_online_cpu(mask) == NR_CPUS) {
  259. printk("Breaking affinity for irq %i\n", irq);
  260. mask = map;
  261. }
  262. if (irq_desc[irq].chip->set_affinity)
  263. irq_desc[irq].chip->set_affinity(irq, mask);
  264. else if (irq_desc[irq].action && !(warned++))
  265. printk("Cannot set affinity for irq %i\n", irq);
  266. }
  267. #if 0
  268. barrier();
  269. /* Ingo Molnar says: "after the IO-APIC masks have been redirected
  270. [note the nop - the interrupt-enable boundary on x86 is two
  271. instructions from sti] - to flush out pending hardirqs and
  272. IPIs. After this point nothing is supposed to reach this CPU." */
  273. __asm__ __volatile__("sti; nop; cli");
  274. barrier();
  275. #else
  276. /* That doesn't seem sufficient. Give it 1ms. */
  277. local_irq_enable();
  278. mdelay(1);
  279. local_irq_disable();
  280. #endif
  281. }
  282. #endif