tlb.c 4.4 KB

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  1. /* arch/sparc64/mm/tlb.c
  2. *
  3. * Copyright (C) 2004 David S. Miller <davem@redhat.com>
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/init.h>
  7. #include <linux/percpu.h>
  8. #include <linux/mm.h>
  9. #include <linux/swap.h>
  10. #include <linux/preempt.h>
  11. #include <asm/pgtable.h>
  12. #include <asm/pgalloc.h>
  13. #include <asm/tlbflush.h>
  14. #include <asm/cacheflush.h>
  15. #include <asm/mmu_context.h>
  16. #include <asm/tlb.h>
  17. /* Heavily inspired by the ppc64 code. */
  18. static DEFINE_PER_CPU(struct tlb_batch, tlb_batch);
  19. void flush_tlb_pending(void)
  20. {
  21. struct tlb_batch *tb = &get_cpu_var(tlb_batch);
  22. struct mm_struct *mm = tb->mm;
  23. if (!tb->tlb_nr)
  24. goto out;
  25. flush_tsb_user(tb);
  26. if (CTX_VALID(mm->context)) {
  27. if (tb->tlb_nr == 1) {
  28. global_flush_tlb_page(mm, tb->vaddrs[0]);
  29. } else {
  30. #ifdef CONFIG_SMP
  31. smp_flush_tlb_pending(tb->mm, tb->tlb_nr,
  32. &tb->vaddrs[0]);
  33. #else
  34. __flush_tlb_pending(CTX_HWBITS(tb->mm->context),
  35. tb->tlb_nr, &tb->vaddrs[0]);
  36. #endif
  37. }
  38. }
  39. tb->tlb_nr = 0;
  40. out:
  41. put_cpu_var(tlb_batch);
  42. }
  43. void arch_enter_lazy_mmu_mode(void)
  44. {
  45. struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
  46. tb->active = 1;
  47. }
  48. void arch_leave_lazy_mmu_mode(void)
  49. {
  50. struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
  51. if (tb->tlb_nr)
  52. flush_tlb_pending();
  53. tb->active = 0;
  54. }
  55. static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
  56. bool exec)
  57. {
  58. struct tlb_batch *tb = &get_cpu_var(tlb_batch);
  59. unsigned long nr;
  60. vaddr &= PAGE_MASK;
  61. if (exec)
  62. vaddr |= 0x1UL;
  63. nr = tb->tlb_nr;
  64. if (unlikely(nr != 0 && mm != tb->mm)) {
  65. flush_tlb_pending();
  66. nr = 0;
  67. }
  68. if (!tb->active) {
  69. global_flush_tlb_page(mm, vaddr);
  70. flush_tsb_user_page(mm, vaddr);
  71. return;
  72. }
  73. if (nr == 0)
  74. tb->mm = mm;
  75. tb->vaddrs[nr] = vaddr;
  76. tb->tlb_nr = ++nr;
  77. if (nr >= TLB_BATCH_NR)
  78. flush_tlb_pending();
  79. put_cpu_var(tlb_batch);
  80. }
  81. void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
  82. pte_t *ptep, pte_t orig, int fullmm)
  83. {
  84. if (tlb_type != hypervisor &&
  85. pte_dirty(orig)) {
  86. unsigned long paddr, pfn = pte_pfn(orig);
  87. struct address_space *mapping;
  88. struct page *page;
  89. if (!pfn_valid(pfn))
  90. goto no_cache_flush;
  91. page = pfn_to_page(pfn);
  92. if (PageReserved(page))
  93. goto no_cache_flush;
  94. /* A real file page? */
  95. mapping = page_mapping(page);
  96. if (!mapping)
  97. goto no_cache_flush;
  98. paddr = (unsigned long) page_address(page);
  99. if ((paddr ^ vaddr) & (1 << 13))
  100. flush_dcache_page_all(mm, page);
  101. }
  102. no_cache_flush:
  103. if (!fullmm)
  104. tlb_batch_add_one(mm, vaddr, pte_exec(orig));
  105. }
  106. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  107. static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr,
  108. pmd_t pmd, bool exec)
  109. {
  110. unsigned long end;
  111. pte_t *pte;
  112. pte = pte_offset_map(&pmd, vaddr);
  113. end = vaddr + HPAGE_SIZE;
  114. while (vaddr < end) {
  115. if (pte_val(*pte) & _PAGE_VALID)
  116. tlb_batch_add_one(mm, vaddr, exec);
  117. pte++;
  118. vaddr += PAGE_SIZE;
  119. }
  120. pte_unmap(pte);
  121. }
  122. void set_pmd_at(struct mm_struct *mm, unsigned long addr,
  123. pmd_t *pmdp, pmd_t pmd)
  124. {
  125. pmd_t orig = *pmdp;
  126. *pmdp = pmd;
  127. if (mm == &init_mm)
  128. return;
  129. if ((pmd_val(pmd) ^ pmd_val(orig)) & PMD_ISHUGE) {
  130. if (pmd_val(pmd) & PMD_ISHUGE)
  131. mm->context.huge_pte_count++;
  132. else
  133. mm->context.huge_pte_count--;
  134. /* Do not try to allocate the TSB hash table if we
  135. * don't have one already. We have various locks held
  136. * and thus we'll end up doing a GFP_KERNEL allocation
  137. * in an atomic context.
  138. *
  139. * Instead, we let the first TLB miss on a hugepage
  140. * take care of this.
  141. */
  142. }
  143. if (!pmd_none(orig)) {
  144. bool exec = ((pmd_val(orig) & PMD_HUGE_EXEC) != 0);
  145. addr &= HPAGE_MASK;
  146. if (pmd_val(orig) & PMD_ISHUGE)
  147. tlb_batch_add_one(mm, addr, exec);
  148. else
  149. tlb_batch_pmd_scan(mm, addr, orig, exec);
  150. }
  151. }
  152. void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable)
  153. {
  154. struct list_head *lh = (struct list_head *) pgtable;
  155. assert_spin_locked(&mm->page_table_lock);
  156. /* FIFO */
  157. if (!mm->pmd_huge_pte)
  158. INIT_LIST_HEAD(lh);
  159. else
  160. list_add(lh, (struct list_head *) mm->pmd_huge_pte);
  161. mm->pmd_huge_pte = pgtable;
  162. }
  163. pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm)
  164. {
  165. struct list_head *lh;
  166. pgtable_t pgtable;
  167. assert_spin_locked(&mm->page_table_lock);
  168. /* FIFO */
  169. pgtable = mm->pmd_huge_pte;
  170. lh = (struct list_head *) pgtable;
  171. if (list_empty(lh))
  172. mm->pmd_huge_pte = NULL;
  173. else {
  174. mm->pmd_huge_pte = (pgtable_t) lh->next;
  175. list_del(lh);
  176. }
  177. pte_val(pgtable[0]) = 0;
  178. pte_val(pgtable[1]) = 0;
  179. return pgtable;
  180. }
  181. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */