bfin_mac.c 25 KB

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  1. /*
  2. * Blackfin On-Chip MAC Driver
  3. *
  4. * Copyright 2004-2007 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/sched.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/timer.h>
  17. #include <linux/errno.h>
  18. #include <linux/irq.h>
  19. #include <linux/io.h>
  20. #include <linux/ioport.h>
  21. #include <linux/crc32.h>
  22. #include <linux/device.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/mii.h>
  26. #include <linux/phy.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/platform_device.h>
  31. #include <asm/dma.h>
  32. #include <linux/dma-mapping.h>
  33. #include <asm/blackfin.h>
  34. #include <asm/cacheflush.h>
  35. #include <asm/portmux.h>
  36. #include "bfin_mac.h"
  37. #define DRV_NAME "bfin_mac"
  38. #define DRV_VERSION "1.1"
  39. #define DRV_AUTHOR "Bryan Wu, Luke Yang"
  40. #define DRV_DESC "Blackfin BF53[67] on-chip Ethernet MAC driver"
  41. MODULE_AUTHOR(DRV_AUTHOR);
  42. MODULE_LICENSE("GPL");
  43. MODULE_DESCRIPTION(DRV_DESC);
  44. #if defined(CONFIG_BFIN_MAC_USE_L1)
  45. # define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
  46. # define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
  47. #else
  48. # define bfin_mac_alloc(dma_handle, size) \
  49. dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
  50. # define bfin_mac_free(dma_handle, ptr) \
  51. dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
  52. #endif
  53. #define PKT_BUF_SZ 1580
  54. #define MAX_TIMEOUT_CNT 500
  55. /* pointers to maintain transmit list */
  56. static struct net_dma_desc_tx *tx_list_head;
  57. static struct net_dma_desc_tx *tx_list_tail;
  58. static struct net_dma_desc_rx *rx_list_head;
  59. static struct net_dma_desc_rx *rx_list_tail;
  60. static struct net_dma_desc_rx *current_rx_ptr;
  61. static struct net_dma_desc_tx *current_tx_ptr;
  62. static struct net_dma_desc_tx *tx_desc;
  63. static struct net_dma_desc_rx *rx_desc;
  64. static void bf537mac_disable(void);
  65. static void bf537mac_enable(void);
  66. static void desc_list_free(void)
  67. {
  68. struct net_dma_desc_rx *r;
  69. struct net_dma_desc_tx *t;
  70. int i;
  71. #if !defined(CONFIG_BFIN_MAC_USE_L1)
  72. dma_addr_t dma_handle = 0;
  73. #endif
  74. if (tx_desc) {
  75. t = tx_list_head;
  76. for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
  77. if (t) {
  78. if (t->skb) {
  79. dev_kfree_skb(t->skb);
  80. t->skb = NULL;
  81. }
  82. t = t->next;
  83. }
  84. }
  85. bfin_mac_free(dma_handle, tx_desc);
  86. }
  87. if (rx_desc) {
  88. r = rx_list_head;
  89. for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
  90. if (r) {
  91. if (r->skb) {
  92. dev_kfree_skb(r->skb);
  93. r->skb = NULL;
  94. }
  95. r = r->next;
  96. }
  97. }
  98. bfin_mac_free(dma_handle, rx_desc);
  99. }
  100. }
  101. static int desc_list_init(void)
  102. {
  103. int i;
  104. struct sk_buff *new_skb;
  105. #if !defined(CONFIG_BFIN_MAC_USE_L1)
  106. /*
  107. * This dma_handle is useless in Blackfin dma_alloc_coherent().
  108. * The real dma handler is the return value of dma_alloc_coherent().
  109. */
  110. dma_addr_t dma_handle;
  111. #endif
  112. tx_desc = bfin_mac_alloc(&dma_handle,
  113. sizeof(struct net_dma_desc_tx) *
  114. CONFIG_BFIN_TX_DESC_NUM);
  115. if (tx_desc == NULL)
  116. goto init_error;
  117. rx_desc = bfin_mac_alloc(&dma_handle,
  118. sizeof(struct net_dma_desc_rx) *
  119. CONFIG_BFIN_RX_DESC_NUM);
  120. if (rx_desc == NULL)
  121. goto init_error;
  122. /* init tx_list */
  123. tx_list_head = tx_list_tail = tx_desc;
  124. for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
  125. struct net_dma_desc_tx *t = tx_desc + i;
  126. struct dma_descriptor *a = &(t->desc_a);
  127. struct dma_descriptor *b = &(t->desc_b);
  128. /*
  129. * disable DMA
  130. * read from memory WNR = 0
  131. * wordsize is 32 bits
  132. * 6 half words is desc size
  133. * large desc flow
  134. */
  135. a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
  136. a->start_addr = (unsigned long)t->packet;
  137. a->x_count = 0;
  138. a->next_dma_desc = b;
  139. /*
  140. * enabled DMA
  141. * write to memory WNR = 1
  142. * wordsize is 32 bits
  143. * disable interrupt
  144. * 6 half words is desc size
  145. * large desc flow
  146. */
  147. b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
  148. b->start_addr = (unsigned long)(&(t->status));
  149. b->x_count = 0;
  150. t->skb = NULL;
  151. tx_list_tail->desc_b.next_dma_desc = a;
  152. tx_list_tail->next = t;
  153. tx_list_tail = t;
  154. }
  155. tx_list_tail->next = tx_list_head; /* tx_list is a circle */
  156. tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
  157. current_tx_ptr = tx_list_head;
  158. /* init rx_list */
  159. rx_list_head = rx_list_tail = rx_desc;
  160. for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
  161. struct net_dma_desc_rx *r = rx_desc + i;
  162. struct dma_descriptor *a = &(r->desc_a);
  163. struct dma_descriptor *b = &(r->desc_b);
  164. /* allocate a new skb for next time receive */
  165. new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
  166. if (!new_skb) {
  167. printk(KERN_NOTICE DRV_NAME
  168. ": init: low on mem - packet dropped\n");
  169. goto init_error;
  170. }
  171. skb_reserve(new_skb, 2);
  172. r->skb = new_skb;
  173. /*
  174. * enabled DMA
  175. * write to memory WNR = 1
  176. * wordsize is 32 bits
  177. * disable interrupt
  178. * 6 half words is desc size
  179. * large desc flow
  180. */
  181. a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
  182. /* since RXDWA is enabled */
  183. a->start_addr = (unsigned long)new_skb->data - 2;
  184. a->x_count = 0;
  185. a->next_dma_desc = b;
  186. /*
  187. * enabled DMA
  188. * write to memory WNR = 1
  189. * wordsize is 32 bits
  190. * enable interrupt
  191. * 6 half words is desc size
  192. * large desc flow
  193. */
  194. b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
  195. NDSIZE_6 | DMAFLOW_LARGE;
  196. b->start_addr = (unsigned long)(&(r->status));
  197. b->x_count = 0;
  198. rx_list_tail->desc_b.next_dma_desc = a;
  199. rx_list_tail->next = r;
  200. rx_list_tail = r;
  201. }
  202. rx_list_tail->next = rx_list_head; /* rx_list is a circle */
  203. rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
  204. current_rx_ptr = rx_list_head;
  205. return 0;
  206. init_error:
  207. desc_list_free();
  208. printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
  209. return -ENOMEM;
  210. }
  211. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  212. /* Set FER regs to MUX in Ethernet pins */
  213. static int setup_pin_mux(int action)
  214. {
  215. #if defined(CONFIG_BFIN_MAC_RMII)
  216. u16 pin_req[] = P_RMII0;
  217. #else
  218. u16 pin_req[] = P_MII0;
  219. #endif
  220. if (action) {
  221. if (peripheral_request_list(pin_req, DRV_NAME)) {
  222. printk(KERN_ERR DRV_NAME
  223. ": Requesting Peripherals failed\n");
  224. return -EFAULT;
  225. }
  226. } else
  227. peripheral_free_list(pin_req);
  228. return 0;
  229. }
  230. /*
  231. * MII operations
  232. */
  233. /* Wait until the previous MDC/MDIO transaction has completed */
  234. static void mdio_poll(void)
  235. {
  236. int timeout_cnt = MAX_TIMEOUT_CNT;
  237. /* poll the STABUSY bit */
  238. while ((bfin_read_EMAC_STAADD()) & STABUSY) {
  239. udelay(1);
  240. if (timeout_cnt-- < 0) {
  241. printk(KERN_ERR DRV_NAME
  242. ": wait MDC/MDIO transaction to complete timeout\n");
  243. break;
  244. }
  245. }
  246. }
  247. /* Read an off-chip register in a PHY through the MDC/MDIO port */
  248. static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
  249. {
  250. mdio_poll();
  251. /* read mode */
  252. bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
  253. SET_REGAD((u16) regnum) |
  254. STABUSY);
  255. mdio_poll();
  256. return (int) bfin_read_EMAC_STADAT();
  257. }
  258. /* Write an off-chip register in a PHY through the MDC/MDIO port */
  259. static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
  260. u16 value)
  261. {
  262. mdio_poll();
  263. bfin_write_EMAC_STADAT((u32) value);
  264. /* write mode */
  265. bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
  266. SET_REGAD((u16) regnum) |
  267. STAOP |
  268. STABUSY);
  269. mdio_poll();
  270. return 0;
  271. }
  272. static int mdiobus_reset(struct mii_bus *bus)
  273. {
  274. return 0;
  275. }
  276. static void bf537_adjust_link(struct net_device *dev)
  277. {
  278. struct bf537mac_local *lp = netdev_priv(dev);
  279. struct phy_device *phydev = lp->phydev;
  280. unsigned long flags;
  281. int new_state = 0;
  282. spin_lock_irqsave(&lp->lock, flags);
  283. if (phydev->link) {
  284. /* Now we make sure that we can be in full duplex mode.
  285. * If not, we operate in half-duplex mode. */
  286. if (phydev->duplex != lp->old_duplex) {
  287. u32 opmode = bfin_read_EMAC_OPMODE();
  288. new_state = 1;
  289. if (phydev->duplex)
  290. opmode |= FDMODE;
  291. else
  292. opmode &= ~(FDMODE);
  293. bfin_write_EMAC_OPMODE(opmode);
  294. lp->old_duplex = phydev->duplex;
  295. }
  296. if (phydev->speed != lp->old_speed) {
  297. #if defined(CONFIG_BFIN_MAC_RMII)
  298. u32 opmode = bfin_read_EMAC_OPMODE();
  299. switch (phydev->speed) {
  300. case 10:
  301. opmode |= RMII_10;
  302. break;
  303. case 100:
  304. opmode &= ~(RMII_10);
  305. break;
  306. default:
  307. printk(KERN_WARNING
  308. "%s: Ack! Speed (%d) is not 10/100!\n",
  309. DRV_NAME, phydev->speed);
  310. break;
  311. }
  312. bfin_write_EMAC_OPMODE(opmode);
  313. #endif
  314. new_state = 1;
  315. lp->old_speed = phydev->speed;
  316. }
  317. if (!lp->old_link) {
  318. new_state = 1;
  319. lp->old_link = 1;
  320. netif_schedule(dev);
  321. }
  322. } else if (lp->old_link) {
  323. new_state = 1;
  324. lp->old_link = 0;
  325. lp->old_speed = 0;
  326. lp->old_duplex = -1;
  327. }
  328. if (new_state) {
  329. u32 opmode = bfin_read_EMAC_OPMODE();
  330. phy_print_status(phydev);
  331. pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
  332. }
  333. spin_unlock_irqrestore(&lp->lock, flags);
  334. }
  335. /* MDC = 2.5 MHz */
  336. #define MDC_CLK 2500000
  337. static int mii_probe(struct net_device *dev)
  338. {
  339. struct bf537mac_local *lp = netdev_priv(dev);
  340. struct phy_device *phydev = NULL;
  341. unsigned short sysctl;
  342. int i;
  343. u32 sclk, mdc_div;
  344. /* Enable PHY output early */
  345. if (!(bfin_read_VR_CTL() & PHYCLKOE))
  346. bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE);
  347. sclk = get_sclk();
  348. mdc_div = ((sclk / MDC_CLK) / 2) - 1;
  349. sysctl = bfin_read_EMAC_SYSCTL();
  350. sysctl |= SET_MDCDIV(mdc_div);
  351. bfin_write_EMAC_SYSCTL(sysctl);
  352. /* search for connect PHY device */
  353. for (i = 0; i < PHY_MAX_ADDR; i++) {
  354. struct phy_device *const tmp_phydev = lp->mii_bus.phy_map[i];
  355. if (!tmp_phydev)
  356. continue; /* no PHY here... */
  357. phydev = tmp_phydev;
  358. break; /* found it */
  359. }
  360. /* now we are supposed to have a proper phydev, to attach to... */
  361. if (!phydev) {
  362. printk(KERN_INFO "%s: Don't found any phy device at all\n",
  363. dev->name);
  364. return -ENODEV;
  365. }
  366. #if defined(CONFIG_BFIN_MAC_RMII)
  367. phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
  368. PHY_INTERFACE_MODE_RMII);
  369. #else
  370. phydev = phy_connect(dev, phydev->dev.bus_id, &bf537_adjust_link, 0,
  371. PHY_INTERFACE_MODE_MII);
  372. #endif
  373. if (IS_ERR(phydev)) {
  374. printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
  375. return PTR_ERR(phydev);
  376. }
  377. /* mask with MAC supported features */
  378. phydev->supported &= (SUPPORTED_10baseT_Half
  379. | SUPPORTED_10baseT_Full
  380. | SUPPORTED_100baseT_Half
  381. | SUPPORTED_100baseT_Full
  382. | SUPPORTED_Autoneg
  383. | SUPPORTED_Pause | SUPPORTED_Asym_Pause
  384. | SUPPORTED_MII
  385. | SUPPORTED_TP);
  386. phydev->advertising = phydev->supported;
  387. lp->old_link = 0;
  388. lp->old_speed = 0;
  389. lp->old_duplex = -1;
  390. lp->phydev = phydev;
  391. printk(KERN_INFO "%s: attached PHY driver [%s] "
  392. "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)"
  393. "@sclk=%dMHz)\n",
  394. DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq,
  395. MDC_CLK, mdc_div, sclk/1000000);
  396. return 0;
  397. }
  398. /**************************************************************************/
  399. void setup_system_regs(struct net_device *dev)
  400. {
  401. unsigned short sysctl;
  402. /*
  403. * Odd word alignment for Receive Frame DMA word
  404. * Configure checksum support and rcve frame word alignment
  405. */
  406. sysctl = bfin_read_EMAC_SYSCTL();
  407. #if defined(BFIN_MAC_CSUM_OFFLOAD)
  408. sysctl |= RXDWA | RXCKS;
  409. #else
  410. sysctl |= RXDWA;
  411. #endif
  412. bfin_write_EMAC_SYSCTL(sysctl);
  413. bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
  414. /* Initialize the TX DMA channel registers */
  415. bfin_write_DMA2_X_COUNT(0);
  416. bfin_write_DMA2_X_MODIFY(4);
  417. bfin_write_DMA2_Y_COUNT(0);
  418. bfin_write_DMA2_Y_MODIFY(0);
  419. /* Initialize the RX DMA channel registers */
  420. bfin_write_DMA1_X_COUNT(0);
  421. bfin_write_DMA1_X_MODIFY(4);
  422. bfin_write_DMA1_Y_COUNT(0);
  423. bfin_write_DMA1_Y_MODIFY(0);
  424. }
  425. static void setup_mac_addr(u8 *mac_addr)
  426. {
  427. u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
  428. u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
  429. /* this depends on a little-endian machine */
  430. bfin_write_EMAC_ADDRLO(addr_low);
  431. bfin_write_EMAC_ADDRHI(addr_hi);
  432. }
  433. static int bf537mac_set_mac_address(struct net_device *dev, void *p)
  434. {
  435. struct sockaddr *addr = p;
  436. if (netif_running(dev))
  437. return -EBUSY;
  438. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  439. setup_mac_addr(dev->dev_addr);
  440. return 0;
  441. }
  442. static void adjust_tx_list(void)
  443. {
  444. int timeout_cnt = MAX_TIMEOUT_CNT;
  445. if (tx_list_head->status.status_word != 0
  446. && current_tx_ptr != tx_list_head) {
  447. goto adjust_head; /* released something, just return; */
  448. }
  449. /*
  450. * if nothing released, check wait condition
  451. * current's next can not be the head,
  452. * otherwise the dma will not stop as we want
  453. */
  454. if (current_tx_ptr->next->next == tx_list_head) {
  455. while (tx_list_head->status.status_word == 0) {
  456. mdelay(1);
  457. if (tx_list_head->status.status_word != 0
  458. || !(bfin_read_DMA2_IRQ_STATUS() & 0x08)) {
  459. goto adjust_head;
  460. }
  461. if (timeout_cnt-- < 0) {
  462. printk(KERN_ERR DRV_NAME
  463. ": wait for adjust tx list head timeout\n");
  464. break;
  465. }
  466. }
  467. if (tx_list_head->status.status_word != 0) {
  468. goto adjust_head;
  469. }
  470. }
  471. return;
  472. adjust_head:
  473. do {
  474. tx_list_head->desc_a.config &= ~DMAEN;
  475. tx_list_head->status.status_word = 0;
  476. if (tx_list_head->skb) {
  477. dev_kfree_skb(tx_list_head->skb);
  478. tx_list_head->skb = NULL;
  479. } else {
  480. printk(KERN_ERR DRV_NAME
  481. ": no sk_buff in a transmitted frame!\n");
  482. }
  483. tx_list_head = tx_list_head->next;
  484. } while (tx_list_head->status.status_word != 0
  485. && current_tx_ptr != tx_list_head);
  486. return;
  487. }
  488. static int bf537mac_hard_start_xmit(struct sk_buff *skb,
  489. struct net_device *dev)
  490. {
  491. struct bf537mac_local *lp = netdev_priv(dev);
  492. unsigned int data;
  493. current_tx_ptr->skb = skb;
  494. /*
  495. * Is skb->data always 16-bit aligned?
  496. * Do we need to memcpy((char *)(tail->packet + 2), skb->data, len)?
  497. */
  498. if ((((unsigned int)(skb->data)) & 0x02) == 2) {
  499. /* move skb->data to current_tx_ptr payload */
  500. data = (unsigned int)(skb->data) - 2;
  501. *((unsigned short *)data) = (unsigned short)(skb->len);
  502. current_tx_ptr->desc_a.start_addr = (unsigned long)data;
  503. /* this is important! */
  504. blackfin_dcache_flush_range(data, (data + (skb->len)) + 2);
  505. } else {
  506. *((unsigned short *)(current_tx_ptr->packet)) =
  507. (unsigned short)(skb->len);
  508. memcpy((char *)(current_tx_ptr->packet + 2), skb->data,
  509. (skb->len));
  510. current_tx_ptr->desc_a.start_addr =
  511. (unsigned long)current_tx_ptr->packet;
  512. if (current_tx_ptr->status.status_word != 0)
  513. current_tx_ptr->status.status_word = 0;
  514. blackfin_dcache_flush_range((unsigned int)current_tx_ptr->
  515. packet,
  516. (unsigned int)(current_tx_ptr->
  517. packet + skb->len) +
  518. 2);
  519. }
  520. /* enable this packet's dma */
  521. current_tx_ptr->desc_a.config |= DMAEN;
  522. /* tx dma is running, just return */
  523. if (bfin_read_DMA2_IRQ_STATUS() & 0x08)
  524. goto out;
  525. /* tx dma is not running */
  526. bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
  527. /* dma enabled, read from memory, size is 6 */
  528. bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
  529. /* Turn on the EMAC tx */
  530. bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
  531. out:
  532. adjust_tx_list();
  533. current_tx_ptr = current_tx_ptr->next;
  534. dev->trans_start = jiffies;
  535. dev->stats.tx_packets++;
  536. dev->stats.tx_bytes += (skb->len);
  537. return 0;
  538. }
  539. static void bf537mac_rx(struct net_device *dev)
  540. {
  541. struct sk_buff *skb, *new_skb;
  542. struct bf537mac_local *lp = netdev_priv(dev);
  543. unsigned short len;
  544. /* allocate a new skb for next time receive */
  545. skb = current_rx_ptr->skb;
  546. new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
  547. if (!new_skb) {
  548. printk(KERN_NOTICE DRV_NAME
  549. ": rx: low on mem - packet dropped\n");
  550. dev->stats.rx_dropped++;
  551. goto out;
  552. }
  553. /* reserve 2 bytes for RXDWA padding */
  554. skb_reserve(new_skb, 2);
  555. current_rx_ptr->skb = new_skb;
  556. current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
  557. len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
  558. skb_put(skb, len);
  559. blackfin_dcache_invalidate_range((unsigned long)skb->head,
  560. (unsigned long)skb->tail);
  561. dev->last_rx = jiffies;
  562. skb->dev = dev;
  563. skb->protocol = eth_type_trans(skb, dev);
  564. #if defined(BFIN_MAC_CSUM_OFFLOAD)
  565. skb->csum = current_rx_ptr->status.ip_payload_csum;
  566. skb->ip_summed = CHECKSUM_COMPLETE;
  567. #endif
  568. netif_rx(skb);
  569. dev->stats.rx_packets++;
  570. dev->stats.rx_bytes += len;
  571. current_rx_ptr->status.status_word = 0x00000000;
  572. current_rx_ptr = current_rx_ptr->next;
  573. out:
  574. return;
  575. }
  576. /* interrupt routine to handle rx and error signal */
  577. static irqreturn_t bf537mac_interrupt(int irq, void *dev_id)
  578. {
  579. struct net_device *dev = dev_id;
  580. int number = 0;
  581. get_one_packet:
  582. if (current_rx_ptr->status.status_word == 0) {
  583. /* no more new packet received */
  584. if (number == 0) {
  585. if (current_rx_ptr->next->status.status_word != 0) {
  586. current_rx_ptr = current_rx_ptr->next;
  587. goto real_rx;
  588. }
  589. }
  590. bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
  591. DMA_DONE | DMA_ERR);
  592. return IRQ_HANDLED;
  593. }
  594. real_rx:
  595. bf537mac_rx(dev);
  596. number++;
  597. goto get_one_packet;
  598. }
  599. #ifdef CONFIG_NET_POLL_CONTROLLER
  600. static void bf537mac_poll(struct net_device *dev)
  601. {
  602. disable_irq(IRQ_MAC_RX);
  603. bf537mac_interrupt(IRQ_MAC_RX, dev);
  604. enable_irq(IRQ_MAC_RX);
  605. }
  606. #endif /* CONFIG_NET_POLL_CONTROLLER */
  607. static void bf537mac_disable(void)
  608. {
  609. unsigned int opmode;
  610. opmode = bfin_read_EMAC_OPMODE();
  611. opmode &= (~RE);
  612. opmode &= (~TE);
  613. /* Turn off the EMAC */
  614. bfin_write_EMAC_OPMODE(opmode);
  615. }
  616. /*
  617. * Enable Interrupts, Receive, and Transmit
  618. */
  619. static void bf537mac_enable(void)
  620. {
  621. u32 opmode;
  622. pr_debug("%s: %s\n", DRV_NAME, __FUNCTION__);
  623. /* Set RX DMA */
  624. bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
  625. bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
  626. /* Wait MII done */
  627. mdio_poll();
  628. /* We enable only RX here */
  629. /* ASTP : Enable Automatic Pad Stripping
  630. PR : Promiscuous Mode for test
  631. PSF : Receive frames with total length less than 64 bytes.
  632. FDMODE : Full Duplex Mode
  633. LB : Internal Loopback for test
  634. RE : Receiver Enable */
  635. opmode = bfin_read_EMAC_OPMODE();
  636. if (opmode & FDMODE)
  637. opmode |= PSF;
  638. else
  639. opmode |= DRO | DC | PSF;
  640. opmode |= RE;
  641. #if defined(CONFIG_BFIN_MAC_RMII)
  642. opmode |= RMII; /* For Now only 100MBit are supported */
  643. #ifdef CONFIG_BF_REV_0_2
  644. opmode |= TE;
  645. #endif
  646. #endif
  647. /* Turn on the EMAC rx */
  648. bfin_write_EMAC_OPMODE(opmode);
  649. }
  650. /* Our watchdog timed out. Called by the networking layer */
  651. static void bf537mac_timeout(struct net_device *dev)
  652. {
  653. pr_debug("%s: %s\n", dev->name, __FUNCTION__);
  654. bf537mac_disable();
  655. /* reset tx queue */
  656. tx_list_tail = tx_list_head->next;
  657. bf537mac_enable();
  658. /* We can accept TX packets again */
  659. dev->trans_start = jiffies;
  660. netif_wake_queue(dev);
  661. }
  662. static void bf537mac_multicast_hash(struct net_device *dev)
  663. {
  664. u32 emac_hashhi, emac_hashlo;
  665. struct dev_mc_list *dmi = dev->mc_list;
  666. char *addrs;
  667. int i;
  668. u32 crc;
  669. emac_hashhi = emac_hashlo = 0;
  670. for (i = 0; i < dev->mc_count; i++) {
  671. addrs = dmi->dmi_addr;
  672. dmi = dmi->next;
  673. /* skip non-multicast addresses */
  674. if (!(*addrs & 1))
  675. continue;
  676. crc = ether_crc(ETH_ALEN, addrs);
  677. crc >>= 26;
  678. if (crc & 0x20)
  679. emac_hashhi |= 1 << (crc & 0x1f);
  680. else
  681. emac_hashlo |= 1 << (crc & 0x1f);
  682. }
  683. bfin_write_EMAC_HASHHI(emac_hashhi);
  684. bfin_write_EMAC_HASHLO(emac_hashlo);
  685. return;
  686. }
  687. /*
  688. * This routine will, depending on the values passed to it,
  689. * either make it accept multicast packets, go into
  690. * promiscuous mode (for TCPDUMP and cousins) or accept
  691. * a select set of multicast packets
  692. */
  693. static void bf537mac_set_multicast_list(struct net_device *dev)
  694. {
  695. u32 sysctl;
  696. if (dev->flags & IFF_PROMISC) {
  697. printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
  698. sysctl = bfin_read_EMAC_OPMODE();
  699. sysctl |= RAF;
  700. bfin_write_EMAC_OPMODE(sysctl);
  701. } else if (dev->flags & IFF_ALLMULTI) {
  702. /* accept all multicast */
  703. sysctl = bfin_read_EMAC_OPMODE();
  704. sysctl |= PAM;
  705. bfin_write_EMAC_OPMODE(sysctl);
  706. } else if (dev->mc_count) {
  707. /* set up multicast hash table */
  708. sysctl = bfin_read_EMAC_OPMODE();
  709. sysctl |= HM;
  710. bfin_write_EMAC_OPMODE(sysctl);
  711. bf537mac_multicast_hash(dev);
  712. } else {
  713. /* clear promisc or multicast mode */
  714. sysctl = bfin_read_EMAC_OPMODE();
  715. sysctl &= ~(RAF | PAM);
  716. bfin_write_EMAC_OPMODE(sysctl);
  717. }
  718. }
  719. /*
  720. * this puts the device in an inactive state
  721. */
  722. static void bf537mac_shutdown(struct net_device *dev)
  723. {
  724. /* Turn off the EMAC */
  725. bfin_write_EMAC_OPMODE(0x00000000);
  726. /* Turn off the EMAC RX DMA */
  727. bfin_write_DMA1_CONFIG(0x0000);
  728. bfin_write_DMA2_CONFIG(0x0000);
  729. }
  730. /*
  731. * Open and Initialize the interface
  732. *
  733. * Set up everything, reset the card, etc..
  734. */
  735. static int bf537mac_open(struct net_device *dev)
  736. {
  737. struct bf537mac_local *lp = netdev_priv(dev);
  738. int retval;
  739. pr_debug("%s: %s\n", dev->name, __FUNCTION__);
  740. /*
  741. * Check that the address is valid. If its not, refuse
  742. * to bring the device up. The user must specify an
  743. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  744. */
  745. if (!is_valid_ether_addr(dev->dev_addr)) {
  746. printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
  747. return -EINVAL;
  748. }
  749. /* initial rx and tx list */
  750. retval = desc_list_init();
  751. if (retval)
  752. return retval;
  753. phy_start(lp->phydev);
  754. setup_system_regs(dev);
  755. bf537mac_disable();
  756. bf537mac_enable();
  757. pr_debug("hardware init finished\n");
  758. netif_start_queue(dev);
  759. netif_carrier_on(dev);
  760. return 0;
  761. }
  762. /*
  763. *
  764. * this makes the board clean up everything that it can
  765. * and not talk to the outside world. Caused by
  766. * an 'ifconfig ethX down'
  767. */
  768. static int bf537mac_close(struct net_device *dev)
  769. {
  770. struct bf537mac_local *lp = netdev_priv(dev);
  771. pr_debug("%s: %s\n", dev->name, __FUNCTION__);
  772. netif_stop_queue(dev);
  773. netif_carrier_off(dev);
  774. phy_stop(lp->phydev);
  775. /* clear everything */
  776. bf537mac_shutdown(dev);
  777. /* free the rx/tx buffers */
  778. desc_list_free();
  779. return 0;
  780. }
  781. static int __init bf537mac_probe(struct net_device *dev)
  782. {
  783. struct bf537mac_local *lp = netdev_priv(dev);
  784. int retval;
  785. int i;
  786. /* Grab the MAC address in the MAC */
  787. *(__le32 *) (&(dev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
  788. *(__le16 *) (&(dev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
  789. /* probe mac */
  790. /*todo: how to proble? which is revision_register */
  791. bfin_write_EMAC_ADDRLO(0x12345678);
  792. if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
  793. pr_debug("can't detect bf537 mac!\n");
  794. retval = -ENODEV;
  795. goto err_out;
  796. }
  797. /* set the GPIO pins to Ethernet mode */
  798. retval = setup_pin_mux(1);
  799. if (retval)
  800. return retval;
  801. /*Is it valid? (Did bootloader initialize it?) */
  802. if (!is_valid_ether_addr(dev->dev_addr)) {
  803. /* Grab the MAC from the board somehow - this is done in the
  804. arch/blackfin/mach-bf537/boards/eth_mac.c */
  805. bfin_get_ether_addr(dev->dev_addr);
  806. }
  807. /* If still not valid, get a random one */
  808. if (!is_valid_ether_addr(dev->dev_addr)) {
  809. random_ether_addr(dev->dev_addr);
  810. }
  811. setup_mac_addr(dev->dev_addr);
  812. /* MDIO bus initial */
  813. lp->mii_bus.priv = dev;
  814. lp->mii_bus.read = mdiobus_read;
  815. lp->mii_bus.write = mdiobus_write;
  816. lp->mii_bus.reset = mdiobus_reset;
  817. lp->mii_bus.name = "bfin_mac_mdio";
  818. lp->mii_bus.id = 0;
  819. lp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
  820. for (i = 0; i < PHY_MAX_ADDR; ++i)
  821. lp->mii_bus.irq[i] = PHY_POLL;
  822. mdiobus_register(&lp->mii_bus);
  823. retval = mii_probe(dev);
  824. if (retval)
  825. return retval;
  826. /* Fill in the fields of the device structure with ethernet values. */
  827. ether_setup(dev);
  828. dev->open = bf537mac_open;
  829. dev->stop = bf537mac_close;
  830. dev->hard_start_xmit = bf537mac_hard_start_xmit;
  831. dev->set_mac_address = bf537mac_set_mac_address;
  832. dev->tx_timeout = bf537mac_timeout;
  833. dev->set_multicast_list = bf537mac_set_multicast_list;
  834. #ifdef CONFIG_NET_POLL_CONTROLLER
  835. dev->poll_controller = bf537mac_poll;
  836. #endif
  837. spin_lock_init(&lp->lock);
  838. /* now, enable interrupts */
  839. /* register irq handler */
  840. if (request_irq
  841. (IRQ_MAC_RX, bf537mac_interrupt, IRQF_DISABLED | IRQF_SHARED,
  842. "BFIN537_MAC_RX", dev)) {
  843. printk(KERN_WARNING DRV_NAME
  844. ": Unable to attach BlackFin MAC RX interrupt\n");
  845. return -EBUSY;
  846. }
  847. retval = register_netdev(dev);
  848. if (retval == 0) {
  849. /* now, print out the card info, in a short format.. */
  850. printk(KERN_INFO "%s: Version %s, %s\n",
  851. DRV_NAME, DRV_VERSION, DRV_DESC);
  852. }
  853. err_out:
  854. return retval;
  855. }
  856. static int bfin_mac_probe(struct platform_device *pdev)
  857. {
  858. struct net_device *ndev;
  859. ndev = alloc_etherdev(sizeof(struct bf537mac_local));
  860. if (!ndev) {
  861. printk(KERN_WARNING DRV_NAME ": could not allocate device\n");
  862. return -ENOMEM;
  863. }
  864. SET_NETDEV_DEV(ndev, &pdev->dev);
  865. platform_set_drvdata(pdev, ndev);
  866. if (bf537mac_probe(ndev) != 0) {
  867. platform_set_drvdata(pdev, NULL);
  868. free_netdev(ndev);
  869. printk(KERN_WARNING DRV_NAME ": not found\n");
  870. return -ENODEV;
  871. }
  872. return 0;
  873. }
  874. static int bfin_mac_remove(struct platform_device *pdev)
  875. {
  876. struct net_device *ndev = platform_get_drvdata(pdev);
  877. platform_set_drvdata(pdev, NULL);
  878. unregister_netdev(ndev);
  879. free_irq(IRQ_MAC_RX, ndev);
  880. free_netdev(ndev);
  881. setup_pin_mux(0);
  882. return 0;
  883. }
  884. #ifdef CONFIG_PM
  885. static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
  886. {
  887. struct net_device *net_dev = platform_get_drvdata(pdev);
  888. if (netif_running(net_dev))
  889. bf537mac_close(net_dev);
  890. return 0;
  891. }
  892. static int bfin_mac_resume(struct platform_device *pdev)
  893. {
  894. struct net_device *net_dev = platform_get_drvdata(pdev);
  895. if (netif_running(net_dev))
  896. bf537mac_open(net_dev);
  897. return 0;
  898. }
  899. #else
  900. #define bfin_mac_suspend NULL
  901. #define bfin_mac_resume NULL
  902. #endif /* CONFIG_PM */
  903. static struct platform_driver bfin_mac_driver = {
  904. .probe = bfin_mac_probe,
  905. .remove = bfin_mac_remove,
  906. .resume = bfin_mac_resume,
  907. .suspend = bfin_mac_suspend,
  908. .driver = {
  909. .name = DRV_NAME,
  910. },
  911. };
  912. static int __init bfin_mac_init(void)
  913. {
  914. return platform_driver_register(&bfin_mac_driver);
  915. }
  916. module_init(bfin_mac_init);
  917. static void __exit bfin_mac_cleanup(void)
  918. {
  919. platform_driver_unregister(&bfin_mac_driver);
  920. }
  921. module_exit(bfin_mac_cleanup);