rtc-sh.c 18 KB

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  1. /*
  2. * SuperH On-Chip RTC Support
  3. *
  4. * Copyright (C) 2006, 2007, 2008 Paul Mundt
  5. * Copyright (C) 2006 Jamie Lenehan
  6. * Copyright (C) 2008 Angelo Castello
  7. *
  8. * Based on the old arch/sh/kernel/cpu/rtc.c by:
  9. *
  10. * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
  11. * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
  12. *
  13. * This file is subject to the terms and conditions of the GNU General Public
  14. * License. See the file "COPYING" in the main directory of this archive
  15. * for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/bcd.h>
  20. #include <linux/rtc.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/io.h>
  27. #include <asm/rtc.h>
  28. #define DRV_NAME "sh-rtc"
  29. #define DRV_VERSION "0.2.0"
  30. #define RTC_REG(r) ((r) * rtc_reg_size)
  31. #define R64CNT RTC_REG(0)
  32. #define RSECCNT RTC_REG(1) /* RTC sec */
  33. #define RMINCNT RTC_REG(2) /* RTC min */
  34. #define RHRCNT RTC_REG(3) /* RTC hour */
  35. #define RWKCNT RTC_REG(4) /* RTC week */
  36. #define RDAYCNT RTC_REG(5) /* RTC day */
  37. #define RMONCNT RTC_REG(6) /* RTC month */
  38. #define RYRCNT RTC_REG(7) /* RTC year */
  39. #define RSECAR RTC_REG(8) /* ALARM sec */
  40. #define RMINAR RTC_REG(9) /* ALARM min */
  41. #define RHRAR RTC_REG(10) /* ALARM hour */
  42. #define RWKAR RTC_REG(11) /* ALARM week */
  43. #define RDAYAR RTC_REG(12) /* ALARM day */
  44. #define RMONAR RTC_REG(13) /* ALARM month */
  45. #define RCR1 RTC_REG(14) /* Control */
  46. #define RCR2 RTC_REG(15) /* Control */
  47. /*
  48. * Note on RYRAR and RCR3: Up until this point most of the register
  49. * definitions are consistent across all of the available parts. However,
  50. * the placement of the optional RYRAR and RCR3 (the RYRAR control
  51. * register used to control RYRCNT/RYRAR compare) varies considerably
  52. * across various parts, occasionally being mapped in to a completely
  53. * unrelated address space. For proper RYRAR support a separate resource
  54. * would have to be handed off, but as this is purely optional in
  55. * practice, we simply opt not to support it, thereby keeping the code
  56. * quite a bit more simplified.
  57. */
  58. /* ALARM Bits - or with BCD encoded value */
  59. #define AR_ENB 0x80 /* Enable for alarm cmp */
  60. /* Period Bits */
  61. #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
  62. #define PF_COUNT 0x200 /* Half periodic counter */
  63. #define PF_OXS 0x400 /* Periodic One x Second */
  64. #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
  65. #define PF_MASK 0xf00
  66. /* RCR1 Bits */
  67. #define RCR1_CF 0x80 /* Carry Flag */
  68. #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
  69. #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
  70. #define RCR1_AF 0x01 /* Alarm Flag */
  71. /* RCR2 Bits */
  72. #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
  73. #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
  74. #define RCR2_RTCEN 0x08 /* ENable RTC */
  75. #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
  76. #define RCR2_RESET 0x02 /* Reset bit */
  77. #define RCR2_START 0x01 /* Start bit */
  78. struct sh_rtc {
  79. void __iomem *regbase;
  80. unsigned long regsize;
  81. struct resource *res;
  82. int alarm_irq;
  83. int periodic_irq;
  84. int carry_irq;
  85. struct rtc_device *rtc_dev;
  86. spinlock_t lock;
  87. unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */
  88. unsigned short periodic_freq;
  89. };
  90. static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
  91. {
  92. struct sh_rtc *rtc = dev_id;
  93. unsigned int tmp;
  94. spin_lock(&rtc->lock);
  95. tmp = readb(rtc->regbase + RCR1);
  96. tmp &= ~RCR1_CF;
  97. writeb(tmp, rtc->regbase + RCR1);
  98. /* Users have requested One x Second IRQ */
  99. if (rtc->periodic_freq & PF_OXS)
  100. rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
  101. spin_unlock(&rtc->lock);
  102. return IRQ_HANDLED;
  103. }
  104. static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
  105. {
  106. struct sh_rtc *rtc = dev_id;
  107. unsigned int tmp;
  108. spin_lock(&rtc->lock);
  109. tmp = readb(rtc->regbase + RCR1);
  110. tmp &= ~(RCR1_AF | RCR1_AIE);
  111. writeb(tmp, rtc->regbase + RCR1);
  112. rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
  113. spin_unlock(&rtc->lock);
  114. return IRQ_HANDLED;
  115. }
  116. static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
  117. {
  118. struct sh_rtc *rtc = dev_id;
  119. struct rtc_device *rtc_dev = rtc->rtc_dev;
  120. unsigned int tmp;
  121. spin_lock(&rtc->lock);
  122. tmp = readb(rtc->regbase + RCR2);
  123. tmp &= ~RCR2_PEF;
  124. writeb(tmp, rtc->regbase + RCR2);
  125. /* Half period enabled than one skipped and the next notified */
  126. if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
  127. rtc->periodic_freq &= ~PF_COUNT;
  128. else {
  129. if (rtc->periodic_freq & PF_HP)
  130. rtc->periodic_freq |= PF_COUNT;
  131. if (rtc->periodic_freq & PF_KOU) {
  132. spin_lock(&rtc_dev->irq_task_lock);
  133. if (rtc_dev->irq_task)
  134. rtc_dev->irq_task->func(rtc_dev->irq_task->private_data);
  135. spin_unlock(&rtc_dev->irq_task_lock);
  136. } else
  137. rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
  138. }
  139. spin_unlock(&rtc->lock);
  140. return IRQ_HANDLED;
  141. }
  142. static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
  143. {
  144. struct sh_rtc *rtc = dev_get_drvdata(dev);
  145. unsigned int tmp;
  146. spin_lock_irq(&rtc->lock);
  147. tmp = readb(rtc->regbase + RCR2);
  148. if (enable) {
  149. tmp &= ~RCR2_PEF; /* Clear PES bit */
  150. tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
  151. } else
  152. tmp &= ~(RCR2_PESMASK | RCR2_PEF);
  153. writeb(tmp, rtc->regbase + RCR2);
  154. spin_unlock_irq(&rtc->lock);
  155. }
  156. static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq)
  157. {
  158. struct sh_rtc *rtc = dev_get_drvdata(dev);
  159. int tmp, ret = 0;
  160. spin_lock_irq(&rtc->lock);
  161. tmp = rtc->periodic_freq & PF_MASK;
  162. switch (freq) {
  163. case 0:
  164. rtc->periodic_freq = 0x00;
  165. break;
  166. case 1:
  167. rtc->periodic_freq = 0x60;
  168. break;
  169. case 2:
  170. rtc->periodic_freq = 0x50;
  171. break;
  172. case 4:
  173. rtc->periodic_freq = 0x40;
  174. break;
  175. case 8:
  176. rtc->periodic_freq = 0x30 | PF_HP;
  177. break;
  178. case 16:
  179. rtc->periodic_freq = 0x30;
  180. break;
  181. case 32:
  182. rtc->periodic_freq = 0x20 | PF_HP;
  183. break;
  184. case 64:
  185. rtc->periodic_freq = 0x20;
  186. break;
  187. case 128:
  188. rtc->periodic_freq = 0x10 | PF_HP;
  189. break;
  190. case 256:
  191. rtc->periodic_freq = 0x10;
  192. break;
  193. default:
  194. ret = -ENOTSUPP;
  195. }
  196. if (ret == 0) {
  197. rtc->periodic_freq |= tmp;
  198. rtc->rtc_dev->irq_freq = freq;
  199. }
  200. spin_unlock_irq(&rtc->lock);
  201. return ret;
  202. }
  203. static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
  204. {
  205. struct sh_rtc *rtc = dev_get_drvdata(dev);
  206. unsigned int tmp;
  207. spin_lock_irq(&rtc->lock);
  208. tmp = readb(rtc->regbase + RCR1);
  209. if (!enable)
  210. tmp &= ~RCR1_AIE;
  211. else
  212. tmp |= RCR1_AIE;
  213. writeb(tmp, rtc->regbase + RCR1);
  214. spin_unlock_irq(&rtc->lock);
  215. }
  216. static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
  217. {
  218. struct sh_rtc *rtc = dev_get_drvdata(dev);
  219. unsigned int tmp;
  220. tmp = readb(rtc->regbase + RCR1);
  221. seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
  222. tmp = readb(rtc->regbase + RCR2);
  223. seq_printf(seq, "periodic_IRQ\t: %s\n",
  224. (tmp & RCR2_PESMASK) ? "yes" : "no");
  225. return 0;
  226. }
  227. static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  228. {
  229. struct sh_rtc *rtc = dev_get_drvdata(dev);
  230. unsigned int ret = 0;
  231. switch (cmd) {
  232. case RTC_PIE_OFF:
  233. case RTC_PIE_ON:
  234. sh_rtc_setpie(dev, cmd == RTC_PIE_ON);
  235. break;
  236. case RTC_AIE_OFF:
  237. case RTC_AIE_ON:
  238. sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
  239. break;
  240. case RTC_UIE_OFF:
  241. rtc->periodic_freq &= ~PF_OXS;
  242. break;
  243. case RTC_UIE_ON:
  244. rtc->periodic_freq |= PF_OXS;
  245. break;
  246. case RTC_IRQP_READ:
  247. ret = put_user(rtc->rtc_dev->irq_freq,
  248. (unsigned long __user *)arg);
  249. break;
  250. case RTC_IRQP_SET:
  251. ret = sh_rtc_setfreq(dev, arg);
  252. break;
  253. default:
  254. ret = -ENOIOCTLCMD;
  255. }
  256. return ret;
  257. }
  258. static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
  259. {
  260. struct platform_device *pdev = to_platform_device(dev);
  261. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  262. unsigned int sec128, sec2, yr, yr100, cf_bit;
  263. do {
  264. unsigned int tmp;
  265. spin_lock_irq(&rtc->lock);
  266. tmp = readb(rtc->regbase + RCR1);
  267. tmp &= ~RCR1_CF; /* Clear CF-bit */
  268. tmp |= RCR1_CIE;
  269. writeb(tmp, rtc->regbase + RCR1);
  270. sec128 = readb(rtc->regbase + R64CNT);
  271. tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
  272. tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
  273. tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
  274. tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
  275. tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
  276. tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
  277. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  278. yr = readw(rtc->regbase + RYRCNT);
  279. yr100 = bcd2bin(yr >> 8);
  280. yr &= 0xff;
  281. } else {
  282. yr = readb(rtc->regbase + RYRCNT);
  283. yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
  284. }
  285. tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
  286. sec2 = readb(rtc->regbase + R64CNT);
  287. cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
  288. spin_unlock_irq(&rtc->lock);
  289. } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
  290. #if RTC_BIT_INVERTED != 0
  291. if ((sec128 & RTC_BIT_INVERTED))
  292. tm->tm_sec--;
  293. #endif
  294. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  295. "mday=%d, mon=%d, year=%d, wday=%d\n",
  296. __func__,
  297. tm->tm_sec, tm->tm_min, tm->tm_hour,
  298. tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
  299. if (rtc_valid_tm(tm) < 0) {
  300. dev_err(dev, "invalid date\n");
  301. rtc_time_to_tm(0, tm);
  302. }
  303. return 0;
  304. }
  305. static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
  306. {
  307. struct platform_device *pdev = to_platform_device(dev);
  308. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  309. unsigned int tmp;
  310. int year;
  311. spin_lock_irq(&rtc->lock);
  312. /* Reset pre-scaler & stop RTC */
  313. tmp = readb(rtc->regbase + RCR2);
  314. tmp |= RCR2_RESET;
  315. tmp &= ~RCR2_START;
  316. writeb(tmp, rtc->regbase + RCR2);
  317. writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
  318. writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
  319. writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
  320. writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
  321. writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
  322. writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
  323. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  324. year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
  325. bin2bcd(tm->tm_year % 100);
  326. writew(year, rtc->regbase + RYRCNT);
  327. } else {
  328. year = tm->tm_year % 100;
  329. writeb(bin2bcd(year), rtc->regbase + RYRCNT);
  330. }
  331. /* Start RTC */
  332. tmp = readb(rtc->regbase + RCR2);
  333. tmp &= ~RCR2_RESET;
  334. tmp |= RCR2_RTCEN | RCR2_START;
  335. writeb(tmp, rtc->regbase + RCR2);
  336. spin_unlock_irq(&rtc->lock);
  337. return 0;
  338. }
  339. static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
  340. {
  341. unsigned int byte;
  342. int value = 0xff; /* return 0xff for ignored values */
  343. byte = readb(rtc->regbase + reg_off);
  344. if (byte & AR_ENB) {
  345. byte &= ~AR_ENB; /* strip the enable bit */
  346. value = bcd2bin(byte);
  347. }
  348. return value;
  349. }
  350. static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  351. {
  352. struct platform_device *pdev = to_platform_device(dev);
  353. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  354. struct rtc_time *tm = &wkalrm->time;
  355. spin_lock_irq(&rtc->lock);
  356. tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
  357. tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
  358. tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
  359. tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
  360. tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
  361. tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
  362. if (tm->tm_mon > 0)
  363. tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
  364. tm->tm_year = 0xffff;
  365. wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
  366. spin_unlock_irq(&rtc->lock);
  367. return 0;
  368. }
  369. static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
  370. int value, int reg_off)
  371. {
  372. /* < 0 for a value that is ignored */
  373. if (value < 0)
  374. writeb(0, rtc->regbase + reg_off);
  375. else
  376. writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
  377. }
  378. static int sh_rtc_check_alarm(struct rtc_time *tm)
  379. {
  380. /*
  381. * The original rtc says anything > 0xc0 is "don't care" or "match
  382. * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
  383. * The original rtc doesn't support years - some things use -1 and
  384. * some 0xffff. We use -1 to make out tests easier.
  385. */
  386. if (tm->tm_year == 0xffff)
  387. tm->tm_year = -1;
  388. if (tm->tm_mon >= 0xff)
  389. tm->tm_mon = -1;
  390. if (tm->tm_mday >= 0xff)
  391. tm->tm_mday = -1;
  392. if (tm->tm_wday >= 0xff)
  393. tm->tm_wday = -1;
  394. if (tm->tm_hour >= 0xff)
  395. tm->tm_hour = -1;
  396. if (tm->tm_min >= 0xff)
  397. tm->tm_min = -1;
  398. if (tm->tm_sec >= 0xff)
  399. tm->tm_sec = -1;
  400. if (tm->tm_year > 9999 ||
  401. tm->tm_mon >= 12 ||
  402. tm->tm_mday == 0 || tm->tm_mday >= 32 ||
  403. tm->tm_wday >= 7 ||
  404. tm->tm_hour >= 24 ||
  405. tm->tm_min >= 60 ||
  406. tm->tm_sec >= 60)
  407. return -EINVAL;
  408. return 0;
  409. }
  410. static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  411. {
  412. struct platform_device *pdev = to_platform_device(dev);
  413. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  414. unsigned int rcr1;
  415. struct rtc_time *tm = &wkalrm->time;
  416. int mon, err;
  417. err = sh_rtc_check_alarm(tm);
  418. if (unlikely(err < 0))
  419. return err;
  420. spin_lock_irq(&rtc->lock);
  421. /* disable alarm interrupt and clear the alarm flag */
  422. rcr1 = readb(rtc->regbase + RCR1);
  423. rcr1 &= ~(RCR1_AF | RCR1_AIE);
  424. writeb(rcr1, rtc->regbase + RCR1);
  425. /* set alarm time */
  426. sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
  427. sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
  428. sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
  429. sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
  430. sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
  431. mon = tm->tm_mon;
  432. if (mon >= 0)
  433. mon += 1;
  434. sh_rtc_write_alarm_value(rtc, mon, RMONAR);
  435. if (wkalrm->enabled) {
  436. rcr1 |= RCR1_AIE;
  437. writeb(rcr1, rtc->regbase + RCR1);
  438. }
  439. spin_unlock_irq(&rtc->lock);
  440. return 0;
  441. }
  442. static int sh_rtc_irq_set_state(struct device *dev, int enabled)
  443. {
  444. struct platform_device *pdev = to_platform_device(dev);
  445. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  446. if (enabled) {
  447. rtc->periodic_freq |= PF_KOU;
  448. return sh_rtc_ioctl(dev, RTC_PIE_ON, 0);
  449. } else {
  450. rtc->periodic_freq &= ~PF_KOU;
  451. return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0);
  452. }
  453. }
  454. static int sh_rtc_irq_set_freq(struct device *dev, int freq)
  455. {
  456. return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq);
  457. }
  458. static struct rtc_class_ops sh_rtc_ops = {
  459. .ioctl = sh_rtc_ioctl,
  460. .read_time = sh_rtc_read_time,
  461. .set_time = sh_rtc_set_time,
  462. .read_alarm = sh_rtc_read_alarm,
  463. .set_alarm = sh_rtc_set_alarm,
  464. .irq_set_state = sh_rtc_irq_set_state,
  465. .irq_set_freq = sh_rtc_irq_set_freq,
  466. .proc = sh_rtc_proc,
  467. };
  468. static int __devinit sh_rtc_probe(struct platform_device *pdev)
  469. {
  470. struct sh_rtc *rtc;
  471. struct resource *res;
  472. unsigned int tmp;
  473. int ret;
  474. rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
  475. if (unlikely(!rtc))
  476. return -ENOMEM;
  477. spin_lock_init(&rtc->lock);
  478. /* get periodic/carry/alarm irqs */
  479. ret = platform_get_irq(pdev, 0);
  480. if (unlikely(ret <= 0)) {
  481. ret = -ENOENT;
  482. dev_err(&pdev->dev, "No IRQ for period\n");
  483. goto err_badres;
  484. }
  485. rtc->periodic_irq = ret;
  486. ret = platform_get_irq(pdev, 1);
  487. if (unlikely(ret <= 0)) {
  488. ret = -ENOENT;
  489. dev_err(&pdev->dev, "No IRQ for carry\n");
  490. goto err_badres;
  491. }
  492. rtc->carry_irq = ret;
  493. ret = platform_get_irq(pdev, 2);
  494. if (unlikely(ret <= 0)) {
  495. ret = -ENOENT;
  496. dev_err(&pdev->dev, "No IRQ for alarm\n");
  497. goto err_badres;
  498. }
  499. rtc->alarm_irq = ret;
  500. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  501. if (unlikely(res == NULL)) {
  502. ret = -ENOENT;
  503. dev_err(&pdev->dev, "No IO resource\n");
  504. goto err_badres;
  505. }
  506. rtc->regsize = res->end - res->start + 1;
  507. rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
  508. if (unlikely(!rtc->res)) {
  509. ret = -EBUSY;
  510. goto err_badres;
  511. }
  512. rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
  513. if (unlikely(!rtc->regbase)) {
  514. ret = -EINVAL;
  515. goto err_badmap;
  516. }
  517. rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
  518. &sh_rtc_ops, THIS_MODULE);
  519. if (IS_ERR(rtc->rtc_dev)) {
  520. ret = PTR_ERR(rtc->rtc_dev);
  521. goto err_unmap;
  522. }
  523. rtc->capabilities = RTC_DEF_CAPABILITIES;
  524. if (pdev->dev.platform_data) {
  525. struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
  526. /*
  527. * Some CPUs have special capabilities in addition to the
  528. * default set. Add those in here.
  529. */
  530. rtc->capabilities |= pinfo->capabilities;
  531. }
  532. rtc->rtc_dev->max_user_freq = 256;
  533. rtc->rtc_dev->irq_freq = 1;
  534. rtc->periodic_freq = 0x60;
  535. platform_set_drvdata(pdev, rtc);
  536. /* register periodic/carry/alarm irqs */
  537. ret = request_irq(rtc->periodic_irq, sh_rtc_periodic, IRQF_DISABLED,
  538. "sh-rtc period", rtc);
  539. if (unlikely(ret)) {
  540. dev_err(&pdev->dev,
  541. "request period IRQ failed with %d, IRQ %d\n", ret,
  542. rtc->periodic_irq);
  543. goto err_unmap;
  544. }
  545. ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED,
  546. "sh-rtc carry", rtc);
  547. if (unlikely(ret)) {
  548. dev_err(&pdev->dev,
  549. "request carry IRQ failed with %d, IRQ %d\n", ret,
  550. rtc->carry_irq);
  551. free_irq(rtc->periodic_irq, rtc);
  552. goto err_unmap;
  553. }
  554. ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED,
  555. "sh-rtc alarm", rtc);
  556. if (unlikely(ret)) {
  557. dev_err(&pdev->dev,
  558. "request alarm IRQ failed with %d, IRQ %d\n", ret,
  559. rtc->alarm_irq);
  560. free_irq(rtc->carry_irq, rtc);
  561. free_irq(rtc->periodic_irq, rtc);
  562. goto err_unmap;
  563. }
  564. tmp = readb(rtc->regbase + RCR1);
  565. tmp &= ~RCR1_CF;
  566. tmp |= RCR1_CIE;
  567. writeb(tmp, rtc->regbase + RCR1);
  568. return 0;
  569. err_unmap:
  570. iounmap(rtc->regbase);
  571. err_badmap:
  572. release_resource(rtc->res);
  573. err_badres:
  574. kfree(rtc);
  575. return ret;
  576. }
  577. static int __devexit sh_rtc_remove(struct platform_device *pdev)
  578. {
  579. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  580. if (likely(rtc->rtc_dev))
  581. rtc_device_unregister(rtc->rtc_dev);
  582. sh_rtc_setpie(&pdev->dev, 0);
  583. sh_rtc_setaie(&pdev->dev, 0);
  584. free_irq(rtc->carry_irq, rtc);
  585. free_irq(rtc->periodic_irq, rtc);
  586. free_irq(rtc->alarm_irq, rtc);
  587. release_resource(rtc->res);
  588. iounmap(rtc->regbase);
  589. platform_set_drvdata(pdev, NULL);
  590. kfree(rtc);
  591. return 0;
  592. }
  593. static struct platform_driver sh_rtc_platform_driver = {
  594. .driver = {
  595. .name = DRV_NAME,
  596. .owner = THIS_MODULE,
  597. },
  598. .probe = sh_rtc_probe,
  599. .remove = __devexit_p(sh_rtc_remove),
  600. };
  601. static int __init sh_rtc_init(void)
  602. {
  603. return platform_driver_register(&sh_rtc_platform_driver);
  604. }
  605. static void __exit sh_rtc_exit(void)
  606. {
  607. platform_driver_unregister(&sh_rtc_platform_driver);
  608. }
  609. module_init(sh_rtc_init);
  610. module_exit(sh_rtc_exit);
  611. MODULE_DESCRIPTION("SuperH on-chip RTC driver");
  612. MODULE_VERSION(DRV_VERSION);
  613. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
  614. "Jamie Lenehan <lenehan@twibble.org>, "
  615. "Angelo Castello <angelo.castello@st.com>");
  616. MODULE_LICENSE("GPL");
  617. MODULE_ALIAS("platform:" DRV_NAME);