coretemp.c 22 KB

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  1. /*
  2. * coretemp.c - Linux kernel module for hardware monitoring
  3. *
  4. * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
  5. *
  6. * Inspired from many hwmon drivers
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20. * 02110-1301 USA.
  21. */
  22. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/slab.h>
  26. #include <linux/jiffies.h>
  27. #include <linux/hwmon.h>
  28. #include <linux/sysfs.h>
  29. #include <linux/hwmon-sysfs.h>
  30. #include <linux/err.h>
  31. #include <linux/mutex.h>
  32. #include <linux/list.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/cpu.h>
  35. #include <linux/smp.h>
  36. #include <linux/moduleparam.h>
  37. #include <asm/msr.h>
  38. #include <asm/processor.h>
  39. #include <asm/cpu_device_id.h>
  40. #define DRVNAME "coretemp"
  41. /*
  42. * force_tjmax only matters when TjMax can't be read from the CPU itself.
  43. * When set, it replaces the driver's suboptimal heuristic.
  44. */
  45. static int force_tjmax;
  46. module_param_named(tjmax, force_tjmax, int, 0444);
  47. MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
  48. #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
  49. #define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
  50. #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
  51. #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
  52. #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
  53. #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
  54. #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
  55. #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
  56. #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
  57. #ifdef CONFIG_SMP
  58. #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
  59. #else
  60. #define for_each_sibling(i, cpu) for (i = 0; false; )
  61. #endif
  62. /*
  63. * Per-Core Temperature Data
  64. * @last_updated: The time when the current temperature value was updated
  65. * earlier (in jiffies).
  66. * @cpu_core_id: The CPU Core from which temperature values should be read
  67. * This value is passed as "id" field to rdmsr/wrmsr functions.
  68. * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
  69. * from where the temperature values should be read.
  70. * @attr_size: Total number of pre-core attrs displayed in the sysfs.
  71. * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
  72. * Otherwise, temp_data holds coretemp data.
  73. * @valid: If this is 1, the current temperature is valid.
  74. */
  75. struct temp_data {
  76. int temp;
  77. int ttarget;
  78. int tjmax;
  79. unsigned long last_updated;
  80. unsigned int cpu;
  81. u32 cpu_core_id;
  82. u32 status_reg;
  83. int attr_size;
  84. bool is_pkg_data;
  85. bool valid;
  86. struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
  87. char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
  88. struct mutex update_lock;
  89. };
  90. /* Platform Data per Physical CPU */
  91. struct platform_data {
  92. struct device *hwmon_dev;
  93. u16 phys_proc_id;
  94. struct temp_data *core_data[MAX_CORE_DATA];
  95. struct device_attribute name_attr;
  96. };
  97. struct pdev_entry {
  98. struct list_head list;
  99. struct platform_device *pdev;
  100. u16 phys_proc_id;
  101. };
  102. static LIST_HEAD(pdev_list);
  103. static DEFINE_MUTEX(pdev_list_mutex);
  104. static ssize_t show_name(struct device *dev,
  105. struct device_attribute *devattr, char *buf)
  106. {
  107. return sprintf(buf, "%s\n", DRVNAME);
  108. }
  109. static ssize_t show_label(struct device *dev,
  110. struct device_attribute *devattr, char *buf)
  111. {
  112. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  113. struct platform_data *pdata = dev_get_drvdata(dev);
  114. struct temp_data *tdata = pdata->core_data[attr->index];
  115. if (tdata->is_pkg_data)
  116. return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
  117. return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
  118. }
  119. static ssize_t show_crit_alarm(struct device *dev,
  120. struct device_attribute *devattr, char *buf)
  121. {
  122. u32 eax, edx;
  123. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  124. struct platform_data *pdata = dev_get_drvdata(dev);
  125. struct temp_data *tdata = pdata->core_data[attr->index];
  126. rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
  127. return sprintf(buf, "%d\n", (eax >> 5) & 1);
  128. }
  129. static ssize_t show_tjmax(struct device *dev,
  130. struct device_attribute *devattr, char *buf)
  131. {
  132. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  133. struct platform_data *pdata = dev_get_drvdata(dev);
  134. return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
  135. }
  136. static ssize_t show_ttarget(struct device *dev,
  137. struct device_attribute *devattr, char *buf)
  138. {
  139. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  140. struct platform_data *pdata = dev_get_drvdata(dev);
  141. return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
  142. }
  143. static ssize_t show_temp(struct device *dev,
  144. struct device_attribute *devattr, char *buf)
  145. {
  146. u32 eax, edx;
  147. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  148. struct platform_data *pdata = dev_get_drvdata(dev);
  149. struct temp_data *tdata = pdata->core_data[attr->index];
  150. mutex_lock(&tdata->update_lock);
  151. /* Check whether the time interval has elapsed */
  152. if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
  153. rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
  154. tdata->valid = 0;
  155. /* Check whether the data is valid */
  156. if (eax & 0x80000000) {
  157. tdata->temp = tdata->tjmax -
  158. ((eax >> 16) & 0x7f) * 1000;
  159. tdata->valid = 1;
  160. }
  161. tdata->last_updated = jiffies;
  162. }
  163. mutex_unlock(&tdata->update_lock);
  164. return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
  165. }
  166. struct tjmax {
  167. char const *id;
  168. int tjmax;
  169. };
  170. static const struct tjmax __cpuinitconst tjmax_table[] = {
  171. { "CPU D410", 100000 },
  172. { "CPU D425", 100000 },
  173. { "CPU D510", 100000 },
  174. { "CPU D525", 100000 },
  175. { "CPU N450", 100000 },
  176. { "CPU N455", 100000 },
  177. { "CPU N470", 100000 },
  178. { "CPU N475", 100000 },
  179. { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */
  180. { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */
  181. { "CPU CE4110", 110000 }, /* Model 0x1c, stepping 10 */
  182. { "CPU CE4150", 110000 }, /* Model 0x1c, stepping 10 */
  183. { "CPU CE4170", 110000 }, /* Model 0x1c, stepping 10 */
  184. };
  185. struct tjmax_model {
  186. u8 model;
  187. u8 mask;
  188. int tjmax;
  189. };
  190. #define ANY 0xff
  191. static const struct tjmax_model __cpuinitconst tjmax_model_table[] = {
  192. { 0x1c, 10, 100000 }, /* D4xx, N4xx, D5xx, N5xx */
  193. { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others
  194. * Note: Also matches 230 and 330,
  195. * which are covered by tjmax_table
  196. */
  197. { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
  198. * Note: TjMax for E6xxT is 110C, but CPU type
  199. * is undetectable by software
  200. */
  201. { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */
  202. { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) */
  203. };
  204. static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
  205. struct device *dev)
  206. {
  207. /* The 100C is default for both mobile and non mobile CPUs */
  208. int tjmax = 100000;
  209. int tjmax_ee = 85000;
  210. int usemsr_ee = 1;
  211. int err;
  212. u32 eax, edx;
  213. int i;
  214. /* explicit tjmax table entries override heuristics */
  215. for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
  216. if (strstr(c->x86_model_id, tjmax_table[i].id))
  217. return tjmax_table[i].tjmax;
  218. }
  219. for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
  220. const struct tjmax_model *tm = &tjmax_model_table[i];
  221. if (c->x86_model == tm->model &&
  222. (tm->mask == ANY || c->x86_mask == tm->mask))
  223. return tm->tjmax;
  224. }
  225. /* Early chips have no MSR for TjMax */
  226. if (c->x86_model == 0xf && c->x86_mask < 4)
  227. usemsr_ee = 0;
  228. if (c->x86_model > 0xe && usemsr_ee) {
  229. u8 platform_id;
  230. /*
  231. * Now we can detect the mobile CPU using Intel provided table
  232. * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
  233. * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
  234. */
  235. err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
  236. if (err) {
  237. dev_warn(dev,
  238. "Unable to access MSR 0x17, assuming desktop"
  239. " CPU\n");
  240. usemsr_ee = 0;
  241. } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
  242. /*
  243. * Trust bit 28 up to Penryn, I could not find any
  244. * documentation on that; if you happen to know
  245. * someone at Intel please ask
  246. */
  247. usemsr_ee = 0;
  248. } else {
  249. /* Platform ID bits 52:50 (EDX starts at bit 32) */
  250. platform_id = (edx >> 18) & 0x7;
  251. /*
  252. * Mobile Penryn CPU seems to be platform ID 7 or 5
  253. * (guesswork)
  254. */
  255. if (c->x86_model == 0x17 &&
  256. (platform_id == 5 || platform_id == 7)) {
  257. /*
  258. * If MSR EE bit is set, set it to 90 degrees C,
  259. * otherwise 105 degrees C
  260. */
  261. tjmax_ee = 90000;
  262. tjmax = 105000;
  263. }
  264. }
  265. }
  266. if (usemsr_ee) {
  267. err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
  268. if (err) {
  269. dev_warn(dev,
  270. "Unable to access MSR 0xEE, for Tjmax, left"
  271. " at default\n");
  272. } else if (eax & 0x40000000) {
  273. tjmax = tjmax_ee;
  274. }
  275. } else if (tjmax == 100000) {
  276. /*
  277. * If we don't use msr EE it means we are desktop CPU
  278. * (with exeception of Atom)
  279. */
  280. dev_warn(dev, "Using relative temperature scale!\n");
  281. }
  282. return tjmax;
  283. }
  284. static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
  285. struct device *dev)
  286. {
  287. int err;
  288. u32 eax, edx;
  289. u32 val;
  290. /*
  291. * A new feature of current Intel(R) processors, the
  292. * IA32_TEMPERATURE_TARGET contains the TjMax value
  293. */
  294. err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
  295. if (err) {
  296. if (c->x86_model > 0xe && c->x86_model != 0x1c)
  297. dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
  298. } else {
  299. val = (eax >> 16) & 0xff;
  300. /*
  301. * If the TjMax is not plausible, an assumption
  302. * will be used
  303. */
  304. if (val) {
  305. dev_dbg(dev, "TjMax is %d degrees C\n", val);
  306. return val * 1000;
  307. }
  308. }
  309. if (force_tjmax) {
  310. dev_notice(dev, "TjMax forced to %d degrees C by user\n",
  311. force_tjmax);
  312. return force_tjmax * 1000;
  313. }
  314. /*
  315. * An assumption is made for early CPUs and unreadable MSR.
  316. * NOTE: the calculated value may not be correct.
  317. */
  318. return adjust_tjmax(c, id, dev);
  319. }
  320. static int __devinit create_name_attr(struct platform_data *pdata,
  321. struct device *dev)
  322. {
  323. sysfs_attr_init(&pdata->name_attr.attr);
  324. pdata->name_attr.attr.name = "name";
  325. pdata->name_attr.attr.mode = S_IRUGO;
  326. pdata->name_attr.show = show_name;
  327. return device_create_file(dev, &pdata->name_attr);
  328. }
  329. static int __cpuinit create_core_attrs(struct temp_data *tdata,
  330. struct device *dev, int attr_no)
  331. {
  332. int err, i;
  333. static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
  334. struct device_attribute *devattr, char *buf) = {
  335. show_label, show_crit_alarm, show_temp, show_tjmax,
  336. show_ttarget };
  337. static const char *const names[TOTAL_ATTRS] = {
  338. "temp%d_label", "temp%d_crit_alarm",
  339. "temp%d_input", "temp%d_crit",
  340. "temp%d_max" };
  341. for (i = 0; i < tdata->attr_size; i++) {
  342. snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
  343. attr_no);
  344. sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
  345. tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
  346. tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
  347. tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
  348. tdata->sd_attrs[i].index = attr_no;
  349. err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
  350. if (err)
  351. goto exit_free;
  352. }
  353. return 0;
  354. exit_free:
  355. while (--i >= 0)
  356. device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
  357. return err;
  358. }
  359. static int __cpuinit chk_ucode_version(unsigned int cpu)
  360. {
  361. struct cpuinfo_x86 *c = &cpu_data(cpu);
  362. /*
  363. * Check if we have problem with errata AE18 of Core processors:
  364. * Readings might stop update when processor visited too deep sleep,
  365. * fixed for stepping D0 (6EC).
  366. */
  367. if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
  368. pr_err("Errata AE18 not fixed, update BIOS or "
  369. "microcode of the CPU!\n");
  370. return -ENODEV;
  371. }
  372. return 0;
  373. }
  374. static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
  375. {
  376. u16 phys_proc_id = TO_PHYS_ID(cpu);
  377. struct pdev_entry *p;
  378. mutex_lock(&pdev_list_mutex);
  379. list_for_each_entry(p, &pdev_list, list)
  380. if (p->phys_proc_id == phys_proc_id) {
  381. mutex_unlock(&pdev_list_mutex);
  382. return p->pdev;
  383. }
  384. mutex_unlock(&pdev_list_mutex);
  385. return NULL;
  386. }
  387. static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
  388. int pkg_flag)
  389. {
  390. struct temp_data *tdata;
  391. tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
  392. if (!tdata)
  393. return NULL;
  394. tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
  395. MSR_IA32_THERM_STATUS;
  396. tdata->is_pkg_data = pkg_flag;
  397. tdata->cpu = cpu;
  398. tdata->cpu_core_id = TO_CORE_ID(cpu);
  399. tdata->attr_size = MAX_CORE_ATTRS;
  400. mutex_init(&tdata->update_lock);
  401. return tdata;
  402. }
  403. static int __cpuinit create_core_data(struct platform_device *pdev,
  404. unsigned int cpu, int pkg_flag)
  405. {
  406. struct temp_data *tdata;
  407. struct platform_data *pdata = platform_get_drvdata(pdev);
  408. struct cpuinfo_x86 *c = &cpu_data(cpu);
  409. u32 eax, edx;
  410. int err, attr_no;
  411. /*
  412. * Find attr number for sysfs:
  413. * We map the attr number to core id of the CPU
  414. * The attr number is always core id + 2
  415. * The Pkgtemp will always show up as temp1_*, if available
  416. */
  417. attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
  418. if (attr_no > MAX_CORE_DATA - 1)
  419. return -ERANGE;
  420. /*
  421. * Provide a single set of attributes for all HT siblings of a core
  422. * to avoid duplicate sensors (the processor ID and core ID of all
  423. * HT siblings of a core are the same).
  424. * Skip if a HT sibling of this core is already registered.
  425. * This is not an error.
  426. */
  427. if (pdata->core_data[attr_no] != NULL)
  428. return 0;
  429. tdata = init_temp_data(cpu, pkg_flag);
  430. if (!tdata)
  431. return -ENOMEM;
  432. /* Test if we can access the status register */
  433. err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
  434. if (err)
  435. goto exit_free;
  436. /* We can access status register. Get Critical Temperature */
  437. tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
  438. /*
  439. * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
  440. * The target temperature is available on older CPUs but not in this
  441. * register. Atoms don't have the register at all.
  442. */
  443. if (c->x86_model > 0xe && c->x86_model != 0x1c) {
  444. err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
  445. &eax, &edx);
  446. if (!err) {
  447. tdata->ttarget
  448. = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
  449. tdata->attr_size++;
  450. }
  451. }
  452. pdata->core_data[attr_no] = tdata;
  453. /* Create sysfs interfaces */
  454. err = create_core_attrs(tdata, &pdev->dev, attr_no);
  455. if (err)
  456. goto exit_free;
  457. return 0;
  458. exit_free:
  459. pdata->core_data[attr_no] = NULL;
  460. kfree(tdata);
  461. return err;
  462. }
  463. static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
  464. {
  465. struct platform_device *pdev = coretemp_get_pdev(cpu);
  466. int err;
  467. if (!pdev)
  468. return;
  469. err = create_core_data(pdev, cpu, pkg_flag);
  470. if (err)
  471. dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
  472. }
  473. static void coretemp_remove_core(struct platform_data *pdata,
  474. struct device *dev, int indx)
  475. {
  476. int i;
  477. struct temp_data *tdata = pdata->core_data[indx];
  478. /* Remove the sysfs attributes */
  479. for (i = 0; i < tdata->attr_size; i++)
  480. device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
  481. kfree(pdata->core_data[indx]);
  482. pdata->core_data[indx] = NULL;
  483. }
  484. static int __devinit coretemp_probe(struct platform_device *pdev)
  485. {
  486. struct platform_data *pdata;
  487. int err;
  488. /* Initialize the per-package data structures */
  489. pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
  490. if (!pdata)
  491. return -ENOMEM;
  492. err = create_name_attr(pdata, &pdev->dev);
  493. if (err)
  494. goto exit_free;
  495. pdata->phys_proc_id = pdev->id;
  496. platform_set_drvdata(pdev, pdata);
  497. pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
  498. if (IS_ERR(pdata->hwmon_dev)) {
  499. err = PTR_ERR(pdata->hwmon_dev);
  500. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  501. goto exit_name;
  502. }
  503. return 0;
  504. exit_name:
  505. device_remove_file(&pdev->dev, &pdata->name_attr);
  506. platform_set_drvdata(pdev, NULL);
  507. exit_free:
  508. kfree(pdata);
  509. return err;
  510. }
  511. static int __devexit coretemp_remove(struct platform_device *pdev)
  512. {
  513. struct platform_data *pdata = platform_get_drvdata(pdev);
  514. int i;
  515. for (i = MAX_CORE_DATA - 1; i >= 0; --i)
  516. if (pdata->core_data[i])
  517. coretemp_remove_core(pdata, &pdev->dev, i);
  518. device_remove_file(&pdev->dev, &pdata->name_attr);
  519. hwmon_device_unregister(pdata->hwmon_dev);
  520. platform_set_drvdata(pdev, NULL);
  521. kfree(pdata);
  522. return 0;
  523. }
  524. static struct platform_driver coretemp_driver = {
  525. .driver = {
  526. .owner = THIS_MODULE,
  527. .name = DRVNAME,
  528. },
  529. .probe = coretemp_probe,
  530. .remove = __devexit_p(coretemp_remove),
  531. };
  532. static int __cpuinit coretemp_device_add(unsigned int cpu)
  533. {
  534. int err;
  535. struct platform_device *pdev;
  536. struct pdev_entry *pdev_entry;
  537. mutex_lock(&pdev_list_mutex);
  538. pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
  539. if (!pdev) {
  540. err = -ENOMEM;
  541. pr_err("Device allocation failed\n");
  542. goto exit;
  543. }
  544. pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
  545. if (!pdev_entry) {
  546. err = -ENOMEM;
  547. goto exit_device_put;
  548. }
  549. err = platform_device_add(pdev);
  550. if (err) {
  551. pr_err("Device addition failed (%d)\n", err);
  552. goto exit_device_free;
  553. }
  554. pdev_entry->pdev = pdev;
  555. pdev_entry->phys_proc_id = pdev->id;
  556. list_add_tail(&pdev_entry->list, &pdev_list);
  557. mutex_unlock(&pdev_list_mutex);
  558. return 0;
  559. exit_device_free:
  560. kfree(pdev_entry);
  561. exit_device_put:
  562. platform_device_put(pdev);
  563. exit:
  564. mutex_unlock(&pdev_list_mutex);
  565. return err;
  566. }
  567. static void __cpuinit coretemp_device_remove(unsigned int cpu)
  568. {
  569. struct pdev_entry *p, *n;
  570. u16 phys_proc_id = TO_PHYS_ID(cpu);
  571. mutex_lock(&pdev_list_mutex);
  572. list_for_each_entry_safe(p, n, &pdev_list, list) {
  573. if (p->phys_proc_id != phys_proc_id)
  574. continue;
  575. platform_device_unregister(p->pdev);
  576. list_del(&p->list);
  577. kfree(p);
  578. }
  579. mutex_unlock(&pdev_list_mutex);
  580. }
  581. static bool __cpuinit is_any_core_online(struct platform_data *pdata)
  582. {
  583. int i;
  584. /* Find online cores, except pkgtemp data */
  585. for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
  586. if (pdata->core_data[i] &&
  587. !pdata->core_data[i]->is_pkg_data) {
  588. return true;
  589. }
  590. }
  591. return false;
  592. }
  593. static void __cpuinit get_core_online(unsigned int cpu)
  594. {
  595. struct cpuinfo_x86 *c = &cpu_data(cpu);
  596. struct platform_device *pdev = coretemp_get_pdev(cpu);
  597. int err;
  598. /*
  599. * CPUID.06H.EAX[0] indicates whether the CPU has thermal
  600. * sensors. We check this bit only, all the early CPUs
  601. * without thermal sensors will be filtered out.
  602. */
  603. if (!cpu_has(c, X86_FEATURE_DTHERM))
  604. return;
  605. if (!pdev) {
  606. /* Check the microcode version of the CPU */
  607. if (chk_ucode_version(cpu))
  608. return;
  609. /*
  610. * Alright, we have DTS support.
  611. * We are bringing the _first_ core in this pkg
  612. * online. So, initialize per-pkg data structures and
  613. * then bring this core online.
  614. */
  615. err = coretemp_device_add(cpu);
  616. if (err)
  617. return;
  618. /*
  619. * Check whether pkgtemp support is available.
  620. * If so, add interfaces for pkgtemp.
  621. */
  622. if (cpu_has(c, X86_FEATURE_PTS))
  623. coretemp_add_core(cpu, 1);
  624. }
  625. /*
  626. * Physical CPU device already exists.
  627. * So, just add interfaces for this core.
  628. */
  629. coretemp_add_core(cpu, 0);
  630. }
  631. static void __cpuinit put_core_offline(unsigned int cpu)
  632. {
  633. int i, indx;
  634. struct platform_data *pdata;
  635. struct platform_device *pdev = coretemp_get_pdev(cpu);
  636. /* If the physical CPU device does not exist, just return */
  637. if (!pdev)
  638. return;
  639. pdata = platform_get_drvdata(pdev);
  640. indx = TO_ATTR_NO(cpu);
  641. /* The core id is too big, just return */
  642. if (indx > MAX_CORE_DATA - 1)
  643. return;
  644. if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
  645. coretemp_remove_core(pdata, &pdev->dev, indx);
  646. /*
  647. * If a HT sibling of a core is taken offline, but another HT sibling
  648. * of the same core is still online, register the alternate sibling.
  649. * This ensures that exactly one set of attributes is provided as long
  650. * as at least one HT sibling of a core is online.
  651. */
  652. for_each_sibling(i, cpu) {
  653. if (i != cpu) {
  654. get_core_online(i);
  655. /*
  656. * Display temperature sensor data for one HT sibling
  657. * per core only, so abort the loop after one such
  658. * sibling has been found.
  659. */
  660. break;
  661. }
  662. }
  663. /*
  664. * If all cores in this pkg are offline, remove the device.
  665. * coretemp_device_remove calls unregister_platform_device,
  666. * which in turn calls coretemp_remove. This removes the
  667. * pkgtemp entry and does other clean ups.
  668. */
  669. if (!is_any_core_online(pdata))
  670. coretemp_device_remove(cpu);
  671. }
  672. static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
  673. unsigned long action, void *hcpu)
  674. {
  675. unsigned int cpu = (unsigned long) hcpu;
  676. switch (action) {
  677. case CPU_ONLINE:
  678. case CPU_DOWN_FAILED:
  679. get_core_online(cpu);
  680. break;
  681. case CPU_DOWN_PREPARE:
  682. put_core_offline(cpu);
  683. break;
  684. }
  685. return NOTIFY_OK;
  686. }
  687. static struct notifier_block coretemp_cpu_notifier __refdata = {
  688. .notifier_call = coretemp_cpu_callback,
  689. };
  690. static const struct x86_cpu_id __initconst coretemp_ids[] = {
  691. { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
  692. {}
  693. };
  694. MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
  695. static int __init coretemp_init(void)
  696. {
  697. int i, err;
  698. /*
  699. * CPUID.06H.EAX[0] indicates whether the CPU has thermal
  700. * sensors. We check this bit only, all the early CPUs
  701. * without thermal sensors will be filtered out.
  702. */
  703. if (!x86_match_cpu(coretemp_ids))
  704. return -ENODEV;
  705. err = platform_driver_register(&coretemp_driver);
  706. if (err)
  707. goto exit;
  708. get_online_cpus();
  709. for_each_online_cpu(i)
  710. get_core_online(i);
  711. #ifndef CONFIG_HOTPLUG_CPU
  712. if (list_empty(&pdev_list)) {
  713. put_online_cpus();
  714. err = -ENODEV;
  715. goto exit_driver_unreg;
  716. }
  717. #endif
  718. register_hotcpu_notifier(&coretemp_cpu_notifier);
  719. put_online_cpus();
  720. return 0;
  721. #ifndef CONFIG_HOTPLUG_CPU
  722. exit_driver_unreg:
  723. platform_driver_unregister(&coretemp_driver);
  724. #endif
  725. exit:
  726. return err;
  727. }
  728. static void __exit coretemp_exit(void)
  729. {
  730. struct pdev_entry *p, *n;
  731. get_online_cpus();
  732. unregister_hotcpu_notifier(&coretemp_cpu_notifier);
  733. mutex_lock(&pdev_list_mutex);
  734. list_for_each_entry_safe(p, n, &pdev_list, list) {
  735. platform_device_unregister(p->pdev);
  736. list_del(&p->list);
  737. kfree(p);
  738. }
  739. mutex_unlock(&pdev_list_mutex);
  740. put_online_cpus();
  741. platform_driver_unregister(&coretemp_driver);
  742. }
  743. MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
  744. MODULE_DESCRIPTION("Intel Core temperature monitor");
  745. MODULE_LICENSE("GPL");
  746. module_init(coretemp_init)
  747. module_exit(coretemp_exit)