pnav10.c 12 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/etherdevice.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <asm/dma.h>
  17. #include <asm/bfin5xx_spi.h>
  18. #include <asm/portmux.h>
  19. #include <linux/spi/ad7877.h>
  20. /*
  21. * Name the Board for the /proc/cpuinfo
  22. */
  23. const char bfin_board_name[] = "ADI PNAV-1.0";
  24. /*
  25. * Driver needs to know address, irq and flag pin.
  26. */
  27. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  28. static struct resource bfin_pcmcia_cf_resources[] = {
  29. {
  30. .start = 0x20310000, /* IO PORT */
  31. .end = 0x20312000,
  32. .flags = IORESOURCE_MEM,
  33. }, {
  34. .start = 0x20311000, /* Attribute Memory */
  35. .end = 0x20311FFF,
  36. .flags = IORESOURCE_MEM,
  37. }, {
  38. .start = IRQ_PF4,
  39. .end = IRQ_PF4,
  40. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  41. }, {
  42. .start = 6, /* Card Detect PF6 */
  43. .end = 6,
  44. .flags = IORESOURCE_IRQ,
  45. },
  46. };
  47. static struct platform_device bfin_pcmcia_cf_device = {
  48. .name = "bfin_cf_pcmcia",
  49. .id = -1,
  50. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  51. .resource = bfin_pcmcia_cf_resources,
  52. };
  53. #endif
  54. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  55. static struct platform_device rtc_device = {
  56. .name = "rtc-bfin",
  57. .id = -1,
  58. };
  59. #endif
  60. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  61. #include <linux/smc91x.h>
  62. static struct smc91x_platdata smc91x_info = {
  63. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  64. .leda = RPC_LED_100_10,
  65. .ledb = RPC_LED_TX_RX,
  66. };
  67. static struct resource smc91x_resources[] = {
  68. {
  69. .name = "smc91x-regs",
  70. .start = 0x20300300,
  71. .end = 0x20300300 + 16,
  72. .flags = IORESOURCE_MEM,
  73. }, {
  74. .start = IRQ_PF7,
  75. .end = IRQ_PF7,
  76. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  77. },
  78. };
  79. static struct platform_device smc91x_device = {
  80. .name = "smc91x",
  81. .id = 0,
  82. .num_resources = ARRAY_SIZE(smc91x_resources),
  83. .resource = smc91x_resources,
  84. .dev = {
  85. .platform_data = &smc91x_info,
  86. },
  87. };
  88. #endif
  89. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  90. #include <linux/bfin_mac.h>
  91. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  92. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  93. {
  94. .addr = 1,
  95. .irq = IRQ_MAC_PHYINT,
  96. },
  97. };
  98. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  99. .phydev_number = 1,
  100. .phydev_data = bfin_phydev_data,
  101. .phy_mode = PHY_INTERFACE_MODE_RMII,
  102. .mac_peripherals = bfin_mac_peripherals,
  103. };
  104. static struct platform_device bfin_mii_bus = {
  105. .name = "bfin_mii_bus",
  106. .dev = {
  107. .platform_data = &bfin_mii_bus_data,
  108. }
  109. };
  110. static struct platform_device bfin_mac_device = {
  111. .name = "bfin_mac",
  112. .dev = {
  113. .platform_data = &bfin_mii_bus,
  114. }
  115. };
  116. #endif
  117. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  118. static struct resource net2272_bfin_resources[] = {
  119. {
  120. .start = 0x20300000,
  121. .end = 0x20300000 + 0x100,
  122. .flags = IORESOURCE_MEM,
  123. }, {
  124. .start = IRQ_PF7,
  125. .end = IRQ_PF7,
  126. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  127. },
  128. };
  129. static struct platform_device net2272_bfin_device = {
  130. .name = "net2272",
  131. .id = -1,
  132. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  133. .resource = net2272_bfin_resources,
  134. };
  135. #endif
  136. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  137. /* all SPI peripherals info goes here */
  138. #if defined(CONFIG_MTD_M25P80) \
  139. || defined(CONFIG_MTD_M25P80_MODULE)
  140. static struct mtd_partition bfin_spi_flash_partitions[] = {
  141. {
  142. .name = "bootloader(spi)",
  143. .size = 0x00020000,
  144. .offset = 0,
  145. .mask_flags = MTD_CAP_ROM
  146. }, {
  147. .name = "linux kernel(spi)",
  148. .size = 0xe0000,
  149. .offset = 0x20000
  150. }, {
  151. .name = "file system(spi)",
  152. .size = 0x700000,
  153. .offset = 0x00100000,
  154. }
  155. };
  156. static struct flash_platform_data bfin_spi_flash_data = {
  157. .name = "m25p80",
  158. .parts = bfin_spi_flash_partitions,
  159. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  160. .type = "m25p64",
  161. };
  162. /* SPI flash chip (m25p64) */
  163. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  164. .enable_dma = 0, /* use dma transfer with this chip*/
  165. };
  166. #endif
  167. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  168. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  169. .enable_dma = 0,
  170. };
  171. #endif
  172. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  173. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  174. .model = 7877,
  175. .vref_delay_usecs = 50, /* internal, no capacitor */
  176. .x_plate_ohms = 419,
  177. .y_plate_ohms = 486,
  178. .pressure_max = 1000,
  179. .pressure_min = 0,
  180. .stopacq_polarity = 1,
  181. .first_conversion_delay = 3,
  182. .acquisition_time = 1,
  183. .averaging = 1,
  184. .pen_down_acc_interval = 1,
  185. };
  186. #endif
  187. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  188. #if defined(CONFIG_MTD_M25P80) \
  189. || defined(CONFIG_MTD_M25P80_MODULE)
  190. {
  191. /* the modalias must be the same as spi device driver name */
  192. .modalias = "m25p80", /* Name of spi_driver for this device */
  193. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  194. .bus_num = 0, /* Framework bus number */
  195. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  196. .platform_data = &bfin_spi_flash_data,
  197. .controller_data = &spi_flash_chip_info,
  198. .mode = SPI_MODE_3,
  199. },
  200. #endif
  201. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  202. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  203. {
  204. .modalias = "ad183x",
  205. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  206. .bus_num = 0,
  207. .chip_select = 4,
  208. },
  209. #endif
  210. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  211. {
  212. .modalias = "mmc_spi",
  213. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  214. .bus_num = 0,
  215. .chip_select = 5,
  216. .controller_data = &mmc_spi_chip_info,
  217. .mode = SPI_MODE_3,
  218. },
  219. #endif
  220. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  221. {
  222. .modalias = "ad7877",
  223. .platform_data = &bfin_ad7877_ts_info,
  224. .irq = IRQ_PF2,
  225. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  226. .bus_num = 0,
  227. .chip_select = 5,
  228. },
  229. #endif
  230. };
  231. /* SPI (0) */
  232. static struct resource bfin_spi0_resource[] = {
  233. [0] = {
  234. .start = SPI0_REGBASE,
  235. .end = SPI0_REGBASE + 0xFF,
  236. .flags = IORESOURCE_MEM,
  237. },
  238. [1] = {
  239. .start = CH_SPI,
  240. .end = CH_SPI,
  241. .flags = IORESOURCE_DMA,
  242. },
  243. [2] = {
  244. .start = IRQ_SPI,
  245. .end = IRQ_SPI,
  246. .flags = IORESOURCE_IRQ,
  247. },
  248. };
  249. /* SPI controller data */
  250. static struct bfin5xx_spi_master bfin_spi0_info = {
  251. .num_chipselect = 8,
  252. .enable_dma = 1, /* master has the ability to do dma transfer */
  253. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  254. };
  255. static struct platform_device bfin_spi0_device = {
  256. .name = "bfin-spi",
  257. .id = 0, /* Bus number */
  258. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  259. .resource = bfin_spi0_resource,
  260. .dev = {
  261. .platform_data = &bfin_spi0_info, /* Passed to driver */
  262. },
  263. };
  264. #endif /* spi master and devices */
  265. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  266. static struct platform_device bfin_fb_device = {
  267. .name = "bf537-lq035",
  268. };
  269. #endif
  270. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  271. #ifdef CONFIG_SERIAL_BFIN_UART0
  272. static struct resource bfin_uart0_resources[] = {
  273. {
  274. .start = UART0_THR,
  275. .end = UART0_GCTL+2,
  276. .flags = IORESOURCE_MEM,
  277. },
  278. {
  279. .start = IRQ_UART0_RX,
  280. .end = IRQ_UART0_RX+1,
  281. .flags = IORESOURCE_IRQ,
  282. },
  283. {
  284. .start = IRQ_UART0_ERROR,
  285. .end = IRQ_UART0_ERROR,
  286. .flags = IORESOURCE_IRQ,
  287. },
  288. {
  289. .start = CH_UART0_TX,
  290. .end = CH_UART0_TX,
  291. .flags = IORESOURCE_DMA,
  292. },
  293. {
  294. .start = CH_UART0_RX,
  295. .end = CH_UART0_RX,
  296. .flags = IORESOURCE_DMA,
  297. },
  298. };
  299. static unsigned short bfin_uart0_peripherals[] = {
  300. P_UART0_TX, P_UART0_RX, 0
  301. };
  302. static struct platform_device bfin_uart0_device = {
  303. .name = "bfin-uart",
  304. .id = 0,
  305. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  306. .resource = bfin_uart0_resources,
  307. .dev = {
  308. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  309. },
  310. };
  311. #endif
  312. #ifdef CONFIG_SERIAL_BFIN_UART1
  313. static struct resource bfin_uart1_resources[] = {
  314. {
  315. .start = UART1_THR,
  316. .end = UART1_GCTL+2,
  317. .flags = IORESOURCE_MEM,
  318. },
  319. {
  320. .start = IRQ_UART1_RX,
  321. .end = IRQ_UART1_RX+1,
  322. .flags = IORESOURCE_IRQ,
  323. },
  324. {
  325. .start = IRQ_UART1_ERROR,
  326. .end = IRQ_UART1_ERROR,
  327. .flags = IORESOURCE_IRQ,
  328. },
  329. {
  330. .start = CH_UART1_TX,
  331. .end = CH_UART1_TX,
  332. .flags = IORESOURCE_DMA,
  333. },
  334. {
  335. .start = CH_UART1_RX,
  336. .end = CH_UART1_RX,
  337. .flags = IORESOURCE_DMA,
  338. },
  339. };
  340. static unsigned short bfin_uart1_peripherals[] = {
  341. P_UART1_TX, P_UART1_RX, 0
  342. };
  343. static struct platform_device bfin_uart1_device = {
  344. .name = "bfin-uart",
  345. .id = 1,
  346. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  347. .resource = bfin_uart1_resources,
  348. .dev = {
  349. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  350. },
  351. };
  352. #endif
  353. #endif
  354. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  355. #ifdef CONFIG_BFIN_SIR0
  356. static struct resource bfin_sir0_resources[] = {
  357. {
  358. .start = 0xFFC00400,
  359. .end = 0xFFC004FF,
  360. .flags = IORESOURCE_MEM,
  361. },
  362. {
  363. .start = IRQ_UART0_RX,
  364. .end = IRQ_UART0_RX+1,
  365. .flags = IORESOURCE_IRQ,
  366. },
  367. {
  368. .start = CH_UART0_RX,
  369. .end = CH_UART0_RX+1,
  370. .flags = IORESOURCE_DMA,
  371. },
  372. };
  373. static struct platform_device bfin_sir0_device = {
  374. .name = "bfin_sir",
  375. .id = 0,
  376. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  377. .resource = bfin_sir0_resources,
  378. };
  379. #endif
  380. #ifdef CONFIG_BFIN_SIR1
  381. static struct resource bfin_sir1_resources[] = {
  382. {
  383. .start = 0xFFC02000,
  384. .end = 0xFFC020FF,
  385. .flags = IORESOURCE_MEM,
  386. },
  387. {
  388. .start = IRQ_UART1_RX,
  389. .end = IRQ_UART1_RX+1,
  390. .flags = IORESOURCE_IRQ,
  391. },
  392. {
  393. .start = CH_UART1_RX,
  394. .end = CH_UART1_RX+1,
  395. .flags = IORESOURCE_DMA,
  396. },
  397. };
  398. static struct platform_device bfin_sir1_device = {
  399. .name = "bfin_sir",
  400. .id = 1,
  401. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  402. .resource = bfin_sir1_resources,
  403. };
  404. #endif
  405. #endif
  406. static struct platform_device *stamp_devices[] __initdata = {
  407. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  408. &bfin_pcmcia_cf_device,
  409. #endif
  410. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  411. &rtc_device,
  412. #endif
  413. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  414. &smc91x_device,
  415. #endif
  416. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  417. &bfin_mii_bus,
  418. &bfin_mac_device,
  419. #endif
  420. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  421. &net2272_bfin_device,
  422. #endif
  423. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  424. &bfin_spi0_device,
  425. #endif
  426. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  427. &bfin_fb_device,
  428. #endif
  429. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  430. #ifdef CONFIG_SERIAL_BFIN_UART0
  431. &bfin_uart0_device,
  432. #endif
  433. #ifdef CONFIG_SERIAL_BFIN_UART1
  434. &bfin_uart1_device,
  435. #endif
  436. #endif
  437. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  438. #ifdef CONFIG_BFIN_SIR0
  439. &bfin_sir0_device,
  440. #endif
  441. #ifdef CONFIG_BFIN_SIR1
  442. &bfin_sir1_device,
  443. #endif
  444. #endif
  445. };
  446. static int __init pnav_init(void)
  447. {
  448. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  449. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  450. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  451. spi_register_board_info(bfin_spi_board_info,
  452. ARRAY_SIZE(bfin_spi_board_info));
  453. #endif
  454. return 0;
  455. }
  456. arch_initcall(pnav_init);
  457. static struct platform_device *stamp_early_devices[] __initdata = {
  458. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  459. #ifdef CONFIG_SERIAL_BFIN_UART0
  460. &bfin_uart0_device,
  461. #endif
  462. #ifdef CONFIG_SERIAL_BFIN_UART1
  463. &bfin_uart1_device,
  464. #endif
  465. #endif
  466. };
  467. void __init native_machine_early_platform_add_devices(void)
  468. {
  469. printk(KERN_INFO "register early platform devices\n");
  470. early_platform_add_devices(stamp_early_devices,
  471. ARRAY_SIZE(stamp_early_devices));
  472. }
  473. void bfin_get_ether_addr(char *addr)
  474. {
  475. random_ether_addr(addr);
  476. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  477. }
  478. EXPORT_SYMBOL(bfin_get_ether_addr);