H8606.c 11 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2007-2008 HV Sistemas S.L.
  4. * Javier Herrero <jherrero@hvsistemas.es>
  5. * 2005 National ICT Australia (NICTA)
  6. * Aidan Williams <aidan@nicta.com.au>
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #include <linux/device.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  17. #include <linux/usb/isp1362.h>
  18. #endif
  19. #include <linux/irq.h>
  20. #include <asm/dma.h>
  21. #include <asm/bfin5xx_spi.h>
  22. #include <asm/reboot.h>
  23. #include <asm/portmux.h>
  24. /*
  25. * Name the Board for the /proc/cpuinfo
  26. */
  27. const char bfin_board_name[] = "HV Sistemas H8606";
  28. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  29. static struct platform_device rtc_device = {
  30. .name = "rtc-bfin",
  31. .id = -1,
  32. };
  33. #endif
  34. /*
  35. * Driver needs to know address, irq and flag pin.
  36. */
  37. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  38. static struct resource dm9000_resources[] = {
  39. [0] = {
  40. .start = 0x20300000,
  41. .end = 0x20300002,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = 0x20300004,
  46. .end = 0x20300006,
  47. .flags = IORESOURCE_MEM,
  48. },
  49. [2] = {
  50. .start = IRQ_PF10,
  51. .end = IRQ_PF10,
  52. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH),
  53. },
  54. };
  55. static struct platform_device dm9000_device = {
  56. .id = 0,
  57. .name = "dm9000",
  58. .resource = dm9000_resources,
  59. .num_resources = ARRAY_SIZE(dm9000_resources),
  60. };
  61. #endif
  62. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  63. #include <linux/smc91x.h>
  64. static struct smc91x_platdata smc91x_info = {
  65. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  66. .leda = RPC_LED_100_10,
  67. .ledb = RPC_LED_TX_RX,
  68. };
  69. static struct resource smc91x_resources[] = {
  70. {
  71. .name = "smc91x-regs",
  72. .start = 0x20300300,
  73. .end = 0x20300300 + 16,
  74. .flags = IORESOURCE_MEM,
  75. }, {
  76. .start = IRQ_PROG_INTB,
  77. .end = IRQ_PROG_INTB,
  78. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  79. }, {
  80. .start = IRQ_PF7,
  81. .end = IRQ_PF7,
  82. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  83. },
  84. };
  85. static struct platform_device smc91x_device = {
  86. .name = "smc91x",
  87. .id = 0,
  88. .num_resources = ARRAY_SIZE(smc91x_resources),
  89. .resource = smc91x_resources,
  90. .dev = {
  91. .platform_data = &smc91x_info,
  92. },
  93. };
  94. #endif
  95. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  96. static struct resource net2272_bfin_resources[] = {
  97. {
  98. .start = 0x20300000,
  99. .end = 0x20300000 + 0x100,
  100. .flags = IORESOURCE_MEM,
  101. }, {
  102. .start = IRQ_PF10,
  103. .end = IRQ_PF10,
  104. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  105. },
  106. };
  107. static struct platform_device net2272_bfin_device = {
  108. .name = "net2272",
  109. .id = -1,
  110. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  111. .resource = net2272_bfin_resources,
  112. };
  113. #endif
  114. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  115. /* all SPI peripherals info goes here */
  116. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  117. static struct mtd_partition bfin_spi_flash_partitions[] = {
  118. {
  119. .name = "bootloader (spi)",
  120. .size = 0x40000,
  121. .offset = 0,
  122. .mask_flags = MTD_CAP_ROM
  123. }, {
  124. .name = "fpga (spi)",
  125. .size = 0x30000,
  126. .offset = 0x40000
  127. }, {
  128. .name = "linux kernel (spi)",
  129. .size = 0x150000,
  130. .offset = 0x70000
  131. }, {
  132. .name = "jffs2 root file system (spi)",
  133. .size = 0x640000,
  134. .offset = 0x1c0000,
  135. }
  136. };
  137. static struct flash_platform_data bfin_spi_flash_data = {
  138. .name = "m25p80",
  139. .parts = bfin_spi_flash_partitions,
  140. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  141. .type = "m25p64",
  142. };
  143. /* SPI flash chip (m25p64) */
  144. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  145. .enable_dma = 0, /* use dma transfer with this chip*/
  146. };
  147. #endif
  148. /* Notice: for blackfin, the speed_hz is the value of register
  149. * SPI_BAUD, not the real baudrate */
  150. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  151. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  152. {
  153. /* the modalias must be the same as spi device driver name */
  154. .modalias = "m25p80", /* Name of spi_driver for this device */
  155. /* this value is the baudrate divisor */
  156. .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
  157. .bus_num = 0, /* Framework bus number */
  158. .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
  159. .platform_data = &bfin_spi_flash_data,
  160. .controller_data = &spi_flash_chip_info,
  161. .mode = SPI_MODE_3,
  162. },
  163. #endif
  164. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  165. {
  166. .modalias = "ad183x",
  167. .max_speed_hz = 16,
  168. .bus_num = 1,
  169. .chip_select = 4,
  170. },
  171. #endif
  172. };
  173. /* SPI (0) */
  174. static struct resource bfin_spi0_resource[] = {
  175. [0] = {
  176. .start = SPI0_REGBASE,
  177. .end = SPI0_REGBASE + 0xFF,
  178. .flags = IORESOURCE_MEM,
  179. },
  180. [1] = {
  181. .start = CH_SPI,
  182. .end = CH_SPI,
  183. .flags = IORESOURCE_DMA,
  184. },
  185. [2] = {
  186. .start = IRQ_SPI,
  187. .end = IRQ_SPI,
  188. .flags = IORESOURCE_IRQ,
  189. }
  190. };
  191. /* SPI controller data */
  192. static struct bfin5xx_spi_master bfin_spi0_info = {
  193. .num_chipselect = 8,
  194. .enable_dma = 1, /* master has the ability to do dma transfer */
  195. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  196. };
  197. static struct platform_device bfin_spi0_device = {
  198. .name = "bfin-spi",
  199. .id = 0, /* Bus number */
  200. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  201. .resource = bfin_spi0_resource,
  202. .dev = {
  203. .platform_data = &bfin_spi0_info, /* Passed to driver */
  204. },
  205. };
  206. #endif /* spi master and devices */
  207. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  208. #ifdef CONFIG_SERIAL_BFIN_UART0
  209. static struct resource bfin_uart0_resources[] = {
  210. {
  211. .start = BFIN_UART_THR,
  212. .end = BFIN_UART_GCTL+2,
  213. .flags = IORESOURCE_MEM,
  214. },
  215. {
  216. .start = IRQ_UART0_RX,
  217. .end = IRQ_UART0_RX + 1,
  218. .flags = IORESOURCE_IRQ,
  219. },
  220. {
  221. .start = IRQ_UART0_ERROR,
  222. .end = IRQ_UART0_ERROR,
  223. .flags = IORESOURCE_IRQ,
  224. },
  225. {
  226. .start = CH_UART0_TX,
  227. .end = CH_UART0_TX,
  228. .flags = IORESOURCE_DMA,
  229. },
  230. {
  231. .start = CH_UART0_RX,
  232. .end = CH_UART0_RX,
  233. .flags = IORESOURCE_DMA,
  234. },
  235. };
  236. static unsigned short bfin_uart0_peripherals[] = {
  237. P_UART0_TX, P_UART0_RX, 0
  238. };
  239. static struct platform_device bfin_uart0_device = {
  240. .name = "bfin-uart",
  241. .id = 0,
  242. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  243. .resource = bfin_uart0_resources,
  244. .dev = {
  245. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  246. },
  247. };
  248. #endif
  249. #endif
  250. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  251. #ifdef CONFIG_BFIN_SIR0
  252. static struct resource bfin_sir0_resources[] = {
  253. {
  254. .start = 0xFFC00400,
  255. .end = 0xFFC004FF,
  256. .flags = IORESOURCE_MEM,
  257. },
  258. {
  259. .start = IRQ_UART0_RX,
  260. .end = IRQ_UART0_RX+1,
  261. .flags = IORESOURCE_IRQ,
  262. },
  263. {
  264. .start = CH_UART0_RX,
  265. .end = CH_UART0_RX+1,
  266. .flags = IORESOURCE_DMA,
  267. },
  268. };
  269. static struct platform_device bfin_sir0_device = {
  270. .name = "bfin_sir",
  271. .id = 0,
  272. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  273. .resource = bfin_sir0_resources,
  274. };
  275. #endif
  276. #endif
  277. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  278. #include <linux/serial_8250.h>
  279. #include <linux/serial.h>
  280. /*
  281. * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
  282. * running at half system clock, both with interrupt output or-ed to PF8. Change to
  283. * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
  284. */
  285. static struct plat_serial8250_port serial8250_platform_data [] = {
  286. {
  287. .membase = (void *)0x20200000,
  288. .mapbase = 0x20200000,
  289. .irq = IRQ_PF8,
  290. .irqflags = IRQF_TRIGGER_HIGH,
  291. .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
  292. .iotype = UPIO_MEM,
  293. .regshift = 1,
  294. .uartclk = 66666667,
  295. }, {
  296. .membase = (void *)0x20200010,
  297. .mapbase = 0x20200010,
  298. .irq = IRQ_PF8,
  299. .irqflags = IRQF_TRIGGER_HIGH,
  300. .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
  301. .iotype = UPIO_MEM,
  302. .regshift = 1,
  303. .uartclk = 66666667,
  304. }, {
  305. }
  306. };
  307. static struct platform_device serial8250_device = {
  308. .id = PLAT8250_DEV_PLATFORM,
  309. .name = "serial8250",
  310. .dev = {
  311. .platform_data = serial8250_platform_data,
  312. },
  313. };
  314. #endif
  315. #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
  316. /*
  317. * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
  318. * interrupt output wired to PF9. Change to suit different FPGA configuration
  319. */
  320. static struct resource opencores_kbd_resources[] = {
  321. [0] = {
  322. .start = 0x20200030,
  323. .end = 0x20300030 + 2,
  324. .flags = IORESOURCE_MEM,
  325. },
  326. [1] = {
  327. .start = IRQ_PF9,
  328. .end = IRQ_PF9,
  329. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  330. },
  331. };
  332. static struct platform_device opencores_kbd_device = {
  333. .id = -1,
  334. .name = "opencores-kbd",
  335. .resource = opencores_kbd_resources,
  336. .num_resources = ARRAY_SIZE(opencores_kbd_resources),
  337. };
  338. #endif
  339. static struct platform_device *h8606_devices[] __initdata = {
  340. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  341. &rtc_device,
  342. #endif
  343. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  344. &dm9000_device,
  345. #endif
  346. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  347. &smc91x_device,
  348. #endif
  349. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  350. &net2272_bfin_device,
  351. #endif
  352. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  353. &bfin_spi0_device,
  354. #endif
  355. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  356. #ifdef CONFIG_SERIAL_BFIN_UART0
  357. &bfin_uart0_device,
  358. #endif
  359. #endif
  360. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  361. &serial8250_device,
  362. #endif
  363. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  364. #ifdef CONFIG_BFIN_SIR0
  365. &bfin_sir0_device,
  366. #endif
  367. #endif
  368. #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
  369. &opencores_kbd_device,
  370. #endif
  371. };
  372. static int __init H8606_init(void)
  373. {
  374. printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
  375. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  376. platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
  377. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  378. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  379. #endif
  380. return 0;
  381. }
  382. arch_initcall(H8606_init);
  383. static struct platform_device *H8606_early_devices[] __initdata = {
  384. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  385. #ifdef CONFIG_SERIAL_BFIN_UART0
  386. &bfin_uart0_device,
  387. #endif
  388. #endif
  389. };
  390. void __init native_machine_early_platform_add_devices(void)
  391. {
  392. printk(KERN_INFO "register early platform devices\n");
  393. early_platform_add_devices(H8606_early_devices,
  394. ARRAY_SIZE(H8606_early_devices));
  395. }