i2s.c 29 KB

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  1. /* sound/soc/samsung/i2s.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6. * Jaswinder Singh <jassisinghbrar@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/slab.h>
  14. #include <linux/clk.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/of.h>
  18. #include <linux/of_gpio.h>
  19. #include <linux/pm_runtime.h>
  20. #include <sound/soc.h>
  21. #include <sound/pcm_params.h>
  22. #include <mach/dma.h>
  23. #include <linux/platform_data/asoc-s3c.h>
  24. #include "dma.h"
  25. #include "idma.h"
  26. #include "i2s.h"
  27. #include "i2s-regs.h"
  28. #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  29. enum samsung_dai_type {
  30. TYPE_PRI,
  31. TYPE_SEC,
  32. };
  33. struct samsung_i2s_dai_data {
  34. int dai_type;
  35. };
  36. struct i2s_dai {
  37. /* Platform device for this DAI */
  38. struct platform_device *pdev;
  39. /* IOREMAP'd SFRs */
  40. void __iomem *addr;
  41. /* Physical base address of SFRs */
  42. u32 base;
  43. /* Rate of RCLK source clock */
  44. unsigned long rclk_srcrate;
  45. /* Frame Clock */
  46. unsigned frmclk;
  47. /*
  48. * Specifically requested RCLK,BCLK by MACHINE Driver.
  49. * 0 indicates CPU driver is free to choose any value.
  50. */
  51. unsigned rfs, bfs;
  52. /* I2S Controller's core clock */
  53. struct clk *clk;
  54. /* Clock for generating I2S signals */
  55. struct clk *op_clk;
  56. /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  57. struct i2s_dai *pri_dai;
  58. /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  59. struct i2s_dai *sec_dai;
  60. #define DAI_OPENED (1 << 0) /* Dai is opened */
  61. #define DAI_MANAGER (1 << 1) /* Dai is the manager */
  62. unsigned mode;
  63. /* Driver for this DAI */
  64. struct snd_soc_dai_driver i2s_dai_drv;
  65. /* DMA parameters */
  66. struct s3c_dma_params dma_playback;
  67. struct s3c_dma_params dma_capture;
  68. struct s3c_dma_params idma_playback;
  69. u32 quirks;
  70. u32 suspend_i2smod;
  71. u32 suspend_i2scon;
  72. u32 suspend_i2spsr;
  73. unsigned long gpios[7]; /* i2s gpio line numbers */
  74. };
  75. /* Lock for cross i/f checks */
  76. static DEFINE_SPINLOCK(lock);
  77. /* If this is the 'overlay' stereo DAI */
  78. static inline bool is_secondary(struct i2s_dai *i2s)
  79. {
  80. return i2s->pri_dai ? true : false;
  81. }
  82. /* If operating in SoC-Slave mode */
  83. static inline bool is_slave(struct i2s_dai *i2s)
  84. {
  85. return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
  86. }
  87. /* If this interface of the controller is transmitting data */
  88. static inline bool tx_active(struct i2s_dai *i2s)
  89. {
  90. u32 active;
  91. if (!i2s)
  92. return false;
  93. active = readl(i2s->addr + I2SCON);
  94. if (is_secondary(i2s))
  95. active &= CON_TXSDMA_ACTIVE;
  96. else
  97. active &= CON_TXDMA_ACTIVE;
  98. return active ? true : false;
  99. }
  100. /* If the other interface of the controller is transmitting data */
  101. static inline bool other_tx_active(struct i2s_dai *i2s)
  102. {
  103. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  104. return tx_active(other);
  105. }
  106. /* If any interface of the controller is transmitting data */
  107. static inline bool any_tx_active(struct i2s_dai *i2s)
  108. {
  109. return tx_active(i2s) || other_tx_active(i2s);
  110. }
  111. /* If this interface of the controller is receiving data */
  112. static inline bool rx_active(struct i2s_dai *i2s)
  113. {
  114. u32 active;
  115. if (!i2s)
  116. return false;
  117. active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
  118. return active ? true : false;
  119. }
  120. /* If the other interface of the controller is receiving data */
  121. static inline bool other_rx_active(struct i2s_dai *i2s)
  122. {
  123. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  124. return rx_active(other);
  125. }
  126. /* If any interface of the controller is receiving data */
  127. static inline bool any_rx_active(struct i2s_dai *i2s)
  128. {
  129. return rx_active(i2s) || other_rx_active(i2s);
  130. }
  131. /* If the other DAI is transmitting or receiving data */
  132. static inline bool other_active(struct i2s_dai *i2s)
  133. {
  134. return other_rx_active(i2s) || other_tx_active(i2s);
  135. }
  136. /* If this DAI is transmitting or receiving data */
  137. static inline bool this_active(struct i2s_dai *i2s)
  138. {
  139. return tx_active(i2s) || rx_active(i2s);
  140. }
  141. /* If the controller is active anyway */
  142. static inline bool any_active(struct i2s_dai *i2s)
  143. {
  144. return this_active(i2s) || other_active(i2s);
  145. }
  146. static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
  147. {
  148. return snd_soc_dai_get_drvdata(dai);
  149. }
  150. static inline bool is_opened(struct i2s_dai *i2s)
  151. {
  152. if (i2s && (i2s->mode & DAI_OPENED))
  153. return true;
  154. else
  155. return false;
  156. }
  157. static inline bool is_manager(struct i2s_dai *i2s)
  158. {
  159. if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
  160. return true;
  161. else
  162. return false;
  163. }
  164. /* Read RCLK of I2S (in multiples of LRCLK) */
  165. static inline unsigned get_rfs(struct i2s_dai *i2s)
  166. {
  167. u32 rfs = (readl(i2s->addr + I2SMOD) >> MOD_RCLK_SHIFT);
  168. rfs &= MOD_RCLK_MASK;
  169. switch (rfs) {
  170. case 3: return 768;
  171. case 2: return 384;
  172. case 1: return 512;
  173. default: return 256;
  174. }
  175. }
  176. /* Write RCLK of I2S (in multiples of LRCLK) */
  177. static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
  178. {
  179. u32 mod = readl(i2s->addr + I2SMOD);
  180. int rfs_shift = MOD_RCLK_SHIFT;
  181. mod &= ~(MOD_RCLK_MASK << rfs_shift);
  182. switch (rfs) {
  183. case 768:
  184. mod |= (MOD_RCLK_768FS << rfs_shift);
  185. break;
  186. case 512:
  187. mod |= (MOD_RCLK_512FS << rfs_shift);
  188. break;
  189. case 384:
  190. mod |= (MOD_RCLK_384FS << rfs_shift);
  191. break;
  192. default:
  193. mod |= (MOD_RCLK_256FS << rfs_shift);
  194. break;
  195. }
  196. writel(mod, i2s->addr + I2SMOD);
  197. }
  198. /* Read Bit-Clock of I2S (in multiples of LRCLK) */
  199. static inline unsigned get_bfs(struct i2s_dai *i2s)
  200. {
  201. u32 bfs = readl(i2s->addr + I2SMOD) >> MOD_BCLK_SHIFT;
  202. bfs &= MOD_BCLK_MASK;
  203. switch (bfs) {
  204. case 3: return 24;
  205. case 2: return 16;
  206. case 1: return 48;
  207. default: return 32;
  208. }
  209. }
  210. /* Write Bit-Clock of I2S (in multiples of LRCLK) */
  211. static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
  212. {
  213. u32 mod = readl(i2s->addr + I2SMOD);
  214. int bfs_shift = MOD_BCLK_SHIFT;
  215. mod &= ~(MOD_BCLK_MASK << bfs_shift);
  216. switch (bfs) {
  217. case 48:
  218. mod |= (MOD_BCLK_48FS << bfs_shift);
  219. break;
  220. case 32:
  221. mod |= (MOD_BCLK_32FS << bfs_shift);
  222. break;
  223. case 24:
  224. mod |= (MOD_BCLK_24FS << bfs_shift);
  225. break;
  226. case 16:
  227. mod |= (MOD_BCLK_16FS << bfs_shift);
  228. break;
  229. default:
  230. dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
  231. return;
  232. }
  233. writel(mod, i2s->addr + I2SMOD);
  234. }
  235. /* Sample-Size */
  236. static inline int get_blc(struct i2s_dai *i2s)
  237. {
  238. int blc = readl(i2s->addr + I2SMOD);
  239. blc = (blc >> 13) & 0x3;
  240. switch (blc) {
  241. case 2: return 24;
  242. case 1: return 8;
  243. default: return 16;
  244. }
  245. }
  246. /* TX Channel Control */
  247. static void i2s_txctrl(struct i2s_dai *i2s, int on)
  248. {
  249. void __iomem *addr = i2s->addr;
  250. u32 con = readl(addr + I2SCON);
  251. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  252. if (on) {
  253. con |= CON_ACTIVE;
  254. con &= ~CON_TXCH_PAUSE;
  255. if (is_secondary(i2s)) {
  256. con |= CON_TXSDMA_ACTIVE;
  257. con &= ~CON_TXSDMA_PAUSE;
  258. } else {
  259. con |= CON_TXDMA_ACTIVE;
  260. con &= ~CON_TXDMA_PAUSE;
  261. }
  262. if (any_rx_active(i2s))
  263. mod |= MOD_TXRX;
  264. else
  265. mod |= MOD_TXONLY;
  266. } else {
  267. if (is_secondary(i2s)) {
  268. con |= CON_TXSDMA_PAUSE;
  269. con &= ~CON_TXSDMA_ACTIVE;
  270. } else {
  271. con |= CON_TXDMA_PAUSE;
  272. con &= ~CON_TXDMA_ACTIVE;
  273. }
  274. if (other_tx_active(i2s)) {
  275. writel(con, addr + I2SCON);
  276. return;
  277. }
  278. con |= CON_TXCH_PAUSE;
  279. if (any_rx_active(i2s))
  280. mod |= MOD_RXONLY;
  281. else
  282. con &= ~CON_ACTIVE;
  283. }
  284. writel(mod, addr + I2SMOD);
  285. writel(con, addr + I2SCON);
  286. }
  287. /* RX Channel Control */
  288. static void i2s_rxctrl(struct i2s_dai *i2s, int on)
  289. {
  290. void __iomem *addr = i2s->addr;
  291. u32 con = readl(addr + I2SCON);
  292. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  293. if (on) {
  294. con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
  295. con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
  296. if (any_tx_active(i2s))
  297. mod |= MOD_TXRX;
  298. else
  299. mod |= MOD_RXONLY;
  300. } else {
  301. con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
  302. con &= ~CON_RXDMA_ACTIVE;
  303. if (any_tx_active(i2s))
  304. mod |= MOD_TXONLY;
  305. else
  306. con &= ~CON_ACTIVE;
  307. }
  308. writel(mod, addr + I2SMOD);
  309. writel(con, addr + I2SCON);
  310. }
  311. /* Flush FIFO of an interface */
  312. static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
  313. {
  314. void __iomem *fic;
  315. u32 val;
  316. if (!i2s)
  317. return;
  318. if (is_secondary(i2s))
  319. fic = i2s->addr + I2SFICS;
  320. else
  321. fic = i2s->addr + I2SFIC;
  322. /* Flush the FIFO */
  323. writel(readl(fic) | flush, fic);
  324. /* Be patient */
  325. val = msecs_to_loops(1) / 1000; /* 1 usec */
  326. while (--val)
  327. cpu_relax();
  328. writel(readl(fic) & ~flush, fic);
  329. }
  330. static int i2s_set_sysclk(struct snd_soc_dai *dai,
  331. int clk_id, unsigned int rfs, int dir)
  332. {
  333. struct i2s_dai *i2s = to_info(dai);
  334. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  335. u32 mod = readl(i2s->addr + I2SMOD);
  336. switch (clk_id) {
  337. case SAMSUNG_I2S_CDCLK:
  338. /* Shouldn't matter in GATING(CLOCK_IN) mode */
  339. if (dir == SND_SOC_CLOCK_IN)
  340. rfs = 0;
  341. if ((rfs && other->rfs && (other->rfs != rfs)) ||
  342. (any_active(i2s) &&
  343. (((dir == SND_SOC_CLOCK_IN)
  344. && !(mod & MOD_CDCLKCON)) ||
  345. ((dir == SND_SOC_CLOCK_OUT)
  346. && (mod & MOD_CDCLKCON))))) {
  347. dev_err(&i2s->pdev->dev,
  348. "%s:%d Other DAI busy\n", __func__, __LINE__);
  349. return -EAGAIN;
  350. }
  351. if (dir == SND_SOC_CLOCK_IN)
  352. mod |= MOD_CDCLKCON;
  353. else
  354. mod &= ~MOD_CDCLKCON;
  355. i2s->rfs = rfs;
  356. break;
  357. case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
  358. case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
  359. if ((i2s->quirks & QUIRK_NO_MUXPSR)
  360. || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
  361. clk_id = 0;
  362. else
  363. clk_id = 1;
  364. if (!any_active(i2s)) {
  365. if (i2s->op_clk) {
  366. if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
  367. (!clk_id && (mod & MOD_IMS_SYSMUX))) {
  368. clk_disable_unprepare(i2s->op_clk);
  369. clk_put(i2s->op_clk);
  370. } else {
  371. i2s->rclk_srcrate =
  372. clk_get_rate(i2s->op_clk);
  373. return 0;
  374. }
  375. }
  376. if (clk_id)
  377. i2s->op_clk = clk_get(&i2s->pdev->dev,
  378. "i2s_opclk1");
  379. else
  380. i2s->op_clk = clk_get(&i2s->pdev->dev,
  381. "i2s_opclk0");
  382. clk_prepare_enable(i2s->op_clk);
  383. i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
  384. /* Over-ride the other's */
  385. if (other) {
  386. other->op_clk = i2s->op_clk;
  387. other->rclk_srcrate = i2s->rclk_srcrate;
  388. }
  389. } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
  390. || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
  391. dev_err(&i2s->pdev->dev,
  392. "%s:%d Other DAI busy\n", __func__, __LINE__);
  393. return -EAGAIN;
  394. } else {
  395. /* Call can't be on the active DAI */
  396. i2s->op_clk = other->op_clk;
  397. i2s->rclk_srcrate = other->rclk_srcrate;
  398. return 0;
  399. }
  400. if (clk_id == 0)
  401. mod &= ~MOD_IMS_SYSMUX;
  402. else
  403. mod |= MOD_IMS_SYSMUX;
  404. break;
  405. default:
  406. dev_err(&i2s->pdev->dev, "We don't serve that!\n");
  407. return -EINVAL;
  408. }
  409. writel(mod, i2s->addr + I2SMOD);
  410. return 0;
  411. }
  412. static int i2s_set_fmt(struct snd_soc_dai *dai,
  413. unsigned int fmt)
  414. {
  415. struct i2s_dai *i2s = to_info(dai);
  416. u32 mod = readl(i2s->addr + I2SMOD);
  417. int lrp_shift = MOD_LRP_SHIFT, sdf_shift = MOD_SDF_SHIFT;
  418. int sdf_mask, lrp_rlow;
  419. u32 tmp = 0;
  420. sdf_mask = MOD_SDF_MASK << sdf_shift;
  421. lrp_rlow = MOD_LR_RLOW << lrp_shift;
  422. /* Format is priority */
  423. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  424. case SND_SOC_DAIFMT_RIGHT_J:
  425. tmp |= lrp_rlow;
  426. tmp |= (MOD_SDF_MSB << sdf_shift);
  427. break;
  428. case SND_SOC_DAIFMT_LEFT_J:
  429. tmp |= lrp_rlow;
  430. tmp |= (MOD_SDF_LSB << sdf_shift);
  431. break;
  432. case SND_SOC_DAIFMT_I2S:
  433. tmp |= (MOD_SDF_IIS << sdf_shift);
  434. break;
  435. default:
  436. dev_err(&i2s->pdev->dev, "Format not supported\n");
  437. return -EINVAL;
  438. }
  439. /*
  440. * INV flag is relative to the FORMAT flag - if set it simply
  441. * flips the polarity specified by the Standard
  442. */
  443. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  444. case SND_SOC_DAIFMT_NB_NF:
  445. break;
  446. case SND_SOC_DAIFMT_NB_IF:
  447. if (tmp & lrp_rlow)
  448. tmp &= ~lrp_rlow;
  449. else
  450. tmp |= lrp_rlow;
  451. break;
  452. default:
  453. dev_err(&i2s->pdev->dev, "Polarity not supported\n");
  454. return -EINVAL;
  455. }
  456. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  457. case SND_SOC_DAIFMT_CBM_CFM:
  458. tmp |= MOD_SLAVE;
  459. break;
  460. case SND_SOC_DAIFMT_CBS_CFS:
  461. /* Set default source clock in Master mode */
  462. if (i2s->rclk_srcrate == 0)
  463. i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
  464. 0, SND_SOC_CLOCK_IN);
  465. break;
  466. default:
  467. dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
  468. return -EINVAL;
  469. }
  470. /*
  471. * Don't change the I2S mode if any controller is active on this
  472. * channel.
  473. */
  474. if (any_active(i2s) &&
  475. ((mod & (sdf_mask | lrp_rlow | MOD_SLAVE)) != tmp)) {
  476. dev_err(&i2s->pdev->dev,
  477. "%s:%d Other DAI busy\n", __func__, __LINE__);
  478. return -EAGAIN;
  479. }
  480. mod &= ~(sdf_mask | lrp_rlow | MOD_SLAVE);
  481. mod |= tmp;
  482. writel(mod, i2s->addr + I2SMOD);
  483. return 0;
  484. }
  485. static int i2s_hw_params(struct snd_pcm_substream *substream,
  486. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  487. {
  488. struct i2s_dai *i2s = to_info(dai);
  489. u32 mod = readl(i2s->addr + I2SMOD);
  490. if (!is_secondary(i2s))
  491. mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
  492. switch (params_channels(params)) {
  493. case 6:
  494. mod |= MOD_DC2_EN;
  495. case 4:
  496. mod |= MOD_DC1_EN;
  497. break;
  498. case 2:
  499. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  500. i2s->dma_playback.dma_size = 4;
  501. else
  502. i2s->dma_capture.dma_size = 4;
  503. break;
  504. case 1:
  505. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  506. i2s->dma_playback.dma_size = 2;
  507. else
  508. i2s->dma_capture.dma_size = 2;
  509. break;
  510. default:
  511. dev_err(&i2s->pdev->dev, "%d channels not supported\n",
  512. params_channels(params));
  513. return -EINVAL;
  514. }
  515. if (is_secondary(i2s))
  516. mod &= ~MOD_BLCS_MASK;
  517. else
  518. mod &= ~MOD_BLCP_MASK;
  519. if (is_manager(i2s))
  520. mod &= ~MOD_BLC_MASK;
  521. switch (params_format(params)) {
  522. case SNDRV_PCM_FORMAT_S8:
  523. if (is_secondary(i2s))
  524. mod |= MOD_BLCS_8BIT;
  525. else
  526. mod |= MOD_BLCP_8BIT;
  527. if (is_manager(i2s))
  528. mod |= MOD_BLC_8BIT;
  529. break;
  530. case SNDRV_PCM_FORMAT_S16_LE:
  531. if (is_secondary(i2s))
  532. mod |= MOD_BLCS_16BIT;
  533. else
  534. mod |= MOD_BLCP_16BIT;
  535. if (is_manager(i2s))
  536. mod |= MOD_BLC_16BIT;
  537. break;
  538. case SNDRV_PCM_FORMAT_S24_LE:
  539. if (is_secondary(i2s))
  540. mod |= MOD_BLCS_24BIT;
  541. else
  542. mod |= MOD_BLCP_24BIT;
  543. if (is_manager(i2s))
  544. mod |= MOD_BLC_24BIT;
  545. break;
  546. default:
  547. dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
  548. params_format(params));
  549. return -EINVAL;
  550. }
  551. writel(mod, i2s->addr + I2SMOD);
  552. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  553. snd_soc_dai_set_dma_data(dai, substream,
  554. (void *)&i2s->dma_playback);
  555. else
  556. snd_soc_dai_set_dma_data(dai, substream,
  557. (void *)&i2s->dma_capture);
  558. i2s->frmclk = params_rate(params);
  559. return 0;
  560. }
  561. /* We set constraints on the substream acc to the version of I2S */
  562. static int i2s_startup(struct snd_pcm_substream *substream,
  563. struct snd_soc_dai *dai)
  564. {
  565. struct i2s_dai *i2s = to_info(dai);
  566. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  567. unsigned long flags;
  568. spin_lock_irqsave(&lock, flags);
  569. i2s->mode |= DAI_OPENED;
  570. if (is_manager(other))
  571. i2s->mode &= ~DAI_MANAGER;
  572. else
  573. i2s->mode |= DAI_MANAGER;
  574. /* Enforce set_sysclk in Master mode */
  575. i2s->rclk_srcrate = 0;
  576. if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
  577. writel(CON_RSTCLR, i2s->addr + I2SCON);
  578. spin_unlock_irqrestore(&lock, flags);
  579. return 0;
  580. }
  581. static void i2s_shutdown(struct snd_pcm_substream *substream,
  582. struct snd_soc_dai *dai)
  583. {
  584. struct i2s_dai *i2s = to_info(dai);
  585. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  586. unsigned long flags;
  587. spin_lock_irqsave(&lock, flags);
  588. i2s->mode &= ~DAI_OPENED;
  589. i2s->mode &= ~DAI_MANAGER;
  590. if (is_opened(other))
  591. other->mode |= DAI_MANAGER;
  592. /* Reset any constraint on RFS and BFS */
  593. i2s->rfs = 0;
  594. i2s->bfs = 0;
  595. spin_unlock_irqrestore(&lock, flags);
  596. /* Gate CDCLK by default */
  597. if (!is_opened(other))
  598. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  599. 0, SND_SOC_CLOCK_IN);
  600. }
  601. static int config_setup(struct i2s_dai *i2s)
  602. {
  603. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  604. unsigned rfs, bfs, blc;
  605. u32 psr;
  606. blc = get_blc(i2s);
  607. bfs = i2s->bfs;
  608. if (!bfs && other)
  609. bfs = other->bfs;
  610. /* Select least possible multiple(2) if no constraint set */
  611. if (!bfs)
  612. bfs = blc * 2;
  613. rfs = i2s->rfs;
  614. if (!rfs && other)
  615. rfs = other->rfs;
  616. if ((rfs == 256 || rfs == 512) && (blc == 24)) {
  617. dev_err(&i2s->pdev->dev,
  618. "%d-RFS not supported for 24-blc\n", rfs);
  619. return -EINVAL;
  620. }
  621. if (!rfs) {
  622. if (bfs == 16 || bfs == 32)
  623. rfs = 256;
  624. else
  625. rfs = 384;
  626. }
  627. /* If already setup and running */
  628. if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
  629. dev_err(&i2s->pdev->dev,
  630. "%s:%d Other DAI busy\n", __func__, __LINE__);
  631. return -EAGAIN;
  632. }
  633. /* Don't bother RFS, BFS & PSR in Slave mode */
  634. if (is_slave(i2s))
  635. return 0;
  636. set_bfs(i2s, bfs);
  637. set_rfs(i2s, rfs);
  638. if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
  639. psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
  640. writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
  641. dev_dbg(&i2s->pdev->dev,
  642. "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
  643. i2s->rclk_srcrate, psr, rfs, bfs);
  644. }
  645. return 0;
  646. }
  647. static int i2s_trigger(struct snd_pcm_substream *substream,
  648. int cmd, struct snd_soc_dai *dai)
  649. {
  650. int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
  651. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  652. struct i2s_dai *i2s = to_info(rtd->cpu_dai);
  653. unsigned long flags;
  654. switch (cmd) {
  655. case SNDRV_PCM_TRIGGER_START:
  656. case SNDRV_PCM_TRIGGER_RESUME:
  657. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  658. local_irq_save(flags);
  659. if (config_setup(i2s)) {
  660. local_irq_restore(flags);
  661. return -EINVAL;
  662. }
  663. if (capture)
  664. i2s_rxctrl(i2s, 1);
  665. else
  666. i2s_txctrl(i2s, 1);
  667. local_irq_restore(flags);
  668. break;
  669. case SNDRV_PCM_TRIGGER_STOP:
  670. case SNDRV_PCM_TRIGGER_SUSPEND:
  671. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  672. local_irq_save(flags);
  673. if (capture) {
  674. i2s_rxctrl(i2s, 0);
  675. i2s_fifo(i2s, FIC_RXFLUSH);
  676. } else {
  677. i2s_txctrl(i2s, 0);
  678. i2s_fifo(i2s, FIC_TXFLUSH);
  679. }
  680. local_irq_restore(flags);
  681. break;
  682. }
  683. return 0;
  684. }
  685. static int i2s_set_clkdiv(struct snd_soc_dai *dai,
  686. int div_id, int div)
  687. {
  688. struct i2s_dai *i2s = to_info(dai);
  689. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  690. switch (div_id) {
  691. case SAMSUNG_I2S_DIV_BCLK:
  692. if ((any_active(i2s) && div && (get_bfs(i2s) != div))
  693. || (other && other->bfs && (other->bfs != div))) {
  694. dev_err(&i2s->pdev->dev,
  695. "%s:%d Other DAI busy\n", __func__, __LINE__);
  696. return -EAGAIN;
  697. }
  698. i2s->bfs = div;
  699. break;
  700. default:
  701. dev_err(&i2s->pdev->dev,
  702. "Invalid clock divider(%d)\n", div_id);
  703. return -EINVAL;
  704. }
  705. return 0;
  706. }
  707. static snd_pcm_sframes_t
  708. i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
  709. {
  710. struct i2s_dai *i2s = to_info(dai);
  711. u32 reg = readl(i2s->addr + I2SFIC);
  712. snd_pcm_sframes_t delay;
  713. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  714. delay = FIC_RXCOUNT(reg);
  715. else if (is_secondary(i2s))
  716. delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
  717. else
  718. delay = FIC_TXCOUNT(reg);
  719. return delay;
  720. }
  721. #ifdef CONFIG_PM
  722. static int i2s_suspend(struct snd_soc_dai *dai)
  723. {
  724. struct i2s_dai *i2s = to_info(dai);
  725. if (dai->active) {
  726. i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
  727. i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
  728. i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
  729. }
  730. return 0;
  731. }
  732. static int i2s_resume(struct snd_soc_dai *dai)
  733. {
  734. struct i2s_dai *i2s = to_info(dai);
  735. if (dai->active) {
  736. writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
  737. writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
  738. writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
  739. }
  740. return 0;
  741. }
  742. #else
  743. #define i2s_suspend NULL
  744. #define i2s_resume NULL
  745. #endif
  746. static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
  747. {
  748. struct i2s_dai *i2s = to_info(dai);
  749. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  750. if (other && other->clk) /* If this is probe on secondary */
  751. goto probe_exit;
  752. i2s->addr = ioremap(i2s->base, 0x100);
  753. if (i2s->addr == NULL) {
  754. dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
  755. return -ENXIO;
  756. }
  757. i2s->clk = clk_get(&i2s->pdev->dev, "iis");
  758. if (IS_ERR(i2s->clk)) {
  759. dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
  760. iounmap(i2s->addr);
  761. return -ENOENT;
  762. }
  763. clk_prepare_enable(i2s->clk);
  764. if (other) {
  765. other->addr = i2s->addr;
  766. other->clk = i2s->clk;
  767. }
  768. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  769. writel(CON_RSTCLR, i2s->addr + I2SCON);
  770. if (i2s->quirks & QUIRK_SEC_DAI)
  771. idma_reg_addr_init(i2s->addr,
  772. i2s->sec_dai->idma_playback.dma_addr);
  773. probe_exit:
  774. /* Reset any constraint on RFS and BFS */
  775. i2s->rfs = 0;
  776. i2s->bfs = 0;
  777. i2s_txctrl(i2s, 0);
  778. i2s_rxctrl(i2s, 0);
  779. i2s_fifo(i2s, FIC_TXFLUSH);
  780. i2s_fifo(other, FIC_TXFLUSH);
  781. i2s_fifo(i2s, FIC_RXFLUSH);
  782. /* Gate CDCLK by default */
  783. if (!is_opened(other))
  784. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  785. 0, SND_SOC_CLOCK_IN);
  786. return 0;
  787. }
  788. static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
  789. {
  790. struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
  791. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  792. if (!other || !other->clk) {
  793. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  794. writel(0, i2s->addr + I2SCON);
  795. clk_disable_unprepare(i2s->clk);
  796. clk_put(i2s->clk);
  797. iounmap(i2s->addr);
  798. }
  799. i2s->clk = NULL;
  800. return 0;
  801. }
  802. static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
  803. .trigger = i2s_trigger,
  804. .hw_params = i2s_hw_params,
  805. .set_fmt = i2s_set_fmt,
  806. .set_clkdiv = i2s_set_clkdiv,
  807. .set_sysclk = i2s_set_sysclk,
  808. .startup = i2s_startup,
  809. .shutdown = i2s_shutdown,
  810. .delay = i2s_delay,
  811. };
  812. static const struct snd_soc_component_driver samsung_i2s_component = {
  813. .name = "samsung-i2s",
  814. };
  815. #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
  816. #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
  817. SNDRV_PCM_FMTBIT_S16_LE | \
  818. SNDRV_PCM_FMTBIT_S24_LE)
  819. static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
  820. {
  821. struct i2s_dai *i2s;
  822. int ret;
  823. i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
  824. if (i2s == NULL)
  825. return NULL;
  826. i2s->pdev = pdev;
  827. i2s->pri_dai = NULL;
  828. i2s->sec_dai = NULL;
  829. i2s->i2s_dai_drv.symmetric_rates = 1;
  830. i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
  831. i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
  832. i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
  833. i2s->i2s_dai_drv.suspend = i2s_suspend;
  834. i2s->i2s_dai_drv.resume = i2s_resume;
  835. i2s->i2s_dai_drv.playback.channels_min = 2;
  836. i2s->i2s_dai_drv.playback.channels_max = 2;
  837. i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
  838. i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
  839. if (!sec) {
  840. i2s->i2s_dai_drv.capture.channels_min = 1;
  841. i2s->i2s_dai_drv.capture.channels_max = 2;
  842. i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
  843. i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
  844. dev_set_drvdata(&i2s->pdev->dev, i2s);
  845. } else { /* Create a new platform_device for Secondary */
  846. i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
  847. if (IS_ERR(i2s->pdev))
  848. return NULL;
  849. i2s->pdev->dev.parent = &pdev->dev;
  850. platform_set_drvdata(i2s->pdev, i2s);
  851. ret = platform_device_add(i2s->pdev);
  852. if (ret < 0)
  853. return NULL;
  854. }
  855. return i2s;
  856. }
  857. static const struct of_device_id exynos_i2s_match[];
  858. static inline int samsung_i2s_get_driver_data(struct platform_device *pdev)
  859. {
  860. #ifdef CONFIG_OF
  861. struct samsung_i2s_dai_data *data;
  862. if (pdev->dev.of_node) {
  863. const struct of_device_id *match;
  864. match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
  865. data = (struct samsung_i2s_dai_data *) match->data;
  866. return data->dai_type;
  867. } else
  868. #endif
  869. return platform_get_device_id(pdev)->driver_data;
  870. }
  871. #ifdef CONFIG_PM_RUNTIME
  872. static int i2s_runtime_suspend(struct device *dev)
  873. {
  874. struct i2s_dai *i2s = dev_get_drvdata(dev);
  875. clk_disable_unprepare(i2s->clk);
  876. return 0;
  877. }
  878. static int i2s_runtime_resume(struct device *dev)
  879. {
  880. struct i2s_dai *i2s = dev_get_drvdata(dev);
  881. clk_prepare_enable(i2s->clk);
  882. return 0;
  883. }
  884. #endif /* CONFIG_PM_RUNTIME */
  885. static int samsung_i2s_probe(struct platform_device *pdev)
  886. {
  887. struct i2s_dai *pri_dai, *sec_dai = NULL;
  888. struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
  889. struct samsung_i2s *i2s_cfg = NULL;
  890. struct resource *res;
  891. u32 regs_base, quirks = 0, idma_addr = 0;
  892. struct device_node *np = pdev->dev.of_node;
  893. enum samsung_dai_type samsung_dai_type;
  894. int ret = 0;
  895. /* Call during Seconday interface registration */
  896. samsung_dai_type = samsung_i2s_get_driver_data(pdev);
  897. if (samsung_dai_type == TYPE_SEC) {
  898. sec_dai = dev_get_drvdata(&pdev->dev);
  899. if (!sec_dai) {
  900. dev_err(&pdev->dev, "Unable to get drvdata\n");
  901. return -EFAULT;
  902. }
  903. snd_soc_register_component(&sec_dai->pdev->dev,
  904. &samsung_i2s_component,
  905. &sec_dai->i2s_dai_drv, 1);
  906. asoc_dma_platform_register(&pdev->dev);
  907. return 0;
  908. }
  909. pri_dai = i2s_alloc_dai(pdev, false);
  910. if (!pri_dai) {
  911. dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
  912. return -ENOMEM;
  913. }
  914. if (!np) {
  915. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  916. if (!res) {
  917. dev_err(&pdev->dev,
  918. "Unable to get I2S-TX dma resource\n");
  919. return -ENXIO;
  920. }
  921. pri_dai->dma_playback.channel = res->start;
  922. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  923. if (!res) {
  924. dev_err(&pdev->dev,
  925. "Unable to get I2S-RX dma resource\n");
  926. return -ENXIO;
  927. }
  928. pri_dai->dma_capture.channel = res->start;
  929. if (i2s_pdata == NULL) {
  930. dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
  931. return -EINVAL;
  932. }
  933. if (&i2s_pdata->type)
  934. i2s_cfg = &i2s_pdata->type.i2s;
  935. if (i2s_cfg) {
  936. quirks = i2s_cfg->quirks;
  937. idma_addr = i2s_cfg->idma_addr;
  938. }
  939. } else {
  940. if (of_find_property(np, "samsung,supports-6ch", NULL))
  941. quirks |= QUIRK_PRI_6CHAN;
  942. if (of_find_property(np, "samsung,supports-secdai", NULL))
  943. quirks |= QUIRK_SEC_DAI;
  944. if (of_find_property(np, "samsung,supports-rstclr", NULL))
  945. quirks |= QUIRK_NEED_RSTCLR;
  946. if (of_property_read_u32(np, "samsung,idma-addr",
  947. &idma_addr)) {
  948. if (quirks & QUIRK_SEC_DAI) {
  949. dev_err(&pdev->dev, "idma address is not"\
  950. "specified");
  951. return -EINVAL;
  952. }
  953. }
  954. }
  955. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  956. if (!res) {
  957. dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
  958. return -ENXIO;
  959. }
  960. if (!request_mem_region(res->start, resource_size(res),
  961. "samsung-i2s")) {
  962. dev_err(&pdev->dev, "Unable to request SFR region\n");
  963. return -EBUSY;
  964. }
  965. regs_base = res->start;
  966. pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
  967. pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
  968. pri_dai->dma_playback.client =
  969. (struct s3c2410_dma_client *)&pri_dai->dma_playback;
  970. pri_dai->dma_playback.ch_name = "tx";
  971. pri_dai->dma_capture.client =
  972. (struct s3c2410_dma_client *)&pri_dai->dma_capture;
  973. pri_dai->dma_capture.ch_name = "rx";
  974. pri_dai->dma_playback.dma_size = 4;
  975. pri_dai->dma_capture.dma_size = 4;
  976. pri_dai->base = regs_base;
  977. pri_dai->quirks = quirks;
  978. if (quirks & QUIRK_PRI_6CHAN)
  979. pri_dai->i2s_dai_drv.playback.channels_max = 6;
  980. if (quirks & QUIRK_SEC_DAI) {
  981. sec_dai = i2s_alloc_dai(pdev, true);
  982. if (!sec_dai) {
  983. dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
  984. ret = -ENOMEM;
  985. goto err;
  986. }
  987. sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
  988. sec_dai->dma_playback.client =
  989. (struct s3c2410_dma_client *)&sec_dai->dma_playback;
  990. sec_dai->dma_playback.ch_name = "tx-sec";
  991. if (!np) {
  992. res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
  993. if (res)
  994. sec_dai->dma_playback.channel = res->start;
  995. }
  996. sec_dai->dma_playback.dma_size = 4;
  997. sec_dai->base = regs_base;
  998. sec_dai->quirks = quirks;
  999. sec_dai->idma_playback.dma_addr = idma_addr;
  1000. sec_dai->pri_dai = pri_dai;
  1001. pri_dai->sec_dai = sec_dai;
  1002. }
  1003. if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
  1004. dev_err(&pdev->dev, "Unable to configure gpio\n");
  1005. ret = -EINVAL;
  1006. goto err;
  1007. }
  1008. snd_soc_register_component(&pri_dai->pdev->dev, &samsung_i2s_component,
  1009. &pri_dai->i2s_dai_drv, 1);
  1010. pm_runtime_enable(&pdev->dev);
  1011. asoc_dma_platform_register(&pdev->dev);
  1012. return 0;
  1013. err:
  1014. release_mem_region(regs_base, resource_size(res));
  1015. return ret;
  1016. }
  1017. static int samsung_i2s_remove(struct platform_device *pdev)
  1018. {
  1019. struct i2s_dai *i2s, *other;
  1020. struct resource *res;
  1021. i2s = dev_get_drvdata(&pdev->dev);
  1022. other = i2s->pri_dai ? : i2s->sec_dai;
  1023. if (other) {
  1024. other->pri_dai = NULL;
  1025. other->sec_dai = NULL;
  1026. } else {
  1027. pm_runtime_disable(&pdev->dev);
  1028. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1029. if (res)
  1030. release_mem_region(res->start, resource_size(res));
  1031. }
  1032. i2s->pri_dai = NULL;
  1033. i2s->sec_dai = NULL;
  1034. asoc_dma_platform_unregister(&pdev->dev);
  1035. snd_soc_unregister_component(&pdev->dev);
  1036. return 0;
  1037. }
  1038. static struct platform_device_id samsung_i2s_driver_ids[] = {
  1039. {
  1040. .name = "samsung-i2s",
  1041. .driver_data = TYPE_PRI,
  1042. }, {
  1043. .name = "samsung-i2s-sec",
  1044. .driver_data = TYPE_SEC,
  1045. },
  1046. {},
  1047. };
  1048. MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
  1049. #ifdef CONFIG_OF
  1050. static struct samsung_i2s_dai_data samsung_i2s_dai_data_array[] = {
  1051. [TYPE_PRI] = { TYPE_PRI },
  1052. [TYPE_SEC] = { TYPE_SEC },
  1053. };
  1054. static const struct of_device_id exynos_i2s_match[] = {
  1055. { .compatible = "samsung,i2s-v5",
  1056. .data = &samsung_i2s_dai_data_array[TYPE_PRI],
  1057. },
  1058. {},
  1059. };
  1060. MODULE_DEVICE_TABLE(of, exynos_i2s_match);
  1061. #endif
  1062. static const struct dev_pm_ops samsung_i2s_pm = {
  1063. SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
  1064. i2s_runtime_resume, NULL)
  1065. };
  1066. static struct platform_driver samsung_i2s_driver = {
  1067. .probe = samsung_i2s_probe,
  1068. .remove = samsung_i2s_remove,
  1069. .id_table = samsung_i2s_driver_ids,
  1070. .driver = {
  1071. .name = "samsung-i2s",
  1072. .owner = THIS_MODULE,
  1073. .of_match_table = of_match_ptr(exynos_i2s_match),
  1074. .pm = &samsung_i2s_pm,
  1075. },
  1076. };
  1077. module_platform_driver(samsung_i2s_driver);
  1078. /* Module information */
  1079. MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
  1080. MODULE_DESCRIPTION("Samsung I2S Interface");
  1081. MODULE_ALIAS("platform:samsung-i2s");
  1082. MODULE_LICENSE("GPL");