radeon_fence.c 14 KB

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  1. /*
  2. * Copyright 2009 Jerome Glisse.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Jerome Glisse <glisse@freedesktop.org>
  29. * Dave Airlie
  30. */
  31. #include <linux/seq_file.h>
  32. #include <linux/atomic.h>
  33. #include <linux/wait.h>
  34. #include <linux/list.h>
  35. #include <linux/kref.h>
  36. #include <linux/slab.h>
  37. #include "drmP.h"
  38. #include "drm.h"
  39. #include "radeon_reg.h"
  40. #include "radeon.h"
  41. #include "radeon_trace.h"
  42. static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring)
  43. {
  44. if (rdev->wb.enabled) {
  45. *rdev->fence_drv[ring].cpu_addr = cpu_to_le32(seq);
  46. } else {
  47. WREG32(rdev->fence_drv[ring].scratch_reg, seq);
  48. }
  49. }
  50. static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
  51. {
  52. u32 seq = 0;
  53. if (rdev->wb.enabled) {
  54. seq = le32_to_cpu(*rdev->fence_drv[ring].cpu_addr);
  55. } else {
  56. seq = RREG32(rdev->fence_drv[ring].scratch_reg);
  57. }
  58. return seq;
  59. }
  60. int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
  61. {
  62. unsigned long irq_flags;
  63. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  64. if (fence->emitted) {
  65. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  66. return 0;
  67. }
  68. fence->seq = atomic_add_return(1, &rdev->fence_drv[fence->ring].seq);
  69. radeon_fence_ring_emit(rdev, fence->ring, fence);
  70. trace_radeon_fence_emit(rdev->ddev, fence->seq);
  71. fence->emitted = true;
  72. /* are we the first fence on a previusly idle ring? */
  73. if (list_empty(&rdev->fence_drv[fence->ring].emitted)) {
  74. rdev->fence_drv[fence->ring].last_activity = jiffies;
  75. }
  76. list_move_tail(&fence->list, &rdev->fence_drv[fence->ring].emitted);
  77. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  78. return 0;
  79. }
  80. static bool radeon_fence_poll_locked(struct radeon_device *rdev, int ring)
  81. {
  82. struct radeon_fence *fence;
  83. struct list_head *i, *n;
  84. uint32_t seq;
  85. bool wake = false;
  86. seq = radeon_fence_read(rdev, ring);
  87. if (seq == rdev->fence_drv[ring].last_seq)
  88. return false;
  89. rdev->fence_drv[ring].last_seq = seq;
  90. rdev->fence_drv[ring].last_activity = jiffies;
  91. n = NULL;
  92. list_for_each(i, &rdev->fence_drv[ring].emitted) {
  93. fence = list_entry(i, struct radeon_fence, list);
  94. if (fence->seq == seq) {
  95. n = i;
  96. break;
  97. }
  98. }
  99. /* all fence previous to this one are considered as signaled */
  100. if (n) {
  101. i = n;
  102. do {
  103. n = i->prev;
  104. list_move_tail(i, &rdev->fence_drv[ring].signaled);
  105. fence = list_entry(i, struct radeon_fence, list);
  106. fence->signaled = true;
  107. i = n;
  108. } while (i != &rdev->fence_drv[ring].emitted);
  109. wake = true;
  110. }
  111. return wake;
  112. }
  113. static void radeon_fence_destroy(struct kref *kref)
  114. {
  115. unsigned long irq_flags;
  116. struct radeon_fence *fence;
  117. fence = container_of(kref, struct radeon_fence, kref);
  118. write_lock_irqsave(&fence->rdev->fence_lock, irq_flags);
  119. list_del(&fence->list);
  120. fence->emitted = false;
  121. write_unlock_irqrestore(&fence->rdev->fence_lock, irq_flags);
  122. if (fence->semaphore)
  123. radeon_semaphore_free(fence->rdev, fence->semaphore);
  124. kfree(fence);
  125. }
  126. int radeon_fence_create(struct radeon_device *rdev,
  127. struct radeon_fence **fence,
  128. int ring)
  129. {
  130. unsigned long irq_flags;
  131. *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
  132. if ((*fence) == NULL) {
  133. return -ENOMEM;
  134. }
  135. kref_init(&((*fence)->kref));
  136. (*fence)->rdev = rdev;
  137. (*fence)->emitted = false;
  138. (*fence)->signaled = false;
  139. (*fence)->seq = 0;
  140. (*fence)->ring = ring;
  141. (*fence)->semaphore = NULL;
  142. INIT_LIST_HEAD(&(*fence)->list);
  143. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  144. list_add_tail(&(*fence)->list, &rdev->fence_drv[ring].created);
  145. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  146. return 0;
  147. }
  148. bool radeon_fence_signaled(struct radeon_fence *fence)
  149. {
  150. unsigned long irq_flags;
  151. bool signaled = false;
  152. if (!fence)
  153. return true;
  154. write_lock_irqsave(&fence->rdev->fence_lock, irq_flags);
  155. signaled = fence->signaled;
  156. /* if we are shuting down report all fence as signaled */
  157. if (fence->rdev->shutdown) {
  158. signaled = true;
  159. }
  160. if (!fence->emitted) {
  161. WARN(1, "Querying an unemitted fence : %p !\n", fence);
  162. signaled = true;
  163. }
  164. if (!signaled) {
  165. radeon_fence_poll_locked(fence->rdev, fence->ring);
  166. signaled = fence->signaled;
  167. }
  168. write_unlock_irqrestore(&fence->rdev->fence_lock, irq_flags);
  169. return signaled;
  170. }
  171. int radeon_fence_wait(struct radeon_fence *fence, bool intr)
  172. {
  173. struct radeon_device *rdev;
  174. unsigned long irq_flags, timeout;
  175. u32 seq;
  176. int i, r;
  177. bool signaled;
  178. if (fence == NULL) {
  179. WARN(1, "Querying an invalid fence : %p !\n", fence);
  180. return -EINVAL;
  181. }
  182. rdev = fence->rdev;
  183. signaled = radeon_fence_signaled(fence);
  184. while (!signaled) {
  185. read_lock_irqsave(&rdev->fence_lock, irq_flags);
  186. timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
  187. if (time_after(rdev->fence_drv[fence->ring].last_activity, timeout)) {
  188. /* the normal case, timeout is somewhere before last_activity */
  189. timeout = rdev->fence_drv[fence->ring].last_activity - timeout;
  190. } else {
  191. /* either jiffies wrapped around, or no fence was signaled in the last 500ms
  192. * anyway we will just wait for the minimum amount and then check for a lockup */
  193. timeout = 1;
  194. }
  195. /* save current sequence value used to check for GPU lockups */
  196. seq = rdev->fence_drv[fence->ring].last_seq;
  197. read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  198. trace_radeon_fence_wait_begin(rdev->ddev, seq);
  199. radeon_irq_kms_sw_irq_get(rdev, fence->ring);
  200. if (intr) {
  201. r = wait_event_interruptible_timeout(
  202. rdev->fence_drv[fence->ring].queue,
  203. (signaled = radeon_fence_signaled(fence)), timeout);
  204. } else {
  205. r = wait_event_timeout(
  206. rdev->fence_drv[fence->ring].queue,
  207. (signaled = radeon_fence_signaled(fence)), timeout);
  208. }
  209. radeon_irq_kms_sw_irq_put(rdev, fence->ring);
  210. if (unlikely(r < 0)) {
  211. return r;
  212. }
  213. trace_radeon_fence_wait_end(rdev->ddev, seq);
  214. if (unlikely(!signaled)) {
  215. /* we were interrupted for some reason and fence
  216. * isn't signaled yet, resume waiting */
  217. if (r) {
  218. continue;
  219. }
  220. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  221. /* check if sequence value has changed since last_activity */
  222. if (seq != rdev->fence_drv[fence->ring].last_seq) {
  223. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  224. continue;
  225. }
  226. /* change sequence value on all rings, so nobody else things there is a lockup */
  227. for (i = 0; i < RADEON_NUM_RINGS; ++i)
  228. rdev->fence_drv[i].last_seq -= 0x10000;
  229. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  230. if (radeon_ring_is_lockup(rdev, fence->ring, &rdev->ring[fence->ring])) {
  231. /* good news we believe it's a lockup */
  232. printk(KERN_WARNING "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n",
  233. fence->seq, seq);
  234. /* mark the ring as not ready any more */
  235. rdev->ring[fence->ring].ready = false;
  236. r = radeon_gpu_reset(rdev);
  237. if (r)
  238. return r;
  239. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  240. rdev->fence_drv[fence->ring].last_activity = jiffies;
  241. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  242. }
  243. }
  244. }
  245. return 0;
  246. }
  247. int radeon_fence_wait_next(struct radeon_device *rdev, int ring)
  248. {
  249. unsigned long irq_flags;
  250. struct radeon_fence *fence;
  251. int r;
  252. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  253. if (!rdev->ring[ring].ready) {
  254. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  255. return -EBUSY;
  256. }
  257. if (list_empty(&rdev->fence_drv[ring].emitted)) {
  258. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  259. return -ENOENT;
  260. }
  261. fence = list_entry(rdev->fence_drv[ring].emitted.next,
  262. struct radeon_fence, list);
  263. radeon_fence_ref(fence);
  264. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  265. r = radeon_fence_wait(fence, false);
  266. radeon_fence_unref(&fence);
  267. return r;
  268. }
  269. int radeon_fence_wait_last(struct radeon_device *rdev, int ring)
  270. {
  271. unsigned long irq_flags;
  272. struct radeon_fence *fence;
  273. int r;
  274. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  275. if (!rdev->ring[ring].ready) {
  276. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  277. return -EBUSY;
  278. }
  279. if (list_empty(&rdev->fence_drv[ring].emitted)) {
  280. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  281. return 0;
  282. }
  283. fence = list_entry(rdev->fence_drv[ring].emitted.prev,
  284. struct radeon_fence, list);
  285. radeon_fence_ref(fence);
  286. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  287. r = radeon_fence_wait(fence, false);
  288. radeon_fence_unref(&fence);
  289. return r;
  290. }
  291. struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
  292. {
  293. kref_get(&fence->kref);
  294. return fence;
  295. }
  296. void radeon_fence_unref(struct radeon_fence **fence)
  297. {
  298. struct radeon_fence *tmp = *fence;
  299. *fence = NULL;
  300. if (tmp) {
  301. kref_put(&tmp->kref, radeon_fence_destroy);
  302. }
  303. }
  304. void radeon_fence_process(struct radeon_device *rdev, int ring)
  305. {
  306. unsigned long irq_flags;
  307. bool wake;
  308. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  309. wake = radeon_fence_poll_locked(rdev, ring);
  310. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  311. if (wake) {
  312. wake_up_all(&rdev->fence_drv[ring].queue);
  313. }
  314. }
  315. int radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
  316. {
  317. unsigned long irq_flags;
  318. int not_processed = 0;
  319. read_lock_irqsave(&rdev->fence_lock, irq_flags);
  320. if (!rdev->fence_drv[ring].initialized) {
  321. read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  322. return 0;
  323. }
  324. if (!list_empty(&rdev->fence_drv[ring].emitted)) {
  325. struct list_head *ptr;
  326. list_for_each(ptr, &rdev->fence_drv[ring].emitted) {
  327. /* count up to 3, that's enought info */
  328. if (++not_processed >= 3)
  329. break;
  330. }
  331. }
  332. read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  333. return not_processed;
  334. }
  335. int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
  336. {
  337. unsigned long irq_flags;
  338. uint64_t index;
  339. int r;
  340. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  341. radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
  342. if (rdev->wb.use_event) {
  343. rdev->fence_drv[ring].scratch_reg = 0;
  344. index = R600_WB_EVENT_OFFSET + ring * 4;
  345. } else {
  346. r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
  347. if (r) {
  348. dev_err(rdev->dev, "fence failed to get scratch register\n");
  349. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  350. return r;
  351. }
  352. index = RADEON_WB_SCRATCH_OFFSET +
  353. rdev->fence_drv[ring].scratch_reg -
  354. rdev->scratch.reg_base;
  355. }
  356. rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4];
  357. rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
  358. radeon_fence_write(rdev, atomic_read(&rdev->fence_drv[ring].seq), ring);
  359. rdev->fence_drv[ring].initialized = true;
  360. DRM_INFO("fence driver on ring %d use gpu addr 0x%08Lx and cpu addr 0x%p\n",
  361. ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
  362. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  363. return 0;
  364. }
  365. static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)
  366. {
  367. rdev->fence_drv[ring].scratch_reg = -1;
  368. rdev->fence_drv[ring].cpu_addr = NULL;
  369. rdev->fence_drv[ring].gpu_addr = 0;
  370. atomic_set(&rdev->fence_drv[ring].seq, 0);
  371. INIT_LIST_HEAD(&rdev->fence_drv[ring].created);
  372. INIT_LIST_HEAD(&rdev->fence_drv[ring].emitted);
  373. INIT_LIST_HEAD(&rdev->fence_drv[ring].signaled);
  374. init_waitqueue_head(&rdev->fence_drv[ring].queue);
  375. rdev->fence_drv[ring].initialized = false;
  376. }
  377. int radeon_fence_driver_init(struct radeon_device *rdev)
  378. {
  379. unsigned long irq_flags;
  380. int ring;
  381. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  382. for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
  383. radeon_fence_driver_init_ring(rdev, ring);
  384. }
  385. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  386. if (radeon_debugfs_fence_init(rdev)) {
  387. dev_err(rdev->dev, "fence debugfs file creation failed\n");
  388. }
  389. return 0;
  390. }
  391. void radeon_fence_driver_fini(struct radeon_device *rdev)
  392. {
  393. unsigned long irq_flags;
  394. int ring;
  395. for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
  396. if (!rdev->fence_drv[ring].initialized)
  397. continue;
  398. radeon_fence_wait_last(rdev, ring);
  399. wake_up_all(&rdev->fence_drv[ring].queue);
  400. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  401. radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
  402. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  403. rdev->fence_drv[ring].initialized = false;
  404. }
  405. }
  406. /*
  407. * Fence debugfs
  408. */
  409. #if defined(CONFIG_DEBUG_FS)
  410. static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
  411. {
  412. struct drm_info_node *node = (struct drm_info_node *)m->private;
  413. struct drm_device *dev = node->minor->dev;
  414. struct radeon_device *rdev = dev->dev_private;
  415. struct radeon_fence *fence;
  416. int i;
  417. for (i = 0; i < RADEON_NUM_RINGS; ++i) {
  418. if (!rdev->fence_drv[i].initialized)
  419. continue;
  420. seq_printf(m, "--- ring %d ---\n", i);
  421. seq_printf(m, "Last signaled fence 0x%08X\n",
  422. radeon_fence_read(rdev, i));
  423. if (!list_empty(&rdev->fence_drv[i].emitted)) {
  424. fence = list_entry(rdev->fence_drv[i].emitted.prev,
  425. struct radeon_fence, list);
  426. seq_printf(m, "Last emitted fence %p with 0x%08X\n",
  427. fence, fence->seq);
  428. }
  429. }
  430. return 0;
  431. }
  432. static struct drm_info_list radeon_debugfs_fence_list[] = {
  433. {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
  434. };
  435. #endif
  436. int radeon_debugfs_fence_init(struct radeon_device *rdev)
  437. {
  438. #if defined(CONFIG_DEBUG_FS)
  439. return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
  440. #else
  441. return 0;
  442. #endif
  443. }