ispccdc.c 63 KB

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  1. /*
  2. * ispccdc.c
  3. *
  4. * TI OMAP3 ISP - CCDC module
  5. *
  6. * Copyright (C) 2009-2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24. * 02110-1301 USA
  25. */
  26. #include <linux/module.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/delay.h>
  29. #include <linux/device.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/mm.h>
  32. #include <linux/sched.h>
  33. #include <linux/slab.h>
  34. #include <media/v4l2-event.h>
  35. #include "isp.h"
  36. #include "ispreg.h"
  37. #include "ispccdc.h"
  38. static struct v4l2_mbus_framefmt *
  39. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  40. unsigned int pad, enum v4l2_subdev_format_whence which);
  41. static const unsigned int ccdc_fmts[] = {
  42. V4L2_MBUS_FMT_Y8_1X8,
  43. V4L2_MBUS_FMT_Y10_1X10,
  44. V4L2_MBUS_FMT_Y12_1X12,
  45. V4L2_MBUS_FMT_SGRBG8_1X8,
  46. V4L2_MBUS_FMT_SRGGB8_1X8,
  47. V4L2_MBUS_FMT_SBGGR8_1X8,
  48. V4L2_MBUS_FMT_SGBRG8_1X8,
  49. V4L2_MBUS_FMT_SGRBG10_1X10,
  50. V4L2_MBUS_FMT_SRGGB10_1X10,
  51. V4L2_MBUS_FMT_SBGGR10_1X10,
  52. V4L2_MBUS_FMT_SGBRG10_1X10,
  53. V4L2_MBUS_FMT_SGRBG12_1X12,
  54. V4L2_MBUS_FMT_SRGGB12_1X12,
  55. V4L2_MBUS_FMT_SBGGR12_1X12,
  56. V4L2_MBUS_FMT_SGBRG12_1X12,
  57. };
  58. /*
  59. * ccdc_print_status - Print current CCDC Module register values.
  60. * @ccdc: Pointer to ISP CCDC device.
  61. *
  62. * Also prints other debug information stored in the CCDC module.
  63. */
  64. #define CCDC_PRINT_REGISTER(isp, name)\
  65. dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
  66. isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
  67. static void ccdc_print_status(struct isp_ccdc_device *ccdc)
  68. {
  69. struct isp_device *isp = to_isp_device(ccdc);
  70. dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
  71. CCDC_PRINT_REGISTER(isp, PCR);
  72. CCDC_PRINT_REGISTER(isp, SYN_MODE);
  73. CCDC_PRINT_REGISTER(isp, HD_VD_WID);
  74. CCDC_PRINT_REGISTER(isp, PIX_LINES);
  75. CCDC_PRINT_REGISTER(isp, HORZ_INFO);
  76. CCDC_PRINT_REGISTER(isp, VERT_START);
  77. CCDC_PRINT_REGISTER(isp, VERT_LINES);
  78. CCDC_PRINT_REGISTER(isp, CULLING);
  79. CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
  80. CCDC_PRINT_REGISTER(isp, SDOFST);
  81. CCDC_PRINT_REGISTER(isp, SDR_ADDR);
  82. CCDC_PRINT_REGISTER(isp, CLAMP);
  83. CCDC_PRINT_REGISTER(isp, DCSUB);
  84. CCDC_PRINT_REGISTER(isp, COLPTN);
  85. CCDC_PRINT_REGISTER(isp, BLKCMP);
  86. CCDC_PRINT_REGISTER(isp, FPC);
  87. CCDC_PRINT_REGISTER(isp, FPC_ADDR);
  88. CCDC_PRINT_REGISTER(isp, VDINT);
  89. CCDC_PRINT_REGISTER(isp, ALAW);
  90. CCDC_PRINT_REGISTER(isp, REC656IF);
  91. CCDC_PRINT_REGISTER(isp, CFG);
  92. CCDC_PRINT_REGISTER(isp, FMTCFG);
  93. CCDC_PRINT_REGISTER(isp, FMT_HORZ);
  94. CCDC_PRINT_REGISTER(isp, FMT_VERT);
  95. CCDC_PRINT_REGISTER(isp, PRGEVEN0);
  96. CCDC_PRINT_REGISTER(isp, PRGEVEN1);
  97. CCDC_PRINT_REGISTER(isp, PRGODD0);
  98. CCDC_PRINT_REGISTER(isp, PRGODD1);
  99. CCDC_PRINT_REGISTER(isp, VP_OUT);
  100. CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
  101. CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
  102. CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
  103. CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
  104. dev_dbg(isp->dev, "--------------------------------------------\n");
  105. }
  106. /*
  107. * omap3isp_ccdc_busy - Get busy state of the CCDC.
  108. * @ccdc: Pointer to ISP CCDC device.
  109. */
  110. int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
  111. {
  112. struct isp_device *isp = to_isp_device(ccdc);
  113. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
  114. ISPCCDC_PCR_BUSY;
  115. }
  116. /* -----------------------------------------------------------------------------
  117. * Lens Shading Compensation
  118. */
  119. /*
  120. * ccdc_lsc_validate_config - Check that LSC configuration is valid.
  121. * @ccdc: Pointer to ISP CCDC device.
  122. * @lsc_cfg: the LSC configuration to check.
  123. *
  124. * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
  125. */
  126. static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
  127. struct omap3isp_ccdc_lsc_config *lsc_cfg)
  128. {
  129. struct isp_device *isp = to_isp_device(ccdc);
  130. struct v4l2_mbus_framefmt *format;
  131. unsigned int paxel_width, paxel_height;
  132. unsigned int paxel_shift_x, paxel_shift_y;
  133. unsigned int min_width, min_height, min_size;
  134. unsigned int input_width, input_height;
  135. paxel_shift_x = lsc_cfg->gain_mode_m;
  136. paxel_shift_y = lsc_cfg->gain_mode_n;
  137. if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
  138. (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
  139. dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
  140. return -EINVAL;
  141. }
  142. if (lsc_cfg->offset & 3) {
  143. dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
  144. "4\n");
  145. return -EINVAL;
  146. }
  147. if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
  148. dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
  149. return -EINVAL;
  150. }
  151. format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  152. V4L2_SUBDEV_FORMAT_ACTIVE);
  153. input_width = format->width;
  154. input_height = format->height;
  155. /* Calculate minimum bytesize for validation */
  156. paxel_width = 1 << paxel_shift_x;
  157. min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
  158. >> paxel_shift_x) + 1;
  159. paxel_height = 1 << paxel_shift_y;
  160. min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
  161. >> paxel_shift_y) + 1;
  162. min_size = 4 * min_width * min_height;
  163. if (min_size > lsc_cfg->size) {
  164. dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
  165. return -EINVAL;
  166. }
  167. if (lsc_cfg->offset < (min_width * 4)) {
  168. dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
  169. return -EINVAL;
  170. }
  171. if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
  172. dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
  173. return -EINVAL;
  174. }
  175. return 0;
  176. }
  177. /*
  178. * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
  179. * @ccdc: Pointer to ISP CCDC device.
  180. */
  181. static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
  182. {
  183. isp_reg_writel(to_isp_device(ccdc), addr,
  184. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
  185. }
  186. /*
  187. * ccdc_lsc_setup_regs - Configures the lens shading compensation module
  188. * @ccdc: Pointer to ISP CCDC device.
  189. */
  190. static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
  191. struct omap3isp_ccdc_lsc_config *cfg)
  192. {
  193. struct isp_device *isp = to_isp_device(ccdc);
  194. int reg;
  195. isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
  196. ISPCCDC_LSC_TABLE_OFFSET);
  197. reg = 0;
  198. reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
  199. reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
  200. reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
  201. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
  202. reg = 0;
  203. reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
  204. reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
  205. reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
  206. reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
  207. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
  208. ISPCCDC_LSC_INITIAL);
  209. }
  210. static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
  211. {
  212. struct isp_device *isp = to_isp_device(ccdc);
  213. unsigned int wait;
  214. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  215. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  216. /* timeout 1 ms */
  217. for (wait = 0; wait < 1000; wait++) {
  218. if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
  219. IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
  220. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  221. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  222. return 0;
  223. }
  224. rmb();
  225. udelay(1);
  226. }
  227. return -ETIMEDOUT;
  228. }
  229. /*
  230. * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
  231. * @ccdc: Pointer to ISP CCDC device.
  232. * @enable: 0 Disables LSC, 1 Enables LSC.
  233. */
  234. static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
  235. {
  236. struct isp_device *isp = to_isp_device(ccdc);
  237. const struct v4l2_mbus_framefmt *format =
  238. __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  239. V4L2_SUBDEV_FORMAT_ACTIVE);
  240. if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
  241. (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
  242. (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
  243. (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
  244. return -EINVAL;
  245. if (enable)
  246. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
  247. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  248. ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
  249. if (enable) {
  250. if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
  251. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
  252. ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
  253. ccdc->lsc.state = LSC_STATE_STOPPED;
  254. dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
  255. return -ETIMEDOUT;
  256. }
  257. ccdc->lsc.state = LSC_STATE_RUNNING;
  258. } else {
  259. ccdc->lsc.state = LSC_STATE_STOPPING;
  260. }
  261. return 0;
  262. }
  263. static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
  264. {
  265. struct isp_device *isp = to_isp_device(ccdc);
  266. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
  267. ISPCCDC_LSC_BUSY;
  268. }
  269. /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
  270. * @ccdc: Pointer to ISP CCDC device
  271. * @req: New configuration request
  272. *
  273. * context: in_interrupt()
  274. */
  275. static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
  276. struct ispccdc_lsc_config_req *req)
  277. {
  278. if (!req->enable)
  279. return -EINVAL;
  280. if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
  281. dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
  282. return -EINVAL;
  283. }
  284. if (ccdc_lsc_busy(ccdc))
  285. return -EBUSY;
  286. ccdc_lsc_setup_regs(ccdc, &req->config);
  287. ccdc_lsc_program_table(ccdc, req->table);
  288. return 0;
  289. }
  290. /*
  291. * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
  292. * @ccdc: Pointer to ISP CCDC device.
  293. *
  294. * Disables LSC, and defers enablement to shadow registers update time.
  295. */
  296. static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
  297. {
  298. struct isp_device *isp = to_isp_device(ccdc);
  299. /*
  300. * From OMAP3 TRM: When this event is pending, the module
  301. * goes into transparent mode (output =input). Normal
  302. * operation can be resumed at the start of the next frame
  303. * after:
  304. * 1) Clearing this event
  305. * 2) Disabling the LSC module
  306. * 3) Enabling it
  307. */
  308. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  309. ISPCCDC_LSC_ENABLE);
  310. ccdc->lsc.state = LSC_STATE_STOPPED;
  311. }
  312. static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
  313. struct ispccdc_lsc_config_req *req)
  314. {
  315. struct isp_device *isp = to_isp_device(ccdc);
  316. if (req == NULL)
  317. return;
  318. if (req->iovm)
  319. dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
  320. req->iovm->sgt->nents, DMA_TO_DEVICE);
  321. if (req->table)
  322. iommu_vfree(isp->iommu, req->table);
  323. kfree(req);
  324. }
  325. static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
  326. struct list_head *queue)
  327. {
  328. struct ispccdc_lsc_config_req *req, *n;
  329. unsigned long flags;
  330. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  331. list_for_each_entry_safe(req, n, queue, list) {
  332. list_del(&req->list);
  333. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  334. ccdc_lsc_free_request(ccdc, req);
  335. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  336. }
  337. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  338. }
  339. static void ccdc_lsc_free_table_work(struct work_struct *work)
  340. {
  341. struct isp_ccdc_device *ccdc;
  342. struct ispccdc_lsc *lsc;
  343. lsc = container_of(work, struct ispccdc_lsc, table_work);
  344. ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
  345. ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
  346. }
  347. /*
  348. * ccdc_lsc_config - Configure the LSC module from a userspace request
  349. *
  350. * Store the request LSC configuration in the LSC engine request pointer. The
  351. * configuration will be applied to the hardware when the CCDC will be enabled,
  352. * or at the next LSC interrupt if the CCDC is already running.
  353. */
  354. static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
  355. struct omap3isp_ccdc_update_config *config)
  356. {
  357. struct isp_device *isp = to_isp_device(ccdc);
  358. struct ispccdc_lsc_config_req *req;
  359. unsigned long flags;
  360. void *table;
  361. u16 update;
  362. int ret;
  363. update = config->update &
  364. (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
  365. if (!update)
  366. return 0;
  367. if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
  368. dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
  369. "need to be supplied\n", __func__);
  370. return -EINVAL;
  371. }
  372. req = kzalloc(sizeof(*req), GFP_KERNEL);
  373. if (req == NULL)
  374. return -ENOMEM;
  375. if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
  376. if (copy_from_user(&req->config, config->lsc_cfg,
  377. sizeof(req->config))) {
  378. ret = -EFAULT;
  379. goto done;
  380. }
  381. req->enable = 1;
  382. req->table = iommu_vmalloc(isp->iommu, 0, req->config.size,
  383. IOMMU_FLAG);
  384. if (IS_ERR_VALUE(req->table)) {
  385. req->table = 0;
  386. ret = -ENOMEM;
  387. goto done;
  388. }
  389. req->iovm = find_iovm_area(isp->iommu, req->table);
  390. if (req->iovm == NULL) {
  391. ret = -ENOMEM;
  392. goto done;
  393. }
  394. if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
  395. req->iovm->sgt->nents, DMA_TO_DEVICE)) {
  396. ret = -ENOMEM;
  397. req->iovm = NULL;
  398. goto done;
  399. }
  400. dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
  401. req->iovm->sgt->nents, DMA_TO_DEVICE);
  402. table = da_to_va(isp->iommu, req->table);
  403. if (copy_from_user(table, config->lsc, req->config.size)) {
  404. ret = -EFAULT;
  405. goto done;
  406. }
  407. dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
  408. req->iovm->sgt->nents, DMA_TO_DEVICE);
  409. }
  410. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  411. if (ccdc->lsc.request) {
  412. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  413. schedule_work(&ccdc->lsc.table_work);
  414. }
  415. ccdc->lsc.request = req;
  416. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  417. ret = 0;
  418. done:
  419. if (ret < 0)
  420. ccdc_lsc_free_request(ccdc, req);
  421. return ret;
  422. }
  423. static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
  424. {
  425. unsigned long flags;
  426. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  427. if (ccdc->lsc.active) {
  428. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  429. return 1;
  430. }
  431. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  432. return 0;
  433. }
  434. static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
  435. {
  436. struct ispccdc_lsc *lsc = &ccdc->lsc;
  437. if (lsc->state != LSC_STATE_STOPPED)
  438. return -EINVAL;
  439. if (lsc->active) {
  440. list_add_tail(&lsc->active->list, &lsc->free_queue);
  441. lsc->active = NULL;
  442. }
  443. if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
  444. omap3isp_sbl_disable(to_isp_device(ccdc),
  445. OMAP3_ISP_SBL_CCDC_LSC_READ);
  446. list_add_tail(&lsc->request->list, &lsc->free_queue);
  447. lsc->request = NULL;
  448. goto done;
  449. }
  450. lsc->active = lsc->request;
  451. lsc->request = NULL;
  452. __ccdc_lsc_enable(ccdc, 1);
  453. done:
  454. if (!list_empty(&lsc->free_queue))
  455. schedule_work(&lsc->table_work);
  456. return 0;
  457. }
  458. /* -----------------------------------------------------------------------------
  459. * Parameters configuration
  460. */
  461. /*
  462. * ccdc_configure_clamp - Configure optical-black or digital clamping
  463. * @ccdc: Pointer to ISP CCDC device.
  464. *
  465. * The CCDC performs either optical-black or digital clamp. Configure and enable
  466. * the selected clamp method.
  467. */
  468. static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
  469. {
  470. struct isp_device *isp = to_isp_device(ccdc);
  471. u32 clamp;
  472. if (ccdc->obclamp) {
  473. clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
  474. clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
  475. clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
  476. clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
  477. isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
  478. } else {
  479. isp_reg_writel(isp, ccdc->clamp.dcsubval,
  480. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
  481. }
  482. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
  483. ISPCCDC_CLAMP_CLAMPEN,
  484. ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
  485. }
  486. /*
  487. * ccdc_configure_fpc - Configure Faulty Pixel Correction
  488. * @ccdc: Pointer to ISP CCDC device.
  489. */
  490. static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
  491. {
  492. struct isp_device *isp = to_isp_device(ccdc);
  493. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
  494. if (!ccdc->fpc_en)
  495. return;
  496. isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
  497. ISPCCDC_FPC_ADDR);
  498. /* The FPNUM field must be set before enabling FPC. */
  499. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
  500. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  501. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
  502. ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  503. }
  504. /*
  505. * ccdc_configure_black_comp - Configure Black Level Compensation.
  506. * @ccdc: Pointer to ISP CCDC device.
  507. */
  508. static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
  509. {
  510. struct isp_device *isp = to_isp_device(ccdc);
  511. u32 blcomp;
  512. blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
  513. blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
  514. blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
  515. blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
  516. isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
  517. }
  518. /*
  519. * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
  520. * @ccdc: Pointer to ISP CCDC device.
  521. */
  522. static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
  523. {
  524. struct isp_device *isp = to_isp_device(ccdc);
  525. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
  526. ISPCCDC_SYN_MODE_LPF,
  527. ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
  528. }
  529. /*
  530. * ccdc_configure_alaw - Configure A-law compression.
  531. * @ccdc: Pointer to ISP CCDC device.
  532. */
  533. static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
  534. {
  535. struct isp_device *isp = to_isp_device(ccdc);
  536. u32 alaw = 0;
  537. switch (ccdc->syncif.datsz) {
  538. case 8:
  539. return;
  540. case 10:
  541. alaw = ISPCCDC_ALAW_GWDI_9_0;
  542. break;
  543. case 11:
  544. alaw = ISPCCDC_ALAW_GWDI_10_1;
  545. break;
  546. case 12:
  547. alaw = ISPCCDC_ALAW_GWDI_11_2;
  548. break;
  549. case 13:
  550. alaw = ISPCCDC_ALAW_GWDI_12_3;
  551. break;
  552. }
  553. if (ccdc->alaw)
  554. alaw |= ISPCCDC_ALAW_CCDTBL;
  555. isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
  556. }
  557. /*
  558. * ccdc_config_imgattr - Configure sensor image specific attributes.
  559. * @ccdc: Pointer to ISP CCDC device.
  560. * @colptn: Color pattern of the sensor.
  561. */
  562. static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
  563. {
  564. struct isp_device *isp = to_isp_device(ccdc);
  565. isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
  566. }
  567. /*
  568. * ccdc_config - Set CCDC configuration from userspace
  569. * @ccdc: Pointer to ISP CCDC device.
  570. * @userspace_add: Structure containing CCDC configuration sent from userspace.
  571. *
  572. * Returns 0 if successful, -EINVAL if the pointer to the configuration
  573. * structure is null, or the copy_from_user function fails to copy user space
  574. * memory to kernel space memory.
  575. */
  576. static int ccdc_config(struct isp_ccdc_device *ccdc,
  577. struct omap3isp_ccdc_update_config *ccdc_struct)
  578. {
  579. struct isp_device *isp = to_isp_device(ccdc);
  580. unsigned long flags;
  581. spin_lock_irqsave(&ccdc->lock, flags);
  582. ccdc->shadow_update = 1;
  583. spin_unlock_irqrestore(&ccdc->lock, flags);
  584. if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
  585. ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
  586. ccdc->update |= OMAP3ISP_CCDC_ALAW;
  587. }
  588. if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
  589. ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
  590. ccdc->update |= OMAP3ISP_CCDC_LPF;
  591. }
  592. if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
  593. if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
  594. sizeof(ccdc->clamp))) {
  595. ccdc->shadow_update = 0;
  596. return -EFAULT;
  597. }
  598. ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
  599. ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
  600. }
  601. if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
  602. if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
  603. sizeof(ccdc->blcomp))) {
  604. ccdc->shadow_update = 0;
  605. return -EFAULT;
  606. }
  607. ccdc->update |= OMAP3ISP_CCDC_BCOMP;
  608. }
  609. ccdc->shadow_update = 0;
  610. if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
  611. u32 table_old = 0;
  612. u32 table_new;
  613. u32 size;
  614. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  615. return -EBUSY;
  616. ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
  617. if (ccdc->fpc_en) {
  618. if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
  619. sizeof(ccdc->fpc)))
  620. return -EFAULT;
  621. /*
  622. * table_new must be 64-bytes aligned, but it's
  623. * already done by iommu_vmalloc().
  624. */
  625. size = ccdc->fpc.fpnum * 4;
  626. table_new = iommu_vmalloc(isp->iommu, 0, size,
  627. IOMMU_FLAG);
  628. if (IS_ERR_VALUE(table_new))
  629. return -ENOMEM;
  630. if (copy_from_user(da_to_va(isp->iommu, table_new),
  631. (__force void __user *)
  632. ccdc->fpc.fpcaddr, size)) {
  633. iommu_vfree(isp->iommu, table_new);
  634. return -EFAULT;
  635. }
  636. table_old = ccdc->fpc.fpcaddr;
  637. ccdc->fpc.fpcaddr = table_new;
  638. }
  639. ccdc_configure_fpc(ccdc);
  640. if (table_old != 0)
  641. iommu_vfree(isp->iommu, table_old);
  642. }
  643. return ccdc_lsc_config(ccdc, ccdc_struct);
  644. }
  645. static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
  646. {
  647. if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
  648. ccdc_configure_alaw(ccdc);
  649. ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
  650. }
  651. if (ccdc->update & OMAP3ISP_CCDC_LPF) {
  652. ccdc_configure_lpf(ccdc);
  653. ccdc->update &= ~OMAP3ISP_CCDC_LPF;
  654. }
  655. if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
  656. ccdc_configure_clamp(ccdc);
  657. ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
  658. }
  659. if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
  660. ccdc_configure_black_comp(ccdc);
  661. ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
  662. }
  663. }
  664. /*
  665. * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
  666. * @dev: Pointer to ISP device
  667. */
  668. void omap3isp_ccdc_restore_context(struct isp_device *isp)
  669. {
  670. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  671. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
  672. ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
  673. | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
  674. ccdc_apply_controls(ccdc);
  675. ccdc_configure_fpc(ccdc);
  676. }
  677. /* -----------------------------------------------------------------------------
  678. * Format- and pipeline-related configuration helpers
  679. */
  680. /*
  681. * ccdc_config_vp - Configure the Video Port.
  682. * @ccdc: Pointer to ISP CCDC device.
  683. */
  684. static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
  685. {
  686. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  687. struct isp_device *isp = to_isp_device(ccdc);
  688. unsigned long l3_ick = pipe->l3_ick;
  689. unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
  690. unsigned int div = 0;
  691. u32 fmtcfg_vp;
  692. fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
  693. & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
  694. switch (ccdc->syncif.datsz) {
  695. case 8:
  696. case 10:
  697. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
  698. break;
  699. case 11:
  700. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
  701. break;
  702. case 12:
  703. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
  704. break;
  705. case 13:
  706. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
  707. break;
  708. };
  709. if (pipe->input)
  710. div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
  711. else if (ccdc->vpcfg.pixelclk)
  712. div = l3_ick / ccdc->vpcfg.pixelclk;
  713. div = clamp(div, 2U, max_div);
  714. fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
  715. isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
  716. }
  717. /*
  718. * ccdc_enable_vp - Enable Video Port.
  719. * @ccdc: Pointer to ISP CCDC device.
  720. * @enable: 0 Disables VP, 1 Enables VP
  721. *
  722. * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
  723. */
  724. static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
  725. {
  726. struct isp_device *isp = to_isp_device(ccdc);
  727. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
  728. ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
  729. }
  730. /*
  731. * ccdc_config_outlineoffset - Configure memory saving output line offset
  732. * @ccdc: Pointer to ISP CCDC device.
  733. * @offset: Address offset to start a new line. Must be twice the
  734. * Output width and aligned on 32 byte boundary
  735. * @oddeven: Specifies the odd/even line pattern to be chosen to store the
  736. * output.
  737. * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
  738. *
  739. * - Configures the output line offset when stored in memory
  740. * - Sets the odd/even line pattern to store the output
  741. * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
  742. * - Configures the number of even and odd line fields in case of rearranging
  743. * the lines.
  744. */
  745. static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
  746. u32 offset, u8 oddeven, u8 numlines)
  747. {
  748. struct isp_device *isp = to_isp_device(ccdc);
  749. isp_reg_writel(isp, offset & 0xffff,
  750. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
  751. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  752. ISPCCDC_SDOFST_FINV);
  753. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  754. ISPCCDC_SDOFST_FOFST_4L);
  755. switch (oddeven) {
  756. case EVENEVEN:
  757. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  758. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
  759. break;
  760. case ODDEVEN:
  761. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  762. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
  763. break;
  764. case EVENODD:
  765. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  766. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
  767. break;
  768. case ODDODD:
  769. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  770. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
  771. break;
  772. default:
  773. break;
  774. }
  775. }
  776. /*
  777. * ccdc_set_outaddr - Set memory address to save output image
  778. * @ccdc: Pointer to ISP CCDC device.
  779. * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
  780. *
  781. * Sets the memory address where the output will be saved.
  782. */
  783. static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
  784. {
  785. struct isp_device *isp = to_isp_device(ccdc);
  786. isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
  787. }
  788. /*
  789. * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
  790. * @ccdc: Pointer to ISP CCDC device.
  791. * @max_rate: Maximum calculated data rate.
  792. *
  793. * Returns in *max_rate less value between calculated and passed
  794. */
  795. void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
  796. unsigned int *max_rate)
  797. {
  798. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  799. unsigned int rate;
  800. if (pipe == NULL)
  801. return;
  802. /*
  803. * TRM says that for parallel sensors the maximum data rate
  804. * should be 90% form L3/2 clock, otherwise just L3/2.
  805. */
  806. if (ccdc->input == CCDC_INPUT_PARALLEL)
  807. rate = pipe->l3_ick / 2 * 9 / 10;
  808. else
  809. rate = pipe->l3_ick / 2;
  810. *max_rate = min(*max_rate, rate);
  811. }
  812. /*
  813. * ccdc_config_sync_if - Set CCDC sync interface configuration
  814. * @ccdc: Pointer to ISP CCDC device.
  815. * @syncif: Structure containing the sync parameters like field state, CCDC in
  816. * master/slave mode, raw/yuv data, polarity of data, field, hs, vs
  817. * signals.
  818. */
  819. static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
  820. struct ispccdc_syncif *syncif)
  821. {
  822. struct isp_device *isp = to_isp_device(ccdc);
  823. u32 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC,
  824. ISPCCDC_SYN_MODE);
  825. syn_mode |= ISPCCDC_SYN_MODE_VDHDEN;
  826. if (syncif->fldstat)
  827. syn_mode |= ISPCCDC_SYN_MODE_FLDSTAT;
  828. else
  829. syn_mode &= ~ISPCCDC_SYN_MODE_FLDSTAT;
  830. syn_mode &= ~ISPCCDC_SYN_MODE_DATSIZ_MASK;
  831. switch (syncif->datsz) {
  832. case 8:
  833. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
  834. break;
  835. case 10:
  836. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
  837. break;
  838. case 11:
  839. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
  840. break;
  841. case 12:
  842. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
  843. break;
  844. };
  845. if (syncif->fldmode)
  846. syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
  847. else
  848. syn_mode &= ~ISPCCDC_SYN_MODE_FLDMODE;
  849. if (syncif->datapol)
  850. syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
  851. else
  852. syn_mode &= ~ISPCCDC_SYN_MODE_DATAPOL;
  853. if (syncif->fldpol)
  854. syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
  855. else
  856. syn_mode &= ~ISPCCDC_SYN_MODE_FLDPOL;
  857. if (syncif->hdpol)
  858. syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
  859. else
  860. syn_mode &= ~ISPCCDC_SYN_MODE_HDPOL;
  861. if (syncif->vdpol)
  862. syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
  863. else
  864. syn_mode &= ~ISPCCDC_SYN_MODE_VDPOL;
  865. if (syncif->ccdc_mastermode) {
  866. syn_mode |= ISPCCDC_SYN_MODE_FLDOUT | ISPCCDC_SYN_MODE_VDHDOUT;
  867. isp_reg_writel(isp,
  868. syncif->hs_width << ISPCCDC_HD_VD_WID_HDW_SHIFT
  869. | syncif->vs_width << ISPCCDC_HD_VD_WID_VDW_SHIFT,
  870. OMAP3_ISP_IOMEM_CCDC,
  871. ISPCCDC_HD_VD_WID);
  872. isp_reg_writel(isp,
  873. syncif->ppln << ISPCCDC_PIX_LINES_PPLN_SHIFT
  874. | syncif->hlprf << ISPCCDC_PIX_LINES_HLPRF_SHIFT,
  875. OMAP3_ISP_IOMEM_CCDC,
  876. ISPCCDC_PIX_LINES);
  877. } else
  878. syn_mode &= ~(ISPCCDC_SYN_MODE_FLDOUT |
  879. ISPCCDC_SYN_MODE_VDHDOUT);
  880. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  881. if (!syncif->bt_r656_en)
  882. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
  883. ISPCCDC_REC656IF_R656ON);
  884. }
  885. /* CCDC formats descriptions */
  886. static const u32 ccdc_sgrbg_pattern =
  887. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  888. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  889. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  890. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  891. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  892. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  893. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  894. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  895. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  896. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  897. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  898. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  899. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  900. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  901. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  902. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  903. static const u32 ccdc_srggb_pattern =
  904. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  905. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  906. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  907. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  908. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  909. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  910. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  911. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  912. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  913. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  914. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  915. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  916. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  917. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  918. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  919. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  920. static const u32 ccdc_sbggr_pattern =
  921. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  922. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  923. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  924. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  925. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  926. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  927. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  928. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  929. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  930. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  931. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  932. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  933. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  934. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  935. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  936. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  937. static const u32 ccdc_sgbrg_pattern =
  938. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  939. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  940. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  941. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  942. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  943. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  944. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  945. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  946. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  947. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  948. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  949. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  950. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  951. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  952. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  953. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  954. static void ccdc_configure(struct isp_ccdc_device *ccdc)
  955. {
  956. struct isp_device *isp = to_isp_device(ccdc);
  957. struct isp_parallel_platform_data *pdata = NULL;
  958. struct v4l2_subdev *sensor;
  959. struct v4l2_mbus_framefmt *format;
  960. const struct isp_format_info *fmt_info;
  961. struct v4l2_subdev_format fmt_src;
  962. unsigned int depth_out;
  963. unsigned int depth_in = 0;
  964. struct media_pad *pad;
  965. unsigned long flags;
  966. unsigned int shift;
  967. u32 syn_mode;
  968. u32 ccdc_pattern;
  969. pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
  970. sensor = media_entity_to_v4l2_subdev(pad->entity);
  971. if (ccdc->input == CCDC_INPUT_PARALLEL)
  972. pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
  973. ->bus.parallel;
  974. /* Compute shift value for lane shifter to configure the bridge. */
  975. fmt_src.pad = pad->index;
  976. fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  977. if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
  978. fmt_info = omap3isp_video_format_info(fmt_src.format.code);
  979. depth_in = fmt_info->bpp;
  980. }
  981. fmt_info = omap3isp_video_format_info
  982. (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
  983. depth_out = fmt_info->bpp;
  984. shift = depth_in - depth_out;
  985. omap3isp_configure_bridge(isp, ccdc->input, pdata, shift);
  986. ccdc->syncif.datsz = depth_out;
  987. ccdc->syncif.hdpol = pdata ? pdata->hs_pol : 0;
  988. ccdc->syncif.vdpol = pdata ? pdata->vs_pol : 0;
  989. ccdc_config_sync_if(ccdc, &ccdc->syncif);
  990. /* CCDC_PAD_SINK */
  991. format = &ccdc->formats[CCDC_PAD_SINK];
  992. syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  993. /* Use the raw, unprocessed data when writing to memory. The H3A and
  994. * histogram modules are still fed with lens shading corrected data.
  995. */
  996. syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
  997. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  998. syn_mode |= ISPCCDC_SYN_MODE_WEN;
  999. else
  1000. syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
  1001. if (ccdc->output & CCDC_OUTPUT_RESIZER)
  1002. syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
  1003. else
  1004. syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
  1005. /* Use PACK8 mode for 1byte per pixel formats. */
  1006. if (omap3isp_video_format_info(format->code)->bpp <= 8)
  1007. syn_mode |= ISPCCDC_SYN_MODE_PACK8;
  1008. else
  1009. syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
  1010. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  1011. /* Mosaic filter */
  1012. switch (format->code) {
  1013. case V4L2_MBUS_FMT_SRGGB10_1X10:
  1014. case V4L2_MBUS_FMT_SRGGB12_1X12:
  1015. ccdc_pattern = ccdc_srggb_pattern;
  1016. break;
  1017. case V4L2_MBUS_FMT_SBGGR10_1X10:
  1018. case V4L2_MBUS_FMT_SBGGR12_1X12:
  1019. ccdc_pattern = ccdc_sbggr_pattern;
  1020. break;
  1021. case V4L2_MBUS_FMT_SGBRG10_1X10:
  1022. case V4L2_MBUS_FMT_SGBRG12_1X12:
  1023. ccdc_pattern = ccdc_sgbrg_pattern;
  1024. break;
  1025. default:
  1026. /* Use GRBG */
  1027. ccdc_pattern = ccdc_sgrbg_pattern;
  1028. break;
  1029. }
  1030. ccdc_config_imgattr(ccdc, ccdc_pattern);
  1031. /* Generate VD0 on the last line of the image and VD1 on the
  1032. * 2/3 height line.
  1033. */
  1034. isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
  1035. ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
  1036. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
  1037. /* CCDC_PAD_SOURCE_OF */
  1038. format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
  1039. isp_reg_writel(isp, (0 << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
  1040. ((format->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
  1041. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
  1042. isp_reg_writel(isp, 0 << ISPCCDC_VERT_START_SLV0_SHIFT,
  1043. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
  1044. isp_reg_writel(isp, (format->height - 1)
  1045. << ISPCCDC_VERT_LINES_NLV_SHIFT,
  1046. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
  1047. ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
  1048. /* CCDC_PAD_SOURCE_VP */
  1049. format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
  1050. isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
  1051. (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
  1052. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
  1053. isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
  1054. ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
  1055. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
  1056. isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
  1057. (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
  1058. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
  1059. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1060. if (ccdc->lsc.request == NULL)
  1061. goto unlock;
  1062. WARN_ON(ccdc->lsc.active);
  1063. /* Get last good LSC configuration. If it is not supported for
  1064. * the current active resolution discard it.
  1065. */
  1066. if (ccdc->lsc.active == NULL &&
  1067. __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
  1068. ccdc->lsc.active = ccdc->lsc.request;
  1069. } else {
  1070. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  1071. schedule_work(&ccdc->lsc.table_work);
  1072. }
  1073. ccdc->lsc.request = NULL;
  1074. unlock:
  1075. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1076. ccdc_apply_controls(ccdc);
  1077. }
  1078. static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
  1079. {
  1080. struct isp_device *isp = to_isp_device(ccdc);
  1081. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
  1082. ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
  1083. }
  1084. static int ccdc_disable(struct isp_ccdc_device *ccdc)
  1085. {
  1086. unsigned long flags;
  1087. int ret = 0;
  1088. spin_lock_irqsave(&ccdc->lock, flags);
  1089. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
  1090. ccdc->stopping = CCDC_STOP_REQUEST;
  1091. spin_unlock_irqrestore(&ccdc->lock, flags);
  1092. ret = wait_event_timeout(ccdc->wait,
  1093. ccdc->stopping == CCDC_STOP_FINISHED,
  1094. msecs_to_jiffies(2000));
  1095. if (ret == 0) {
  1096. ret = -ETIMEDOUT;
  1097. dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
  1098. }
  1099. omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
  1100. mutex_lock(&ccdc->ioctl_lock);
  1101. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1102. ccdc->lsc.request = ccdc->lsc.active;
  1103. ccdc->lsc.active = NULL;
  1104. cancel_work_sync(&ccdc->lsc.table_work);
  1105. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1106. mutex_unlock(&ccdc->ioctl_lock);
  1107. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1108. return ret > 0 ? 0 : ret;
  1109. }
  1110. static void ccdc_enable(struct isp_ccdc_device *ccdc)
  1111. {
  1112. if (ccdc_lsc_is_configured(ccdc))
  1113. __ccdc_lsc_enable(ccdc, 1);
  1114. __ccdc_enable(ccdc, 1);
  1115. }
  1116. /* -----------------------------------------------------------------------------
  1117. * Interrupt handling
  1118. */
  1119. /*
  1120. * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
  1121. * @ccdc: Pointer to ISP CCDC device.
  1122. *
  1123. * Returns zero if the CCDC is idle and the image has been written to
  1124. * memory, too.
  1125. */
  1126. static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
  1127. {
  1128. struct isp_device *isp = to_isp_device(ccdc);
  1129. return omap3isp_ccdc_busy(ccdc)
  1130. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
  1131. ISPSBL_CCDC_WR_0_DATA_READY)
  1132. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
  1133. ISPSBL_CCDC_WR_0_DATA_READY)
  1134. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
  1135. ISPSBL_CCDC_WR_0_DATA_READY)
  1136. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
  1137. ISPSBL_CCDC_WR_0_DATA_READY);
  1138. }
  1139. /*
  1140. * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
  1141. * @ccdc: Pointer to ISP CCDC device.
  1142. * @max_wait: Max retry count in us for wait for idle/busy transition.
  1143. */
  1144. static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
  1145. unsigned int max_wait)
  1146. {
  1147. unsigned int wait = 0;
  1148. if (max_wait == 0)
  1149. max_wait = 10000; /* 10 ms */
  1150. for (wait = 0; wait <= max_wait; wait++) {
  1151. if (!ccdc_sbl_busy(ccdc))
  1152. return 0;
  1153. rmb();
  1154. udelay(1);
  1155. }
  1156. return -EBUSY;
  1157. }
  1158. /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
  1159. * @ccdc: Pointer to ISP CCDC device.
  1160. * @event: Pointing which event trigger handler
  1161. *
  1162. * Return 1 when the event and stopping request combination is satisfied,
  1163. * zero otherwise.
  1164. */
  1165. static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
  1166. {
  1167. int rval = 0;
  1168. switch ((ccdc->stopping & 3) | event) {
  1169. case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
  1170. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1171. __ccdc_lsc_enable(ccdc, 0);
  1172. __ccdc_enable(ccdc, 0);
  1173. ccdc->stopping = CCDC_STOP_EXECUTED;
  1174. return 1;
  1175. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
  1176. ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
  1177. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1178. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1179. rval = 1;
  1180. break;
  1181. case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
  1182. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1183. rval = 1;
  1184. break;
  1185. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
  1186. return 1;
  1187. }
  1188. if (ccdc->stopping == CCDC_STOP_FINISHED) {
  1189. wake_up(&ccdc->wait);
  1190. rval = 1;
  1191. }
  1192. return rval;
  1193. }
  1194. static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
  1195. {
  1196. struct video_device *vdev = &ccdc->subdev.devnode;
  1197. struct v4l2_event event;
  1198. memset(&event, 0, sizeof(event));
  1199. event.type = V4L2_EVENT_OMAP3ISP_HS_VS;
  1200. v4l2_event_queue(vdev, &event);
  1201. }
  1202. /*
  1203. * ccdc_lsc_isr - Handle LSC events
  1204. * @ccdc: Pointer to ISP CCDC device.
  1205. * @events: LSC events
  1206. */
  1207. static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1208. {
  1209. unsigned long flags;
  1210. if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
  1211. ccdc_lsc_error_handler(ccdc);
  1212. ccdc->error = 1;
  1213. dev_dbg(to_device(ccdc), "lsc prefetch error\n");
  1214. }
  1215. if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
  1216. return;
  1217. /* LSC_DONE interrupt occur, there are two cases
  1218. * 1. stopping for reconfiguration
  1219. * 2. stopping because of STREAM OFF command
  1220. */
  1221. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1222. if (ccdc->lsc.state == LSC_STATE_STOPPING)
  1223. ccdc->lsc.state = LSC_STATE_STOPPED;
  1224. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
  1225. goto done;
  1226. if (ccdc->lsc.state != LSC_STATE_RECONFIG)
  1227. goto done;
  1228. /* LSC is in STOPPING state, change to the new state */
  1229. ccdc->lsc.state = LSC_STATE_STOPPED;
  1230. /* This is an exception. Start of frame and LSC_DONE interrupt
  1231. * have been received on the same time. Skip this event and wait
  1232. * for better times.
  1233. */
  1234. if (events & IRQ0STATUS_HS_VS_IRQ)
  1235. goto done;
  1236. /* The LSC engine is stopped at this point. Enable it if there's a
  1237. * pending request.
  1238. */
  1239. if (ccdc->lsc.request == NULL)
  1240. goto done;
  1241. ccdc_lsc_enable(ccdc);
  1242. done:
  1243. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1244. }
  1245. static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
  1246. {
  1247. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1248. struct isp_device *isp = to_isp_device(ccdc);
  1249. struct isp_buffer *buffer;
  1250. int restart = 0;
  1251. /* The CCDC generates VD0 interrupts even when disabled (the datasheet
  1252. * doesn't explicitly state if that's supposed to happen or not, so it
  1253. * can be considered as a hardware bug or as a feature, but we have to
  1254. * deal with it anyway). Disabling the CCDC when no buffer is available
  1255. * would thus not be enough, we need to handle the situation explicitly.
  1256. */
  1257. if (list_empty(&ccdc->video_out.dmaqueue))
  1258. goto done;
  1259. /* We're in continuous mode, and memory writes were disabled due to a
  1260. * buffer underrun. Reenable them now that we have a buffer. The buffer
  1261. * address has been set in ccdc_video_queue.
  1262. */
  1263. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
  1264. restart = 1;
  1265. ccdc->underrun = 0;
  1266. goto done;
  1267. }
  1268. if (ccdc_sbl_wait_idle(ccdc, 1000)) {
  1269. dev_info(isp->dev, "CCDC won't become idle!\n");
  1270. goto done;
  1271. }
  1272. buffer = omap3isp_video_buffer_next(&ccdc->video_out, ccdc->error);
  1273. if (buffer != NULL) {
  1274. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1275. restart = 1;
  1276. }
  1277. pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
  1278. if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1279. isp_pipeline_ready(pipe))
  1280. omap3isp_pipeline_set_stream(pipe,
  1281. ISP_PIPELINE_STREAM_SINGLESHOT);
  1282. done:
  1283. ccdc->error = 0;
  1284. return restart;
  1285. }
  1286. /*
  1287. * ccdc_vd0_isr - Handle VD0 event
  1288. * @ccdc: Pointer to ISP CCDC device.
  1289. *
  1290. * Executes LSC deferred enablement before next frame starts.
  1291. */
  1292. static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
  1293. {
  1294. unsigned long flags;
  1295. int restart = 0;
  1296. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1297. restart = ccdc_isr_buffer(ccdc);
  1298. spin_lock_irqsave(&ccdc->lock, flags);
  1299. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
  1300. spin_unlock_irqrestore(&ccdc->lock, flags);
  1301. return;
  1302. }
  1303. if (!ccdc->shadow_update)
  1304. ccdc_apply_controls(ccdc);
  1305. spin_unlock_irqrestore(&ccdc->lock, flags);
  1306. if (restart)
  1307. ccdc_enable(ccdc);
  1308. }
  1309. /*
  1310. * ccdc_vd1_isr - Handle VD1 event
  1311. * @ccdc: Pointer to ISP CCDC device.
  1312. */
  1313. static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
  1314. {
  1315. unsigned long flags;
  1316. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1317. /*
  1318. * Depending on the CCDC pipeline state, CCDC stopping should be
  1319. * handled differently. In SINGLESHOT we emulate an internal CCDC
  1320. * stopping because the CCDC hw works only in continuous mode.
  1321. * When CONTINUOUS pipeline state is used and the CCDC writes it's
  1322. * data to memory the CCDC and LSC are stopped immediately but
  1323. * without change the CCDC stopping state machine. The CCDC
  1324. * stopping state machine should be used only when user request
  1325. * for stopping is received (SINGLESHOT is an exeption).
  1326. */
  1327. switch (ccdc->state) {
  1328. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1329. ccdc->stopping = CCDC_STOP_REQUEST;
  1330. break;
  1331. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1332. if (ccdc->output & CCDC_OUTPUT_MEMORY) {
  1333. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1334. __ccdc_lsc_enable(ccdc, 0);
  1335. __ccdc_enable(ccdc, 0);
  1336. }
  1337. break;
  1338. case ISP_PIPELINE_STREAM_STOPPED:
  1339. break;
  1340. }
  1341. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
  1342. goto done;
  1343. if (ccdc->lsc.request == NULL)
  1344. goto done;
  1345. /*
  1346. * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
  1347. * do the appropriate changes in registers
  1348. */
  1349. if (ccdc->lsc.state == LSC_STATE_RUNNING) {
  1350. __ccdc_lsc_enable(ccdc, 0);
  1351. ccdc->lsc.state = LSC_STATE_RECONFIG;
  1352. goto done;
  1353. }
  1354. /* LSC has been in STOPPED state, enable it */
  1355. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1356. ccdc_lsc_enable(ccdc);
  1357. done:
  1358. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1359. }
  1360. /*
  1361. * omap3isp_ccdc_isr - Configure CCDC during interframe time.
  1362. * @ccdc: Pointer to ISP CCDC device.
  1363. * @events: CCDC events
  1364. */
  1365. int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1366. {
  1367. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
  1368. return 0;
  1369. if (events & IRQ0STATUS_CCDC_VD1_IRQ)
  1370. ccdc_vd1_isr(ccdc);
  1371. ccdc_lsc_isr(ccdc, events);
  1372. if (events & IRQ0STATUS_CCDC_VD0_IRQ)
  1373. ccdc_vd0_isr(ccdc);
  1374. if (events & IRQ0STATUS_HS_VS_IRQ)
  1375. ccdc_hs_vs_isr(ccdc);
  1376. return 0;
  1377. }
  1378. /* -----------------------------------------------------------------------------
  1379. * ISP video operations
  1380. */
  1381. static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
  1382. {
  1383. struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
  1384. if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
  1385. return -ENODEV;
  1386. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1387. /* We now have a buffer queued on the output, restart the pipeline
  1388. * on the next CCDC interrupt if running in continuous mode (or when
  1389. * starting the stream).
  1390. */
  1391. ccdc->underrun = 1;
  1392. return 0;
  1393. }
  1394. static const struct isp_video_operations ccdc_video_ops = {
  1395. .queue = ccdc_video_queue,
  1396. };
  1397. /* -----------------------------------------------------------------------------
  1398. * V4L2 subdev operations
  1399. */
  1400. /*
  1401. * ccdc_ioctl - CCDC module private ioctl's
  1402. * @sd: ISP CCDC V4L2 subdevice
  1403. * @cmd: ioctl command
  1404. * @arg: ioctl argument
  1405. *
  1406. * Return 0 on success or a negative error code otherwise.
  1407. */
  1408. static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  1409. {
  1410. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1411. int ret;
  1412. switch (cmd) {
  1413. case VIDIOC_OMAP3ISP_CCDC_CFG:
  1414. mutex_lock(&ccdc->ioctl_lock);
  1415. ret = ccdc_config(ccdc, arg);
  1416. mutex_unlock(&ccdc->ioctl_lock);
  1417. break;
  1418. default:
  1419. return -ENOIOCTLCMD;
  1420. }
  1421. return ret;
  1422. }
  1423. static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1424. struct v4l2_event_subscription *sub)
  1425. {
  1426. if (sub->type != V4L2_EVENT_OMAP3ISP_HS_VS)
  1427. return -EINVAL;
  1428. return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS);
  1429. }
  1430. static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1431. struct v4l2_event_subscription *sub)
  1432. {
  1433. return v4l2_event_unsubscribe(fh, sub);
  1434. }
  1435. /*
  1436. * ccdc_set_stream - Enable/Disable streaming on the CCDC module
  1437. * @sd: ISP CCDC V4L2 subdevice
  1438. * @enable: Enable/disable stream
  1439. *
  1440. * When writing to memory, the CCDC hardware can't be enabled without a memory
  1441. * buffer to write to. As the s_stream operation is called in response to a
  1442. * STREAMON call without any buffer queued yet, just update the enabled field
  1443. * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
  1444. *
  1445. * When not writing to memory enable the CCDC immediately.
  1446. */
  1447. static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
  1448. {
  1449. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1450. struct isp_device *isp = to_isp_device(ccdc);
  1451. int ret = 0;
  1452. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
  1453. if (enable == ISP_PIPELINE_STREAM_STOPPED)
  1454. return 0;
  1455. omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1456. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1457. ISPCCDC_CFG_VDLC);
  1458. ccdc_configure(ccdc);
  1459. /* TODO: Don't configure the video port if all of its output
  1460. * links are inactive.
  1461. */
  1462. ccdc_config_vp(ccdc);
  1463. ccdc_enable_vp(ccdc, 1);
  1464. ccdc->error = 0;
  1465. ccdc_print_status(ccdc);
  1466. }
  1467. switch (enable) {
  1468. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1469. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1470. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1471. if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
  1472. ccdc_enable(ccdc);
  1473. ccdc->underrun = 0;
  1474. break;
  1475. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1476. if (ccdc->output & CCDC_OUTPUT_MEMORY &&
  1477. ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
  1478. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1479. ccdc_enable(ccdc);
  1480. break;
  1481. case ISP_PIPELINE_STREAM_STOPPED:
  1482. ret = ccdc_disable(ccdc);
  1483. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1484. omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1485. omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1486. ccdc->underrun = 0;
  1487. break;
  1488. }
  1489. ccdc->state = enable;
  1490. return ret;
  1491. }
  1492. static struct v4l2_mbus_framefmt *
  1493. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1494. unsigned int pad, enum v4l2_subdev_format_whence which)
  1495. {
  1496. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1497. return v4l2_subdev_get_try_format(fh, pad);
  1498. else
  1499. return &ccdc->formats[pad];
  1500. }
  1501. /*
  1502. * ccdc_try_format - Try video format on a pad
  1503. * @ccdc: ISP CCDC device
  1504. * @fh : V4L2 subdev file handle
  1505. * @pad: Pad number
  1506. * @fmt: Format
  1507. */
  1508. static void
  1509. ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1510. unsigned int pad, struct v4l2_mbus_framefmt *fmt,
  1511. enum v4l2_subdev_format_whence which)
  1512. {
  1513. struct v4l2_mbus_framefmt *format;
  1514. const struct isp_format_info *info;
  1515. unsigned int width = fmt->width;
  1516. unsigned int height = fmt->height;
  1517. unsigned int i;
  1518. switch (pad) {
  1519. case CCDC_PAD_SINK:
  1520. /* TODO: If the CCDC output formatter pad is connected directly
  1521. * to the resizer, only YUV formats can be used.
  1522. */
  1523. for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
  1524. if (fmt->code == ccdc_fmts[i])
  1525. break;
  1526. }
  1527. /* If not found, use SGRBG10 as default */
  1528. if (i >= ARRAY_SIZE(ccdc_fmts))
  1529. fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1530. /* Clamp the input size. */
  1531. fmt->width = clamp_t(u32, width, 32, 4096);
  1532. fmt->height = clamp_t(u32, height, 32, 4096);
  1533. break;
  1534. case CCDC_PAD_SOURCE_OF:
  1535. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1536. memcpy(fmt, format, sizeof(*fmt));
  1537. /* The data formatter truncates the number of horizontal output
  1538. * pixels to a multiple of 16. To avoid clipping data, allow
  1539. * callers to request an output size bigger than the input size
  1540. * up to the nearest multiple of 16.
  1541. */
  1542. fmt->width = clamp_t(u32, width, 32, (fmt->width + 15) & ~15);
  1543. fmt->width &= ~15;
  1544. fmt->height = clamp_t(u32, height, 32, fmt->height);
  1545. break;
  1546. case CCDC_PAD_SOURCE_VP:
  1547. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1548. memcpy(fmt, format, sizeof(*fmt));
  1549. /* The video port interface truncates the data to 10 bits. */
  1550. info = omap3isp_video_format_info(fmt->code);
  1551. fmt->code = info->truncated;
  1552. /* The number of lines that can be clocked out from the video
  1553. * port output must be at least one line less than the number
  1554. * of input lines.
  1555. */
  1556. fmt->width = clamp_t(u32, width, 32, fmt->width);
  1557. fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
  1558. break;
  1559. }
  1560. /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
  1561. * stored on 2 bytes.
  1562. */
  1563. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  1564. fmt->field = V4L2_FIELD_NONE;
  1565. }
  1566. /*
  1567. * ccdc_enum_mbus_code - Handle pixel format enumeration
  1568. * @sd : pointer to v4l2 subdev structure
  1569. * @fh : V4L2 subdev file handle
  1570. * @code : pointer to v4l2_subdev_mbus_code_enum structure
  1571. * return -EINVAL or zero on success
  1572. */
  1573. static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
  1574. struct v4l2_subdev_fh *fh,
  1575. struct v4l2_subdev_mbus_code_enum *code)
  1576. {
  1577. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1578. struct v4l2_mbus_framefmt *format;
  1579. switch (code->pad) {
  1580. case CCDC_PAD_SINK:
  1581. if (code->index >= ARRAY_SIZE(ccdc_fmts))
  1582. return -EINVAL;
  1583. code->code = ccdc_fmts[code->index];
  1584. break;
  1585. case CCDC_PAD_SOURCE_OF:
  1586. case CCDC_PAD_SOURCE_VP:
  1587. /* No format conversion inside CCDC */
  1588. if (code->index != 0)
  1589. return -EINVAL;
  1590. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK,
  1591. V4L2_SUBDEV_FORMAT_TRY);
  1592. code->code = format->code;
  1593. break;
  1594. default:
  1595. return -EINVAL;
  1596. }
  1597. return 0;
  1598. }
  1599. static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
  1600. struct v4l2_subdev_fh *fh,
  1601. struct v4l2_subdev_frame_size_enum *fse)
  1602. {
  1603. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1604. struct v4l2_mbus_framefmt format;
  1605. if (fse->index != 0)
  1606. return -EINVAL;
  1607. format.code = fse->code;
  1608. format.width = 1;
  1609. format.height = 1;
  1610. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1611. fse->min_width = format.width;
  1612. fse->min_height = format.height;
  1613. if (format.code != fse->code)
  1614. return -EINVAL;
  1615. format.code = fse->code;
  1616. format.width = -1;
  1617. format.height = -1;
  1618. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1619. fse->max_width = format.width;
  1620. fse->max_height = format.height;
  1621. return 0;
  1622. }
  1623. /*
  1624. * ccdc_get_format - Retrieve the video format on a pad
  1625. * @sd : ISP CCDC V4L2 subdevice
  1626. * @fh : V4L2 subdev file handle
  1627. * @fmt: Format
  1628. *
  1629. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1630. * to the format type.
  1631. */
  1632. static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1633. struct v4l2_subdev_format *fmt)
  1634. {
  1635. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1636. struct v4l2_mbus_framefmt *format;
  1637. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1638. if (format == NULL)
  1639. return -EINVAL;
  1640. fmt->format = *format;
  1641. return 0;
  1642. }
  1643. /*
  1644. * ccdc_set_format - Set the video format on a pad
  1645. * @sd : ISP CCDC V4L2 subdevice
  1646. * @fh : V4L2 subdev file handle
  1647. * @fmt: Format
  1648. *
  1649. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1650. * to the format type.
  1651. */
  1652. static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1653. struct v4l2_subdev_format *fmt)
  1654. {
  1655. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1656. struct v4l2_mbus_framefmt *format;
  1657. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1658. if (format == NULL)
  1659. return -EINVAL;
  1660. ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
  1661. *format = fmt->format;
  1662. /* Propagate the format from sink to source */
  1663. if (fmt->pad == CCDC_PAD_SINK) {
  1664. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
  1665. fmt->which);
  1666. *format = fmt->format;
  1667. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
  1668. fmt->which);
  1669. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
  1670. fmt->which);
  1671. *format = fmt->format;
  1672. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
  1673. fmt->which);
  1674. }
  1675. return 0;
  1676. }
  1677. /*
  1678. * ccdc_init_formats - Initialize formats on all pads
  1679. * @sd: ISP CCDC V4L2 subdevice
  1680. * @fh: V4L2 subdev file handle
  1681. *
  1682. * Initialize all pad formats with default values. If fh is not NULL, try
  1683. * formats are initialized on the file handle. Otherwise active formats are
  1684. * initialized on the device.
  1685. */
  1686. static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  1687. {
  1688. struct v4l2_subdev_format format;
  1689. memset(&format, 0, sizeof(format));
  1690. format.pad = CCDC_PAD_SINK;
  1691. format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  1692. format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1693. format.format.width = 4096;
  1694. format.format.height = 4096;
  1695. ccdc_set_format(sd, fh, &format);
  1696. return 0;
  1697. }
  1698. /* V4L2 subdev core operations */
  1699. static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
  1700. .ioctl = ccdc_ioctl,
  1701. .subscribe_event = ccdc_subscribe_event,
  1702. .unsubscribe_event = ccdc_unsubscribe_event,
  1703. };
  1704. /* V4L2 subdev video operations */
  1705. static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
  1706. .s_stream = ccdc_set_stream,
  1707. };
  1708. /* V4L2 subdev pad operations */
  1709. static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
  1710. .enum_mbus_code = ccdc_enum_mbus_code,
  1711. .enum_frame_size = ccdc_enum_frame_size,
  1712. .get_fmt = ccdc_get_format,
  1713. .set_fmt = ccdc_set_format,
  1714. };
  1715. /* V4L2 subdev operations */
  1716. static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
  1717. .core = &ccdc_v4l2_core_ops,
  1718. .video = &ccdc_v4l2_video_ops,
  1719. .pad = &ccdc_v4l2_pad_ops,
  1720. };
  1721. /* V4L2 subdev internal operations */
  1722. static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
  1723. .open = ccdc_init_formats,
  1724. };
  1725. /* -----------------------------------------------------------------------------
  1726. * Media entity operations
  1727. */
  1728. /*
  1729. * ccdc_link_setup - Setup CCDC connections
  1730. * @entity: CCDC media entity
  1731. * @local: Pad at the local end of the link
  1732. * @remote: Pad at the remote end of the link
  1733. * @flags: Link flags
  1734. *
  1735. * return -EINVAL or zero on success
  1736. */
  1737. static int ccdc_link_setup(struct media_entity *entity,
  1738. const struct media_pad *local,
  1739. const struct media_pad *remote, u32 flags)
  1740. {
  1741. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1742. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1743. struct isp_device *isp = to_isp_device(ccdc);
  1744. switch (local->index | media_entity_type(remote->entity)) {
  1745. case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
  1746. /* Read from the sensor (parallel interface), CCP2, CSI2a or
  1747. * CSI2c.
  1748. */
  1749. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1750. ccdc->input = CCDC_INPUT_NONE;
  1751. break;
  1752. }
  1753. if (ccdc->input != CCDC_INPUT_NONE)
  1754. return -EBUSY;
  1755. if (remote->entity == &isp->isp_ccp2.subdev.entity)
  1756. ccdc->input = CCDC_INPUT_CCP2B;
  1757. else if (remote->entity == &isp->isp_csi2a.subdev.entity)
  1758. ccdc->input = CCDC_INPUT_CSI2A;
  1759. else if (remote->entity == &isp->isp_csi2c.subdev.entity)
  1760. ccdc->input = CCDC_INPUT_CSI2C;
  1761. else
  1762. ccdc->input = CCDC_INPUT_PARALLEL;
  1763. break;
  1764. /*
  1765. * The ISP core doesn't support pipelines with multiple video outputs.
  1766. * Revisit this when it will be implemented, and return -EBUSY for now.
  1767. */
  1768. case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
  1769. /* Write to preview engine, histogram and H3A. When none of
  1770. * those links are active, the video port can be disabled.
  1771. */
  1772. if (flags & MEDIA_LNK_FL_ENABLED) {
  1773. if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
  1774. return -EBUSY;
  1775. ccdc->output |= CCDC_OUTPUT_PREVIEW;
  1776. } else {
  1777. ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
  1778. }
  1779. break;
  1780. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
  1781. /* Write to memory */
  1782. if (flags & MEDIA_LNK_FL_ENABLED) {
  1783. if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
  1784. return -EBUSY;
  1785. ccdc->output |= CCDC_OUTPUT_MEMORY;
  1786. } else {
  1787. ccdc->output &= ~CCDC_OUTPUT_MEMORY;
  1788. }
  1789. break;
  1790. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
  1791. /* Write to resizer */
  1792. if (flags & MEDIA_LNK_FL_ENABLED) {
  1793. if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
  1794. return -EBUSY;
  1795. ccdc->output |= CCDC_OUTPUT_RESIZER;
  1796. } else {
  1797. ccdc->output &= ~CCDC_OUTPUT_RESIZER;
  1798. }
  1799. break;
  1800. default:
  1801. return -EINVAL;
  1802. }
  1803. return 0;
  1804. }
  1805. /* media operations */
  1806. static const struct media_entity_operations ccdc_media_ops = {
  1807. .link_setup = ccdc_link_setup,
  1808. };
  1809. /*
  1810. * ccdc_init_entities - Initialize V4L2 subdev and media entity
  1811. * @ccdc: ISP CCDC module
  1812. *
  1813. * Return 0 on success and a negative error code on failure.
  1814. */
  1815. static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
  1816. {
  1817. struct v4l2_subdev *sd = &ccdc->subdev;
  1818. struct media_pad *pads = ccdc->pads;
  1819. struct media_entity *me = &sd->entity;
  1820. int ret;
  1821. ccdc->input = CCDC_INPUT_NONE;
  1822. v4l2_subdev_init(sd, &ccdc_v4l2_ops);
  1823. sd->internal_ops = &ccdc_v4l2_internal_ops;
  1824. strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
  1825. sd->grp_id = 1 << 16; /* group ID for isp subdevs */
  1826. v4l2_set_subdevdata(sd, ccdc);
  1827. sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
  1828. pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1829. pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
  1830. pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
  1831. me->ops = &ccdc_media_ops;
  1832. ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
  1833. if (ret < 0)
  1834. return ret;
  1835. ccdc_init_formats(sd, NULL);
  1836. ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1837. ccdc->video_out.ops = &ccdc_video_ops;
  1838. ccdc->video_out.isp = to_isp_device(ccdc);
  1839. ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
  1840. ccdc->video_out.bpl_alignment = 32;
  1841. ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
  1842. if (ret < 0)
  1843. return ret;
  1844. /* Connect the CCDC subdev to the video node. */
  1845. ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
  1846. &ccdc->video_out.video.entity, 0, 0);
  1847. if (ret < 0)
  1848. return ret;
  1849. return 0;
  1850. }
  1851. void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
  1852. {
  1853. media_entity_cleanup(&ccdc->subdev.entity);
  1854. v4l2_device_unregister_subdev(&ccdc->subdev);
  1855. omap3isp_video_unregister(&ccdc->video_out);
  1856. }
  1857. int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
  1858. struct v4l2_device *vdev)
  1859. {
  1860. int ret;
  1861. /* Register the subdev and video node. */
  1862. ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
  1863. if (ret < 0)
  1864. goto error;
  1865. ret = omap3isp_video_register(&ccdc->video_out, vdev);
  1866. if (ret < 0)
  1867. goto error;
  1868. return 0;
  1869. error:
  1870. omap3isp_ccdc_unregister_entities(ccdc);
  1871. return ret;
  1872. }
  1873. /* -----------------------------------------------------------------------------
  1874. * ISP CCDC initialisation and cleanup
  1875. */
  1876. /*
  1877. * omap3isp_ccdc_init - CCDC module initialization.
  1878. * @dev: Device pointer specific to the OMAP3 ISP.
  1879. *
  1880. * TODO: Get the initialisation values from platform data.
  1881. *
  1882. * Return 0 on success or a negative error code otherwise.
  1883. */
  1884. int omap3isp_ccdc_init(struct isp_device *isp)
  1885. {
  1886. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  1887. spin_lock_init(&ccdc->lock);
  1888. init_waitqueue_head(&ccdc->wait);
  1889. mutex_init(&ccdc->ioctl_lock);
  1890. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1891. INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
  1892. ccdc->lsc.state = LSC_STATE_STOPPED;
  1893. INIT_LIST_HEAD(&ccdc->lsc.free_queue);
  1894. spin_lock_init(&ccdc->lsc.req_lock);
  1895. ccdc->syncif.ccdc_mastermode = 0;
  1896. ccdc->syncif.datapol = 0;
  1897. ccdc->syncif.datsz = 0;
  1898. ccdc->syncif.fldmode = 0;
  1899. ccdc->syncif.fldout = 0;
  1900. ccdc->syncif.fldpol = 0;
  1901. ccdc->syncif.fldstat = 0;
  1902. ccdc->clamp.oblen = 0;
  1903. ccdc->clamp.dcsubval = 0;
  1904. ccdc->vpcfg.pixelclk = 0;
  1905. ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
  1906. ccdc_apply_controls(ccdc);
  1907. return ccdc_init_entities(ccdc);
  1908. }
  1909. /*
  1910. * omap3isp_ccdc_cleanup - CCDC module cleanup.
  1911. * @dev: Device pointer specific to the OMAP3 ISP.
  1912. */
  1913. void omap3isp_ccdc_cleanup(struct isp_device *isp)
  1914. {
  1915. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  1916. /* Free LSC requests. As the CCDC is stopped there's no active request,
  1917. * so only the pending request and the free queue need to be handled.
  1918. */
  1919. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1920. cancel_work_sync(&ccdc->lsc.table_work);
  1921. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1922. if (ccdc->fpc.fpcaddr != 0)
  1923. iommu_vfree(isp->iommu, ccdc->fpc.fpcaddr);
  1924. }