iwl3945-base.c 118 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #define DRV_NAME "iwl3945"
  45. #include "iwl-fh.h"
  46. #include "iwl-3945-fh.h"
  47. #include "iwl-commands.h"
  48. #include "iwl-sta.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .sw_crypto = 1,
  79. .restart_fw = 1,
  80. /* the rest are 0 by default */
  81. };
  82. /**
  83. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  84. * @priv: eeprom and antenna fields are used to determine antenna flags
  85. *
  86. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  87. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  88. *
  89. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  90. * IWL_ANTENNA_MAIN - Force MAIN antenna
  91. * IWL_ANTENNA_AUX - Force AUX antenna
  92. */
  93. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  94. {
  95. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  96. switch (iwl3945_mod_params.antenna) {
  97. case IWL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IWL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IWL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  110. iwl3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  114. struct ieee80211_key_conf *keyconf,
  115. u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == priv->hw_params.bcast_sta_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&priv->sta_lock, flags);
  128. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  129. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  131. keyconf->keylen);
  132. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  133. keyconf->keylen);
  134. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  135. == STA_KEY_FLG_NO_ENC)
  136. priv->stations[sta_id].sta.key.key_offset =
  137. iwl_get_free_ucode_key_index(priv);
  138. /* else, we are overriding an existing key => no need to allocated room
  139. * in uCode. */
  140. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  141. "no space for a new key");
  142. priv->stations[sta_id].sta.key.key_flags = key_flags;
  143. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  144. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  145. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  146. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  147. spin_unlock_irqrestore(&priv->sta_lock, flags);
  148. return ret;
  149. }
  150. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  151. struct ieee80211_key_conf *keyconf,
  152. u8 sta_id)
  153. {
  154. return -EOPNOTSUPP;
  155. }
  156. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  157. struct ieee80211_key_conf *keyconf,
  158. u8 sta_id)
  159. {
  160. return -EOPNOTSUPP;
  161. }
  162. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  163. {
  164. unsigned long flags;
  165. spin_lock_irqsave(&priv->sta_lock, flags);
  166. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  167. memset(&priv->stations[sta_id].sta.key, 0,
  168. sizeof(struct iwl4965_keyinfo));
  169. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  170. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  171. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  172. spin_unlock_irqrestore(&priv->sta_lock, flags);
  173. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  174. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  175. return 0;
  176. }
  177. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  178. struct ieee80211_key_conf *keyconf, u8 sta_id)
  179. {
  180. int ret = 0;
  181. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  182. switch (keyconf->alg) {
  183. case ALG_CCMP:
  184. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  185. break;
  186. case ALG_TKIP:
  187. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  188. break;
  189. case ALG_WEP:
  190. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  191. break;
  192. default:
  193. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  194. ret = -EINVAL;
  195. }
  196. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  197. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  198. sta_id, ret);
  199. return ret;
  200. }
  201. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  202. {
  203. int ret = -EOPNOTSUPP;
  204. return ret;
  205. }
  206. static int iwl3945_set_static_key(struct iwl_priv *priv,
  207. struct ieee80211_key_conf *key)
  208. {
  209. if (key->alg == ALG_WEP)
  210. return -EOPNOTSUPP;
  211. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  212. return -EINVAL;
  213. }
  214. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  215. {
  216. struct list_head *element;
  217. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  218. priv->frames_count);
  219. while (!list_empty(&priv->free_frames)) {
  220. element = priv->free_frames.next;
  221. list_del(element);
  222. kfree(list_entry(element, struct iwl3945_frame, list));
  223. priv->frames_count--;
  224. }
  225. if (priv->frames_count) {
  226. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  227. priv->frames_count);
  228. priv->frames_count = 0;
  229. }
  230. }
  231. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  232. {
  233. struct iwl3945_frame *frame;
  234. struct list_head *element;
  235. if (list_empty(&priv->free_frames)) {
  236. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  237. if (!frame) {
  238. IWL_ERR(priv, "Could not allocate frame!\n");
  239. return NULL;
  240. }
  241. priv->frames_count++;
  242. return frame;
  243. }
  244. element = priv->free_frames.next;
  245. list_del(element);
  246. return list_entry(element, struct iwl3945_frame, list);
  247. }
  248. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  249. {
  250. memset(frame, 0, sizeof(*frame));
  251. list_add(&frame->list, &priv->free_frames);
  252. }
  253. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  254. struct ieee80211_hdr *hdr,
  255. int left)
  256. {
  257. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  258. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  259. (priv->iw_mode != NL80211_IFTYPE_AP)))
  260. return 0;
  261. if (priv->ibss_beacon->len > left)
  262. return 0;
  263. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  264. return priv->ibss_beacon->len;
  265. }
  266. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  267. {
  268. struct iwl3945_frame *frame;
  269. unsigned int frame_size;
  270. int rc;
  271. u8 rate;
  272. frame = iwl3945_get_free_frame(priv);
  273. if (!frame) {
  274. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  275. "command.\n");
  276. return -ENOMEM;
  277. }
  278. rate = iwl_rate_get_lowest_plcp(priv);
  279. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  280. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  281. &frame->u.cmd[0]);
  282. iwl3945_free_frame(priv, frame);
  283. return rc;
  284. }
  285. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  286. {
  287. if (priv->shared_virt)
  288. pci_free_consistent(priv->pci_dev,
  289. sizeof(struct iwl3945_shared),
  290. priv->shared_virt,
  291. priv->shared_phys);
  292. }
  293. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  294. struct ieee80211_tx_info *info,
  295. struct iwl_device_cmd *cmd,
  296. struct sk_buff *skb_frag,
  297. int sta_id)
  298. {
  299. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  300. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  301. switch (keyinfo->alg) {
  302. case ALG_CCMP:
  303. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  304. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  305. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  306. break;
  307. case ALG_TKIP:
  308. break;
  309. case ALG_WEP:
  310. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  311. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  312. if (keyinfo->keylen == 13)
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  315. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  316. "with key %d\n", info->control.hw_key->hw_key_idx);
  317. break;
  318. default:
  319. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  320. break;
  321. }
  322. }
  323. /*
  324. * handle build REPLY_TX command notification.
  325. */
  326. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  327. struct iwl_device_cmd *cmd,
  328. struct ieee80211_tx_info *info,
  329. struct ieee80211_hdr *hdr, u8 std_id)
  330. {
  331. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  332. __le32 tx_flags = tx_cmd->tx_flags;
  333. __le16 fc = hdr->frame_control;
  334. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  335. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  336. tx_flags |= TX_CMD_FLG_ACK_MSK;
  337. if (ieee80211_is_mgmt(fc))
  338. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  339. if (ieee80211_is_probe_resp(fc) &&
  340. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  341. tx_flags |= TX_CMD_FLG_TSF_MSK;
  342. } else {
  343. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. }
  346. tx_cmd->sta_id = std_id;
  347. if (ieee80211_has_morefrags(fc))
  348. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  349. if (ieee80211_is_data_qos(fc)) {
  350. u8 *qc = ieee80211_get_qos_ctl(hdr);
  351. tx_cmd->tid_tspec = qc[0] & 0xf;
  352. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  353. } else {
  354. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  355. }
  356. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  357. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  358. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  359. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  360. if (ieee80211_is_mgmt(fc)) {
  361. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  362. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  363. else
  364. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  365. } else {
  366. tx_cmd->timeout.pm_frame_timeout = 0;
  367. }
  368. tx_cmd->driver_txop = 0;
  369. tx_cmd->tx_flags = tx_flags;
  370. tx_cmd->next_frame_len = 0;
  371. }
  372. /*
  373. * start REPLY_TX command process
  374. */
  375. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  376. {
  377. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  378. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  379. struct iwl3945_tx_cmd *tx_cmd;
  380. struct iwl_tx_queue *txq = NULL;
  381. struct iwl_queue *q = NULL;
  382. struct iwl_device_cmd *out_cmd;
  383. struct iwl_cmd_meta *out_meta;
  384. dma_addr_t phys_addr;
  385. dma_addr_t txcmd_phys;
  386. int txq_id = skb_get_queue_mapping(skb);
  387. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  388. u8 id;
  389. u8 unicast;
  390. u8 sta_id;
  391. u8 tid = 0;
  392. u16 seq_number = 0;
  393. __le16 fc;
  394. u8 wait_write_ptr = 0;
  395. u8 *qc = NULL;
  396. unsigned long flags;
  397. int rc;
  398. spin_lock_irqsave(&priv->lock, flags);
  399. if (iwl_is_rfkill(priv)) {
  400. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  401. goto drop_unlock;
  402. }
  403. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  404. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  405. goto drop_unlock;
  406. }
  407. unicast = !is_multicast_ether_addr(hdr->addr1);
  408. id = 0;
  409. fc = hdr->frame_control;
  410. #ifdef CONFIG_IWLWIFI_DEBUG
  411. if (ieee80211_is_auth(fc))
  412. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  413. else if (ieee80211_is_assoc_req(fc))
  414. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  415. else if (ieee80211_is_reassoc_req(fc))
  416. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  417. #endif
  418. /* drop all non-injected data frame if we are not associated */
  419. if (ieee80211_is_data(fc) &&
  420. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  421. (!iwl_is_associated(priv) ||
  422. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  423. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  424. goto drop_unlock;
  425. }
  426. spin_unlock_irqrestore(&priv->lock, flags);
  427. hdr_len = ieee80211_hdrlen(fc);
  428. /* Find (or create) index into station table for destination station */
  429. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  430. sta_id = priv->hw_params.bcast_sta_id;
  431. else
  432. sta_id = iwl_get_sta_id(priv, hdr);
  433. if (sta_id == IWL_INVALID_STATION) {
  434. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  435. hdr->addr1);
  436. goto drop;
  437. }
  438. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  439. if (ieee80211_is_data_qos(fc)) {
  440. qc = ieee80211_get_qos_ctl(hdr);
  441. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  442. if (unlikely(tid >= MAX_TID_COUNT))
  443. goto drop;
  444. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  445. IEEE80211_SCTL_SEQ;
  446. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  447. (hdr->seq_ctrl &
  448. cpu_to_le16(IEEE80211_SCTL_FRAG));
  449. seq_number += 0x10;
  450. }
  451. /* Descriptor for chosen Tx queue */
  452. txq = &priv->txq[txq_id];
  453. q = &txq->q;
  454. spin_lock_irqsave(&priv->lock, flags);
  455. idx = get_cmd_index(q, q->write_ptr, 0);
  456. /* Set up driver data for this TFD */
  457. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  458. txq->txb[q->write_ptr].skb[0] = skb;
  459. /* Init first empty entry in queue's array of Tx/cmd buffers */
  460. out_cmd = txq->cmd[idx];
  461. out_meta = &txq->meta[idx];
  462. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  463. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  464. memset(tx_cmd, 0, sizeof(*tx_cmd));
  465. /*
  466. * Set up the Tx-command (not MAC!) header.
  467. * Store the chosen Tx queue and TFD index within the sequence field;
  468. * after Tx, uCode's Tx response will return this value so driver can
  469. * locate the frame within the tx queue and do post-tx processing.
  470. */
  471. out_cmd->hdr.cmd = REPLY_TX;
  472. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  473. INDEX_TO_SEQ(q->write_ptr)));
  474. /* Copy MAC header from skb into command buffer */
  475. memcpy(tx_cmd->hdr, hdr, hdr_len);
  476. if (info->control.hw_key)
  477. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  478. /* TODO need this for burst mode later on */
  479. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  480. /* set is_hcca to 0; it probably will never be implemented */
  481. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  482. /* Total # bytes to be transmitted */
  483. len = (u16)skb->len;
  484. tx_cmd->len = cpu_to_le16(len);
  485. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  486. iwl_update_stats(priv, true, fc, len);
  487. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  488. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  489. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  490. txq->need_update = 1;
  491. if (qc)
  492. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  493. } else {
  494. wait_write_ptr = 1;
  495. txq->need_update = 0;
  496. }
  497. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  498. le16_to_cpu(out_cmd->hdr.sequence));
  499. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
  500. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  501. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  502. ieee80211_hdrlen(fc));
  503. /*
  504. * Use the first empty entry in this queue's command buffer array
  505. * to contain the Tx command and MAC header concatenated together
  506. * (payload data will be in another buffer).
  507. * Size of this varies, due to varying MAC header length.
  508. * If end is not dword aligned, we'll have 2 extra bytes at the end
  509. * of the MAC header (device reads on dword boundaries).
  510. * We'll tell device about this padding later.
  511. */
  512. len = sizeof(struct iwl3945_tx_cmd) +
  513. sizeof(struct iwl_cmd_header) + hdr_len;
  514. len_org = len;
  515. len = (len + 3) & ~3;
  516. if (len_org != len)
  517. len_org = 1;
  518. else
  519. len_org = 0;
  520. /* Physical address of this Tx command's header (not MAC header!),
  521. * within command buffer array. */
  522. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  523. len, PCI_DMA_TODEVICE);
  524. /* we do not map meta data ... so we can safely access address to
  525. * provide to unmap command*/
  526. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  527. pci_unmap_len_set(out_meta, len, len);
  528. /* Add buffer containing Tx command and MAC(!) header to TFD's
  529. * first entry */
  530. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  531. txcmd_phys, len, 1, 0);
  532. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  533. * if any (802.11 null frames have no payload). */
  534. len = skb->len - hdr_len;
  535. if (len) {
  536. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  537. len, PCI_DMA_TODEVICE);
  538. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  539. phys_addr, len,
  540. 0, U32_PAD(len));
  541. }
  542. /* Tell device the write index *just past* this latest filled TFD */
  543. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  544. rc = iwl_txq_update_write_ptr(priv, txq);
  545. spin_unlock_irqrestore(&priv->lock, flags);
  546. if (rc)
  547. return rc;
  548. if ((iwl_queue_space(q) < q->high_mark)
  549. && priv->mac80211_registered) {
  550. if (wait_write_ptr) {
  551. spin_lock_irqsave(&priv->lock, flags);
  552. txq->need_update = 1;
  553. iwl_txq_update_write_ptr(priv, txq);
  554. spin_unlock_irqrestore(&priv->lock, flags);
  555. }
  556. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  557. }
  558. return 0;
  559. drop_unlock:
  560. spin_unlock_irqrestore(&priv->lock, flags);
  561. drop:
  562. return -1;
  563. }
  564. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  565. #include "iwl-spectrum.h"
  566. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  567. #define BEACON_TIME_MASK_HIGH 0xFF000000
  568. #define TIME_UNIT 1024
  569. /*
  570. * extended beacon time format
  571. * time in usec will be changed into a 32-bit value in 8:24 format
  572. * the high 1 byte is the beacon counts
  573. * the lower 3 bytes is the time in usec within one beacon interval
  574. */
  575. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  576. {
  577. u32 quot;
  578. u32 rem;
  579. u32 interval = beacon_interval * 1024;
  580. if (!interval || !usec)
  581. return 0;
  582. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  583. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  584. return (quot << 24) + rem;
  585. }
  586. /* base is usually what we get from ucode with each received frame,
  587. * the same as HW timer counter counting down
  588. */
  589. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  590. {
  591. u32 base_low = base & BEACON_TIME_MASK_LOW;
  592. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  593. u32 interval = beacon_interval * TIME_UNIT;
  594. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  595. (addon & BEACON_TIME_MASK_HIGH);
  596. if (base_low > addon_low)
  597. res += base_low - addon_low;
  598. else if (base_low < addon_low) {
  599. res += interval + base_low - addon_low;
  600. res += (1 << 24);
  601. } else
  602. res += (1 << 24);
  603. return cpu_to_le32(res);
  604. }
  605. static int iwl3945_get_measurement(struct iwl_priv *priv,
  606. struct ieee80211_measurement_params *params,
  607. u8 type)
  608. {
  609. struct iwl_spectrum_cmd spectrum;
  610. struct iwl_rx_packet *pkt;
  611. struct iwl_host_cmd cmd = {
  612. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  613. .data = (void *)&spectrum,
  614. .flags = CMD_WANT_SKB,
  615. };
  616. u32 add_time = le64_to_cpu(params->start_time);
  617. int rc;
  618. int spectrum_resp_status;
  619. int duration = le16_to_cpu(params->duration);
  620. if (iwl_is_associated(priv))
  621. add_time =
  622. iwl3945_usecs_to_beacons(
  623. le64_to_cpu(params->start_time) - priv->last_tsf,
  624. le16_to_cpu(priv->rxon_timing.beacon_interval));
  625. memset(&spectrum, 0, sizeof(spectrum));
  626. spectrum.channel_count = cpu_to_le16(1);
  627. spectrum.flags =
  628. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  629. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  630. cmd.len = sizeof(spectrum);
  631. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  632. if (iwl_is_associated(priv))
  633. spectrum.start_time =
  634. iwl3945_add_beacon_time(priv->last_beacon_time,
  635. add_time,
  636. le16_to_cpu(priv->rxon_timing.beacon_interval));
  637. else
  638. spectrum.start_time = 0;
  639. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  640. spectrum.channels[0].channel = params->channel;
  641. spectrum.channels[0].type = type;
  642. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  643. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  644. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  645. rc = iwl_send_cmd_sync(priv, &cmd);
  646. if (rc)
  647. return rc;
  648. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  649. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  650. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  651. rc = -EIO;
  652. }
  653. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  654. switch (spectrum_resp_status) {
  655. case 0: /* Command will be handled */
  656. if (pkt->u.spectrum.id != 0xff) {
  657. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  658. pkt->u.spectrum.id);
  659. priv->measurement_status &= ~MEASUREMENT_READY;
  660. }
  661. priv->measurement_status |= MEASUREMENT_ACTIVE;
  662. rc = 0;
  663. break;
  664. case 1: /* Command will not be handled */
  665. rc = -EAGAIN;
  666. break;
  667. }
  668. free_pages(cmd.reply_page, priv->hw_params.rx_page_order);
  669. return rc;
  670. }
  671. #endif
  672. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  673. struct iwl_rx_mem_buffer *rxb)
  674. {
  675. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  676. struct iwl_alive_resp *palive;
  677. struct delayed_work *pwork;
  678. palive = &pkt->u.alive_frame;
  679. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  680. "0x%01X 0x%01X\n",
  681. palive->is_valid, palive->ver_type,
  682. palive->ver_subtype);
  683. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  684. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  685. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  686. sizeof(struct iwl_alive_resp));
  687. pwork = &priv->init_alive_start;
  688. } else {
  689. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  690. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  691. sizeof(struct iwl_alive_resp));
  692. pwork = &priv->alive_start;
  693. iwl3945_disable_events(priv);
  694. }
  695. /* We delay the ALIVE response by 5ms to
  696. * give the HW RF Kill time to activate... */
  697. if (palive->is_valid == UCODE_VALID_OK)
  698. queue_delayed_work(priv->workqueue, pwork,
  699. msecs_to_jiffies(5));
  700. else
  701. IWL_WARN(priv, "uCode did not respond OK.\n");
  702. }
  703. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  704. struct iwl_rx_mem_buffer *rxb)
  705. {
  706. #ifdef CONFIG_IWLWIFI_DEBUG
  707. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  708. #endif
  709. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  710. return;
  711. }
  712. static void iwl3945_bg_beacon_update(struct work_struct *work)
  713. {
  714. struct iwl_priv *priv =
  715. container_of(work, struct iwl_priv, beacon_update);
  716. struct sk_buff *beacon;
  717. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  718. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  719. if (!beacon) {
  720. IWL_ERR(priv, "update beacon failed\n");
  721. return;
  722. }
  723. mutex_lock(&priv->mutex);
  724. /* new beacon skb is allocated every time; dispose previous.*/
  725. if (priv->ibss_beacon)
  726. dev_kfree_skb(priv->ibss_beacon);
  727. priv->ibss_beacon = beacon;
  728. mutex_unlock(&priv->mutex);
  729. iwl3945_send_beacon_cmd(priv);
  730. }
  731. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  732. struct iwl_rx_mem_buffer *rxb)
  733. {
  734. #ifdef CONFIG_IWLWIFI_DEBUG
  735. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  736. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  737. u8 rate = beacon->beacon_notify_hdr.rate;
  738. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  739. "tsf %d %d rate %d\n",
  740. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  741. beacon->beacon_notify_hdr.failure_frame,
  742. le32_to_cpu(beacon->ibss_mgr_status),
  743. le32_to_cpu(beacon->high_tsf),
  744. le32_to_cpu(beacon->low_tsf), rate);
  745. #endif
  746. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  747. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  748. queue_work(priv->workqueue, &priv->beacon_update);
  749. }
  750. /* Handle notification from uCode that card's power state is changing
  751. * due to software, hardware, or critical temperature RFKILL */
  752. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  753. struct iwl_rx_mem_buffer *rxb)
  754. {
  755. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  756. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  757. unsigned long status = priv->status;
  758. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  759. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  760. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  761. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  762. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  763. if (flags & HW_CARD_DISABLED)
  764. set_bit(STATUS_RF_KILL_HW, &priv->status);
  765. else
  766. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  767. iwl_scan_cancel(priv);
  768. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  769. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  770. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  771. test_bit(STATUS_RF_KILL_HW, &priv->status));
  772. else
  773. wake_up_interruptible(&priv->wait_command_queue);
  774. }
  775. /**
  776. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  777. *
  778. * Setup the RX handlers for each of the reply types sent from the uCode
  779. * to the host.
  780. *
  781. * This function chains into the hardware specific files for them to setup
  782. * any hardware specific handlers as well.
  783. */
  784. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  785. {
  786. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  787. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  788. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  789. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  790. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  791. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  792. iwl_rx_pm_debug_statistics_notif;
  793. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  794. /*
  795. * The same handler is used for both the REPLY to a discrete
  796. * statistics request from the host as well as for the periodic
  797. * statistics notifications (after received beacons) from the uCode.
  798. */
  799. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  800. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  801. iwl_setup_spectrum_handlers(priv);
  802. iwl_setup_rx_scan_handlers(priv);
  803. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  804. /* Set up hardware specific Rx handlers */
  805. iwl3945_hw_rx_handler_setup(priv);
  806. }
  807. /************************** RX-FUNCTIONS ****************************/
  808. /*
  809. * Rx theory of operation
  810. *
  811. * The host allocates 32 DMA target addresses and passes the host address
  812. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  813. * 0 to 31
  814. *
  815. * Rx Queue Indexes
  816. * The host/firmware share two index registers for managing the Rx buffers.
  817. *
  818. * The READ index maps to the first position that the firmware may be writing
  819. * to -- the driver can read up to (but not including) this position and get
  820. * good data.
  821. * The READ index is managed by the firmware once the card is enabled.
  822. *
  823. * The WRITE index maps to the last position the driver has read from -- the
  824. * position preceding WRITE is the last slot the firmware can place a packet.
  825. *
  826. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  827. * WRITE = READ.
  828. *
  829. * During initialization, the host sets up the READ queue position to the first
  830. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  831. *
  832. * When the firmware places a packet in a buffer, it will advance the READ index
  833. * and fire the RX interrupt. The driver can then query the READ index and
  834. * process as many packets as possible, moving the WRITE index forward as it
  835. * resets the Rx queue buffers with new memory.
  836. *
  837. * The management in the driver is as follows:
  838. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  839. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  840. * to replenish the iwl->rxq->rx_free.
  841. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  842. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  843. * 'processed' and 'read' driver indexes as well)
  844. * + A received packet is processed and handed to the kernel network stack,
  845. * detached from the iwl->rxq. The driver 'processed' index is updated.
  846. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  847. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  848. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  849. * were enough free buffers and RX_STALLED is set it is cleared.
  850. *
  851. *
  852. * Driver sequence:
  853. *
  854. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  855. * iwl3945_rx_queue_restock
  856. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  857. * queue, updates firmware pointers, and updates
  858. * the WRITE index. If insufficient rx_free buffers
  859. * are available, schedules iwl3945_rx_replenish
  860. *
  861. * -- enable interrupts --
  862. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  863. * READ INDEX, detaching the SKB from the pool.
  864. * Moves the packet buffer from queue to rx_used.
  865. * Calls iwl3945_rx_queue_restock to refill any empty
  866. * slots.
  867. * ...
  868. *
  869. */
  870. /**
  871. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  872. */
  873. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  874. dma_addr_t dma_addr)
  875. {
  876. return cpu_to_le32((u32)dma_addr);
  877. }
  878. /**
  879. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  880. *
  881. * If there are slots in the RX queue that need to be restocked,
  882. * and we have free pre-allocated buffers, fill the ranks as much
  883. * as we can, pulling from rx_free.
  884. *
  885. * This moves the 'write' index forward to catch up with 'processed', and
  886. * also updates the memory address in the firmware to reference the new
  887. * target buffer.
  888. */
  889. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  890. {
  891. struct iwl_rx_queue *rxq = &priv->rxq;
  892. struct list_head *element;
  893. struct iwl_rx_mem_buffer *rxb;
  894. unsigned long flags;
  895. int write, rc;
  896. spin_lock_irqsave(&rxq->lock, flags);
  897. write = rxq->write & ~0x7;
  898. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  899. /* Get next free Rx buffer, remove from free list */
  900. element = rxq->rx_free.next;
  901. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  902. list_del(element);
  903. /* Point to Rx buffer via next RBD in circular buffer */
  904. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  905. rxq->queue[rxq->write] = rxb;
  906. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  907. rxq->free_count--;
  908. }
  909. spin_unlock_irqrestore(&rxq->lock, flags);
  910. /* If the pre-allocated buffer pool is dropping low, schedule to
  911. * refill it */
  912. if (rxq->free_count <= RX_LOW_WATERMARK)
  913. queue_work(priv->workqueue, &priv->rx_replenish);
  914. /* If we've added more space for the firmware to place data, tell it.
  915. * Increment device's write pointer in multiples of 8. */
  916. if ((rxq->write_actual != (rxq->write & ~0x7))
  917. || (abs(rxq->write - rxq->read) > 7)) {
  918. spin_lock_irqsave(&rxq->lock, flags);
  919. rxq->need_update = 1;
  920. spin_unlock_irqrestore(&rxq->lock, flags);
  921. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  922. if (rc)
  923. return rc;
  924. }
  925. return 0;
  926. }
  927. /**
  928. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  929. *
  930. * When moving to rx_free an SKB is allocated for the slot.
  931. *
  932. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  933. * This is called as a scheduled work item (except for during initialization)
  934. */
  935. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  936. {
  937. struct iwl_rx_queue *rxq = &priv->rxq;
  938. struct list_head *element;
  939. struct iwl_rx_mem_buffer *rxb;
  940. struct page *page;
  941. unsigned long flags;
  942. while (1) {
  943. spin_lock_irqsave(&rxq->lock, flags);
  944. if (list_empty(&rxq->rx_used)) {
  945. spin_unlock_irqrestore(&rxq->lock, flags);
  946. return;
  947. }
  948. spin_unlock_irqrestore(&rxq->lock, flags);
  949. if (rxq->free_count > RX_LOW_WATERMARK)
  950. priority |= __GFP_NOWARN;
  951. if (priv->hw_params.rx_page_order > 0)
  952. priority |= __GFP_COMP;
  953. /* Alloc a new receive buffer */
  954. page = alloc_pages(priority, priv->hw_params.rx_page_order);
  955. if (!page) {
  956. if (net_ratelimit())
  957. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  958. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  959. net_ratelimit())
  960. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  961. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  962. rxq->free_count);
  963. /* We don't reschedule replenish work here -- we will
  964. * call the restock method and if it still needs
  965. * more buffers it will schedule replenish */
  966. break;
  967. }
  968. spin_lock_irqsave(&rxq->lock, flags);
  969. if (list_empty(&rxq->rx_used)) {
  970. spin_unlock_irqrestore(&rxq->lock, flags);
  971. __free_pages(page, priv->hw_params.rx_page_order);
  972. return;
  973. }
  974. element = rxq->rx_used.next;
  975. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  976. list_del(element);
  977. spin_unlock_irqrestore(&rxq->lock, flags);
  978. rxb->page = page;
  979. /* Get physical address of RB/SKB */
  980. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  981. PAGE_SIZE << priv->hw_params.rx_page_order,
  982. PCI_DMA_FROMDEVICE);
  983. spin_lock_irqsave(&rxq->lock, flags);
  984. list_add_tail(&rxb->list, &rxq->rx_free);
  985. rxq->free_count++;
  986. priv->alloc_rxb_page++;
  987. spin_unlock_irqrestore(&rxq->lock, flags);
  988. }
  989. }
  990. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  991. {
  992. unsigned long flags;
  993. int i;
  994. spin_lock_irqsave(&rxq->lock, flags);
  995. INIT_LIST_HEAD(&rxq->rx_free);
  996. INIT_LIST_HEAD(&rxq->rx_used);
  997. /* Fill the rx_used queue with _all_ of the Rx buffers */
  998. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  999. /* In the reset function, these buffers may have been allocated
  1000. * to an SKB, so we need to unmap and free potential storage */
  1001. if (rxq->pool[i].page != NULL) {
  1002. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1003. PAGE_SIZE << priv->hw_params.rx_page_order,
  1004. PCI_DMA_FROMDEVICE);
  1005. priv->alloc_rxb_page--;
  1006. __free_pages(rxq->pool[i].page,
  1007. priv->hw_params.rx_page_order);
  1008. rxq->pool[i].page = NULL;
  1009. }
  1010. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1011. }
  1012. /* Set us so that we have processed and used all buffers, but have
  1013. * not restocked the Rx queue with fresh buffers */
  1014. rxq->read = rxq->write = 0;
  1015. rxq->write_actual = 0;
  1016. rxq->free_count = 0;
  1017. spin_unlock_irqrestore(&rxq->lock, flags);
  1018. }
  1019. void iwl3945_rx_replenish(void *data)
  1020. {
  1021. struct iwl_priv *priv = data;
  1022. unsigned long flags;
  1023. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1024. spin_lock_irqsave(&priv->lock, flags);
  1025. iwl3945_rx_queue_restock(priv);
  1026. spin_unlock_irqrestore(&priv->lock, flags);
  1027. }
  1028. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1029. {
  1030. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1031. iwl3945_rx_queue_restock(priv);
  1032. }
  1033. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1034. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1035. * This free routine walks the list of POOL entries and if SKB is set to
  1036. * non NULL it is unmapped and freed
  1037. */
  1038. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1039. {
  1040. int i;
  1041. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1042. if (rxq->pool[i].page != NULL) {
  1043. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1044. PAGE_SIZE << priv->hw_params.rx_page_order,
  1045. PCI_DMA_FROMDEVICE);
  1046. __free_pages(rxq->pool[i].page,
  1047. priv->hw_params.rx_page_order);
  1048. rxq->pool[i].page = NULL;
  1049. priv->alloc_rxb_page--;
  1050. }
  1051. }
  1052. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1053. rxq->dma_addr);
  1054. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1055. rxq->rb_stts, rxq->rb_stts_dma);
  1056. rxq->bd = NULL;
  1057. rxq->rb_stts = NULL;
  1058. }
  1059. /* Convert linear signal-to-noise ratio into dB */
  1060. static u8 ratio2dB[100] = {
  1061. /* 0 1 2 3 4 5 6 7 8 9 */
  1062. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1063. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1064. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1065. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1066. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1067. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1068. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1069. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1070. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1071. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1072. };
  1073. /* Calculates a relative dB value from a ratio of linear
  1074. * (i.e. not dB) signal levels.
  1075. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1076. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1077. {
  1078. /* 1000:1 or higher just report as 60 dB */
  1079. if (sig_ratio >= 1000)
  1080. return 60;
  1081. /* 100:1 or higher, divide by 10 and use table,
  1082. * add 20 dB to make up for divide by 10 */
  1083. if (sig_ratio >= 100)
  1084. return 20 + (int)ratio2dB[sig_ratio/10];
  1085. /* We shouldn't see this */
  1086. if (sig_ratio < 1)
  1087. return 0;
  1088. /* Use table for ratios 1:1 - 99:1 */
  1089. return (int)ratio2dB[sig_ratio];
  1090. }
  1091. #define PERFECT_RSSI (-20) /* dBm */
  1092. #define WORST_RSSI (-95) /* dBm */
  1093. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1094. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1095. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1096. * about formulas used below. */
  1097. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1098. {
  1099. int sig_qual;
  1100. int degradation = PERFECT_RSSI - rssi_dbm;
  1101. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1102. * as indicator; formula is (signal dbm - noise dbm).
  1103. * SNR at or above 40 is a great signal (100%).
  1104. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1105. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1106. if (noise_dbm) {
  1107. if (rssi_dbm - noise_dbm >= 40)
  1108. return 100;
  1109. else if (rssi_dbm < noise_dbm)
  1110. return 0;
  1111. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1112. /* Else use just the signal level.
  1113. * This formula is a least squares fit of data points collected and
  1114. * compared with a reference system that had a percentage (%) display
  1115. * for signal quality. */
  1116. } else
  1117. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1118. (15 * RSSI_RANGE + 62 * degradation)) /
  1119. (RSSI_RANGE * RSSI_RANGE);
  1120. if (sig_qual > 100)
  1121. sig_qual = 100;
  1122. else if (sig_qual < 1)
  1123. sig_qual = 0;
  1124. return sig_qual;
  1125. }
  1126. /**
  1127. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1128. *
  1129. * Uses the priv->rx_handlers callback function array to invoke
  1130. * the appropriate handlers, including command responses,
  1131. * frame-received notifications, and other notifications.
  1132. */
  1133. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1134. {
  1135. struct iwl_rx_mem_buffer *rxb;
  1136. struct iwl_rx_packet *pkt;
  1137. struct iwl_rx_queue *rxq = &priv->rxq;
  1138. u32 r, i;
  1139. int reclaim;
  1140. unsigned long flags;
  1141. u8 fill_rx = 0;
  1142. u32 count = 8;
  1143. int total_empty = 0;
  1144. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1145. * buffer that the driver may process (last buffer filled by ucode). */
  1146. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1147. i = rxq->read;
  1148. /* calculate total frames need to be restock after handling RX */
  1149. total_empty = r - priv->rxq.write_actual;
  1150. if (total_empty < 0)
  1151. total_empty += RX_QUEUE_SIZE;
  1152. if (total_empty > (RX_QUEUE_SIZE / 2))
  1153. fill_rx = 1;
  1154. /* Rx interrupt, but nothing sent from uCode */
  1155. if (i == r)
  1156. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1157. while (i != r) {
  1158. rxb = rxq->queue[i];
  1159. /* If an RXB doesn't have a Rx queue slot associated with it,
  1160. * then a bug has been introduced in the queue refilling
  1161. * routines -- catch it here */
  1162. BUG_ON(rxb == NULL);
  1163. rxq->queue[i] = NULL;
  1164. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1165. PAGE_SIZE << priv->hw_params.rx_page_order,
  1166. PCI_DMA_FROMDEVICE);
  1167. pkt = rxb_addr(rxb);
  1168. trace_iwlwifi_dev_rx(priv, pkt,
  1169. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1170. /* Reclaim a command buffer only if this packet is a response
  1171. * to a (driver-originated) command.
  1172. * If the packet (e.g. Rx frame) originated from uCode,
  1173. * there is no command buffer to reclaim.
  1174. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1175. * but apparently a few don't get set; catch them here. */
  1176. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1177. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1178. (pkt->hdr.cmd != REPLY_TX);
  1179. /* Based on type of command response or notification,
  1180. * handle those that need handling via function in
  1181. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1182. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1183. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1184. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1185. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1186. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1187. } else {
  1188. /* No handling needed */
  1189. IWL_DEBUG_RX(priv,
  1190. "r %d i %d No handler needed for %s, 0x%02x\n",
  1191. r, i, get_cmd_string(pkt->hdr.cmd),
  1192. pkt->hdr.cmd);
  1193. }
  1194. if (reclaim) {
  1195. /* Invoke any callbacks, transfer the buffer to caller,
  1196. * and fire off the (possibly) blocking iwl_send_cmd()
  1197. * as we reclaim the driver command queue */
  1198. if (rxb && rxb->page)
  1199. iwl_tx_cmd_complete(priv, rxb);
  1200. else
  1201. IWL_WARN(priv, "Claim null rxb?\n");
  1202. }
  1203. /* For now we just don't re-use anything. We can tweak this
  1204. * later to try and re-use notification packets and SKBs that
  1205. * fail to Rx correctly */
  1206. if (rxb->page != NULL) {
  1207. priv->alloc_rxb_page--;
  1208. __free_pages(rxb->page, priv->hw_params.rx_page_order);
  1209. rxb->page = NULL;
  1210. }
  1211. spin_lock_irqsave(&rxq->lock, flags);
  1212. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1213. spin_unlock_irqrestore(&rxq->lock, flags);
  1214. i = (i + 1) & RX_QUEUE_MASK;
  1215. /* If there are a lot of unused frames,
  1216. * restock the Rx queue so ucode won't assert. */
  1217. if (fill_rx) {
  1218. count++;
  1219. if (count >= 8) {
  1220. priv->rxq.read = i;
  1221. iwl3945_rx_replenish_now(priv);
  1222. count = 0;
  1223. }
  1224. }
  1225. }
  1226. /* Backtrack one entry */
  1227. priv->rxq.read = i;
  1228. if (fill_rx)
  1229. iwl3945_rx_replenish_now(priv);
  1230. else
  1231. iwl3945_rx_queue_restock(priv);
  1232. }
  1233. /* call this function to flush any scheduled tasklet */
  1234. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1235. {
  1236. /* wait to make sure we flush pending tasklet*/
  1237. synchronize_irq(priv->pci_dev->irq);
  1238. tasklet_kill(&priv->irq_tasklet);
  1239. }
  1240. #ifdef CONFIG_IWLWIFI_DEBUG
  1241. static const char *desc_lookup(int i)
  1242. {
  1243. switch (i) {
  1244. case 1:
  1245. return "FAIL";
  1246. case 2:
  1247. return "BAD_PARAM";
  1248. case 3:
  1249. return "BAD_CHECKSUM";
  1250. case 4:
  1251. return "NMI_INTERRUPT";
  1252. case 5:
  1253. return "SYSASSERT";
  1254. case 6:
  1255. return "FATAL_ERROR";
  1256. }
  1257. return "UNKNOWN";
  1258. }
  1259. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1260. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1261. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1262. {
  1263. u32 i;
  1264. u32 desc, time, count, base, data1;
  1265. u32 blink1, blink2, ilink1, ilink2;
  1266. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1267. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1268. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1269. return;
  1270. }
  1271. count = iwl_read_targ_mem(priv, base);
  1272. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1273. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1274. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1275. priv->status, count);
  1276. }
  1277. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1278. "ilink1 nmiPC Line\n");
  1279. for (i = ERROR_START_OFFSET;
  1280. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1281. i += ERROR_ELEM_SIZE) {
  1282. desc = iwl_read_targ_mem(priv, base + i);
  1283. time =
  1284. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1285. blink1 =
  1286. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1287. blink2 =
  1288. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1289. ilink1 =
  1290. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1291. ilink2 =
  1292. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1293. data1 =
  1294. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1295. IWL_ERR(priv,
  1296. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1297. desc_lookup(desc), desc, time, blink1, blink2,
  1298. ilink1, ilink2, data1);
  1299. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1300. 0, blink1, blink2, ilink1, ilink2);
  1301. }
  1302. }
  1303. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1304. /**
  1305. * iwl3945_print_event_log - Dump error event log to syslog
  1306. *
  1307. */
  1308. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1309. u32 num_events, u32 mode)
  1310. {
  1311. u32 i;
  1312. u32 base; /* SRAM byte address of event log header */
  1313. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1314. u32 ptr; /* SRAM byte address of log data */
  1315. u32 ev, time, data; /* event log data */
  1316. if (num_events == 0)
  1317. return;
  1318. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1319. if (mode == 0)
  1320. event_size = 2 * sizeof(u32);
  1321. else
  1322. event_size = 3 * sizeof(u32);
  1323. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1324. /* "time" is actually "data" for mode 0 (no timestamp).
  1325. * place event id # at far right for easier visual parsing. */
  1326. for (i = 0; i < num_events; i++) {
  1327. ev = iwl_read_targ_mem(priv, ptr);
  1328. ptr += sizeof(u32);
  1329. time = iwl_read_targ_mem(priv, ptr);
  1330. ptr += sizeof(u32);
  1331. if (mode == 0) {
  1332. /* data, ev */
  1333. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1334. trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
  1335. } else {
  1336. data = iwl_read_targ_mem(priv, ptr);
  1337. ptr += sizeof(u32);
  1338. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1339. trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
  1340. }
  1341. }
  1342. }
  1343. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1344. {
  1345. u32 base; /* SRAM byte address of event log header */
  1346. u32 capacity; /* event log capacity in # entries */
  1347. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1348. u32 num_wraps; /* # times uCode wrapped to top of log */
  1349. u32 next_entry; /* index of next entry to be written by uCode */
  1350. u32 size; /* # entries that we'll print */
  1351. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1352. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1353. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1354. return;
  1355. }
  1356. /* event log header */
  1357. capacity = iwl_read_targ_mem(priv, base);
  1358. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1359. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1360. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1361. size = num_wraps ? capacity : next_entry;
  1362. /* bail out if nothing in log */
  1363. if (size == 0) {
  1364. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1365. return;
  1366. }
  1367. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1368. size, num_wraps);
  1369. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1370. * i.e the next one that uCode would fill. */
  1371. if (num_wraps)
  1372. iwl3945_print_event_log(priv, next_entry,
  1373. capacity - next_entry, mode);
  1374. /* (then/else) start at top of log */
  1375. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1376. }
  1377. #else
  1378. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1379. {
  1380. }
  1381. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1382. {
  1383. }
  1384. #endif
  1385. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1386. {
  1387. u32 inta, handled = 0;
  1388. u32 inta_fh;
  1389. unsigned long flags;
  1390. #ifdef CONFIG_IWLWIFI_DEBUG
  1391. u32 inta_mask;
  1392. #endif
  1393. spin_lock_irqsave(&priv->lock, flags);
  1394. /* Ack/clear/reset pending uCode interrupts.
  1395. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1396. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1397. inta = iwl_read32(priv, CSR_INT);
  1398. iwl_write32(priv, CSR_INT, inta);
  1399. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1400. * Any new interrupts that happen after this, either while we're
  1401. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1402. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1403. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1404. #ifdef CONFIG_IWLWIFI_DEBUG
  1405. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1406. /* just for debug */
  1407. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1408. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1409. inta, inta_mask, inta_fh);
  1410. }
  1411. #endif
  1412. spin_unlock_irqrestore(&priv->lock, flags);
  1413. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1414. * atomic, make sure that inta covers all the interrupts that
  1415. * we've discovered, even if FH interrupt came in just after
  1416. * reading CSR_INT. */
  1417. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1418. inta |= CSR_INT_BIT_FH_RX;
  1419. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1420. inta |= CSR_INT_BIT_FH_TX;
  1421. /* Now service all interrupt bits discovered above. */
  1422. if (inta & CSR_INT_BIT_HW_ERR) {
  1423. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1424. /* Tell the device to stop sending interrupts */
  1425. iwl_disable_interrupts(priv);
  1426. priv->isr_stats.hw++;
  1427. iwl_irq_handle_error(priv);
  1428. handled |= CSR_INT_BIT_HW_ERR;
  1429. return;
  1430. }
  1431. #ifdef CONFIG_IWLWIFI_DEBUG
  1432. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1433. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1434. if (inta & CSR_INT_BIT_SCD) {
  1435. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1436. "the frame/frames.\n");
  1437. priv->isr_stats.sch++;
  1438. }
  1439. /* Alive notification via Rx interrupt will do the real work */
  1440. if (inta & CSR_INT_BIT_ALIVE) {
  1441. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1442. priv->isr_stats.alive++;
  1443. }
  1444. }
  1445. #endif
  1446. /* Safely ignore these bits for debug checks below */
  1447. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1448. /* Error detected by uCode */
  1449. if (inta & CSR_INT_BIT_SW_ERR) {
  1450. IWL_ERR(priv, "Microcode SW error detected. "
  1451. "Restarting 0x%X.\n", inta);
  1452. priv->isr_stats.sw++;
  1453. priv->isr_stats.sw_err = inta;
  1454. iwl_irq_handle_error(priv);
  1455. handled |= CSR_INT_BIT_SW_ERR;
  1456. }
  1457. /* uCode wakes up after power-down sleep */
  1458. if (inta & CSR_INT_BIT_WAKEUP) {
  1459. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1460. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1461. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1462. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1463. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1464. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1465. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1466. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1467. priv->isr_stats.wakeup++;
  1468. handled |= CSR_INT_BIT_WAKEUP;
  1469. }
  1470. /* All uCode command responses, including Tx command responses,
  1471. * Rx "responses" (frame-received notification), and other
  1472. * notifications from uCode come through here*/
  1473. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1474. iwl3945_rx_handle(priv);
  1475. priv->isr_stats.rx++;
  1476. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1477. }
  1478. if (inta & CSR_INT_BIT_FH_TX) {
  1479. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1480. priv->isr_stats.tx++;
  1481. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1482. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1483. (FH39_SRVC_CHNL), 0x0);
  1484. handled |= CSR_INT_BIT_FH_TX;
  1485. }
  1486. if (inta & ~handled) {
  1487. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1488. priv->isr_stats.unhandled++;
  1489. }
  1490. if (inta & ~priv->inta_mask) {
  1491. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1492. inta & ~priv->inta_mask);
  1493. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1494. }
  1495. /* Re-enable all interrupts */
  1496. /* only Re-enable if disabled by irq */
  1497. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1498. iwl_enable_interrupts(priv);
  1499. #ifdef CONFIG_IWLWIFI_DEBUG
  1500. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1501. inta = iwl_read32(priv, CSR_INT);
  1502. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1503. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1504. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1505. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1506. }
  1507. #endif
  1508. }
  1509. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1510. enum ieee80211_band band,
  1511. u8 is_active, u8 n_probes,
  1512. struct iwl3945_scan_channel *scan_ch)
  1513. {
  1514. struct ieee80211_channel *chan;
  1515. const struct ieee80211_supported_band *sband;
  1516. const struct iwl_channel_info *ch_info;
  1517. u16 passive_dwell = 0;
  1518. u16 active_dwell = 0;
  1519. int added, i;
  1520. sband = iwl_get_hw_mode(priv, band);
  1521. if (!sband)
  1522. return 0;
  1523. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1524. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1525. if (passive_dwell <= active_dwell)
  1526. passive_dwell = active_dwell + 1;
  1527. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1528. chan = priv->scan_request->channels[i];
  1529. if (chan->band != band)
  1530. continue;
  1531. scan_ch->channel = chan->hw_value;
  1532. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1533. if (!is_channel_valid(ch_info)) {
  1534. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1535. scan_ch->channel);
  1536. continue;
  1537. }
  1538. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1539. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1540. /* If passive , set up for auto-switch
  1541. * and use long active_dwell time.
  1542. */
  1543. if (!is_active || is_channel_passive(ch_info) ||
  1544. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1545. scan_ch->type = 0; /* passive */
  1546. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1547. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1548. } else {
  1549. scan_ch->type = 1; /* active */
  1550. }
  1551. /* Set direct probe bits. These may be used both for active
  1552. * scan channels (probes gets sent right away),
  1553. * or for passive channels (probes get se sent only after
  1554. * hearing clear Rx packet).*/
  1555. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1556. if (n_probes)
  1557. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1558. } else {
  1559. /* uCode v1 does not allow setting direct probe bits on
  1560. * passive channel. */
  1561. if ((scan_ch->type & 1) && n_probes)
  1562. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1563. }
  1564. /* Set txpower levels to defaults */
  1565. scan_ch->tpc.dsp_atten = 110;
  1566. /* scan_pwr_info->tpc.dsp_atten; */
  1567. /*scan_pwr_info->tpc.tx_gain; */
  1568. if (band == IEEE80211_BAND_5GHZ)
  1569. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1570. else {
  1571. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1572. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1573. * power level:
  1574. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1575. */
  1576. }
  1577. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1578. scan_ch->channel,
  1579. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1580. (scan_ch->type & 1) ?
  1581. active_dwell : passive_dwell);
  1582. scan_ch++;
  1583. added++;
  1584. }
  1585. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1586. return added;
  1587. }
  1588. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1589. struct ieee80211_rate *rates)
  1590. {
  1591. int i;
  1592. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1593. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1594. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1595. rates[i].hw_value_short = i;
  1596. rates[i].flags = 0;
  1597. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1598. /*
  1599. * If CCK != 1M then set short preamble rate flag.
  1600. */
  1601. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1602. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1603. }
  1604. }
  1605. }
  1606. /******************************************************************************
  1607. *
  1608. * uCode download functions
  1609. *
  1610. ******************************************************************************/
  1611. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1612. {
  1613. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1614. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1615. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1616. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1617. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1618. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1619. }
  1620. /**
  1621. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1622. * looking at all data.
  1623. */
  1624. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1625. {
  1626. u32 val;
  1627. u32 save_len = len;
  1628. int rc = 0;
  1629. u32 errcnt;
  1630. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1631. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1632. IWL39_RTC_INST_LOWER_BOUND);
  1633. errcnt = 0;
  1634. for (; len > 0; len -= sizeof(u32), image++) {
  1635. /* read data comes through single port, auto-incr addr */
  1636. /* NOTE: Use the debugless read so we don't flood kernel log
  1637. * if IWL_DL_IO is set */
  1638. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1639. if (val != le32_to_cpu(*image)) {
  1640. IWL_ERR(priv, "uCode INST section is invalid at "
  1641. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1642. save_len - len, val, le32_to_cpu(*image));
  1643. rc = -EIO;
  1644. errcnt++;
  1645. if (errcnt >= 20)
  1646. break;
  1647. }
  1648. }
  1649. if (!errcnt)
  1650. IWL_DEBUG_INFO(priv,
  1651. "ucode image in INSTRUCTION memory is good\n");
  1652. return rc;
  1653. }
  1654. /**
  1655. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1656. * using sample data 100 bytes apart. If these sample points are good,
  1657. * it's a pretty good bet that everything between them is good, too.
  1658. */
  1659. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1660. {
  1661. u32 val;
  1662. int rc = 0;
  1663. u32 errcnt = 0;
  1664. u32 i;
  1665. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1666. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1667. /* read data comes through single port, auto-incr addr */
  1668. /* NOTE: Use the debugless read so we don't flood kernel log
  1669. * if IWL_DL_IO is set */
  1670. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1671. i + IWL39_RTC_INST_LOWER_BOUND);
  1672. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1673. if (val != le32_to_cpu(*image)) {
  1674. #if 0 /* Enable this if you want to see details */
  1675. IWL_ERR(priv, "uCode INST section is invalid at "
  1676. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1677. i, val, *image);
  1678. #endif
  1679. rc = -EIO;
  1680. errcnt++;
  1681. if (errcnt >= 3)
  1682. break;
  1683. }
  1684. }
  1685. return rc;
  1686. }
  1687. /**
  1688. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1689. * and verify its contents
  1690. */
  1691. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1692. {
  1693. __le32 *image;
  1694. u32 len;
  1695. int rc = 0;
  1696. /* Try bootstrap */
  1697. image = (__le32 *)priv->ucode_boot.v_addr;
  1698. len = priv->ucode_boot.len;
  1699. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1700. if (rc == 0) {
  1701. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1702. return 0;
  1703. }
  1704. /* Try initialize */
  1705. image = (__le32 *)priv->ucode_init.v_addr;
  1706. len = priv->ucode_init.len;
  1707. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1708. if (rc == 0) {
  1709. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1710. return 0;
  1711. }
  1712. /* Try runtime/protocol */
  1713. image = (__le32 *)priv->ucode_code.v_addr;
  1714. len = priv->ucode_code.len;
  1715. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1716. if (rc == 0) {
  1717. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1718. return 0;
  1719. }
  1720. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1721. /* Since nothing seems to match, show first several data entries in
  1722. * instruction SRAM, so maybe visual inspection will give a clue.
  1723. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1724. image = (__le32 *)priv->ucode_boot.v_addr;
  1725. len = priv->ucode_boot.len;
  1726. rc = iwl3945_verify_inst_full(priv, image, len);
  1727. return rc;
  1728. }
  1729. static void iwl3945_nic_start(struct iwl_priv *priv)
  1730. {
  1731. /* Remove all resets to allow NIC to operate */
  1732. iwl_write32(priv, CSR_RESET, 0);
  1733. }
  1734. /**
  1735. * iwl3945_read_ucode - Read uCode images from disk file.
  1736. *
  1737. * Copy into buffers for card to fetch via bus-mastering
  1738. */
  1739. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1740. {
  1741. const struct iwl_ucode_header *ucode;
  1742. int ret = -EINVAL, index;
  1743. const struct firmware *ucode_raw;
  1744. /* firmware file name contains uCode/driver compatibility version */
  1745. const char *name_pre = priv->cfg->fw_name_pre;
  1746. const unsigned int api_max = priv->cfg->ucode_api_max;
  1747. const unsigned int api_min = priv->cfg->ucode_api_min;
  1748. char buf[25];
  1749. u8 *src;
  1750. size_t len;
  1751. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1752. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1753. * request_firmware() is synchronous, file is in memory on return. */
  1754. for (index = api_max; index >= api_min; index--) {
  1755. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1756. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1757. if (ret < 0) {
  1758. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1759. buf, ret);
  1760. if (ret == -ENOENT)
  1761. continue;
  1762. else
  1763. goto error;
  1764. } else {
  1765. if (index < api_max)
  1766. IWL_ERR(priv, "Loaded firmware %s, "
  1767. "which is deprecated. "
  1768. " Please use API v%u instead.\n",
  1769. buf, api_max);
  1770. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1771. "(%zd bytes) from disk\n",
  1772. buf, ucode_raw->size);
  1773. break;
  1774. }
  1775. }
  1776. if (ret < 0)
  1777. goto error;
  1778. /* Make sure that we got at least our header! */
  1779. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1780. IWL_ERR(priv, "File size way too small!\n");
  1781. ret = -EINVAL;
  1782. goto err_release;
  1783. }
  1784. /* Data from ucode file: header followed by uCode images */
  1785. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1786. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1787. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1788. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1789. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1790. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1791. init_data_size =
  1792. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1793. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1794. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1795. /* api_ver should match the api version forming part of the
  1796. * firmware filename ... but we don't check for that and only rely
  1797. * on the API version read from firmware header from here on forward */
  1798. if (api_ver < api_min || api_ver > api_max) {
  1799. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1800. "Driver supports v%u, firmware is v%u.\n",
  1801. api_max, api_ver);
  1802. priv->ucode_ver = 0;
  1803. ret = -EINVAL;
  1804. goto err_release;
  1805. }
  1806. if (api_ver != api_max)
  1807. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1808. "got %u. New firmware can be obtained "
  1809. "from http://www.intellinuxwireless.org.\n",
  1810. api_max, api_ver);
  1811. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1812. IWL_UCODE_MAJOR(priv->ucode_ver),
  1813. IWL_UCODE_MINOR(priv->ucode_ver),
  1814. IWL_UCODE_API(priv->ucode_ver),
  1815. IWL_UCODE_SERIAL(priv->ucode_ver));
  1816. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1817. priv->ucode_ver);
  1818. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1819. inst_size);
  1820. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1821. data_size);
  1822. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1823. init_size);
  1824. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1825. init_data_size);
  1826. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1827. boot_size);
  1828. /* Verify size of file vs. image size info in file's header */
  1829. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1830. inst_size + data_size + init_size +
  1831. init_data_size + boot_size) {
  1832. IWL_DEBUG_INFO(priv,
  1833. "uCode file size %zd does not match expected size\n",
  1834. ucode_raw->size);
  1835. ret = -EINVAL;
  1836. goto err_release;
  1837. }
  1838. /* Verify that uCode images will fit in card's SRAM */
  1839. if (inst_size > IWL39_MAX_INST_SIZE) {
  1840. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1841. inst_size);
  1842. ret = -EINVAL;
  1843. goto err_release;
  1844. }
  1845. if (data_size > IWL39_MAX_DATA_SIZE) {
  1846. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1847. data_size);
  1848. ret = -EINVAL;
  1849. goto err_release;
  1850. }
  1851. if (init_size > IWL39_MAX_INST_SIZE) {
  1852. IWL_DEBUG_INFO(priv,
  1853. "uCode init instr len %d too large to fit in\n",
  1854. init_size);
  1855. ret = -EINVAL;
  1856. goto err_release;
  1857. }
  1858. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1859. IWL_DEBUG_INFO(priv,
  1860. "uCode init data len %d too large to fit in\n",
  1861. init_data_size);
  1862. ret = -EINVAL;
  1863. goto err_release;
  1864. }
  1865. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1866. IWL_DEBUG_INFO(priv,
  1867. "uCode boot instr len %d too large to fit in\n",
  1868. boot_size);
  1869. ret = -EINVAL;
  1870. goto err_release;
  1871. }
  1872. /* Allocate ucode buffers for card's bus-master loading ... */
  1873. /* Runtime instructions and 2 copies of data:
  1874. * 1) unmodified from disk
  1875. * 2) backup cache for save/restore during power-downs */
  1876. priv->ucode_code.len = inst_size;
  1877. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1878. priv->ucode_data.len = data_size;
  1879. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1880. priv->ucode_data_backup.len = data_size;
  1881. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1882. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1883. !priv->ucode_data_backup.v_addr)
  1884. goto err_pci_alloc;
  1885. /* Initialization instructions and data */
  1886. if (init_size && init_data_size) {
  1887. priv->ucode_init.len = init_size;
  1888. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1889. priv->ucode_init_data.len = init_data_size;
  1890. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1891. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1892. goto err_pci_alloc;
  1893. }
  1894. /* Bootstrap (instructions only, no data) */
  1895. if (boot_size) {
  1896. priv->ucode_boot.len = boot_size;
  1897. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1898. if (!priv->ucode_boot.v_addr)
  1899. goto err_pci_alloc;
  1900. }
  1901. /* Copy images into buffers for card's bus-master reads ... */
  1902. /* Runtime instructions (first block of data in file) */
  1903. len = inst_size;
  1904. IWL_DEBUG_INFO(priv,
  1905. "Copying (but not loading) uCode instr len %zd\n", len);
  1906. memcpy(priv->ucode_code.v_addr, src, len);
  1907. src += len;
  1908. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1909. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1910. /* Runtime data (2nd block)
  1911. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1912. len = data_size;
  1913. IWL_DEBUG_INFO(priv,
  1914. "Copying (but not loading) uCode data len %zd\n", len);
  1915. memcpy(priv->ucode_data.v_addr, src, len);
  1916. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1917. src += len;
  1918. /* Initialization instructions (3rd block) */
  1919. if (init_size) {
  1920. len = init_size;
  1921. IWL_DEBUG_INFO(priv,
  1922. "Copying (but not loading) init instr len %zd\n", len);
  1923. memcpy(priv->ucode_init.v_addr, src, len);
  1924. src += len;
  1925. }
  1926. /* Initialization data (4th block) */
  1927. if (init_data_size) {
  1928. len = init_data_size;
  1929. IWL_DEBUG_INFO(priv,
  1930. "Copying (but not loading) init data len %zd\n", len);
  1931. memcpy(priv->ucode_init_data.v_addr, src, len);
  1932. src += len;
  1933. }
  1934. /* Bootstrap instructions (5th block) */
  1935. len = boot_size;
  1936. IWL_DEBUG_INFO(priv,
  1937. "Copying (but not loading) boot instr len %zd\n", len);
  1938. memcpy(priv->ucode_boot.v_addr, src, len);
  1939. /* We have our copies now, allow OS release its copies */
  1940. release_firmware(ucode_raw);
  1941. return 0;
  1942. err_pci_alloc:
  1943. IWL_ERR(priv, "failed to allocate pci memory\n");
  1944. ret = -ENOMEM;
  1945. iwl3945_dealloc_ucode_pci(priv);
  1946. err_release:
  1947. release_firmware(ucode_raw);
  1948. error:
  1949. return ret;
  1950. }
  1951. /**
  1952. * iwl3945_set_ucode_ptrs - Set uCode address location
  1953. *
  1954. * Tell initialization uCode where to find runtime uCode.
  1955. *
  1956. * BSM registers initially contain pointers to initialization uCode.
  1957. * We need to replace them to load runtime uCode inst and data,
  1958. * and to save runtime data when powering down.
  1959. */
  1960. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1961. {
  1962. dma_addr_t pinst;
  1963. dma_addr_t pdata;
  1964. /* bits 31:0 for 3945 */
  1965. pinst = priv->ucode_code.p_addr;
  1966. pdata = priv->ucode_data_backup.p_addr;
  1967. /* Tell bootstrap uCode where to find image to load */
  1968. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  1969. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  1970. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  1971. priv->ucode_data.len);
  1972. /* Inst byte count must be last to set up, bit 31 signals uCode
  1973. * that all new ptr/size info is in place */
  1974. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  1975. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  1976. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  1977. return 0;
  1978. }
  1979. /**
  1980. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  1981. *
  1982. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  1983. *
  1984. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1985. */
  1986. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  1987. {
  1988. /* Check alive response for "valid" sign from uCode */
  1989. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  1990. /* We had an error bringing up the hardware, so take it
  1991. * all the way back down so we can try again */
  1992. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  1993. goto restart;
  1994. }
  1995. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1996. * This is a paranoid check, because we would not have gotten the
  1997. * "initialize" alive if code weren't properly loaded. */
  1998. if (iwl3945_verify_ucode(priv)) {
  1999. /* Runtime instruction load was bad;
  2000. * take it all the way back down so we can try again */
  2001. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2002. goto restart;
  2003. }
  2004. /* Send pointers to protocol/runtime uCode image ... init code will
  2005. * load and launch runtime uCode, which will send us another "Alive"
  2006. * notification. */
  2007. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2008. if (iwl3945_set_ucode_ptrs(priv)) {
  2009. /* Runtime instruction load won't happen;
  2010. * take it all the way back down so we can try again */
  2011. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2012. goto restart;
  2013. }
  2014. return;
  2015. restart:
  2016. queue_work(priv->workqueue, &priv->restart);
  2017. }
  2018. /**
  2019. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2020. * from protocol/runtime uCode (initialization uCode's
  2021. * Alive gets handled by iwl3945_init_alive_start()).
  2022. */
  2023. static void iwl3945_alive_start(struct iwl_priv *priv)
  2024. {
  2025. int thermal_spin = 0;
  2026. u32 rfkill;
  2027. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2028. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2029. /* We had an error bringing up the hardware, so take it
  2030. * all the way back down so we can try again */
  2031. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2032. goto restart;
  2033. }
  2034. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2035. * This is a paranoid check, because we would not have gotten the
  2036. * "runtime" alive if code weren't properly loaded. */
  2037. if (iwl3945_verify_ucode(priv)) {
  2038. /* Runtime instruction load was bad;
  2039. * take it all the way back down so we can try again */
  2040. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2041. goto restart;
  2042. }
  2043. iwl_clear_stations_table(priv);
  2044. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2045. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2046. if (rfkill & 0x1) {
  2047. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2048. /* if RFKILL is not on, then wait for thermal
  2049. * sensor in adapter to kick in */
  2050. while (iwl3945_hw_get_temperature(priv) == 0) {
  2051. thermal_spin++;
  2052. udelay(10);
  2053. }
  2054. if (thermal_spin)
  2055. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2056. thermal_spin * 10);
  2057. } else
  2058. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2059. /* After the ALIVE response, we can send commands to 3945 uCode */
  2060. set_bit(STATUS_ALIVE, &priv->status);
  2061. if (iwl_is_rfkill(priv))
  2062. return;
  2063. ieee80211_wake_queues(priv->hw);
  2064. priv->active_rate = priv->rates_mask;
  2065. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2066. iwl_power_update_mode(priv, false);
  2067. if (iwl_is_associated(priv)) {
  2068. struct iwl3945_rxon_cmd *active_rxon =
  2069. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2070. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2071. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2072. } else {
  2073. /* Initialize our rx_config data */
  2074. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2075. }
  2076. /* Configure Bluetooth device coexistence support */
  2077. iwl_send_bt_config(priv);
  2078. /* Configure the adapter for unassociated operation */
  2079. iwlcore_commit_rxon(priv);
  2080. iwl3945_reg_txpower_periodic(priv);
  2081. iwl_leds_init(priv);
  2082. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2083. set_bit(STATUS_READY, &priv->status);
  2084. wake_up_interruptible(&priv->wait_command_queue);
  2085. /* reassociate for ADHOC mode */
  2086. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2087. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2088. priv->vif);
  2089. if (beacon)
  2090. iwl_mac_beacon_update(priv->hw, beacon);
  2091. }
  2092. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2093. iwl_set_mode(priv, priv->iw_mode);
  2094. return;
  2095. restart:
  2096. queue_work(priv->workqueue, &priv->restart);
  2097. }
  2098. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2099. static void __iwl3945_down(struct iwl_priv *priv)
  2100. {
  2101. unsigned long flags;
  2102. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2103. struct ieee80211_conf *conf = NULL;
  2104. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2105. conf = ieee80211_get_hw_conf(priv->hw);
  2106. if (!exit_pending)
  2107. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2108. iwl_clear_stations_table(priv);
  2109. /* Unblock any waiting calls */
  2110. wake_up_interruptible_all(&priv->wait_command_queue);
  2111. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2112. * exiting the module */
  2113. if (!exit_pending)
  2114. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2115. /* stop and reset the on-board processor */
  2116. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2117. /* tell the device to stop sending interrupts */
  2118. spin_lock_irqsave(&priv->lock, flags);
  2119. iwl_disable_interrupts(priv);
  2120. spin_unlock_irqrestore(&priv->lock, flags);
  2121. iwl_synchronize_irq(priv);
  2122. if (priv->mac80211_registered)
  2123. ieee80211_stop_queues(priv->hw);
  2124. /* If we have not previously called iwl3945_init() then
  2125. * clear all bits but the RF Kill bits and return */
  2126. if (!iwl_is_init(priv)) {
  2127. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2128. STATUS_RF_KILL_HW |
  2129. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2130. STATUS_GEO_CONFIGURED |
  2131. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2132. STATUS_EXIT_PENDING;
  2133. goto exit;
  2134. }
  2135. /* ...otherwise clear out all the status bits but the RF Kill
  2136. * bit and continue taking the NIC down. */
  2137. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2138. STATUS_RF_KILL_HW |
  2139. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2140. STATUS_GEO_CONFIGURED |
  2141. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2142. STATUS_FW_ERROR |
  2143. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2144. STATUS_EXIT_PENDING;
  2145. iwl3945_hw_txq_ctx_stop(priv);
  2146. iwl3945_hw_rxq_stop(priv);
  2147. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2148. APMG_CLK_VAL_DMA_CLK_RQT);
  2149. udelay(5);
  2150. /* Stop the device, and put it in low power state */
  2151. priv->cfg->ops->lib->apm_ops.stop(priv);
  2152. exit:
  2153. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2154. if (priv->ibss_beacon)
  2155. dev_kfree_skb(priv->ibss_beacon);
  2156. priv->ibss_beacon = NULL;
  2157. /* clear out any free frames */
  2158. iwl3945_clear_free_frames(priv);
  2159. }
  2160. static void iwl3945_down(struct iwl_priv *priv)
  2161. {
  2162. mutex_lock(&priv->mutex);
  2163. __iwl3945_down(priv);
  2164. mutex_unlock(&priv->mutex);
  2165. iwl3945_cancel_deferred_work(priv);
  2166. }
  2167. #define MAX_HW_RESTARTS 5
  2168. static int __iwl3945_up(struct iwl_priv *priv)
  2169. {
  2170. int rc, i;
  2171. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2172. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2173. return -EIO;
  2174. }
  2175. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2176. IWL_ERR(priv, "ucode not available for device bring up\n");
  2177. return -EIO;
  2178. }
  2179. /* If platform's RF_KILL switch is NOT set to KILL */
  2180. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2181. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2182. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2183. else {
  2184. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2185. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2186. return -ENODEV;
  2187. }
  2188. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2189. rc = iwl3945_hw_nic_init(priv);
  2190. if (rc) {
  2191. IWL_ERR(priv, "Unable to int nic\n");
  2192. return rc;
  2193. }
  2194. /* make sure rfkill handshake bits are cleared */
  2195. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2196. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2197. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2198. /* clear (again), then enable host interrupts */
  2199. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2200. iwl_enable_interrupts(priv);
  2201. /* really make sure rfkill handshake bits are cleared */
  2202. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2203. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2204. /* Copy original ucode data image from disk into backup cache.
  2205. * This will be used to initialize the on-board processor's
  2206. * data SRAM for a clean start when the runtime program first loads. */
  2207. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2208. priv->ucode_data.len);
  2209. /* We return success when we resume from suspend and rf_kill is on. */
  2210. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2211. return 0;
  2212. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2213. iwl_clear_stations_table(priv);
  2214. /* load bootstrap state machine,
  2215. * load bootstrap program into processor's memory,
  2216. * prepare to load the "initialize" uCode */
  2217. priv->cfg->ops->lib->load_ucode(priv);
  2218. if (rc) {
  2219. IWL_ERR(priv,
  2220. "Unable to set up bootstrap uCode: %d\n", rc);
  2221. continue;
  2222. }
  2223. /* start card; "initialize" will load runtime ucode */
  2224. iwl3945_nic_start(priv);
  2225. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2226. return 0;
  2227. }
  2228. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2229. __iwl3945_down(priv);
  2230. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2231. /* tried to restart and config the device for as long as our
  2232. * patience could withstand */
  2233. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2234. return -EIO;
  2235. }
  2236. /*****************************************************************************
  2237. *
  2238. * Workqueue callbacks
  2239. *
  2240. *****************************************************************************/
  2241. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2242. {
  2243. struct iwl_priv *priv =
  2244. container_of(data, struct iwl_priv, init_alive_start.work);
  2245. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2246. return;
  2247. mutex_lock(&priv->mutex);
  2248. iwl3945_init_alive_start(priv);
  2249. mutex_unlock(&priv->mutex);
  2250. }
  2251. static void iwl3945_bg_alive_start(struct work_struct *data)
  2252. {
  2253. struct iwl_priv *priv =
  2254. container_of(data, struct iwl_priv, alive_start.work);
  2255. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2256. return;
  2257. mutex_lock(&priv->mutex);
  2258. iwl3945_alive_start(priv);
  2259. mutex_unlock(&priv->mutex);
  2260. }
  2261. /*
  2262. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2263. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2264. * *is* readable even when device has been SW_RESET into low power mode
  2265. * (e.g. during RF KILL).
  2266. */
  2267. static void iwl3945_rfkill_poll(struct work_struct *data)
  2268. {
  2269. struct iwl_priv *priv =
  2270. container_of(data, struct iwl_priv, rfkill_poll.work);
  2271. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2272. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2273. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2274. if (new_rfkill != old_rfkill) {
  2275. if (new_rfkill)
  2276. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2277. else
  2278. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2279. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2280. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2281. new_rfkill ? "disable radio" : "enable radio");
  2282. }
  2283. /* Keep this running, even if radio now enabled. This will be
  2284. * cancelled in mac_start() if system decides to start again */
  2285. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2286. round_jiffies_relative(2 * HZ));
  2287. }
  2288. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2289. static void iwl3945_bg_request_scan(struct work_struct *data)
  2290. {
  2291. struct iwl_priv *priv =
  2292. container_of(data, struct iwl_priv, request_scan);
  2293. struct iwl_host_cmd cmd = {
  2294. .id = REPLY_SCAN_CMD,
  2295. .len = sizeof(struct iwl3945_scan_cmd),
  2296. .flags = CMD_SIZE_HUGE,
  2297. };
  2298. int rc = 0;
  2299. struct iwl3945_scan_cmd *scan;
  2300. struct ieee80211_conf *conf = NULL;
  2301. u8 n_probes = 0;
  2302. enum ieee80211_band band;
  2303. bool is_active = false;
  2304. conf = ieee80211_get_hw_conf(priv->hw);
  2305. mutex_lock(&priv->mutex);
  2306. cancel_delayed_work(&priv->scan_check);
  2307. if (!iwl_is_ready(priv)) {
  2308. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2309. goto done;
  2310. }
  2311. /* Make sure the scan wasn't canceled before this queued work
  2312. * was given the chance to run... */
  2313. if (!test_bit(STATUS_SCANNING, &priv->status))
  2314. goto done;
  2315. /* This should never be called or scheduled if there is currently
  2316. * a scan active in the hardware. */
  2317. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2318. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2319. "Ignoring second request.\n");
  2320. rc = -EIO;
  2321. goto done;
  2322. }
  2323. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2324. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2325. goto done;
  2326. }
  2327. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2328. IWL_DEBUG_HC(priv,
  2329. "Scan request while abort pending. Queuing.\n");
  2330. goto done;
  2331. }
  2332. if (iwl_is_rfkill(priv)) {
  2333. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2334. goto done;
  2335. }
  2336. if (!test_bit(STATUS_READY, &priv->status)) {
  2337. IWL_DEBUG_HC(priv,
  2338. "Scan request while uninitialized. Queuing.\n");
  2339. goto done;
  2340. }
  2341. if (!priv->scan_bands) {
  2342. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2343. goto done;
  2344. }
  2345. if (!priv->scan) {
  2346. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2347. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2348. if (!priv->scan) {
  2349. rc = -ENOMEM;
  2350. goto done;
  2351. }
  2352. }
  2353. scan = priv->scan;
  2354. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2355. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2356. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2357. if (iwl_is_associated(priv)) {
  2358. u16 interval = 0;
  2359. u32 extra;
  2360. u32 suspend_time = 100;
  2361. u32 scan_suspend_time = 100;
  2362. unsigned long flags;
  2363. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2364. spin_lock_irqsave(&priv->lock, flags);
  2365. interval = priv->beacon_int;
  2366. spin_unlock_irqrestore(&priv->lock, flags);
  2367. scan->suspend_time = 0;
  2368. scan->max_out_time = cpu_to_le32(200 * 1024);
  2369. if (!interval)
  2370. interval = suspend_time;
  2371. /*
  2372. * suspend time format:
  2373. * 0-19: beacon interval in usec (time before exec.)
  2374. * 20-23: 0
  2375. * 24-31: number of beacons (suspend between channels)
  2376. */
  2377. extra = (suspend_time / interval) << 24;
  2378. scan_suspend_time = 0xFF0FFFFF &
  2379. (extra | ((suspend_time % interval) * 1024));
  2380. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2381. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2382. scan_suspend_time, interval);
  2383. }
  2384. if (priv->scan_request->n_ssids) {
  2385. int i, p = 0;
  2386. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2387. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2388. /* always does wildcard anyway */
  2389. if (!priv->scan_request->ssids[i].ssid_len)
  2390. continue;
  2391. scan->direct_scan[p].id = WLAN_EID_SSID;
  2392. scan->direct_scan[p].len =
  2393. priv->scan_request->ssids[i].ssid_len;
  2394. memcpy(scan->direct_scan[p].ssid,
  2395. priv->scan_request->ssids[i].ssid,
  2396. priv->scan_request->ssids[i].ssid_len);
  2397. n_probes++;
  2398. p++;
  2399. }
  2400. is_active = true;
  2401. } else
  2402. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2403. /* We don't build a direct scan probe request; the uCode will do
  2404. * that based on the direct_mask added to each channel entry */
  2405. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2406. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2407. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2408. /* flags + rate selection */
  2409. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2410. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2411. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2412. scan->good_CRC_th = 0;
  2413. band = IEEE80211_BAND_2GHZ;
  2414. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2415. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2416. /*
  2417. * If active scaning is requested but a certain channel
  2418. * is marked passive, we can do active scanning if we
  2419. * detect transmissions.
  2420. */
  2421. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2422. band = IEEE80211_BAND_5GHZ;
  2423. } else {
  2424. IWL_WARN(priv, "Invalid scan band count\n");
  2425. goto done;
  2426. }
  2427. scan->tx_cmd.len = cpu_to_le16(
  2428. iwl_fill_probe_req(priv,
  2429. (struct ieee80211_mgmt *)scan->data,
  2430. priv->scan_request->ie,
  2431. priv->scan_request->ie_len,
  2432. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2433. /* select Rx antennas */
  2434. scan->flags |= iwl3945_get_antenna_flags(priv);
  2435. if (iwl_is_monitor_mode(priv))
  2436. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2437. scan->channel_count =
  2438. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2439. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2440. if (scan->channel_count == 0) {
  2441. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2442. goto done;
  2443. }
  2444. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2445. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2446. cmd.data = scan;
  2447. scan->len = cpu_to_le16(cmd.len);
  2448. set_bit(STATUS_SCAN_HW, &priv->status);
  2449. rc = iwl_send_cmd_sync(priv, &cmd);
  2450. if (rc)
  2451. goto done;
  2452. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2453. IWL_SCAN_CHECK_WATCHDOG);
  2454. mutex_unlock(&priv->mutex);
  2455. return;
  2456. done:
  2457. /* can not perform scan make sure we clear scanning
  2458. * bits from status so next scan request can be performed.
  2459. * if we dont clear scanning status bit here all next scan
  2460. * will fail
  2461. */
  2462. clear_bit(STATUS_SCAN_HW, &priv->status);
  2463. clear_bit(STATUS_SCANNING, &priv->status);
  2464. /* inform mac80211 scan aborted */
  2465. queue_work(priv->workqueue, &priv->scan_completed);
  2466. mutex_unlock(&priv->mutex);
  2467. }
  2468. static void iwl3945_bg_up(struct work_struct *data)
  2469. {
  2470. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2471. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2472. return;
  2473. mutex_lock(&priv->mutex);
  2474. __iwl3945_up(priv);
  2475. mutex_unlock(&priv->mutex);
  2476. }
  2477. static void iwl3945_bg_restart(struct work_struct *data)
  2478. {
  2479. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2480. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2481. return;
  2482. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2483. mutex_lock(&priv->mutex);
  2484. priv->vif = NULL;
  2485. priv->is_open = 0;
  2486. mutex_unlock(&priv->mutex);
  2487. iwl3945_down(priv);
  2488. ieee80211_restart_hw(priv->hw);
  2489. } else {
  2490. iwl3945_down(priv);
  2491. queue_work(priv->workqueue, &priv->up);
  2492. }
  2493. }
  2494. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2495. {
  2496. struct iwl_priv *priv =
  2497. container_of(data, struct iwl_priv, rx_replenish);
  2498. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2499. return;
  2500. mutex_lock(&priv->mutex);
  2501. iwl3945_rx_replenish(priv);
  2502. mutex_unlock(&priv->mutex);
  2503. }
  2504. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2505. void iwl3945_post_associate(struct iwl_priv *priv)
  2506. {
  2507. int rc = 0;
  2508. struct ieee80211_conf *conf = NULL;
  2509. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2510. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2511. return;
  2512. }
  2513. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2514. priv->assoc_id, priv->active_rxon.bssid_addr);
  2515. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2516. return;
  2517. if (!priv->vif || !priv->is_open)
  2518. return;
  2519. iwl_scan_cancel_timeout(priv, 200);
  2520. conf = ieee80211_get_hw_conf(priv->hw);
  2521. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2522. iwlcore_commit_rxon(priv);
  2523. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2524. iwl_setup_rxon_timing(priv);
  2525. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2526. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2527. if (rc)
  2528. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2529. "Attempting to continue.\n");
  2530. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2531. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2532. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2533. priv->assoc_id, priv->beacon_int);
  2534. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2535. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2536. else
  2537. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2538. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2539. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2540. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2541. else
  2542. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2543. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2544. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2545. }
  2546. iwlcore_commit_rxon(priv);
  2547. switch (priv->iw_mode) {
  2548. case NL80211_IFTYPE_STATION:
  2549. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2550. break;
  2551. case NL80211_IFTYPE_ADHOC:
  2552. priv->assoc_id = 1;
  2553. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2554. iwl3945_sync_sta(priv, IWL_STA_ID,
  2555. (priv->band == IEEE80211_BAND_5GHZ) ?
  2556. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2557. CMD_ASYNC);
  2558. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2559. iwl3945_send_beacon_cmd(priv);
  2560. break;
  2561. default:
  2562. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2563. __func__, priv->iw_mode);
  2564. break;
  2565. }
  2566. iwl_activate_qos(priv, 0);
  2567. /* we have just associated, don't start scan too early */
  2568. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2569. }
  2570. /*****************************************************************************
  2571. *
  2572. * mac80211 entry point functions
  2573. *
  2574. *****************************************************************************/
  2575. #define UCODE_READY_TIMEOUT (2 * HZ)
  2576. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2577. {
  2578. struct iwl_priv *priv = hw->priv;
  2579. int ret;
  2580. IWL_DEBUG_MAC80211(priv, "enter\n");
  2581. /* we should be verifying the device is ready to be opened */
  2582. mutex_lock(&priv->mutex);
  2583. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2584. * ucode filename and max sizes are card-specific. */
  2585. if (!priv->ucode_code.len) {
  2586. ret = iwl3945_read_ucode(priv);
  2587. if (ret) {
  2588. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2589. mutex_unlock(&priv->mutex);
  2590. goto out_release_irq;
  2591. }
  2592. }
  2593. ret = __iwl3945_up(priv);
  2594. mutex_unlock(&priv->mutex);
  2595. if (ret)
  2596. goto out_release_irq;
  2597. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2598. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2599. * mac80211 will not be run successfully. */
  2600. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2601. test_bit(STATUS_READY, &priv->status),
  2602. UCODE_READY_TIMEOUT);
  2603. if (!ret) {
  2604. if (!test_bit(STATUS_READY, &priv->status)) {
  2605. IWL_ERR(priv,
  2606. "Wait for START_ALIVE timeout after %dms.\n",
  2607. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2608. ret = -ETIMEDOUT;
  2609. goto out_release_irq;
  2610. }
  2611. }
  2612. /* ucode is running and will send rfkill notifications,
  2613. * no need to poll the killswitch state anymore */
  2614. cancel_delayed_work(&priv->rfkill_poll);
  2615. iwl_led_start(priv);
  2616. priv->is_open = 1;
  2617. IWL_DEBUG_MAC80211(priv, "leave\n");
  2618. return 0;
  2619. out_release_irq:
  2620. priv->is_open = 0;
  2621. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2622. return ret;
  2623. }
  2624. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2625. {
  2626. struct iwl_priv *priv = hw->priv;
  2627. IWL_DEBUG_MAC80211(priv, "enter\n");
  2628. if (!priv->is_open) {
  2629. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2630. return;
  2631. }
  2632. priv->is_open = 0;
  2633. if (iwl_is_ready_rf(priv)) {
  2634. /* stop mac, cancel any scan request and clear
  2635. * RXON_FILTER_ASSOC_MSK BIT
  2636. */
  2637. mutex_lock(&priv->mutex);
  2638. iwl_scan_cancel_timeout(priv, 100);
  2639. mutex_unlock(&priv->mutex);
  2640. }
  2641. iwl3945_down(priv);
  2642. flush_workqueue(priv->workqueue);
  2643. /* start polling the killswitch state again */
  2644. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2645. round_jiffies_relative(2 * HZ));
  2646. IWL_DEBUG_MAC80211(priv, "leave\n");
  2647. }
  2648. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2649. {
  2650. struct iwl_priv *priv = hw->priv;
  2651. IWL_DEBUG_MAC80211(priv, "enter\n");
  2652. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2653. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2654. if (iwl3945_tx_skb(priv, skb))
  2655. dev_kfree_skb_any(skb);
  2656. IWL_DEBUG_MAC80211(priv, "leave\n");
  2657. return NETDEV_TX_OK;
  2658. }
  2659. void iwl3945_config_ap(struct iwl_priv *priv)
  2660. {
  2661. int rc = 0;
  2662. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2663. return;
  2664. /* The following should be done only at AP bring up */
  2665. if (!(iwl_is_associated(priv))) {
  2666. /* RXON - unassoc (to set timing command) */
  2667. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2668. iwlcore_commit_rxon(priv);
  2669. /* RXON Timing */
  2670. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2671. iwl_setup_rxon_timing(priv);
  2672. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2673. sizeof(priv->rxon_timing),
  2674. &priv->rxon_timing);
  2675. if (rc)
  2676. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2677. "Attempting to continue.\n");
  2678. /* FIXME: what should be the assoc_id for AP? */
  2679. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2680. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2681. priv->staging_rxon.flags |=
  2682. RXON_FLG_SHORT_PREAMBLE_MSK;
  2683. else
  2684. priv->staging_rxon.flags &=
  2685. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2686. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2687. if (priv->assoc_capability &
  2688. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2689. priv->staging_rxon.flags |=
  2690. RXON_FLG_SHORT_SLOT_MSK;
  2691. else
  2692. priv->staging_rxon.flags &=
  2693. ~RXON_FLG_SHORT_SLOT_MSK;
  2694. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2695. priv->staging_rxon.flags &=
  2696. ~RXON_FLG_SHORT_SLOT_MSK;
  2697. }
  2698. /* restore RXON assoc */
  2699. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2700. iwlcore_commit_rxon(priv);
  2701. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2702. }
  2703. iwl3945_send_beacon_cmd(priv);
  2704. /* FIXME - we need to add code here to detect a totally new
  2705. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2706. * clear sta table, add BCAST sta... */
  2707. }
  2708. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2709. struct ieee80211_vif *vif,
  2710. struct ieee80211_sta *sta,
  2711. struct ieee80211_key_conf *key)
  2712. {
  2713. struct iwl_priv *priv = hw->priv;
  2714. const u8 *addr;
  2715. int ret = 0;
  2716. u8 sta_id = IWL_INVALID_STATION;
  2717. u8 static_key;
  2718. IWL_DEBUG_MAC80211(priv, "enter\n");
  2719. if (iwl3945_mod_params.sw_crypto) {
  2720. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2721. return -EOPNOTSUPP;
  2722. }
  2723. addr = sta ? sta->addr : iwl_bcast_addr;
  2724. static_key = !iwl_is_associated(priv);
  2725. if (!static_key) {
  2726. sta_id = iwl_find_station(priv, addr);
  2727. if (sta_id == IWL_INVALID_STATION) {
  2728. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2729. addr);
  2730. return -EINVAL;
  2731. }
  2732. }
  2733. mutex_lock(&priv->mutex);
  2734. iwl_scan_cancel_timeout(priv, 100);
  2735. mutex_unlock(&priv->mutex);
  2736. switch (cmd) {
  2737. case SET_KEY:
  2738. if (static_key)
  2739. ret = iwl3945_set_static_key(priv, key);
  2740. else
  2741. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2742. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2743. break;
  2744. case DISABLE_KEY:
  2745. if (static_key)
  2746. ret = iwl3945_remove_static_key(priv);
  2747. else
  2748. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2749. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2750. break;
  2751. default:
  2752. ret = -EINVAL;
  2753. }
  2754. IWL_DEBUG_MAC80211(priv, "leave\n");
  2755. return ret;
  2756. }
  2757. /*****************************************************************************
  2758. *
  2759. * sysfs attributes
  2760. *
  2761. *****************************************************************************/
  2762. #ifdef CONFIG_IWLWIFI_DEBUG
  2763. /*
  2764. * The following adds a new attribute to the sysfs representation
  2765. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2766. * used for controlling the debug level.
  2767. *
  2768. * See the level definitions in iwl for details.
  2769. *
  2770. * The debug_level being managed using sysfs below is a per device debug
  2771. * level that is used instead of the global debug level if it (the per
  2772. * device debug level) is set.
  2773. */
  2774. static ssize_t show_debug_level(struct device *d,
  2775. struct device_attribute *attr, char *buf)
  2776. {
  2777. struct iwl_priv *priv = dev_get_drvdata(d);
  2778. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2779. }
  2780. static ssize_t store_debug_level(struct device *d,
  2781. struct device_attribute *attr,
  2782. const char *buf, size_t count)
  2783. {
  2784. struct iwl_priv *priv = dev_get_drvdata(d);
  2785. unsigned long val;
  2786. int ret;
  2787. ret = strict_strtoul(buf, 0, &val);
  2788. if (ret)
  2789. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2790. else {
  2791. priv->debug_level = val;
  2792. if (iwl_alloc_traffic_mem(priv))
  2793. IWL_ERR(priv,
  2794. "Not enough memory to generate traffic log\n");
  2795. }
  2796. return strnlen(buf, count);
  2797. }
  2798. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2799. show_debug_level, store_debug_level);
  2800. #endif /* CONFIG_IWLWIFI_DEBUG */
  2801. static ssize_t show_temperature(struct device *d,
  2802. struct device_attribute *attr, char *buf)
  2803. {
  2804. struct iwl_priv *priv = dev_get_drvdata(d);
  2805. if (!iwl_is_alive(priv))
  2806. return -EAGAIN;
  2807. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2808. }
  2809. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2810. static ssize_t show_tx_power(struct device *d,
  2811. struct device_attribute *attr, char *buf)
  2812. {
  2813. struct iwl_priv *priv = dev_get_drvdata(d);
  2814. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2815. }
  2816. static ssize_t store_tx_power(struct device *d,
  2817. struct device_attribute *attr,
  2818. const char *buf, size_t count)
  2819. {
  2820. struct iwl_priv *priv = dev_get_drvdata(d);
  2821. char *p = (char *)buf;
  2822. u32 val;
  2823. val = simple_strtoul(p, &p, 10);
  2824. if (p == buf)
  2825. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2826. else
  2827. iwl3945_hw_reg_set_txpower(priv, val);
  2828. return count;
  2829. }
  2830. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2831. static ssize_t show_flags(struct device *d,
  2832. struct device_attribute *attr, char *buf)
  2833. {
  2834. struct iwl_priv *priv = dev_get_drvdata(d);
  2835. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2836. }
  2837. static ssize_t store_flags(struct device *d,
  2838. struct device_attribute *attr,
  2839. const char *buf, size_t count)
  2840. {
  2841. struct iwl_priv *priv = dev_get_drvdata(d);
  2842. u32 flags = simple_strtoul(buf, NULL, 0);
  2843. mutex_lock(&priv->mutex);
  2844. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2845. /* Cancel any currently running scans... */
  2846. if (iwl_scan_cancel_timeout(priv, 100))
  2847. IWL_WARN(priv, "Could not cancel scan.\n");
  2848. else {
  2849. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2850. flags);
  2851. priv->staging_rxon.flags = cpu_to_le32(flags);
  2852. iwlcore_commit_rxon(priv);
  2853. }
  2854. }
  2855. mutex_unlock(&priv->mutex);
  2856. return count;
  2857. }
  2858. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2859. static ssize_t show_filter_flags(struct device *d,
  2860. struct device_attribute *attr, char *buf)
  2861. {
  2862. struct iwl_priv *priv = dev_get_drvdata(d);
  2863. return sprintf(buf, "0x%04X\n",
  2864. le32_to_cpu(priv->active_rxon.filter_flags));
  2865. }
  2866. static ssize_t store_filter_flags(struct device *d,
  2867. struct device_attribute *attr,
  2868. const char *buf, size_t count)
  2869. {
  2870. struct iwl_priv *priv = dev_get_drvdata(d);
  2871. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2872. mutex_lock(&priv->mutex);
  2873. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2874. /* Cancel any currently running scans... */
  2875. if (iwl_scan_cancel_timeout(priv, 100))
  2876. IWL_WARN(priv, "Could not cancel scan.\n");
  2877. else {
  2878. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2879. "0x%04X\n", filter_flags);
  2880. priv->staging_rxon.filter_flags =
  2881. cpu_to_le32(filter_flags);
  2882. iwlcore_commit_rxon(priv);
  2883. }
  2884. }
  2885. mutex_unlock(&priv->mutex);
  2886. return count;
  2887. }
  2888. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2889. store_filter_flags);
  2890. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2891. static ssize_t show_measurement(struct device *d,
  2892. struct device_attribute *attr, char *buf)
  2893. {
  2894. struct iwl_priv *priv = dev_get_drvdata(d);
  2895. struct iwl_spectrum_notification measure_report;
  2896. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2897. u8 *data = (u8 *)&measure_report;
  2898. unsigned long flags;
  2899. spin_lock_irqsave(&priv->lock, flags);
  2900. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2901. spin_unlock_irqrestore(&priv->lock, flags);
  2902. return 0;
  2903. }
  2904. memcpy(&measure_report, &priv->measure_report, size);
  2905. priv->measurement_status = 0;
  2906. spin_unlock_irqrestore(&priv->lock, flags);
  2907. while (size && (PAGE_SIZE - len)) {
  2908. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2909. PAGE_SIZE - len, 1);
  2910. len = strlen(buf);
  2911. if (PAGE_SIZE - len)
  2912. buf[len++] = '\n';
  2913. ofs += 16;
  2914. size -= min(size, 16U);
  2915. }
  2916. return len;
  2917. }
  2918. static ssize_t store_measurement(struct device *d,
  2919. struct device_attribute *attr,
  2920. const char *buf, size_t count)
  2921. {
  2922. struct iwl_priv *priv = dev_get_drvdata(d);
  2923. struct ieee80211_measurement_params params = {
  2924. .channel = le16_to_cpu(priv->active_rxon.channel),
  2925. .start_time = cpu_to_le64(priv->last_tsf),
  2926. .duration = cpu_to_le16(1),
  2927. };
  2928. u8 type = IWL_MEASURE_BASIC;
  2929. u8 buffer[32];
  2930. u8 channel;
  2931. if (count) {
  2932. char *p = buffer;
  2933. strncpy(buffer, buf, min(sizeof(buffer), count));
  2934. channel = simple_strtoul(p, NULL, 0);
  2935. if (channel)
  2936. params.channel = channel;
  2937. p = buffer;
  2938. while (*p && *p != ' ')
  2939. p++;
  2940. if (*p)
  2941. type = simple_strtoul(p + 1, NULL, 0);
  2942. }
  2943. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2944. "channel %d (for '%s')\n", type, params.channel, buf);
  2945. iwl3945_get_measurement(priv, &params, type);
  2946. return count;
  2947. }
  2948. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2949. show_measurement, store_measurement);
  2950. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2951. static ssize_t store_retry_rate(struct device *d,
  2952. struct device_attribute *attr,
  2953. const char *buf, size_t count)
  2954. {
  2955. struct iwl_priv *priv = dev_get_drvdata(d);
  2956. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2957. if (priv->retry_rate <= 0)
  2958. priv->retry_rate = 1;
  2959. return count;
  2960. }
  2961. static ssize_t show_retry_rate(struct device *d,
  2962. struct device_attribute *attr, char *buf)
  2963. {
  2964. struct iwl_priv *priv = dev_get_drvdata(d);
  2965. return sprintf(buf, "%d", priv->retry_rate);
  2966. }
  2967. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  2968. store_retry_rate);
  2969. static ssize_t show_channels(struct device *d,
  2970. struct device_attribute *attr, char *buf)
  2971. {
  2972. /* all this shit doesn't belong into sysfs anyway */
  2973. return 0;
  2974. }
  2975. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  2976. static ssize_t show_statistics(struct device *d,
  2977. struct device_attribute *attr, char *buf)
  2978. {
  2979. struct iwl_priv *priv = dev_get_drvdata(d);
  2980. u32 size = sizeof(struct iwl3945_notif_statistics);
  2981. u32 len = 0, ofs = 0;
  2982. u8 *data = (u8 *)&priv->statistics_39;
  2983. int rc = 0;
  2984. if (!iwl_is_alive(priv))
  2985. return -EAGAIN;
  2986. mutex_lock(&priv->mutex);
  2987. rc = iwl_send_statistics_request(priv, 0);
  2988. mutex_unlock(&priv->mutex);
  2989. if (rc) {
  2990. len = sprintf(buf,
  2991. "Error sending statistics request: 0x%08X\n", rc);
  2992. return len;
  2993. }
  2994. while (size && (PAGE_SIZE - len)) {
  2995. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2996. PAGE_SIZE - len, 1);
  2997. len = strlen(buf);
  2998. if (PAGE_SIZE - len)
  2999. buf[len++] = '\n';
  3000. ofs += 16;
  3001. size -= min(size, 16U);
  3002. }
  3003. return len;
  3004. }
  3005. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3006. static ssize_t show_antenna(struct device *d,
  3007. struct device_attribute *attr, char *buf)
  3008. {
  3009. struct iwl_priv *priv = dev_get_drvdata(d);
  3010. if (!iwl_is_alive(priv))
  3011. return -EAGAIN;
  3012. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3013. }
  3014. static ssize_t store_antenna(struct device *d,
  3015. struct device_attribute *attr,
  3016. const char *buf, size_t count)
  3017. {
  3018. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3019. int ant;
  3020. if (count == 0)
  3021. return 0;
  3022. if (sscanf(buf, "%1i", &ant) != 1) {
  3023. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3024. return count;
  3025. }
  3026. if ((ant >= 0) && (ant <= 2)) {
  3027. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3028. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3029. } else
  3030. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3031. return count;
  3032. }
  3033. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3034. static ssize_t show_status(struct device *d,
  3035. struct device_attribute *attr, char *buf)
  3036. {
  3037. struct iwl_priv *priv = dev_get_drvdata(d);
  3038. if (!iwl_is_alive(priv))
  3039. return -EAGAIN;
  3040. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3041. }
  3042. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3043. static ssize_t dump_error_log(struct device *d,
  3044. struct device_attribute *attr,
  3045. const char *buf, size_t count)
  3046. {
  3047. struct iwl_priv *priv = dev_get_drvdata(d);
  3048. char *p = (char *)buf;
  3049. if (p[0] == '1')
  3050. iwl3945_dump_nic_error_log(priv);
  3051. return strnlen(buf, count);
  3052. }
  3053. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3054. /*****************************************************************************
  3055. *
  3056. * driver setup and tear down
  3057. *
  3058. *****************************************************************************/
  3059. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3060. {
  3061. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3062. init_waitqueue_head(&priv->wait_command_queue);
  3063. INIT_WORK(&priv->up, iwl3945_bg_up);
  3064. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3065. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3066. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3067. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3068. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3069. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3070. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3071. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3072. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3073. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3074. iwl3945_hw_setup_deferred_work(priv);
  3075. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3076. iwl3945_irq_tasklet, (unsigned long)priv);
  3077. }
  3078. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3079. {
  3080. iwl3945_hw_cancel_deferred_work(priv);
  3081. cancel_delayed_work_sync(&priv->init_alive_start);
  3082. cancel_delayed_work(&priv->scan_check);
  3083. cancel_delayed_work(&priv->alive_start);
  3084. cancel_work_sync(&priv->beacon_update);
  3085. }
  3086. static struct attribute *iwl3945_sysfs_entries[] = {
  3087. &dev_attr_antenna.attr,
  3088. &dev_attr_channels.attr,
  3089. &dev_attr_dump_errors.attr,
  3090. &dev_attr_flags.attr,
  3091. &dev_attr_filter_flags.attr,
  3092. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3093. &dev_attr_measurement.attr,
  3094. #endif
  3095. &dev_attr_retry_rate.attr,
  3096. &dev_attr_statistics.attr,
  3097. &dev_attr_status.attr,
  3098. &dev_attr_temperature.attr,
  3099. &dev_attr_tx_power.attr,
  3100. #ifdef CONFIG_IWLWIFI_DEBUG
  3101. &dev_attr_debug_level.attr,
  3102. #endif
  3103. NULL
  3104. };
  3105. static struct attribute_group iwl3945_attribute_group = {
  3106. .name = NULL, /* put in device directory */
  3107. .attrs = iwl3945_sysfs_entries,
  3108. };
  3109. static struct ieee80211_ops iwl3945_hw_ops = {
  3110. .tx = iwl3945_mac_tx,
  3111. .start = iwl3945_mac_start,
  3112. .stop = iwl3945_mac_stop,
  3113. .add_interface = iwl_mac_add_interface,
  3114. .remove_interface = iwl_mac_remove_interface,
  3115. .config = iwl_mac_config,
  3116. .configure_filter = iwl_configure_filter,
  3117. .set_key = iwl3945_mac_set_key,
  3118. .get_tx_stats = iwl_mac_get_tx_stats,
  3119. .conf_tx = iwl_mac_conf_tx,
  3120. .reset_tsf = iwl_mac_reset_tsf,
  3121. .bss_info_changed = iwl_bss_info_changed,
  3122. .hw_scan = iwl_mac_hw_scan
  3123. };
  3124. static int iwl3945_init_drv(struct iwl_priv *priv)
  3125. {
  3126. int ret;
  3127. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3128. priv->retry_rate = 1;
  3129. priv->ibss_beacon = NULL;
  3130. spin_lock_init(&priv->lock);
  3131. spin_lock_init(&priv->sta_lock);
  3132. spin_lock_init(&priv->hcmd_lock);
  3133. INIT_LIST_HEAD(&priv->free_frames);
  3134. mutex_init(&priv->mutex);
  3135. /* Clear the driver's (not device's) station table */
  3136. iwl_clear_stations_table(priv);
  3137. priv->ieee_channels = NULL;
  3138. priv->ieee_rates = NULL;
  3139. priv->band = IEEE80211_BAND_2GHZ;
  3140. priv->iw_mode = NL80211_IFTYPE_STATION;
  3141. iwl_reset_qos(priv);
  3142. priv->qos_data.qos_active = 0;
  3143. priv->qos_data.qos_cap.val = 0;
  3144. priv->rates_mask = IWL_RATES_MASK;
  3145. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3146. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3147. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3148. eeprom->version);
  3149. ret = -EINVAL;
  3150. goto err;
  3151. }
  3152. ret = iwl_init_channel_map(priv);
  3153. if (ret) {
  3154. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3155. goto err;
  3156. }
  3157. /* Set up txpower settings in driver for all channels */
  3158. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3159. ret = -EIO;
  3160. goto err_free_channel_map;
  3161. }
  3162. ret = iwlcore_init_geos(priv);
  3163. if (ret) {
  3164. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3165. goto err_free_channel_map;
  3166. }
  3167. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3168. return 0;
  3169. err_free_channel_map:
  3170. iwl_free_channel_map(priv);
  3171. err:
  3172. return ret;
  3173. }
  3174. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3175. {
  3176. int ret;
  3177. struct ieee80211_hw *hw = priv->hw;
  3178. hw->rate_control_algorithm = "iwl-3945-rs";
  3179. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3180. /* Tell mac80211 our characteristics */
  3181. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3182. IEEE80211_HW_NOISE_DBM |
  3183. IEEE80211_HW_SPECTRUM_MGMT |
  3184. IEEE80211_HW_SUPPORTS_PS |
  3185. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3186. hw->wiphy->interface_modes =
  3187. BIT(NL80211_IFTYPE_STATION) |
  3188. BIT(NL80211_IFTYPE_ADHOC);
  3189. hw->wiphy->custom_regulatory = true;
  3190. /* Firmware does not support this */
  3191. hw->wiphy->disable_beacon_hints = true;
  3192. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3193. /* we create the 802.11 header and a zero-length SSID element */
  3194. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3195. /* Default value; 4 EDCA QOS priorities */
  3196. hw->queues = 4;
  3197. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3198. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3199. &priv->bands[IEEE80211_BAND_2GHZ];
  3200. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3201. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3202. &priv->bands[IEEE80211_BAND_5GHZ];
  3203. ret = ieee80211_register_hw(priv->hw);
  3204. if (ret) {
  3205. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3206. return ret;
  3207. }
  3208. priv->mac80211_registered = 1;
  3209. return 0;
  3210. }
  3211. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3212. {
  3213. int err = 0;
  3214. struct iwl_priv *priv;
  3215. struct ieee80211_hw *hw;
  3216. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3217. struct iwl3945_eeprom *eeprom;
  3218. unsigned long flags;
  3219. /***********************
  3220. * 1. Allocating HW data
  3221. * ********************/
  3222. /* mac80211 allocates memory for this device instance, including
  3223. * space for this driver's private structure */
  3224. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3225. if (hw == NULL) {
  3226. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3227. err = -ENOMEM;
  3228. goto out;
  3229. }
  3230. priv = hw->priv;
  3231. SET_IEEE80211_DEV(hw, &pdev->dev);
  3232. /*
  3233. * Disabling hardware scan means that mac80211 will perform scans
  3234. * "the hard way", rather than using device's scan.
  3235. */
  3236. if (iwl3945_mod_params.disable_hw_scan) {
  3237. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3238. iwl3945_hw_ops.hw_scan = NULL;
  3239. }
  3240. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3241. priv->cfg = cfg;
  3242. priv->pci_dev = pdev;
  3243. priv->inta_mask = CSR_INI_SET_MASK;
  3244. #ifdef CONFIG_IWLWIFI_DEBUG
  3245. atomic_set(&priv->restrict_refcnt, 0);
  3246. #endif
  3247. if (iwl_alloc_traffic_mem(priv))
  3248. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3249. /***************************
  3250. * 2. Initializing PCI bus
  3251. * *************************/
  3252. if (pci_enable_device(pdev)) {
  3253. err = -ENODEV;
  3254. goto out_ieee80211_free_hw;
  3255. }
  3256. pci_set_master(pdev);
  3257. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3258. if (!err)
  3259. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3260. if (err) {
  3261. IWL_WARN(priv, "No suitable DMA available.\n");
  3262. goto out_pci_disable_device;
  3263. }
  3264. pci_set_drvdata(pdev, priv);
  3265. err = pci_request_regions(pdev, DRV_NAME);
  3266. if (err)
  3267. goto out_pci_disable_device;
  3268. /***********************
  3269. * 3. Read REV Register
  3270. * ********************/
  3271. priv->hw_base = pci_iomap(pdev, 0, 0);
  3272. if (!priv->hw_base) {
  3273. err = -ENODEV;
  3274. goto out_pci_release_regions;
  3275. }
  3276. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3277. (unsigned long long) pci_resource_len(pdev, 0));
  3278. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3279. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3280. * PCI Tx retries from interfering with C3 CPU state */
  3281. pci_write_config_byte(pdev, 0x41, 0x00);
  3282. /* this spin lock will be used in apm_ops.init and EEPROM access
  3283. * we should init now
  3284. */
  3285. spin_lock_init(&priv->reg_lock);
  3286. /* amp init */
  3287. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3288. if (err < 0) {
  3289. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3290. goto out_iounmap;
  3291. }
  3292. /***********************
  3293. * 4. Read EEPROM
  3294. * ********************/
  3295. /* Read the EEPROM */
  3296. err = iwl_eeprom_init(priv);
  3297. if (err) {
  3298. IWL_ERR(priv, "Unable to init EEPROM\n");
  3299. goto out_iounmap;
  3300. }
  3301. /* MAC Address location in EEPROM same for 3945/4965 */
  3302. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3303. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3304. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3305. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3306. /***********************
  3307. * 5. Setup HW Constants
  3308. * ********************/
  3309. /* Device-specific setup */
  3310. if (iwl3945_hw_set_hw_params(priv)) {
  3311. IWL_ERR(priv, "failed to set hw settings\n");
  3312. goto out_eeprom_free;
  3313. }
  3314. /***********************
  3315. * 6. Setup priv
  3316. * ********************/
  3317. err = iwl3945_init_drv(priv);
  3318. if (err) {
  3319. IWL_ERR(priv, "initializing driver failed\n");
  3320. goto out_unset_hw_params;
  3321. }
  3322. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3323. priv->cfg->name);
  3324. /***********************
  3325. * 7. Setup Services
  3326. * ********************/
  3327. spin_lock_irqsave(&priv->lock, flags);
  3328. iwl_disable_interrupts(priv);
  3329. spin_unlock_irqrestore(&priv->lock, flags);
  3330. pci_enable_msi(priv->pci_dev);
  3331. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3332. IRQF_SHARED, DRV_NAME, priv);
  3333. if (err) {
  3334. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3335. goto out_disable_msi;
  3336. }
  3337. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3338. if (err) {
  3339. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3340. goto out_release_irq;
  3341. }
  3342. iwl_set_rxon_channel(priv,
  3343. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3344. iwl3945_setup_deferred_work(priv);
  3345. iwl3945_setup_rx_handlers(priv);
  3346. iwl_power_initialize(priv);
  3347. /*********************************
  3348. * 8. Setup and Register mac80211
  3349. * *******************************/
  3350. iwl_enable_interrupts(priv);
  3351. err = iwl3945_setup_mac(priv);
  3352. if (err)
  3353. goto out_remove_sysfs;
  3354. err = iwl_dbgfs_register(priv, DRV_NAME);
  3355. if (err)
  3356. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3357. /* Start monitoring the killswitch */
  3358. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3359. 2 * HZ);
  3360. return 0;
  3361. out_remove_sysfs:
  3362. destroy_workqueue(priv->workqueue);
  3363. priv->workqueue = NULL;
  3364. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3365. out_release_irq:
  3366. free_irq(priv->pci_dev->irq, priv);
  3367. out_disable_msi:
  3368. pci_disable_msi(priv->pci_dev);
  3369. iwlcore_free_geos(priv);
  3370. iwl_free_channel_map(priv);
  3371. out_unset_hw_params:
  3372. iwl3945_unset_hw_params(priv);
  3373. out_eeprom_free:
  3374. iwl_eeprom_free(priv);
  3375. out_iounmap:
  3376. pci_iounmap(pdev, priv->hw_base);
  3377. out_pci_release_regions:
  3378. pci_release_regions(pdev);
  3379. out_pci_disable_device:
  3380. pci_set_drvdata(pdev, NULL);
  3381. pci_disable_device(pdev);
  3382. out_ieee80211_free_hw:
  3383. iwl_free_traffic_mem(priv);
  3384. ieee80211_free_hw(priv->hw);
  3385. out:
  3386. return err;
  3387. }
  3388. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3389. {
  3390. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3391. unsigned long flags;
  3392. if (!priv)
  3393. return;
  3394. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3395. iwl_dbgfs_unregister(priv);
  3396. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3397. if (priv->mac80211_registered) {
  3398. ieee80211_unregister_hw(priv->hw);
  3399. priv->mac80211_registered = 0;
  3400. } else {
  3401. iwl3945_down(priv);
  3402. }
  3403. /* make sure we flush any pending irq or
  3404. * tasklet for the driver
  3405. */
  3406. spin_lock_irqsave(&priv->lock, flags);
  3407. iwl_disable_interrupts(priv);
  3408. spin_unlock_irqrestore(&priv->lock, flags);
  3409. iwl_synchronize_irq(priv);
  3410. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3411. cancel_delayed_work_sync(&priv->rfkill_poll);
  3412. iwl3945_dealloc_ucode_pci(priv);
  3413. if (priv->rxq.bd)
  3414. iwl3945_rx_queue_free(priv, &priv->rxq);
  3415. iwl3945_hw_txq_ctx_free(priv);
  3416. iwl3945_unset_hw_params(priv);
  3417. iwl_clear_stations_table(priv);
  3418. /*netif_stop_queue(dev); */
  3419. flush_workqueue(priv->workqueue);
  3420. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3421. * priv->workqueue... so we can't take down the workqueue
  3422. * until now... */
  3423. destroy_workqueue(priv->workqueue);
  3424. priv->workqueue = NULL;
  3425. iwl_free_traffic_mem(priv);
  3426. free_irq(pdev->irq, priv);
  3427. pci_disable_msi(pdev);
  3428. pci_iounmap(pdev, priv->hw_base);
  3429. pci_release_regions(pdev);
  3430. pci_disable_device(pdev);
  3431. pci_set_drvdata(pdev, NULL);
  3432. iwl_free_channel_map(priv);
  3433. iwlcore_free_geos(priv);
  3434. kfree(priv->scan);
  3435. if (priv->ibss_beacon)
  3436. dev_kfree_skb(priv->ibss_beacon);
  3437. ieee80211_free_hw(priv->hw);
  3438. }
  3439. /*****************************************************************************
  3440. *
  3441. * driver and module entry point
  3442. *
  3443. *****************************************************************************/
  3444. static struct pci_driver iwl3945_driver = {
  3445. .name = DRV_NAME,
  3446. .id_table = iwl3945_hw_card_ids,
  3447. .probe = iwl3945_pci_probe,
  3448. .remove = __devexit_p(iwl3945_pci_remove),
  3449. #ifdef CONFIG_PM
  3450. .suspend = iwl_pci_suspend,
  3451. .resume = iwl_pci_resume,
  3452. #endif
  3453. };
  3454. static int __init iwl3945_init(void)
  3455. {
  3456. int ret;
  3457. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3458. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3459. ret = iwl3945_rate_control_register();
  3460. if (ret) {
  3461. printk(KERN_ERR DRV_NAME
  3462. "Unable to register rate control algorithm: %d\n", ret);
  3463. return ret;
  3464. }
  3465. ret = pci_register_driver(&iwl3945_driver);
  3466. if (ret) {
  3467. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3468. goto error_register;
  3469. }
  3470. return ret;
  3471. error_register:
  3472. iwl3945_rate_control_unregister();
  3473. return ret;
  3474. }
  3475. static void __exit iwl3945_exit(void)
  3476. {
  3477. pci_unregister_driver(&iwl3945_driver);
  3478. iwl3945_rate_control_unregister();
  3479. }
  3480. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3481. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3482. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3483. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3484. MODULE_PARM_DESC(swcrypto,
  3485. "using software crypto (default 1 [software])\n");
  3486. #ifdef CONFIG_IWLWIFI_DEBUG
  3487. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3488. MODULE_PARM_DESC(debug, "debug output mask");
  3489. #endif
  3490. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3491. int, S_IRUGO);
  3492. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3493. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3494. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3495. module_exit(iwl3945_exit);
  3496. module_init(iwl3945_init);