calib.c 12 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "hw.h"
  17. #include "hw-ops.h"
  18. #include <linux/export.h>
  19. /* Common calibration code */
  20. static int16_t ath9k_hw_get_nf_hist_mid(int16_t *nfCalBuffer)
  21. {
  22. int16_t nfval;
  23. int16_t sort[ATH9K_NF_CAL_HIST_MAX];
  24. int i, j;
  25. for (i = 0; i < ATH9K_NF_CAL_HIST_MAX; i++)
  26. sort[i] = nfCalBuffer[i];
  27. for (i = 0; i < ATH9K_NF_CAL_HIST_MAX - 1; i++) {
  28. for (j = 1; j < ATH9K_NF_CAL_HIST_MAX - i; j++) {
  29. if (sort[j] > sort[j - 1]) {
  30. nfval = sort[j];
  31. sort[j] = sort[j - 1];
  32. sort[j - 1] = nfval;
  33. }
  34. }
  35. }
  36. nfval = sort[(ATH9K_NF_CAL_HIST_MAX - 1) >> 1];
  37. return nfval;
  38. }
  39. static struct ath_nf_limits *ath9k_hw_get_nf_limits(struct ath_hw *ah,
  40. struct ath9k_channel *chan)
  41. {
  42. struct ath_nf_limits *limit;
  43. if (!chan || IS_CHAN_2GHZ(chan))
  44. limit = &ah->nf_2g;
  45. else
  46. limit = &ah->nf_5g;
  47. return limit;
  48. }
  49. static s16 ath9k_hw_get_default_nf(struct ath_hw *ah,
  50. struct ath9k_channel *chan)
  51. {
  52. return ath9k_hw_get_nf_limits(ah, chan)->nominal;
  53. }
  54. s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan)
  55. {
  56. s8 noise = ATH_DEFAULT_NOISE_FLOOR;
  57. if (chan && chan->noisefloor) {
  58. s8 delta = chan->noisefloor -
  59. ath9k_hw_get_default_nf(ah, chan);
  60. if (delta > 0)
  61. noise += delta;
  62. }
  63. return noise;
  64. }
  65. EXPORT_SYMBOL(ath9k_hw_getchan_noise);
  66. static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah,
  67. struct ath9k_hw_cal_data *cal,
  68. int16_t *nfarray)
  69. {
  70. struct ath_common *common = ath9k_hw_common(ah);
  71. struct ath_nf_limits *limit;
  72. struct ath9k_nfcal_hist *h;
  73. bool high_nf_mid = false;
  74. u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
  75. int i;
  76. h = cal->nfCalHist;
  77. limit = ath9k_hw_get_nf_limits(ah, ah->curchan);
  78. for (i = 0; i < NUM_NF_READINGS; i++) {
  79. if (!(chainmask & (1 << i)) ||
  80. ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(ah->curchan)))
  81. continue;
  82. h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
  83. if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX)
  84. h[i].currIndex = 0;
  85. if (h[i].invalidNFcount > 0) {
  86. h[i].invalidNFcount--;
  87. h[i].privNF = nfarray[i];
  88. } else {
  89. h[i].privNF =
  90. ath9k_hw_get_nf_hist_mid(h[i].nfCalBuffer);
  91. }
  92. if (!h[i].privNF)
  93. continue;
  94. if (h[i].privNF > limit->max) {
  95. high_nf_mid = true;
  96. ath_dbg(common, CALIBRATE,
  97. "NFmid[%d] (%d) > MAX (%d), %s\n",
  98. i, h[i].privNF, limit->max,
  99. (cal->nfcal_interference ?
  100. "not corrected (due to interference)" :
  101. "correcting to MAX"));
  102. /*
  103. * Normally we limit the average noise floor by the
  104. * hardware specific maximum here. However if we have
  105. * encountered stuck beacons because of interference,
  106. * we bypass this limit here in order to better deal
  107. * with our environment.
  108. */
  109. if (!cal->nfcal_interference)
  110. h[i].privNF = limit->max;
  111. }
  112. }
  113. /*
  114. * If the noise floor seems normal for all chains, assume that
  115. * there is no significant interference in the environment anymore.
  116. * Re-enable the enforcement of the NF maximum again.
  117. */
  118. if (!high_nf_mid)
  119. cal->nfcal_interference = false;
  120. }
  121. static bool ath9k_hw_get_nf_thresh(struct ath_hw *ah,
  122. enum ieee80211_band band,
  123. int16_t *nft)
  124. {
  125. switch (band) {
  126. case IEEE80211_BAND_5GHZ:
  127. *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_5);
  128. break;
  129. case IEEE80211_BAND_2GHZ:
  130. *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_2);
  131. break;
  132. default:
  133. BUG_ON(1);
  134. return false;
  135. }
  136. return true;
  137. }
  138. void ath9k_hw_reset_calibration(struct ath_hw *ah,
  139. struct ath9k_cal_list *currCal)
  140. {
  141. int i;
  142. ath9k_hw_setup_calibration(ah, currCal);
  143. currCal->calState = CAL_RUNNING;
  144. for (i = 0; i < AR5416_MAX_CHAINS; i++) {
  145. ah->meas0.sign[i] = 0;
  146. ah->meas1.sign[i] = 0;
  147. ah->meas2.sign[i] = 0;
  148. ah->meas3.sign[i] = 0;
  149. }
  150. ah->cal_samples = 0;
  151. }
  152. /* This is done for the currently configured channel */
  153. bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
  154. {
  155. struct ath_common *common = ath9k_hw_common(ah);
  156. struct ieee80211_conf *conf = &common->hw->conf;
  157. struct ath9k_cal_list *currCal = ah->cal_list_curr;
  158. if (!ah->caldata)
  159. return true;
  160. if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah))
  161. return true;
  162. if (currCal == NULL)
  163. return true;
  164. if (currCal->calState != CAL_DONE) {
  165. ath_dbg(common, CALIBRATE, "Calibration state incorrect, %d\n",
  166. currCal->calState);
  167. return true;
  168. }
  169. if (!(ah->supp_cals & currCal->calData->calType))
  170. return true;
  171. ath_dbg(common, CALIBRATE, "Resetting Cal %d state for channel %u\n",
  172. currCal->calData->calType, conf->channel->center_freq);
  173. ah->caldata->CalValid &= ~currCal->calData->calType;
  174. currCal->calState = CAL_WAITING;
  175. return false;
  176. }
  177. EXPORT_SYMBOL(ath9k_hw_reset_calvalid);
  178. void ath9k_hw_start_nfcal(struct ath_hw *ah, bool update)
  179. {
  180. if (ah->caldata)
  181. ah->caldata->nfcal_pending = true;
  182. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
  183. AR_PHY_AGC_CONTROL_ENABLE_NF);
  184. if (update)
  185. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  186. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  187. else
  188. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
  189. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  190. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
  191. }
  192. void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
  193. {
  194. struct ath9k_nfcal_hist *h = NULL;
  195. unsigned i, j;
  196. int32_t val;
  197. u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
  198. struct ath_common *common = ath9k_hw_common(ah);
  199. struct ieee80211_conf *conf = &common->hw->conf;
  200. s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
  201. if (ah->caldata)
  202. h = ah->caldata->nfCalHist;
  203. for (i = 0; i < NUM_NF_READINGS; i++) {
  204. if (chainmask & (1 << i)) {
  205. s16 nfval;
  206. if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
  207. continue;
  208. if (h)
  209. nfval = h[i].privNF;
  210. else
  211. nfval = default_nf;
  212. val = REG_READ(ah, ah->nf_regs[i]);
  213. val &= 0xFFFFFE00;
  214. val |= (((u32) nfval << 1) & 0x1ff);
  215. REG_WRITE(ah, ah->nf_regs[i], val);
  216. }
  217. }
  218. /*
  219. * Load software filtered NF value into baseband internal minCCApwr
  220. * variable.
  221. */
  222. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  223. AR_PHY_AGC_CONTROL_ENABLE_NF);
  224. REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
  225. AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
  226. REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
  227. /*
  228. * Wait for load to complete, should be fast, a few 10s of us.
  229. * The max delay was changed from an original 250us to 10000us
  230. * since 250us often results in NF load timeout and causes deaf
  231. * condition during stress testing 12/12/2009
  232. */
  233. for (j = 0; j < 10000; j++) {
  234. if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
  235. AR_PHY_AGC_CONTROL_NF) == 0)
  236. break;
  237. udelay(10);
  238. }
  239. /*
  240. * We timed out waiting for the noisefloor to load, probably due to an
  241. * in-progress rx. Simply return here and allow the load plenty of time
  242. * to complete before the next calibration interval. We need to avoid
  243. * trying to load -50 (which happens below) while the previous load is
  244. * still in progress as this can cause rx deafness. Instead by returning
  245. * here, the baseband nf cal will just be capped by our present
  246. * noisefloor until the next calibration timer.
  247. */
  248. if (j == 10000) {
  249. ath_dbg(common, ANY,
  250. "Timeout while waiting for nf to load: AR_PHY_AGC_CONTROL=0x%x\n",
  251. REG_READ(ah, AR_PHY_AGC_CONTROL));
  252. return;
  253. }
  254. /*
  255. * Restore maxCCAPower register parameter again so that we're not capped
  256. * by the median we just loaded. This will be initial (and max) value
  257. * of next noise floor calibration the baseband does.
  258. */
  259. ENABLE_REGWRITE_BUFFER(ah);
  260. for (i = 0; i < NUM_NF_READINGS; i++) {
  261. if (chainmask & (1 << i)) {
  262. if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
  263. continue;
  264. val = REG_READ(ah, ah->nf_regs[i]);
  265. val &= 0xFFFFFE00;
  266. val |= (((u32) (-50) << 1) & 0x1ff);
  267. REG_WRITE(ah, ah->nf_regs[i], val);
  268. }
  269. }
  270. REGWRITE_BUFFER_FLUSH(ah);
  271. }
  272. static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
  273. {
  274. struct ath_common *common = ath9k_hw_common(ah);
  275. struct ath_nf_limits *limit;
  276. int i;
  277. if (IS_CHAN_2GHZ(ah->curchan))
  278. limit = &ah->nf_2g;
  279. else
  280. limit = &ah->nf_5g;
  281. for (i = 0; i < NUM_NF_READINGS; i++) {
  282. if (!nf[i])
  283. continue;
  284. ath_dbg(common, CALIBRATE,
  285. "NF calibrated [%s] [chain %d] is %d\n",
  286. (i >= 3 ? "ext" : "ctl"), i % 3, nf[i]);
  287. if (nf[i] > limit->max) {
  288. ath_dbg(common, CALIBRATE,
  289. "NF[%d] (%d) > MAX (%d), correcting to MAX\n",
  290. i, nf[i], limit->max);
  291. nf[i] = limit->max;
  292. } else if (nf[i] < limit->min) {
  293. ath_dbg(common, CALIBRATE,
  294. "NF[%d] (%d) < MIN (%d), correcting to NOM\n",
  295. i, nf[i], limit->min);
  296. nf[i] = limit->nominal;
  297. }
  298. }
  299. }
  300. bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
  301. {
  302. struct ath_common *common = ath9k_hw_common(ah);
  303. int16_t nf, nfThresh;
  304. int16_t nfarray[NUM_NF_READINGS] = { 0 };
  305. struct ath9k_nfcal_hist *h;
  306. struct ieee80211_channel *c = chan->chan;
  307. struct ath9k_hw_cal_data *caldata = ah->caldata;
  308. chan->channelFlags &= (~CHANNEL_CW_INT);
  309. if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
  310. ath_dbg(common, CALIBRATE,
  311. "NF did not complete in calibration window\n");
  312. return false;
  313. }
  314. ath9k_hw_do_getnf(ah, nfarray);
  315. ath9k_hw_nf_sanitize(ah, nfarray);
  316. nf = nfarray[0];
  317. if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
  318. && nf > nfThresh) {
  319. ath_dbg(common, CALIBRATE,
  320. "noise floor failed detected; detected %d, threshold %d\n",
  321. nf, nfThresh);
  322. chan->channelFlags |= CHANNEL_CW_INT;
  323. }
  324. if (!caldata) {
  325. chan->noisefloor = nf;
  326. ah->noise = ath9k_hw_getchan_noise(ah, chan);
  327. return false;
  328. }
  329. h = caldata->nfCalHist;
  330. caldata->nfcal_pending = false;
  331. ath9k_hw_update_nfcal_hist_buffer(ah, caldata, nfarray);
  332. chan->noisefloor = h[0].privNF;
  333. ah->noise = ath9k_hw_getchan_noise(ah, chan);
  334. return true;
  335. }
  336. EXPORT_SYMBOL(ath9k_hw_getnf);
  337. void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah,
  338. struct ath9k_channel *chan)
  339. {
  340. struct ath9k_nfcal_hist *h;
  341. s16 default_nf;
  342. int i, j;
  343. ah->caldata->channel = chan->channel;
  344. ah->caldata->channelFlags = chan->channelFlags & ~CHANNEL_CW_INT;
  345. h = ah->caldata->nfCalHist;
  346. default_nf = ath9k_hw_get_default_nf(ah, chan);
  347. for (i = 0; i < NUM_NF_READINGS; i++) {
  348. h[i].currIndex = 0;
  349. h[i].privNF = default_nf;
  350. h[i].invalidNFcount = AR_PHY_CCA_FILTERWINDOW_LENGTH;
  351. for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
  352. h[i].nfCalBuffer[j] = default_nf;
  353. }
  354. }
  355. }
  356. void ath9k_hw_bstuck_nfcal(struct ath_hw *ah)
  357. {
  358. struct ath9k_hw_cal_data *caldata = ah->caldata;
  359. if (unlikely(!caldata))
  360. return;
  361. /*
  362. * If beacons are stuck, the most likely cause is interference.
  363. * Triggering a noise floor calibration at this point helps the
  364. * hardware adapt to a noisy environment much faster.
  365. * To ensure that we recover from stuck beacons quickly, let
  366. * the baseband update the internal NF value itself, similar to
  367. * what is being done after a full reset.
  368. */
  369. if (!caldata->nfcal_pending)
  370. ath9k_hw_start_nfcal(ah, true);
  371. else if (!(REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF))
  372. ath9k_hw_getnf(ah, ah->curchan);
  373. caldata->nfcal_interference = true;
  374. }
  375. EXPORT_SYMBOL(ath9k_hw_bstuck_nfcal);