lgdt330x.c 21 KB

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  1. /*
  2. * Support for LGDT3302 and LGDT3303 - VSB/QAM
  3. *
  4. * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. /*
  22. * NOTES ABOUT THIS DRIVER
  23. *
  24. * This Linux driver supports:
  25. * DViCO FusionHDTV 3 Gold-Q
  26. * DViCO FusionHDTV 3 Gold-T
  27. * DViCO FusionHDTV 5 Gold
  28. *
  29. * TODO:
  30. * signal strength always returns 0.
  31. *
  32. */
  33. #include <linux/kernel.h>
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/init.h>
  37. #include <linux/delay.h>
  38. #include <linux/string.h>
  39. #include <linux/slab.h>
  40. #include <asm/byteorder.h>
  41. #include "dvb_frontend.h"
  42. #include "lgdt330x_priv.h"
  43. #include "lgdt330x.h"
  44. static int debug = 0;
  45. module_param(debug, int, 0644);
  46. MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
  47. #define dprintk(args...) \
  48. do { \
  49. if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
  50. } while (0)
  51. struct lgdt330x_state
  52. {
  53. struct i2c_adapter* i2c;
  54. struct dvb_frontend_ops ops;
  55. /* Configuration settings */
  56. const struct lgdt330x_config* config;
  57. struct dvb_frontend frontend;
  58. /* Demodulator private data */
  59. fe_modulation_t current_modulation;
  60. /* Tuner private data */
  61. u32 current_frequency;
  62. };
  63. static int i2c_write_demod_bytes (struct lgdt330x_state* state,
  64. u8 *buf, /* data bytes to send */
  65. int len /* number of bytes to send */ )
  66. {
  67. struct i2c_msg msg =
  68. { .addr = state->config->demod_address,
  69. .flags = 0,
  70. .buf = buf,
  71. .len = 2 };
  72. int i;
  73. int err;
  74. for (i=0; i<len-1; i+=2){
  75. if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  76. printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
  77. if (err < 0)
  78. return err;
  79. else
  80. return -EREMOTEIO;
  81. }
  82. msg.buf += 2;
  83. }
  84. return 0;
  85. }
  86. /*
  87. * This routine writes the register (reg) to the demod bus
  88. * then reads the data returned for (len) bytes.
  89. */
  90. static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
  91. enum I2C_REG reg, u8* buf, int len)
  92. {
  93. u8 wr [] = { reg };
  94. struct i2c_msg msg [] = {
  95. { .addr = state->config->demod_address,
  96. .flags = 0, .buf = wr, .len = 1 },
  97. { .addr = state->config->demod_address,
  98. .flags = I2C_M_RD, .buf = buf, .len = len },
  99. };
  100. int ret;
  101. ret = i2c_transfer(state->i2c, msg, 2);
  102. if (ret != 2) {
  103. printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret);
  104. } else {
  105. ret = 0;
  106. }
  107. return ret;
  108. }
  109. /* Software reset */
  110. static int lgdt3302_SwReset(struct lgdt330x_state* state)
  111. {
  112. u8 ret;
  113. u8 reset[] = {
  114. IRQ_MASK,
  115. 0x00 /* bit 6 is active low software reset
  116. * bits 5-0 are 1 to mask interrupts */
  117. };
  118. ret = i2c_write_demod_bytes(state,
  119. reset, sizeof(reset));
  120. if (ret == 0) {
  121. /* force reset high (inactive) and unmask interrupts */
  122. reset[1] = 0x7f;
  123. ret = i2c_write_demod_bytes(state,
  124. reset, sizeof(reset));
  125. }
  126. return ret;
  127. }
  128. static int lgdt3303_SwReset(struct lgdt330x_state* state)
  129. {
  130. u8 ret;
  131. u8 reset[] = {
  132. 0x02,
  133. 0x00 /* bit 0 is active low software reset */
  134. };
  135. ret = i2c_write_demod_bytes(state,
  136. reset, sizeof(reset));
  137. if (ret == 0) {
  138. /* force reset high (inactive) */
  139. reset[1] = 0x01;
  140. ret = i2c_write_demod_bytes(state,
  141. reset, sizeof(reset));
  142. }
  143. return ret;
  144. }
  145. static int lgdt330x_SwReset(struct lgdt330x_state* state)
  146. {
  147. switch (state->config->demod_chip) {
  148. case LGDT3302:
  149. return lgdt3302_SwReset(state);
  150. case LGDT3303:
  151. return lgdt3303_SwReset(state);
  152. default:
  153. return -ENODEV;
  154. }
  155. }
  156. static int lgdt330x_init(struct dvb_frontend* fe)
  157. {
  158. /* Hardware reset is done using gpio[0] of cx23880x chip.
  159. * I'd like to do it here, but don't know how to find chip address.
  160. * cx88-cards.c arranges for the reset bit to be inactive (high).
  161. * Maybe there needs to be a callable function in cx88-core or
  162. * the caller of this function needs to do it. */
  163. /*
  164. * Array of byte pairs <address, value>
  165. * to initialize each different chip
  166. */
  167. static u8 lgdt3302_init_data[] = {
  168. /* Use 50MHz parameter values from spec sheet since xtal is 50 */
  169. /* Change the value of NCOCTFV[25:0] of carrier
  170. recovery center frequency register */
  171. VSB_CARRIER_FREQ0, 0x00,
  172. VSB_CARRIER_FREQ1, 0x87,
  173. VSB_CARRIER_FREQ2, 0x8e,
  174. VSB_CARRIER_FREQ3, 0x01,
  175. /* Change the TPCLK pin polarity
  176. data is valid on falling clock */
  177. DEMUX_CONTROL, 0xfb,
  178. /* Change the value of IFBW[11:0] of
  179. AGC IF/RF loop filter bandwidth register */
  180. AGC_RF_BANDWIDTH0, 0x40,
  181. AGC_RF_BANDWIDTH1, 0x93,
  182. AGC_RF_BANDWIDTH2, 0x00,
  183. /* Change the value of bit 6, 'nINAGCBY' and
  184. 'NSSEL[1:0] of ACG function control register 2 */
  185. AGC_FUNC_CTRL2, 0xc6,
  186. /* Change the value of bit 6 'RFFIX'
  187. of AGC function control register 3 */
  188. AGC_FUNC_CTRL3, 0x40,
  189. /* Set the value of 'INLVTHD' register 0x2a/0x2c
  190. to 0x7fe */
  191. AGC_DELAY0, 0x07,
  192. AGC_DELAY2, 0xfe,
  193. /* Change the value of IAGCBW[15:8]
  194. of inner AGC loop filter bandwith */
  195. AGC_LOOP_BANDWIDTH0, 0x08,
  196. AGC_LOOP_BANDWIDTH1, 0x9a
  197. };
  198. static u8 lgdt3303_init_data[] = {
  199. 0x4c, 0x14
  200. };
  201. struct lgdt330x_state* state = fe->demodulator_priv;
  202. char *chip_name;
  203. int err;
  204. switch (state->config->demod_chip) {
  205. case LGDT3302:
  206. chip_name = "LGDT3302";
  207. err = i2c_write_demod_bytes(state, lgdt3302_init_data,
  208. sizeof(lgdt3302_init_data));
  209. break;
  210. case LGDT3303:
  211. chip_name = "LGDT3303";
  212. err = i2c_write_demod_bytes(state, lgdt3303_init_data,
  213. sizeof(lgdt3303_init_data));
  214. break;
  215. default:
  216. chip_name = "undefined";
  217. printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
  218. err = -ENODEV;
  219. }
  220. dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
  221. if (err < 0)
  222. return err;
  223. return lgdt330x_SwReset(state);
  224. }
  225. static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
  226. {
  227. *ber = 0; /* Not supplied by the demod chips */
  228. return 0;
  229. }
  230. static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  231. {
  232. struct lgdt330x_state* state = fe->demodulator_priv;
  233. int err;
  234. u8 buf[2];
  235. switch (state->config->demod_chip) {
  236. case LGDT3302:
  237. err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
  238. buf, sizeof(buf));
  239. break;
  240. case LGDT3303:
  241. err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
  242. buf, sizeof(buf));
  243. break;
  244. default:
  245. printk(KERN_WARNING
  246. "Only LGDT3302 and LGDT3303 are supported chips.\n");
  247. err = -ENODEV;
  248. }
  249. *ucblocks = (buf[0] << 8) | buf[1];
  250. return 0;
  251. }
  252. static int lgdt330x_set_parameters(struct dvb_frontend* fe,
  253. struct dvb_frontend_parameters *param)
  254. {
  255. /*
  256. * Array of byte pairs <address, value>
  257. * to initialize 8VSB for lgdt3303 chip 50 MHz IF
  258. */
  259. static u8 lgdt3303_8vsb_44_data[] = {
  260. 0x04, 0x00,
  261. 0x0d, 0x40,
  262. 0x0e, 0x87,
  263. 0x0f, 0x8e,
  264. 0x10, 0x01,
  265. 0x47, 0x8b };
  266. /*
  267. * Array of byte pairs <address, value>
  268. * to initialize QAM for lgdt3303 chip
  269. */
  270. static u8 lgdt3303_qam_data[] = {
  271. 0x04, 0x00,
  272. 0x0d, 0x00,
  273. 0x0e, 0x00,
  274. 0x0f, 0x00,
  275. 0x10, 0x00,
  276. 0x51, 0x63,
  277. 0x47, 0x66,
  278. 0x48, 0x66,
  279. 0x4d, 0x1a,
  280. 0x49, 0x08,
  281. 0x4a, 0x9b };
  282. struct lgdt330x_state* state = fe->demodulator_priv;
  283. static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
  284. int err;
  285. /* Change only if we are actually changing the modulation */
  286. if (state->current_modulation != param->u.vsb.modulation) {
  287. switch(param->u.vsb.modulation) {
  288. case VSB_8:
  289. dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
  290. /* Select VSB mode */
  291. top_ctrl_cfg[1] = 0x03;
  292. /* Select ANT connector if supported by card */
  293. if (state->config->pll_rf_set)
  294. state->config->pll_rf_set(fe, 1);
  295. if (state->config->demod_chip == LGDT3303) {
  296. err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
  297. sizeof(lgdt3303_8vsb_44_data));
  298. }
  299. break;
  300. case QAM_64:
  301. dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
  302. /* Select QAM_64 mode */
  303. top_ctrl_cfg[1] = 0x00;
  304. /* Select CABLE connector if supported by card */
  305. if (state->config->pll_rf_set)
  306. state->config->pll_rf_set(fe, 0);
  307. if (state->config->demod_chip == LGDT3303) {
  308. err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
  309. sizeof(lgdt3303_qam_data));
  310. }
  311. break;
  312. case QAM_256:
  313. dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
  314. /* Select QAM_256 mode */
  315. top_ctrl_cfg[1] = 0x01;
  316. /* Select CABLE connector if supported by card */
  317. if (state->config->pll_rf_set)
  318. state->config->pll_rf_set(fe, 0);
  319. if (state->config->demod_chip == LGDT3303) {
  320. err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
  321. sizeof(lgdt3303_qam_data));
  322. }
  323. break;
  324. default:
  325. printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
  326. return -1;
  327. }
  328. /*
  329. * select serial or parallel MPEG harware interface
  330. * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
  331. * Parallel: 0x00
  332. */
  333. top_ctrl_cfg[1] |= state->config->serial_mpeg;
  334. /* Select the requested mode */
  335. i2c_write_demod_bytes(state, top_ctrl_cfg,
  336. sizeof(top_ctrl_cfg));
  337. if (state->config->set_ts_params)
  338. state->config->set_ts_params(fe, 0);
  339. state->current_modulation = param->u.vsb.modulation;
  340. }
  341. /* Tune to the specified frequency */
  342. if (state->config->pll_set)
  343. state->config->pll_set(fe, param);
  344. /* Keep track of the new frequency */
  345. state->current_frequency = param->frequency;
  346. lgdt330x_SwReset(state);
  347. return 0;
  348. }
  349. static int lgdt330x_get_frontend(struct dvb_frontend* fe,
  350. struct dvb_frontend_parameters* param)
  351. {
  352. struct lgdt330x_state *state = fe->demodulator_priv;
  353. param->frequency = state->current_frequency;
  354. return 0;
  355. }
  356. static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
  357. {
  358. struct lgdt330x_state* state = fe->demodulator_priv;
  359. u8 buf[3];
  360. *status = 0; /* Reset status result */
  361. /* AGC status register */
  362. i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
  363. dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
  364. if ((buf[0] & 0x0c) == 0x8){
  365. /* Test signal does not exist flag */
  366. /* as well as the AGC lock flag. */
  367. *status |= FE_HAS_SIGNAL;
  368. } else {
  369. /* Without a signal all other status bits are meaningless */
  370. return 0;
  371. }
  372. /*
  373. * You must set the Mask bits to 1 in the IRQ_MASK in order
  374. * to see that status bit in the IRQ_STATUS register.
  375. * This is done in SwReset();
  376. */
  377. /* signal status */
  378. i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
  379. dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
  380. /* sync status */
  381. if ((buf[2] & 0x03) == 0x01) {
  382. *status |= FE_HAS_SYNC;
  383. }
  384. /* FEC error status */
  385. if ((buf[2] & 0x0c) == 0x08) {
  386. *status |= FE_HAS_LOCK;
  387. *status |= FE_HAS_VITERBI;
  388. }
  389. /* Carrier Recovery Lock Status Register */
  390. i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
  391. dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
  392. switch (state->current_modulation) {
  393. case QAM_256:
  394. case QAM_64:
  395. /* Need to undestand why there are 3 lock levels here */
  396. if ((buf[0] & 0x07) == 0x07)
  397. *status |= FE_HAS_CARRIER;
  398. break;
  399. case VSB_8:
  400. if ((buf[0] & 0x80) == 0x80)
  401. *status |= FE_HAS_CARRIER;
  402. break;
  403. default:
  404. printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
  405. }
  406. return 0;
  407. }
  408. static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
  409. {
  410. struct lgdt330x_state* state = fe->demodulator_priv;
  411. int err;
  412. u8 buf[3];
  413. *status = 0; /* Reset status result */
  414. /* lgdt3303 AGC status register */
  415. err = i2c_read_demod_bytes(state, 0x58, buf, 1);
  416. if (err < 0)
  417. return err;
  418. dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
  419. if ((buf[0] & 0x21) == 0x01){
  420. /* Test input signal does not exist flag */
  421. /* as well as the AGC lock flag. */
  422. *status |= FE_HAS_SIGNAL;
  423. } else {
  424. /* Without a signal all other status bits are meaningless */
  425. return 0;
  426. }
  427. /* Carrier Recovery Lock Status Register */
  428. i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
  429. dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
  430. switch (state->current_modulation) {
  431. case QAM_256:
  432. case QAM_64:
  433. /* Need to undestand why there are 3 lock levels here */
  434. if ((buf[0] & 0x07) == 0x07)
  435. *status |= FE_HAS_CARRIER;
  436. else
  437. break;
  438. i2c_read_demod_bytes(state, 0x8a, buf, 1);
  439. if ((buf[0] & 0x04) == 0x04)
  440. *status |= FE_HAS_SYNC;
  441. if ((buf[0] & 0x01) == 0x01)
  442. *status |= FE_HAS_LOCK;
  443. if ((buf[0] & 0x08) == 0x08)
  444. *status |= FE_HAS_VITERBI;
  445. break;
  446. case VSB_8:
  447. if ((buf[0] & 0x80) == 0x80)
  448. *status |= FE_HAS_CARRIER;
  449. else
  450. break;
  451. i2c_read_demod_bytes(state, 0x38, buf, 1);
  452. if ((buf[0] & 0x02) == 0x00)
  453. *status |= FE_HAS_SYNC;
  454. if ((buf[0] & 0x01) == 0x01) {
  455. *status |= FE_HAS_LOCK;
  456. *status |= FE_HAS_VITERBI;
  457. }
  458. break;
  459. default:
  460. printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
  461. }
  462. return 0;
  463. }
  464. static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
  465. {
  466. /* not directly available. */
  467. *strength = 0;
  468. return 0;
  469. }
  470. static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
  471. {
  472. #ifdef SNR_IN_DB
  473. /*
  474. * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise)
  475. * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker
  476. * respectively. The following tables are built on these formulas.
  477. * The usual definition is SNR = 20 log10(signal/noise)
  478. * If the specification is wrong the value retuned is 1/2 the actual SNR in db.
  479. *
  480. * This table is a an ordered list of noise values computed by the
  481. * formula from the spec sheet such that the index into the table
  482. * starting at 43 or 45 is the SNR value in db. There are duplicate noise
  483. * value entries at the beginning because the SNR varies more than
  484. * 1 db for a change of 1 digit in noise at very small values of noise.
  485. *
  486. * Examples from SNR_EQ table:
  487. * noise SNR
  488. * 0 43
  489. * 1 42
  490. * 2 39
  491. * 3 37
  492. * 4 36
  493. * 5 35
  494. * 6 34
  495. * 7 33
  496. * 8 33
  497. * 9 32
  498. * 10 32
  499. * 11 31
  500. * 12 31
  501. * 13 30
  502. */
  503. static const u32 SNR_EQ[] =
  504. { 1, 2, 2, 2, 3, 3, 4, 4, 5, 7,
  505. 9, 11, 13, 17, 21, 26, 33, 41, 52, 65,
  506. 81, 102, 129, 162, 204, 257, 323, 406, 511, 644,
  507. 810, 1020, 1284, 1616, 2035, 2561, 3224, 4059, 5110, 6433,
  508. 8098, 10195, 12835, 16158, 20341, 25608, 32238, 40585, 51094, 64323,
  509. 80978, 101945, 128341, 161571, 203406, 256073, 0x40000
  510. };
  511. static const u32 SNR_PH[] =
  512. { 1, 2, 2, 2, 3, 3, 4, 5, 6, 8,
  513. 10, 12, 15, 19, 23, 29, 37, 46, 58, 73,
  514. 91, 115, 144, 182, 229, 288, 362, 456, 574, 722,
  515. 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216,
  516. 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151,
  517. 90833, 114351, 143960, 181235, 228161, 0x080000
  518. };
  519. static u8 buf[5];/* read data buffer */
  520. static u32 noise; /* noise value */
  521. static u32 snr_db; /* index into SNR_EQ[] */
  522. struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
  523. /* read both equalizer and phase tracker noise data */
  524. i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
  525. if (state->current_modulation == VSB_8) {
  526. /* Equalizer Mean-Square Error Register for VSB */
  527. noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
  528. /*
  529. * Look up noise value in table.
  530. * A better search algorithm could be used...
  531. * watch out there are duplicate entries.
  532. */
  533. for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) {
  534. if (noise < SNR_EQ[snr_db]) {
  535. *snr = 43 - snr_db;
  536. break;
  537. }
  538. }
  539. } else {
  540. /* Phase Tracker Mean-Square Error Register for QAM */
  541. noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
  542. /* Look up noise value in table. */
  543. for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) {
  544. if (noise < SNR_PH[snr_db]) {
  545. *snr = 45 - snr_db;
  546. break;
  547. }
  548. }
  549. }
  550. #else
  551. /* Return the raw noise value */
  552. static u8 buf[5];/* read data buffer */
  553. static u32 noise; /* noise value */
  554. struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
  555. /* read both equalizer and pase tracker noise data */
  556. i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
  557. if (state->current_modulation == VSB_8) {
  558. /* Phase Tracker Mean-Square Error Register for VSB */
  559. noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
  560. } else {
  561. /* Carrier Recovery Mean-Square Error for QAM */
  562. i2c_read_demod_bytes(state, 0x1a, buf, 2);
  563. noise = ((buf[0] & 3) << 8) | buf[1];
  564. }
  565. /* Small values for noise mean signal is better so invert noise */
  566. *snr = ~noise;
  567. #endif
  568. dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
  569. return 0;
  570. }
  571. static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
  572. {
  573. /* Return the raw noise value */
  574. static u8 buf[5];/* read data buffer */
  575. static u32 noise; /* noise value */
  576. struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
  577. if (state->current_modulation == VSB_8) {
  578. /* Phase Tracker Mean-Square Error Register for VSB */
  579. noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
  580. } else {
  581. /* Carrier Recovery Mean-Square Error for QAM */
  582. i2c_read_demod_bytes(state, 0x1a, buf, 2);
  583. noise = (buf[0] << 8) | buf[1];
  584. }
  585. /* Small values for noise mean signal is better so invert noise */
  586. *snr = ~noise;
  587. dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
  588. return 0;
  589. }
  590. static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
  591. {
  592. /* I have no idea about this - it may not be needed */
  593. fe_tune_settings->min_delay_ms = 500;
  594. fe_tune_settings->step_size = 0;
  595. fe_tune_settings->max_drift = 0;
  596. return 0;
  597. }
  598. static void lgdt330x_release(struct dvb_frontend* fe)
  599. {
  600. struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
  601. kfree(state);
  602. }
  603. static struct dvb_frontend_ops lgdt3302_ops;
  604. static struct dvb_frontend_ops lgdt3303_ops;
  605. struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
  606. struct i2c_adapter* i2c)
  607. {
  608. struct lgdt330x_state* state = NULL;
  609. u8 buf[1];
  610. /* Allocate memory for the internal state */
  611. state = (struct lgdt330x_state*) kmalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
  612. if (state == NULL)
  613. goto error;
  614. memset(state,0,sizeof(*state));
  615. /* Setup the state */
  616. state->config = config;
  617. state->i2c = i2c;
  618. switch (config->demod_chip) {
  619. case LGDT3302:
  620. memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
  621. break;
  622. case LGDT3303:
  623. memcpy(&state->ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
  624. break;
  625. default:
  626. goto error;
  627. }
  628. /* Verify communication with demod chip */
  629. if (i2c_read_demod_bytes(state, 2, buf, 1))
  630. goto error;
  631. state->current_frequency = -1;
  632. state->current_modulation = -1;
  633. /* Create dvb_frontend */
  634. state->frontend.ops = &state->ops;
  635. state->frontend.demodulator_priv = state;
  636. return &state->frontend;
  637. error:
  638. kfree(state);
  639. dprintk("%s: ERROR\n",__FUNCTION__);
  640. return NULL;
  641. }
  642. static struct dvb_frontend_ops lgdt3302_ops = {
  643. .info = {
  644. .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
  645. .type = FE_ATSC,
  646. .frequency_min= 54000000,
  647. .frequency_max= 858000000,
  648. .frequency_stepsize= 62500,
  649. /* Symbol rate is for all VSB modes need to check QAM */
  650. .symbol_rate_min = 10762000,
  651. .symbol_rate_max = 10762000,
  652. .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
  653. },
  654. .init = lgdt330x_init,
  655. .set_frontend = lgdt330x_set_parameters,
  656. .get_frontend = lgdt330x_get_frontend,
  657. .get_tune_settings = lgdt330x_get_tune_settings,
  658. .read_status = lgdt3302_read_status,
  659. .read_ber = lgdt330x_read_ber,
  660. .read_signal_strength = lgdt330x_read_signal_strength,
  661. .read_snr = lgdt3302_read_snr,
  662. .read_ucblocks = lgdt330x_read_ucblocks,
  663. .release = lgdt330x_release,
  664. };
  665. static struct dvb_frontend_ops lgdt3303_ops = {
  666. .info = {
  667. .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
  668. .type = FE_ATSC,
  669. .frequency_min= 54000000,
  670. .frequency_max= 858000000,
  671. .frequency_stepsize= 62500,
  672. /* Symbol rate is for all VSB modes need to check QAM */
  673. .symbol_rate_min = 10762000,
  674. .symbol_rate_max = 10762000,
  675. .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
  676. },
  677. .init = lgdt330x_init,
  678. .set_frontend = lgdt330x_set_parameters,
  679. .get_frontend = lgdt330x_get_frontend,
  680. .get_tune_settings = lgdt330x_get_tune_settings,
  681. .read_status = lgdt3303_read_status,
  682. .read_ber = lgdt330x_read_ber,
  683. .read_signal_strength = lgdt330x_read_signal_strength,
  684. .read_snr = lgdt3303_read_snr,
  685. .read_ucblocks = lgdt330x_read_ucblocks,
  686. .release = lgdt330x_release,
  687. };
  688. MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
  689. MODULE_AUTHOR("Wilson Michaels");
  690. MODULE_LICENSE("GPL");
  691. EXPORT_SYMBOL(lgdt330x_attach);
  692. /*
  693. * Local variables:
  694. * c-basic-offset: 8
  695. * End:
  696. */