coda.c 87 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293
  1. /*
  2. * Coda multi-standard codec IP
  3. *
  4. * Copyright (C) 2012 Vista Silicon S.L.
  5. * Javier Martin, <javier.martin@vista-silicon.com>
  6. * Xavier Duret
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/firmware.h>
  16. #include <linux/genalloc.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/irq.h>
  20. #include <linux/kfifo.h>
  21. #include <linux/module.h>
  22. #include <linux/of_device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/slab.h>
  25. #include <linux/videodev2.h>
  26. #include <linux/of.h>
  27. #include <linux/platform_data/coda.h>
  28. #include <media/v4l2-ctrls.h>
  29. #include <media/v4l2-device.h>
  30. #include <media/v4l2-event.h>
  31. #include <media/v4l2-ioctl.h>
  32. #include <media/v4l2-mem2mem.h>
  33. #include <media/videobuf2-core.h>
  34. #include <media/videobuf2-dma-contig.h>
  35. #include "coda.h"
  36. #define CODA_NAME "coda"
  37. #define CODADX6_MAX_INSTANCES 4
  38. #define CODA_FMO_BUF_SIZE 32
  39. #define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  40. #define CODA7_WORK_BUF_SIZE (128 * 1024)
  41. #define CODA7_TEMP_BUF_SIZE (304 * 1024)
  42. #define CODA_PARA_BUF_SIZE (10 * 1024)
  43. #define CODA_ISRAM_SIZE (2048 * 2)
  44. #define CODADX6_IRAM_SIZE 0xb000
  45. #define CODA7_IRAM_SIZE 0x14000
  46. #define CODA7_PS_BUF_SIZE 0x28000
  47. #define CODA_MAX_FRAMEBUFFERS 8
  48. #define MAX_W 8192
  49. #define MAX_H 8192
  50. #define CODA_MAX_FRAME_SIZE 0x100000
  51. #define FMO_SLICE_SAVE_BUF_SIZE (32)
  52. #define CODA_DEFAULT_GAMMA 4096
  53. #define MIN_W 176
  54. #define MIN_H 144
  55. #define S_ALIGN 1 /* multiple of 2 */
  56. #define W_ALIGN 1 /* multiple of 2 */
  57. #define H_ALIGN 1 /* multiple of 2 */
  58. #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  59. static int coda_debug;
  60. module_param(coda_debug, int, 0644);
  61. MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  62. enum {
  63. V4L2_M2M_SRC = 0,
  64. V4L2_M2M_DST = 1,
  65. };
  66. enum coda_inst_type {
  67. CODA_INST_ENCODER,
  68. CODA_INST_DECODER,
  69. };
  70. enum coda_product {
  71. CODA_DX6 = 0xf001,
  72. CODA_7541 = 0xf012,
  73. };
  74. struct coda_fmt {
  75. char *name;
  76. u32 fourcc;
  77. };
  78. struct coda_codec {
  79. u32 mode;
  80. u32 src_fourcc;
  81. u32 dst_fourcc;
  82. u32 max_w;
  83. u32 max_h;
  84. };
  85. struct coda_devtype {
  86. char *firmware;
  87. enum coda_product product;
  88. struct coda_codec *codecs;
  89. unsigned int num_codecs;
  90. size_t workbuf_size;
  91. };
  92. /* Per-queue, driver-specific private data */
  93. struct coda_q_data {
  94. unsigned int width;
  95. unsigned int height;
  96. unsigned int sizeimage;
  97. unsigned int fourcc;
  98. };
  99. struct coda_aux_buf {
  100. void *vaddr;
  101. dma_addr_t paddr;
  102. u32 size;
  103. };
  104. struct coda_dev {
  105. struct v4l2_device v4l2_dev;
  106. struct video_device vfd;
  107. struct platform_device *plat_dev;
  108. const struct coda_devtype *devtype;
  109. void __iomem *regs_base;
  110. struct clk *clk_per;
  111. struct clk *clk_ahb;
  112. struct coda_aux_buf codebuf;
  113. struct coda_aux_buf tempbuf;
  114. struct coda_aux_buf workbuf;
  115. struct gen_pool *iram_pool;
  116. long unsigned int iram_vaddr;
  117. long unsigned int iram_paddr;
  118. unsigned long iram_size;
  119. spinlock_t irqlock;
  120. struct mutex dev_mutex;
  121. struct mutex coda_mutex;
  122. struct v4l2_m2m_dev *m2m_dev;
  123. struct vb2_alloc_ctx *alloc_ctx;
  124. struct list_head instances;
  125. unsigned long instance_mask;
  126. struct delayed_work timeout;
  127. };
  128. struct coda_params {
  129. u8 rot_mode;
  130. u8 h264_intra_qp;
  131. u8 h264_inter_qp;
  132. u8 mpeg4_intra_qp;
  133. u8 mpeg4_inter_qp;
  134. u8 gop_size;
  135. int codec_mode;
  136. int codec_mode_aux;
  137. enum v4l2_mpeg_video_multi_slice_mode slice_mode;
  138. u32 framerate;
  139. u16 bitrate;
  140. u32 slice_max_bits;
  141. u32 slice_max_mb;
  142. };
  143. struct coda_iram_info {
  144. u32 axi_sram_use;
  145. phys_addr_t buf_bit_use;
  146. phys_addr_t buf_ip_ac_dc_use;
  147. phys_addr_t buf_dbk_y_use;
  148. phys_addr_t buf_dbk_c_use;
  149. phys_addr_t buf_ovl_use;
  150. phys_addr_t buf_btp_use;
  151. phys_addr_t search_ram_paddr;
  152. int search_ram_size;
  153. };
  154. struct coda_ctx {
  155. struct coda_dev *dev;
  156. struct mutex buffer_mutex;
  157. struct list_head list;
  158. struct work_struct skip_run;
  159. int aborting;
  160. int initialized;
  161. int streamon_out;
  162. int streamon_cap;
  163. u32 isequence;
  164. u32 qsequence;
  165. u32 osequence;
  166. struct coda_q_data q_data[2];
  167. enum coda_inst_type inst_type;
  168. struct coda_codec *codec;
  169. enum v4l2_colorspace colorspace;
  170. struct coda_params params;
  171. struct v4l2_m2m_ctx *m2m_ctx;
  172. struct v4l2_ctrl_handler ctrls;
  173. struct v4l2_fh fh;
  174. int gopcounter;
  175. int runcounter;
  176. char vpu_header[3][64];
  177. int vpu_header_size[3];
  178. struct kfifo bitstream_fifo;
  179. struct mutex bitstream_mutex;
  180. struct coda_aux_buf bitstream;
  181. bool prescan_failed;
  182. struct coda_aux_buf parabuf;
  183. struct coda_aux_buf psbuf;
  184. struct coda_aux_buf slicebuf;
  185. struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
  186. struct coda_aux_buf workbuf;
  187. int num_internal_frames;
  188. int idx;
  189. int reg_idx;
  190. struct coda_iram_info iram_info;
  191. u32 bit_stream_param;
  192. u32 frm_dis_flg;
  193. int display_idx;
  194. };
  195. static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
  196. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
  197. static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
  198. static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
  199. {
  200. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  201. "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
  202. writel(data, dev->regs_base + reg);
  203. }
  204. static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
  205. {
  206. u32 data;
  207. data = readl(dev->regs_base + reg);
  208. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  209. "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
  210. return data;
  211. }
  212. static inline unsigned long coda_isbusy(struct coda_dev *dev)
  213. {
  214. return coda_read(dev, CODA_REG_BIT_BUSY);
  215. }
  216. static inline int coda_is_initialized(struct coda_dev *dev)
  217. {
  218. return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
  219. }
  220. static int coda_wait_timeout(struct coda_dev *dev)
  221. {
  222. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  223. while (coda_isbusy(dev)) {
  224. if (time_after(jiffies, timeout))
  225. return -ETIMEDOUT;
  226. }
  227. return 0;
  228. }
  229. static void coda_command_async(struct coda_ctx *ctx, int cmd)
  230. {
  231. struct coda_dev *dev = ctx->dev;
  232. if (dev->devtype->product == CODA_7541) {
  233. /* Restore context related registers to CODA */
  234. coda_write(dev, ctx->bit_stream_param,
  235. CODA_REG_BIT_BIT_STREAM_PARAM);
  236. coda_write(dev, ctx->frm_dis_flg,
  237. CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  238. coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
  239. }
  240. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  241. coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
  242. coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
  243. coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
  244. coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
  245. }
  246. static int coda_command_sync(struct coda_ctx *ctx, int cmd)
  247. {
  248. struct coda_dev *dev = ctx->dev;
  249. coda_command_async(ctx, cmd);
  250. return coda_wait_timeout(dev);
  251. }
  252. static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
  253. enum v4l2_buf_type type)
  254. {
  255. switch (type) {
  256. case V4L2_BUF_TYPE_VIDEO_OUTPUT:
  257. return &(ctx->q_data[V4L2_M2M_SRC]);
  258. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  259. return &(ctx->q_data[V4L2_M2M_DST]);
  260. default:
  261. BUG();
  262. }
  263. return NULL;
  264. }
  265. /*
  266. * Array of all formats supported by any version of Coda:
  267. */
  268. static struct coda_fmt coda_formats[] = {
  269. {
  270. .name = "YUV 4:2:0 Planar, YCbCr",
  271. .fourcc = V4L2_PIX_FMT_YUV420,
  272. },
  273. {
  274. .name = "YUV 4:2:0 Planar, YCrCb",
  275. .fourcc = V4L2_PIX_FMT_YVU420,
  276. },
  277. {
  278. .name = "H264 Encoded Stream",
  279. .fourcc = V4L2_PIX_FMT_H264,
  280. },
  281. {
  282. .name = "MPEG4 Encoded Stream",
  283. .fourcc = V4L2_PIX_FMT_MPEG4,
  284. },
  285. };
  286. #define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
  287. { mode, src_fourcc, dst_fourcc, max_w, max_h }
  288. /*
  289. * Arrays of codecs supported by each given version of Coda:
  290. * i.MX27 -> codadx6
  291. * i.MX5x -> coda7
  292. * i.MX6 -> coda960
  293. * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
  294. */
  295. static struct coda_codec codadx6_codecs[] = {
  296. CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 720, 576),
  297. CODA_CODEC(CODADX6_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
  298. };
  299. static struct coda_codec coda7_codecs[] = {
  300. CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 1280, 720),
  301. CODA_CODEC(CODA7_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 1280, 720),
  302. CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1080),
  303. CODA_CODEC(CODA7_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1920, 1080),
  304. };
  305. static bool coda_format_is_yuv(u32 fourcc)
  306. {
  307. switch (fourcc) {
  308. case V4L2_PIX_FMT_YUV420:
  309. case V4L2_PIX_FMT_YVU420:
  310. return true;
  311. default:
  312. return false;
  313. }
  314. }
  315. /*
  316. * Normalize all supported YUV 4:2:0 formats to the value used in the codec
  317. * tables.
  318. */
  319. static u32 coda_format_normalize_yuv(u32 fourcc)
  320. {
  321. return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
  322. }
  323. static struct coda_codec *coda_find_codec(struct coda_dev *dev, int src_fourcc,
  324. int dst_fourcc)
  325. {
  326. struct coda_codec *codecs = dev->devtype->codecs;
  327. int num_codecs = dev->devtype->num_codecs;
  328. int k;
  329. src_fourcc = coda_format_normalize_yuv(src_fourcc);
  330. dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
  331. if (src_fourcc == dst_fourcc)
  332. return NULL;
  333. for (k = 0; k < num_codecs; k++) {
  334. if (codecs[k].src_fourcc == src_fourcc &&
  335. codecs[k].dst_fourcc == dst_fourcc)
  336. break;
  337. }
  338. if (k == num_codecs)
  339. return NULL;
  340. return &codecs[k];
  341. }
  342. static char *coda_product_name(int product)
  343. {
  344. static char buf[9];
  345. switch (product) {
  346. case CODA_DX6:
  347. return "CodaDx6";
  348. case CODA_7541:
  349. return "CODA7541";
  350. default:
  351. snprintf(buf, sizeof(buf), "(0x%04x)", product);
  352. return buf;
  353. }
  354. }
  355. /*
  356. * V4L2 ioctl() operations.
  357. */
  358. static int coda_querycap(struct file *file, void *priv,
  359. struct v4l2_capability *cap)
  360. {
  361. struct coda_ctx *ctx = fh_to_ctx(priv);
  362. strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
  363. strlcpy(cap->card, coda_product_name(ctx->dev->devtype->product),
  364. sizeof(cap->card));
  365. strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
  366. /*
  367. * This is only a mem-to-mem video device. The capture and output
  368. * device capability flags are left only for backward compatibility
  369. * and are scheduled for removal.
  370. */
  371. cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
  372. V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
  373. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  374. return 0;
  375. }
  376. static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
  377. enum v4l2_buf_type type, int src_fourcc)
  378. {
  379. struct coda_ctx *ctx = fh_to_ctx(priv);
  380. struct coda_codec *codecs = ctx->dev->devtype->codecs;
  381. struct coda_fmt *formats = coda_formats;
  382. struct coda_fmt *fmt;
  383. int num_codecs = ctx->dev->devtype->num_codecs;
  384. int num_formats = ARRAY_SIZE(coda_formats);
  385. int i, k, num = 0;
  386. for (i = 0; i < num_formats; i++) {
  387. /* Both uncompressed formats are always supported */
  388. if (coda_format_is_yuv(formats[i].fourcc) &&
  389. !coda_format_is_yuv(src_fourcc)) {
  390. if (num == f->index)
  391. break;
  392. ++num;
  393. continue;
  394. }
  395. /* Compressed formats may be supported, check the codec list */
  396. for (k = 0; k < num_codecs; k++) {
  397. /* if src_fourcc is set, only consider matching codecs */
  398. if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
  399. formats[i].fourcc == codecs[k].dst_fourcc &&
  400. (!src_fourcc || src_fourcc == codecs[k].src_fourcc))
  401. break;
  402. if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
  403. formats[i].fourcc == codecs[k].src_fourcc)
  404. break;
  405. }
  406. if (k < num_codecs) {
  407. if (num == f->index)
  408. break;
  409. ++num;
  410. }
  411. }
  412. if (i < num_formats) {
  413. fmt = &formats[i];
  414. strlcpy(f->description, fmt->name, sizeof(f->description));
  415. f->pixelformat = fmt->fourcc;
  416. if (!coda_format_is_yuv(fmt->fourcc))
  417. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  418. return 0;
  419. }
  420. /* Format not found */
  421. return -EINVAL;
  422. }
  423. static int coda_enum_fmt_vid_cap(struct file *file, void *priv,
  424. struct v4l2_fmtdesc *f)
  425. {
  426. struct coda_ctx *ctx = fh_to_ctx(priv);
  427. struct vb2_queue *src_vq;
  428. struct coda_q_data *q_data_src;
  429. /* If the source format is already fixed, only list matching formats */
  430. src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  431. if (vb2_is_streaming(src_vq)) {
  432. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  433. return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  434. q_data_src->fourcc);
  435. }
  436. return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0);
  437. }
  438. static int coda_enum_fmt_vid_out(struct file *file, void *priv,
  439. struct v4l2_fmtdesc *f)
  440. {
  441. return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_OUTPUT, 0);
  442. }
  443. static int coda_g_fmt(struct file *file, void *priv,
  444. struct v4l2_format *f)
  445. {
  446. struct vb2_queue *vq;
  447. struct coda_q_data *q_data;
  448. struct coda_ctx *ctx = fh_to_ctx(priv);
  449. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  450. if (!vq)
  451. return -EINVAL;
  452. q_data = get_q_data(ctx, f->type);
  453. f->fmt.pix.field = V4L2_FIELD_NONE;
  454. f->fmt.pix.pixelformat = q_data->fourcc;
  455. f->fmt.pix.width = q_data->width;
  456. f->fmt.pix.height = q_data->height;
  457. if (coda_format_is_yuv(f->fmt.pix.pixelformat))
  458. f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
  459. else /* encoded formats h.264/mpeg4 */
  460. f->fmt.pix.bytesperline = 0;
  461. f->fmt.pix.sizeimage = q_data->sizeimage;
  462. f->fmt.pix.colorspace = ctx->colorspace;
  463. return 0;
  464. }
  465. static int coda_try_fmt(struct coda_codec *codec, struct v4l2_format *f)
  466. {
  467. unsigned int max_w, max_h;
  468. enum v4l2_field field;
  469. field = f->fmt.pix.field;
  470. if (field == V4L2_FIELD_ANY)
  471. field = V4L2_FIELD_NONE;
  472. else if (V4L2_FIELD_NONE != field)
  473. return -EINVAL;
  474. /* V4L2 specification suggests the driver corrects the format struct
  475. * if any of the dimensions is unsupported */
  476. f->fmt.pix.field = field;
  477. if (codec) {
  478. max_w = codec->max_w;
  479. max_h = codec->max_h;
  480. } else {
  481. max_w = MAX_W;
  482. max_h = MAX_H;
  483. }
  484. v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w,
  485. W_ALIGN, &f->fmt.pix.height,
  486. MIN_H, max_h, H_ALIGN, S_ALIGN);
  487. if (coda_format_is_yuv(f->fmt.pix.pixelformat)) {
  488. /* Frame stride must be multiple of 8 */
  489. f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 8);
  490. f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
  491. f->fmt.pix.height * 3 / 2;
  492. } else { /*encoded formats h.264/mpeg4 */
  493. f->fmt.pix.bytesperline = 0;
  494. f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
  495. }
  496. return 0;
  497. }
  498. static int coda_try_fmt_vid_cap(struct file *file, void *priv,
  499. struct v4l2_format *f)
  500. {
  501. struct coda_ctx *ctx = fh_to_ctx(priv);
  502. struct coda_codec *codec;
  503. struct vb2_queue *src_vq;
  504. int ret;
  505. /*
  506. * If the source format is already fixed, try to find a codec that
  507. * converts to the given destination format
  508. */
  509. src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  510. if (vb2_is_streaming(src_vq)) {
  511. struct coda_q_data *q_data_src;
  512. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  513. codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
  514. f->fmt.pix.pixelformat);
  515. if (!codec)
  516. return -EINVAL;
  517. } else {
  518. /* Otherwise determine codec by encoded format, if possible */
  519. codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
  520. f->fmt.pix.pixelformat);
  521. }
  522. f->fmt.pix.colorspace = ctx->colorspace;
  523. ret = coda_try_fmt(codec, f);
  524. if (ret < 0)
  525. return ret;
  526. /* The h.264 decoder only returns complete 16x16 macroblocks */
  527. if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) {
  528. f->fmt.pix.width = round_up(f->fmt.pix.width, 16);
  529. f->fmt.pix.height = round_up(f->fmt.pix.height, 16);
  530. f->fmt.pix.bytesperline = f->fmt.pix.width;
  531. f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
  532. f->fmt.pix.height * 3 / 2;
  533. }
  534. return 0;
  535. }
  536. static int coda_try_fmt_vid_out(struct file *file, void *priv,
  537. struct v4l2_format *f)
  538. {
  539. struct coda_ctx *ctx = fh_to_ctx(priv);
  540. struct coda_codec *codec;
  541. /* Determine codec by encoded format, returns NULL if raw or invalid */
  542. codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
  543. V4L2_PIX_FMT_YUV420);
  544. if (!f->fmt.pix.colorspace)
  545. f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
  546. return coda_try_fmt(codec, f);
  547. }
  548. static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
  549. {
  550. struct coda_q_data *q_data;
  551. struct vb2_queue *vq;
  552. vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
  553. if (!vq)
  554. return -EINVAL;
  555. q_data = get_q_data(ctx, f->type);
  556. if (!q_data)
  557. return -EINVAL;
  558. if (vb2_is_busy(vq)) {
  559. v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
  560. return -EBUSY;
  561. }
  562. q_data->fourcc = f->fmt.pix.pixelformat;
  563. q_data->width = f->fmt.pix.width;
  564. q_data->height = f->fmt.pix.height;
  565. q_data->sizeimage = f->fmt.pix.sizeimage;
  566. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  567. "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
  568. f->type, q_data->width, q_data->height, q_data->fourcc);
  569. return 0;
  570. }
  571. static int coda_s_fmt_vid_cap(struct file *file, void *priv,
  572. struct v4l2_format *f)
  573. {
  574. struct coda_ctx *ctx = fh_to_ctx(priv);
  575. int ret;
  576. ret = coda_try_fmt_vid_cap(file, priv, f);
  577. if (ret)
  578. return ret;
  579. return coda_s_fmt(ctx, f);
  580. }
  581. static int coda_s_fmt_vid_out(struct file *file, void *priv,
  582. struct v4l2_format *f)
  583. {
  584. struct coda_ctx *ctx = fh_to_ctx(priv);
  585. int ret;
  586. ret = coda_try_fmt_vid_out(file, priv, f);
  587. if (ret)
  588. return ret;
  589. ret = coda_s_fmt(ctx, f);
  590. if (ret)
  591. ctx->colorspace = f->fmt.pix.colorspace;
  592. return ret;
  593. }
  594. static int coda_reqbufs(struct file *file, void *priv,
  595. struct v4l2_requestbuffers *reqbufs)
  596. {
  597. struct coda_ctx *ctx = fh_to_ctx(priv);
  598. return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
  599. }
  600. static int coda_querybuf(struct file *file, void *priv,
  601. struct v4l2_buffer *buf)
  602. {
  603. struct coda_ctx *ctx = fh_to_ctx(priv);
  604. return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
  605. }
  606. static int coda_qbuf(struct file *file, void *priv,
  607. struct v4l2_buffer *buf)
  608. {
  609. struct coda_ctx *ctx = fh_to_ctx(priv);
  610. return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
  611. }
  612. static int coda_expbuf(struct file *file, void *priv,
  613. struct v4l2_exportbuffer *eb)
  614. {
  615. struct coda_ctx *ctx = fh_to_ctx(priv);
  616. return v4l2_m2m_expbuf(file, ctx->m2m_ctx, eb);
  617. }
  618. static bool coda_buf_is_end_of_stream(struct coda_ctx *ctx,
  619. struct v4l2_buffer *buf)
  620. {
  621. struct vb2_queue *src_vq;
  622. src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  623. return ((ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) &&
  624. (buf->sequence == (ctx->qsequence - 1)));
  625. }
  626. static int coda_dqbuf(struct file *file, void *priv,
  627. struct v4l2_buffer *buf)
  628. {
  629. struct coda_ctx *ctx = fh_to_ctx(priv);
  630. int ret;
  631. ret = v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
  632. /* If this is the last capture buffer, emit an end-of-stream event */
  633. if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
  634. coda_buf_is_end_of_stream(ctx, buf)) {
  635. const struct v4l2_event eos_event = {
  636. .type = V4L2_EVENT_EOS
  637. };
  638. v4l2_event_queue_fh(&ctx->fh, &eos_event);
  639. }
  640. return ret;
  641. }
  642. static int coda_create_bufs(struct file *file, void *priv,
  643. struct v4l2_create_buffers *create)
  644. {
  645. struct coda_ctx *ctx = fh_to_ctx(priv);
  646. return v4l2_m2m_create_bufs(file, ctx->m2m_ctx, create);
  647. }
  648. static int coda_streamon(struct file *file, void *priv,
  649. enum v4l2_buf_type type)
  650. {
  651. struct coda_ctx *ctx = fh_to_ctx(priv);
  652. return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
  653. }
  654. static int coda_streamoff(struct file *file, void *priv,
  655. enum v4l2_buf_type type)
  656. {
  657. struct coda_ctx *ctx = fh_to_ctx(priv);
  658. int ret;
  659. /*
  660. * This indirectly calls __vb2_queue_cancel, which dequeues all buffers.
  661. * We therefore have to lock it against running hardware in this context,
  662. * which still needs the buffers.
  663. */
  664. mutex_lock(&ctx->buffer_mutex);
  665. ret = v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
  666. mutex_unlock(&ctx->buffer_mutex);
  667. return ret;
  668. }
  669. static int coda_decoder_cmd(struct file *file, void *fh,
  670. struct v4l2_decoder_cmd *dc)
  671. {
  672. struct coda_ctx *ctx = fh_to_ctx(fh);
  673. if (dc->cmd != V4L2_DEC_CMD_STOP)
  674. return -EINVAL;
  675. if ((dc->flags & V4L2_DEC_CMD_STOP_TO_BLACK) ||
  676. (dc->flags & V4L2_DEC_CMD_STOP_IMMEDIATELY))
  677. return -EINVAL;
  678. if (dc->stop.pts != 0)
  679. return -EINVAL;
  680. if (ctx->inst_type != CODA_INST_DECODER)
  681. return -EINVAL;
  682. /* Set the strem-end flag on this context */
  683. ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
  684. return 0;
  685. }
  686. static int coda_subscribe_event(struct v4l2_fh *fh,
  687. const struct v4l2_event_subscription *sub)
  688. {
  689. switch (sub->type) {
  690. case V4L2_EVENT_EOS:
  691. return v4l2_event_subscribe(fh, sub, 0, NULL);
  692. default:
  693. return v4l2_ctrl_subscribe_event(fh, sub);
  694. }
  695. }
  696. static const struct v4l2_ioctl_ops coda_ioctl_ops = {
  697. .vidioc_querycap = coda_querycap,
  698. .vidioc_enum_fmt_vid_cap = coda_enum_fmt_vid_cap,
  699. .vidioc_g_fmt_vid_cap = coda_g_fmt,
  700. .vidioc_try_fmt_vid_cap = coda_try_fmt_vid_cap,
  701. .vidioc_s_fmt_vid_cap = coda_s_fmt_vid_cap,
  702. .vidioc_enum_fmt_vid_out = coda_enum_fmt_vid_out,
  703. .vidioc_g_fmt_vid_out = coda_g_fmt,
  704. .vidioc_try_fmt_vid_out = coda_try_fmt_vid_out,
  705. .vidioc_s_fmt_vid_out = coda_s_fmt_vid_out,
  706. .vidioc_reqbufs = coda_reqbufs,
  707. .vidioc_querybuf = coda_querybuf,
  708. .vidioc_qbuf = coda_qbuf,
  709. .vidioc_expbuf = coda_expbuf,
  710. .vidioc_dqbuf = coda_dqbuf,
  711. .vidioc_create_bufs = coda_create_bufs,
  712. .vidioc_streamon = coda_streamon,
  713. .vidioc_streamoff = coda_streamoff,
  714. .vidioc_decoder_cmd = coda_decoder_cmd,
  715. .vidioc_subscribe_event = coda_subscribe_event,
  716. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  717. };
  718. static int coda_start_decoding(struct coda_ctx *ctx);
  719. static void coda_skip_run(struct work_struct *work)
  720. {
  721. struct coda_ctx *ctx = container_of(work, struct coda_ctx, skip_run);
  722. v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
  723. }
  724. static inline int coda_get_bitstream_payload(struct coda_ctx *ctx)
  725. {
  726. return kfifo_len(&ctx->bitstream_fifo);
  727. }
  728. static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
  729. {
  730. struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
  731. struct coda_dev *dev = ctx->dev;
  732. u32 rd_ptr;
  733. rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
  734. kfifo->out = (kfifo->in & ~kfifo->mask) |
  735. (rd_ptr - ctx->bitstream.paddr);
  736. if (kfifo->out > kfifo->in)
  737. kfifo->out -= kfifo->mask + 1;
  738. }
  739. static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
  740. {
  741. struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
  742. struct coda_dev *dev = ctx->dev;
  743. u32 rd_ptr, wr_ptr;
  744. rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
  745. coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
  746. wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
  747. coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  748. }
  749. static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
  750. {
  751. struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
  752. struct coda_dev *dev = ctx->dev;
  753. u32 wr_ptr;
  754. wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
  755. coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  756. }
  757. static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf)
  758. {
  759. u32 src_size = vb2_get_plane_payload(src_buf, 0);
  760. u32 n;
  761. n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size);
  762. if (n < src_size)
  763. return -ENOSPC;
  764. dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr,
  765. ctx->bitstream.size, DMA_TO_DEVICE);
  766. ctx->qsequence++;
  767. return 0;
  768. }
  769. static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
  770. struct vb2_buffer *src_buf)
  771. {
  772. int ret;
  773. if (coda_get_bitstream_payload(ctx) +
  774. vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
  775. return false;
  776. if (vb2_plane_vaddr(src_buf, 0) == NULL) {
  777. v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
  778. return true;
  779. }
  780. ret = coda_bitstream_queue(ctx, src_buf);
  781. if (ret < 0) {
  782. v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
  783. return false;
  784. }
  785. /* Sync read pointer to device */
  786. if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
  787. coda_kfifo_sync_to_device_write(ctx);
  788. ctx->prescan_failed = false;
  789. return true;
  790. }
  791. static void coda_fill_bitstream(struct coda_ctx *ctx)
  792. {
  793. struct vb2_buffer *src_buf;
  794. while (v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) > 0) {
  795. src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
  796. if (coda_bitstream_try_queue(ctx, src_buf)) {
  797. src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
  798. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
  799. } else {
  800. break;
  801. }
  802. }
  803. }
  804. /*
  805. * Mem-to-mem operations.
  806. */
  807. static int coda_prepare_decode(struct coda_ctx *ctx)
  808. {
  809. struct vb2_buffer *dst_buf;
  810. struct coda_dev *dev = ctx->dev;
  811. struct coda_q_data *q_data_dst;
  812. u32 stridey, height;
  813. u32 picture_y, picture_cb, picture_cr;
  814. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  815. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  816. if (ctx->params.rot_mode & CODA_ROT_90) {
  817. stridey = q_data_dst->height;
  818. height = q_data_dst->width;
  819. } else {
  820. stridey = q_data_dst->width;
  821. height = q_data_dst->height;
  822. }
  823. /* Try to copy source buffer contents into the bitstream ringbuffer */
  824. mutex_lock(&ctx->bitstream_mutex);
  825. coda_fill_bitstream(ctx);
  826. mutex_unlock(&ctx->bitstream_mutex);
  827. if (coda_get_bitstream_payload(ctx) < 512 &&
  828. (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
  829. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  830. "bitstream payload: %d, skipping\n",
  831. coda_get_bitstream_payload(ctx));
  832. schedule_work(&ctx->skip_run);
  833. return -EAGAIN;
  834. }
  835. /* Run coda_start_decoding (again) if not yet initialized */
  836. if (!ctx->initialized) {
  837. int ret = coda_start_decoding(ctx);
  838. if (ret < 0) {
  839. v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
  840. schedule_work(&ctx->skip_run);
  841. return -EAGAIN;
  842. } else {
  843. ctx->initialized = 1;
  844. }
  845. }
  846. /* Set rotator output */
  847. picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
  848. if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) {
  849. /* Switch Cr and Cb for YVU420 format */
  850. picture_cr = picture_y + stridey * height;
  851. picture_cb = picture_cr + stridey / 2 * height / 2;
  852. } else {
  853. picture_cb = picture_y + stridey * height;
  854. picture_cr = picture_cb + stridey / 2 * height / 2;
  855. }
  856. coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y);
  857. coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB);
  858. coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR);
  859. coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE);
  860. coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
  861. CODA_CMD_DEC_PIC_ROT_MODE);
  862. switch (dev->devtype->product) {
  863. case CODA_DX6:
  864. /* TBD */
  865. case CODA_7541:
  866. coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
  867. break;
  868. }
  869. coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
  870. coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
  871. coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
  872. return 0;
  873. }
  874. static void coda_prepare_encode(struct coda_ctx *ctx)
  875. {
  876. struct coda_q_data *q_data_src, *q_data_dst;
  877. struct vb2_buffer *src_buf, *dst_buf;
  878. struct coda_dev *dev = ctx->dev;
  879. int force_ipicture;
  880. int quant_param = 0;
  881. u32 picture_y, picture_cb, picture_cr;
  882. u32 pic_stream_buffer_addr, pic_stream_buffer_size;
  883. u32 dst_fourcc;
  884. src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
  885. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  886. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  887. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  888. dst_fourcc = q_data_dst->fourcc;
  889. src_buf->v4l2_buf.sequence = ctx->osequence;
  890. dst_buf->v4l2_buf.sequence = ctx->osequence;
  891. ctx->osequence++;
  892. /*
  893. * Workaround coda firmware BUG that only marks the first
  894. * frame as IDR. This is a problem for some decoders that can't
  895. * recover when a frame is lost.
  896. */
  897. if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
  898. src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
  899. src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  900. } else {
  901. src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
  902. src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
  903. }
  904. /*
  905. * Copy headers at the beginning of the first frame for H.264 only.
  906. * In MPEG4 they are already copied by the coda.
  907. */
  908. if (src_buf->v4l2_buf.sequence == 0) {
  909. pic_stream_buffer_addr =
  910. vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
  911. ctx->vpu_header_size[0] +
  912. ctx->vpu_header_size[1] +
  913. ctx->vpu_header_size[2];
  914. pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
  915. ctx->vpu_header_size[0] -
  916. ctx->vpu_header_size[1] -
  917. ctx->vpu_header_size[2];
  918. memcpy(vb2_plane_vaddr(dst_buf, 0),
  919. &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
  920. memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
  921. &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
  922. memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
  923. ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
  924. ctx->vpu_header_size[2]);
  925. } else {
  926. pic_stream_buffer_addr =
  927. vb2_dma_contig_plane_dma_addr(dst_buf, 0);
  928. pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
  929. }
  930. if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
  931. force_ipicture = 1;
  932. switch (dst_fourcc) {
  933. case V4L2_PIX_FMT_H264:
  934. quant_param = ctx->params.h264_intra_qp;
  935. break;
  936. case V4L2_PIX_FMT_MPEG4:
  937. quant_param = ctx->params.mpeg4_intra_qp;
  938. break;
  939. default:
  940. v4l2_warn(&ctx->dev->v4l2_dev,
  941. "cannot set intra qp, fmt not supported\n");
  942. break;
  943. }
  944. } else {
  945. force_ipicture = 0;
  946. switch (dst_fourcc) {
  947. case V4L2_PIX_FMT_H264:
  948. quant_param = ctx->params.h264_inter_qp;
  949. break;
  950. case V4L2_PIX_FMT_MPEG4:
  951. quant_param = ctx->params.mpeg4_inter_qp;
  952. break;
  953. default:
  954. v4l2_warn(&ctx->dev->v4l2_dev,
  955. "cannot set inter qp, fmt not supported\n");
  956. break;
  957. }
  958. }
  959. /* submit */
  960. coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
  961. coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
  962. picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
  963. switch (q_data_src->fourcc) {
  964. case V4L2_PIX_FMT_YVU420:
  965. /* Switch Cb and Cr for YVU420 format */
  966. picture_cr = picture_y + q_data_src->width * q_data_src->height;
  967. picture_cb = picture_cr + q_data_src->width / 2 *
  968. q_data_src->height / 2;
  969. break;
  970. case V4L2_PIX_FMT_YUV420:
  971. default:
  972. picture_cb = picture_y + q_data_src->width * q_data_src->height;
  973. picture_cr = picture_cb + q_data_src->width / 2 *
  974. q_data_src->height / 2;
  975. break;
  976. }
  977. coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
  978. coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
  979. coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
  980. coda_write(dev, force_ipicture << 1 & 0x2,
  981. CODA_CMD_ENC_PIC_OPTION);
  982. coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
  983. coda_write(dev, pic_stream_buffer_size / 1024,
  984. CODA_CMD_ENC_PIC_BB_SIZE);
  985. }
  986. static void coda_device_run(void *m2m_priv)
  987. {
  988. struct coda_ctx *ctx = m2m_priv;
  989. struct coda_dev *dev = ctx->dev;
  990. int ret;
  991. mutex_lock(&ctx->buffer_mutex);
  992. /*
  993. * If streamoff dequeued all buffers before we could get the lock,
  994. * just bail out immediately.
  995. */
  996. if ((!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
  997. ctx->inst_type != CODA_INST_DECODER) ||
  998. !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
  999. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1000. "%d: device_run without buffers\n", ctx->idx);
  1001. mutex_unlock(&ctx->buffer_mutex);
  1002. schedule_work(&ctx->skip_run);
  1003. return;
  1004. }
  1005. mutex_lock(&dev->coda_mutex);
  1006. if (ctx->inst_type == CODA_INST_DECODER) {
  1007. ret = coda_prepare_decode(ctx);
  1008. if (ret < 0) {
  1009. mutex_unlock(&dev->coda_mutex);
  1010. mutex_unlock(&ctx->buffer_mutex);
  1011. /* job_finish scheduled by prepare_decode */
  1012. return;
  1013. }
  1014. } else {
  1015. coda_prepare_encode(ctx);
  1016. }
  1017. if (dev->devtype->product != CODA_DX6)
  1018. coda_write(dev, ctx->iram_info.axi_sram_use,
  1019. CODA7_REG_BIT_AXI_SRAM_USE);
  1020. /* 1 second timeout in case CODA locks up */
  1021. schedule_delayed_work(&dev->timeout, HZ);
  1022. if (ctx->inst_type == CODA_INST_DECODER)
  1023. coda_kfifo_sync_to_device_full(ctx);
  1024. coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
  1025. }
  1026. static int coda_job_ready(void *m2m_priv)
  1027. {
  1028. struct coda_ctx *ctx = m2m_priv;
  1029. /*
  1030. * For both 'P' and 'key' frame cases 1 picture
  1031. * and 1 frame are needed. In the decoder case,
  1032. * the compressed frame can be in the bitstream.
  1033. */
  1034. if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
  1035. ctx->inst_type != CODA_INST_DECODER) {
  1036. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1037. "not ready: not enough video buffers.\n");
  1038. return 0;
  1039. }
  1040. if (!v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
  1041. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1042. "not ready: not enough video capture buffers.\n");
  1043. return 0;
  1044. }
  1045. if (ctx->prescan_failed ||
  1046. ((ctx->inst_type == CODA_INST_DECODER) &&
  1047. (coda_get_bitstream_payload(ctx) < 512) &&
  1048. !(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
  1049. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1050. "%d: not ready: not enough bitstream data.\n",
  1051. ctx->idx);
  1052. return 0;
  1053. }
  1054. if (ctx->aborting) {
  1055. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1056. "not ready: aborting\n");
  1057. return 0;
  1058. }
  1059. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1060. "job ready\n");
  1061. return 1;
  1062. }
  1063. static void coda_job_abort(void *priv)
  1064. {
  1065. struct coda_ctx *ctx = priv;
  1066. ctx->aborting = 1;
  1067. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1068. "Aborting task\n");
  1069. }
  1070. static void coda_lock(void *m2m_priv)
  1071. {
  1072. struct coda_ctx *ctx = m2m_priv;
  1073. struct coda_dev *pcdev = ctx->dev;
  1074. mutex_lock(&pcdev->dev_mutex);
  1075. }
  1076. static void coda_unlock(void *m2m_priv)
  1077. {
  1078. struct coda_ctx *ctx = m2m_priv;
  1079. struct coda_dev *pcdev = ctx->dev;
  1080. mutex_unlock(&pcdev->dev_mutex);
  1081. }
  1082. static struct v4l2_m2m_ops coda_m2m_ops = {
  1083. .device_run = coda_device_run,
  1084. .job_ready = coda_job_ready,
  1085. .job_abort = coda_job_abort,
  1086. .lock = coda_lock,
  1087. .unlock = coda_unlock,
  1088. };
  1089. static void set_default_params(struct coda_ctx *ctx)
  1090. {
  1091. int max_w;
  1092. int max_h;
  1093. ctx->codec = &ctx->dev->devtype->codecs[0];
  1094. max_w = ctx->codec->max_w;
  1095. max_h = ctx->codec->max_h;
  1096. ctx->params.codec_mode = CODA_MODE_INVALID;
  1097. ctx->colorspace = V4L2_COLORSPACE_REC709;
  1098. ctx->params.framerate = 30;
  1099. ctx->aborting = 0;
  1100. /* Default formats for output and input queues */
  1101. ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
  1102. ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
  1103. ctx->q_data[V4L2_M2M_SRC].width = max_w;
  1104. ctx->q_data[V4L2_M2M_SRC].height = max_h;
  1105. ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
  1106. ctx->q_data[V4L2_M2M_DST].width = max_w;
  1107. ctx->q_data[V4L2_M2M_DST].height = max_h;
  1108. ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
  1109. }
  1110. /*
  1111. * Queue operations
  1112. */
  1113. static int coda_queue_setup(struct vb2_queue *vq,
  1114. const struct v4l2_format *fmt,
  1115. unsigned int *nbuffers, unsigned int *nplanes,
  1116. unsigned int sizes[], void *alloc_ctxs[])
  1117. {
  1118. struct coda_ctx *ctx = vb2_get_drv_priv(vq);
  1119. struct coda_q_data *q_data;
  1120. unsigned int size;
  1121. q_data = get_q_data(ctx, vq->type);
  1122. size = q_data->sizeimage;
  1123. *nplanes = 1;
  1124. sizes[0] = size;
  1125. alloc_ctxs[0] = ctx->dev->alloc_ctx;
  1126. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1127. "get %d buffer(s) of size %d each.\n", *nbuffers, size);
  1128. return 0;
  1129. }
  1130. static int coda_buf_prepare(struct vb2_buffer *vb)
  1131. {
  1132. struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  1133. struct coda_q_data *q_data;
  1134. q_data = get_q_data(ctx, vb->vb2_queue->type);
  1135. if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
  1136. v4l2_warn(&ctx->dev->v4l2_dev,
  1137. "%s data will not fit into plane (%lu < %lu)\n",
  1138. __func__, vb2_plane_size(vb, 0),
  1139. (long)q_data->sizeimage);
  1140. return -EINVAL;
  1141. }
  1142. return 0;
  1143. }
  1144. static void coda_buf_queue(struct vb2_buffer *vb)
  1145. {
  1146. struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  1147. struct coda_q_data *q_data;
  1148. q_data = get_q_data(ctx, vb->vb2_queue->type);
  1149. /*
  1150. * In the decoder case, immediately try to copy the buffer into the
  1151. * bitstream ringbuffer and mark it as ready to be dequeued.
  1152. */
  1153. if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
  1154. vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
  1155. /*
  1156. * For backwards compatiblity, queuing an empty buffer marks
  1157. * the stream end
  1158. */
  1159. if (vb2_get_plane_payload(vb, 0) == 0)
  1160. ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
  1161. mutex_lock(&ctx->bitstream_mutex);
  1162. v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
  1163. coda_fill_bitstream(ctx);
  1164. mutex_unlock(&ctx->bitstream_mutex);
  1165. } else {
  1166. v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
  1167. }
  1168. }
  1169. static void coda_wait_prepare(struct vb2_queue *q)
  1170. {
  1171. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  1172. coda_unlock(ctx);
  1173. }
  1174. static void coda_wait_finish(struct vb2_queue *q)
  1175. {
  1176. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  1177. coda_lock(ctx);
  1178. }
  1179. static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
  1180. {
  1181. struct coda_dev *dev = ctx->dev;
  1182. u32 *p = ctx->parabuf.vaddr;
  1183. if (dev->devtype->product == CODA_DX6)
  1184. p[index] = value;
  1185. else
  1186. p[index ^ 1] = value;
  1187. }
  1188. static int coda_alloc_aux_buf(struct coda_dev *dev,
  1189. struct coda_aux_buf *buf, size_t size)
  1190. {
  1191. buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
  1192. GFP_KERNEL);
  1193. if (!buf->vaddr)
  1194. return -ENOMEM;
  1195. buf->size = size;
  1196. return 0;
  1197. }
  1198. static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
  1199. struct coda_aux_buf *buf, size_t size)
  1200. {
  1201. return coda_alloc_aux_buf(ctx->dev, buf, size);
  1202. }
  1203. static void coda_free_aux_buf(struct coda_dev *dev,
  1204. struct coda_aux_buf *buf)
  1205. {
  1206. if (buf->vaddr) {
  1207. dma_free_coherent(&dev->plat_dev->dev, buf->size,
  1208. buf->vaddr, buf->paddr);
  1209. buf->vaddr = NULL;
  1210. buf->size = 0;
  1211. }
  1212. }
  1213. static void coda_free_framebuffers(struct coda_ctx *ctx)
  1214. {
  1215. int i;
  1216. for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
  1217. coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
  1218. }
  1219. static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
  1220. {
  1221. struct coda_dev *dev = ctx->dev;
  1222. int height = q_data->height;
  1223. dma_addr_t paddr;
  1224. int ysize;
  1225. int ret;
  1226. int i;
  1227. if (ctx->codec && ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
  1228. height = round_up(height, 16);
  1229. ysize = round_up(q_data->width, 8) * height;
  1230. /* Allocate frame buffers */
  1231. for (i = 0; i < ctx->num_internal_frames; i++) {
  1232. size_t size;
  1233. size = q_data->sizeimage;
  1234. if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
  1235. dev->devtype->product != CODA_DX6)
  1236. ctx->internal_frames[i].size += ysize/4;
  1237. ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i], size);
  1238. if (ret < 0) {
  1239. coda_free_framebuffers(ctx);
  1240. return ret;
  1241. }
  1242. }
  1243. /* Register frame buffers in the parameter buffer */
  1244. for (i = 0; i < ctx->num_internal_frames; i++) {
  1245. paddr = ctx->internal_frames[i].paddr;
  1246. coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */
  1247. coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
  1248. coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
  1249. /* mvcol buffer for h.264 */
  1250. if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
  1251. dev->devtype->product != CODA_DX6)
  1252. coda_parabuf_write(ctx, 96 + i,
  1253. ctx->internal_frames[i].paddr +
  1254. ysize + ysize/4 + ysize/4);
  1255. }
  1256. /* mvcol buffer for mpeg4 */
  1257. if ((dev->devtype->product != CODA_DX6) &&
  1258. (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
  1259. coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
  1260. ysize + ysize/4 + ysize/4);
  1261. return 0;
  1262. }
  1263. static int coda_h264_padding(int size, char *p)
  1264. {
  1265. int nal_size;
  1266. int diff;
  1267. diff = size - (size & ~0x7);
  1268. if (diff == 0)
  1269. return 0;
  1270. nal_size = coda_filler_size[diff];
  1271. memcpy(p, coda_filler_nal, nal_size);
  1272. /* Add rbsp stop bit and trailing at the end */
  1273. *(p + nal_size - 1) = 0x80;
  1274. return nal_size;
  1275. }
  1276. static void coda_setup_iram(struct coda_ctx *ctx)
  1277. {
  1278. struct coda_iram_info *iram_info = &ctx->iram_info;
  1279. struct coda_dev *dev = ctx->dev;
  1280. int ipacdc_size;
  1281. int bitram_size;
  1282. int dbk_size;
  1283. int ovl_size;
  1284. int mb_width;
  1285. int me_size;
  1286. int size;
  1287. memset(iram_info, 0, sizeof(*iram_info));
  1288. size = dev->iram_size;
  1289. if (dev->devtype->product == CODA_DX6)
  1290. return;
  1291. if (ctx->inst_type == CODA_INST_ENCODER) {
  1292. struct coda_q_data *q_data_src;
  1293. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1294. mb_width = DIV_ROUND_UP(q_data_src->width, 16);
  1295. /* Prioritize in case IRAM is too small for everything */
  1296. me_size = round_up(round_up(q_data_src->width, 16) * 36 + 2048,
  1297. 1024);
  1298. iram_info->search_ram_size = me_size;
  1299. if (size >= iram_info->search_ram_size) {
  1300. if (dev->devtype->product == CODA_7541)
  1301. iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE;
  1302. iram_info->search_ram_paddr = dev->iram_paddr;
  1303. size -= iram_info->search_ram_size;
  1304. } else {
  1305. pr_err("IRAM is smaller than the search ram size\n");
  1306. goto out;
  1307. }
  1308. /* Only H.264BP and H.263P3 are considered */
  1309. dbk_size = round_up(128 * mb_width, 1024);
  1310. if (size >= dbk_size) {
  1311. iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
  1312. iram_info->buf_dbk_y_use = dev->iram_paddr +
  1313. iram_info->search_ram_size;
  1314. iram_info->buf_dbk_c_use = iram_info->buf_dbk_y_use +
  1315. dbk_size / 2;
  1316. size -= dbk_size;
  1317. } else {
  1318. goto out;
  1319. }
  1320. bitram_size = round_up(128 * mb_width, 1024);
  1321. if (size >= bitram_size) {
  1322. iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
  1323. iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
  1324. dbk_size / 2;
  1325. size -= bitram_size;
  1326. } else {
  1327. goto out;
  1328. }
  1329. ipacdc_size = round_up(128 * mb_width, 1024);
  1330. if (size >= ipacdc_size) {
  1331. iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
  1332. iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
  1333. bitram_size;
  1334. size -= ipacdc_size;
  1335. }
  1336. /* OVL and BTP disabled for encoder */
  1337. } else if (ctx->inst_type == CODA_INST_DECODER) {
  1338. struct coda_q_data *q_data_dst;
  1339. int mb_height;
  1340. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1341. mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
  1342. mb_height = DIV_ROUND_UP(q_data_dst->height, 16);
  1343. dbk_size = round_up(256 * mb_width, 1024);
  1344. if (size >= dbk_size) {
  1345. iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
  1346. iram_info->buf_dbk_y_use = dev->iram_paddr;
  1347. iram_info->buf_dbk_c_use = dev->iram_paddr +
  1348. dbk_size / 2;
  1349. size -= dbk_size;
  1350. } else {
  1351. goto out;
  1352. }
  1353. bitram_size = round_up(128 * mb_width, 1024);
  1354. if (size >= bitram_size) {
  1355. iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
  1356. iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
  1357. dbk_size / 2;
  1358. size -= bitram_size;
  1359. } else {
  1360. goto out;
  1361. }
  1362. ipacdc_size = round_up(128 * mb_width, 1024);
  1363. if (size >= ipacdc_size) {
  1364. iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
  1365. iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
  1366. bitram_size;
  1367. size -= ipacdc_size;
  1368. } else {
  1369. goto out;
  1370. }
  1371. ovl_size = round_up(80 * mb_width, 1024);
  1372. }
  1373. out:
  1374. switch (dev->devtype->product) {
  1375. case CODA_DX6:
  1376. break;
  1377. case CODA_7541:
  1378. /* i.MX53 uses secondary AXI for IRAM access */
  1379. if (iram_info->axi_sram_use & CODA7_USE_HOST_BIT_ENABLE)
  1380. iram_info->axi_sram_use |= CODA7_USE_BIT_ENABLE;
  1381. if (iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE)
  1382. iram_info->axi_sram_use |= CODA7_USE_IP_ENABLE;
  1383. if (iram_info->axi_sram_use & CODA7_USE_HOST_DBK_ENABLE)
  1384. iram_info->axi_sram_use |= CODA7_USE_DBK_ENABLE;
  1385. if (iram_info->axi_sram_use & CODA7_USE_HOST_OVL_ENABLE)
  1386. iram_info->axi_sram_use |= CODA7_USE_OVL_ENABLE;
  1387. if (iram_info->axi_sram_use & CODA7_USE_HOST_ME_ENABLE)
  1388. iram_info->axi_sram_use |= CODA7_USE_ME_ENABLE;
  1389. }
  1390. if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
  1391. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1392. "IRAM smaller than needed\n");
  1393. if (dev->devtype->product == CODA_7541) {
  1394. /* TODO - Enabling these causes picture errors on CODA7541 */
  1395. if (ctx->inst_type == CODA_INST_DECODER) {
  1396. /* fw 1.4.50 */
  1397. iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
  1398. CODA7_USE_IP_ENABLE);
  1399. } else {
  1400. /* fw 13.4.29 */
  1401. iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
  1402. CODA7_USE_HOST_DBK_ENABLE |
  1403. CODA7_USE_IP_ENABLE |
  1404. CODA7_USE_DBK_ENABLE);
  1405. }
  1406. }
  1407. }
  1408. static void coda_free_context_buffers(struct coda_ctx *ctx)
  1409. {
  1410. struct coda_dev *dev = ctx->dev;
  1411. coda_free_aux_buf(dev, &ctx->slicebuf);
  1412. coda_free_aux_buf(dev, &ctx->psbuf);
  1413. if (dev->devtype->product != CODA_DX6)
  1414. coda_free_aux_buf(dev, &ctx->workbuf);
  1415. }
  1416. static int coda_alloc_context_buffers(struct coda_ctx *ctx,
  1417. struct coda_q_data *q_data)
  1418. {
  1419. struct coda_dev *dev = ctx->dev;
  1420. size_t size;
  1421. int ret;
  1422. switch (dev->devtype->product) {
  1423. case CODA_7541:
  1424. size = CODA7_WORK_BUF_SIZE;
  1425. break;
  1426. default:
  1427. return 0;
  1428. }
  1429. if (ctx->psbuf.vaddr) {
  1430. v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n");
  1431. return -EBUSY;
  1432. }
  1433. if (ctx->slicebuf.vaddr) {
  1434. v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n");
  1435. return -EBUSY;
  1436. }
  1437. if (ctx->workbuf.vaddr) {
  1438. v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
  1439. ret = -EBUSY;
  1440. return -ENOMEM;
  1441. }
  1442. if (q_data->fourcc == V4L2_PIX_FMT_H264) {
  1443. /* worst case slice size */
  1444. size = (DIV_ROUND_UP(q_data->width, 16) *
  1445. DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
  1446. ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size);
  1447. if (ret < 0) {
  1448. v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer",
  1449. ctx->slicebuf.size);
  1450. return ret;
  1451. }
  1452. }
  1453. if (dev->devtype->product == CODA_7541) {
  1454. ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE);
  1455. if (ret < 0) {
  1456. v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer");
  1457. goto err;
  1458. }
  1459. }
  1460. ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size);
  1461. if (ret < 0) {
  1462. v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer",
  1463. ctx->workbuf.size);
  1464. goto err;
  1465. }
  1466. return 0;
  1467. err:
  1468. coda_free_context_buffers(ctx);
  1469. return ret;
  1470. }
  1471. static int coda_start_decoding(struct coda_ctx *ctx)
  1472. {
  1473. struct coda_q_data *q_data_src, *q_data_dst;
  1474. u32 bitstream_buf, bitstream_size;
  1475. struct coda_dev *dev = ctx->dev;
  1476. int width, height;
  1477. u32 src_fourcc;
  1478. u32 val;
  1479. int ret;
  1480. /* Start decoding */
  1481. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1482. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1483. bitstream_buf = ctx->bitstream.paddr;
  1484. bitstream_size = ctx->bitstream.size;
  1485. src_fourcc = q_data_src->fourcc;
  1486. coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
  1487. /* Update coda bitstream read and write pointers from kfifo */
  1488. coda_kfifo_sync_to_device_full(ctx);
  1489. ctx->display_idx = -1;
  1490. ctx->frm_dis_flg = 0;
  1491. coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  1492. coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
  1493. CODA_REG_BIT_BIT_STREAM_PARAM);
  1494. coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
  1495. coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
  1496. val = 0;
  1497. if (dev->devtype->product == CODA_7541)
  1498. val |= CODA_REORDER_ENABLE;
  1499. coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
  1500. ctx->params.codec_mode = ctx->codec->mode;
  1501. ctx->params.codec_mode_aux = 0;
  1502. if (src_fourcc == V4L2_PIX_FMT_H264) {
  1503. if (dev->devtype->product == CODA_7541) {
  1504. coda_write(dev, ctx->psbuf.paddr,
  1505. CODA_CMD_DEC_SEQ_PS_BB_START);
  1506. coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
  1507. CODA_CMD_DEC_SEQ_PS_BB_SIZE);
  1508. }
  1509. }
  1510. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
  1511. v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
  1512. coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
  1513. return -ETIMEDOUT;
  1514. }
  1515. /* Update kfifo out pointer from coda bitstream read pointer */
  1516. coda_kfifo_sync_from_device(ctx);
  1517. coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
  1518. if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
  1519. v4l2_err(&dev->v4l2_dev,
  1520. "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
  1521. coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
  1522. return -EAGAIN;
  1523. }
  1524. val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
  1525. if (dev->devtype->product == CODA_DX6) {
  1526. width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
  1527. height = val & CODADX6_PICHEIGHT_MASK;
  1528. } else {
  1529. width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
  1530. height = val & CODA7_PICHEIGHT_MASK;
  1531. }
  1532. if (width > q_data_dst->width || height > q_data_dst->height) {
  1533. v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
  1534. width, height, q_data_dst->width, q_data_dst->height);
  1535. return -EINVAL;
  1536. }
  1537. width = round_up(width, 16);
  1538. height = round_up(height, 16);
  1539. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
  1540. __func__, ctx->idx, width, height);
  1541. ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED) + 1;
  1542. if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
  1543. v4l2_err(&dev->v4l2_dev,
  1544. "not enough framebuffers to decode (%d < %d)\n",
  1545. CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
  1546. return -EINVAL;
  1547. }
  1548. ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
  1549. if (ret < 0)
  1550. return ret;
  1551. /* Tell the decoder how many frame buffers we allocated. */
  1552. coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
  1553. coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
  1554. if (dev->devtype->product != CODA_DX6) {
  1555. /* Set secondary AXI IRAM */
  1556. coda_setup_iram(ctx);
  1557. coda_write(dev, ctx->iram_info.buf_bit_use,
  1558. CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
  1559. coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
  1560. CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
  1561. coda_write(dev, ctx->iram_info.buf_dbk_y_use,
  1562. CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
  1563. coda_write(dev, ctx->iram_info.buf_dbk_c_use,
  1564. CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
  1565. coda_write(dev, ctx->iram_info.buf_ovl_use,
  1566. CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
  1567. }
  1568. if (src_fourcc == V4L2_PIX_FMT_H264) {
  1569. coda_write(dev, ctx->slicebuf.paddr,
  1570. CODA_CMD_SET_FRAME_SLICE_BB_START);
  1571. coda_write(dev, ctx->slicebuf.size / 1024,
  1572. CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
  1573. }
  1574. if (dev->devtype->product == CODA_7541) {
  1575. int max_mb_x = 1920 / 16;
  1576. int max_mb_y = 1088 / 16;
  1577. int max_mb_num = max_mb_x * max_mb_y;
  1578. coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
  1579. CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
  1580. }
  1581. if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
  1582. v4l2_err(&ctx->dev->v4l2_dev,
  1583. "CODA_COMMAND_SET_FRAME_BUF timeout\n");
  1584. return -ETIMEDOUT;
  1585. }
  1586. return 0;
  1587. }
  1588. static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
  1589. int header_code, u8 *header, int *size)
  1590. {
  1591. struct coda_dev *dev = ctx->dev;
  1592. int ret;
  1593. coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
  1594. CODA_CMD_ENC_HEADER_BB_START);
  1595. coda_write(dev, vb2_plane_size(buf, 0), CODA_CMD_ENC_HEADER_BB_SIZE);
  1596. coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
  1597. ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
  1598. if (ret < 0) {
  1599. v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
  1600. return ret;
  1601. }
  1602. *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
  1603. coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
  1604. memcpy(header, vb2_plane_vaddr(buf, 0), *size);
  1605. return 0;
  1606. }
  1607. static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
  1608. {
  1609. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  1610. struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
  1611. u32 bitstream_buf, bitstream_size;
  1612. struct coda_dev *dev = ctx->dev;
  1613. struct coda_q_data *q_data_src, *q_data_dst;
  1614. struct vb2_buffer *buf;
  1615. u32 dst_fourcc;
  1616. u32 value;
  1617. int ret = 0;
  1618. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  1619. if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
  1620. if (q_data_src->fourcc == V4L2_PIX_FMT_H264) {
  1621. if (coda_get_bitstream_payload(ctx) < 512)
  1622. return -EINVAL;
  1623. } else {
  1624. if (count < 1)
  1625. return -EINVAL;
  1626. }
  1627. ctx->streamon_out = 1;
  1628. if (coda_format_is_yuv(q_data_src->fourcc))
  1629. ctx->inst_type = CODA_INST_ENCODER;
  1630. else
  1631. ctx->inst_type = CODA_INST_DECODER;
  1632. } else {
  1633. if (count < 1)
  1634. return -EINVAL;
  1635. ctx->streamon_cap = 1;
  1636. }
  1637. /* Don't start the coda unless both queues are on */
  1638. if (!(ctx->streamon_out & ctx->streamon_cap))
  1639. return 0;
  1640. /* Allow decoder device_run with no new buffers queued */
  1641. if (ctx->inst_type == CODA_INST_DECODER)
  1642. v4l2_m2m_set_src_buffered(ctx->m2m_ctx, true);
  1643. ctx->gopcounter = ctx->params.gop_size - 1;
  1644. buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  1645. bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
  1646. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  1647. bitstream_size = q_data_dst->sizeimage;
  1648. dst_fourcc = q_data_dst->fourcc;
  1649. ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
  1650. q_data_dst->fourcc);
  1651. if (!ctx->codec) {
  1652. v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
  1653. return -EINVAL;
  1654. }
  1655. /* Allocate per-instance buffers */
  1656. ret = coda_alloc_context_buffers(ctx, q_data_src);
  1657. if (ret < 0)
  1658. return ret;
  1659. if (ctx->inst_type == CODA_INST_DECODER) {
  1660. mutex_lock(&dev->coda_mutex);
  1661. ret = coda_start_decoding(ctx);
  1662. mutex_unlock(&dev->coda_mutex);
  1663. if (ret == -EAGAIN) {
  1664. return 0;
  1665. } else if (ret < 0) {
  1666. return ret;
  1667. } else {
  1668. ctx->initialized = 1;
  1669. return 0;
  1670. }
  1671. }
  1672. if (!coda_is_initialized(dev)) {
  1673. v4l2_err(v4l2_dev, "coda is not initialized.\n");
  1674. return -EFAULT;
  1675. }
  1676. mutex_lock(&dev->coda_mutex);
  1677. coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
  1678. coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
  1679. coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  1680. switch (dev->devtype->product) {
  1681. case CODA_DX6:
  1682. coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
  1683. CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
  1684. break;
  1685. default:
  1686. coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
  1687. CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
  1688. }
  1689. if (dev->devtype->product == CODA_DX6) {
  1690. /* Configure the coda */
  1691. coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
  1692. }
  1693. /* Could set rotation here if needed */
  1694. switch (dev->devtype->product) {
  1695. case CODA_DX6:
  1696. value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
  1697. value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
  1698. break;
  1699. default:
  1700. value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
  1701. value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
  1702. }
  1703. coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
  1704. coda_write(dev, ctx->params.framerate,
  1705. CODA_CMD_ENC_SEQ_SRC_F_RATE);
  1706. ctx->params.codec_mode = ctx->codec->mode;
  1707. switch (dst_fourcc) {
  1708. case V4L2_PIX_FMT_MPEG4:
  1709. coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
  1710. coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
  1711. break;
  1712. case V4L2_PIX_FMT_H264:
  1713. coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
  1714. coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
  1715. break;
  1716. default:
  1717. v4l2_err(v4l2_dev,
  1718. "dst format (0x%08x) invalid.\n", dst_fourcc);
  1719. ret = -EINVAL;
  1720. goto out;
  1721. }
  1722. switch (ctx->params.slice_mode) {
  1723. case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
  1724. value = 0;
  1725. break;
  1726. case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
  1727. value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
  1728. value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
  1729. value |= 1 & CODA_SLICING_MODE_MASK;
  1730. break;
  1731. case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
  1732. value = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
  1733. value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
  1734. value |= 1 & CODA_SLICING_MODE_MASK;
  1735. break;
  1736. }
  1737. coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
  1738. value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
  1739. coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
  1740. if (ctx->params.bitrate) {
  1741. /* Rate control enabled */
  1742. value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
  1743. value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
  1744. } else {
  1745. value = 0;
  1746. }
  1747. coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
  1748. coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
  1749. coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
  1750. coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
  1751. coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
  1752. /* set default gamma */
  1753. value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
  1754. coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
  1755. if (CODA_DEFAULT_GAMMA > 0) {
  1756. if (dev->devtype->product == CODA_DX6)
  1757. value = 1 << CODADX6_OPTION_GAMMA_OFFSET;
  1758. else
  1759. value = 1 << CODA7_OPTION_GAMMA_OFFSET;
  1760. } else {
  1761. value = 0;
  1762. }
  1763. coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
  1764. coda_setup_iram(ctx);
  1765. if (dst_fourcc == V4L2_PIX_FMT_H264) {
  1766. if (dev->devtype->product == CODA_DX6) {
  1767. value = FMO_SLICE_SAVE_BUF_SIZE << 7;
  1768. coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
  1769. } else {
  1770. coda_write(dev, ctx->iram_info.search_ram_paddr,
  1771. CODA7_CMD_ENC_SEQ_SEARCH_BASE);
  1772. coda_write(dev, ctx->iram_info.search_ram_size,
  1773. CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
  1774. }
  1775. }
  1776. ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
  1777. if (ret < 0) {
  1778. v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
  1779. goto out;
  1780. }
  1781. if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
  1782. v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
  1783. ret = -EFAULT;
  1784. goto out;
  1785. }
  1786. ctx->num_internal_frames = 2;
  1787. ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
  1788. if (ret < 0) {
  1789. v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
  1790. goto out;
  1791. }
  1792. coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
  1793. coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
  1794. if (dev->devtype->product == CODA_7541)
  1795. coda_write(dev, round_up(q_data_src->width, 8),
  1796. CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
  1797. if (dev->devtype->product != CODA_DX6) {
  1798. coda_write(dev, ctx->iram_info.buf_bit_use,
  1799. CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
  1800. coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
  1801. CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
  1802. coda_write(dev, ctx->iram_info.buf_dbk_y_use,
  1803. CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
  1804. coda_write(dev, ctx->iram_info.buf_dbk_c_use,
  1805. CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
  1806. coda_write(dev, ctx->iram_info.buf_ovl_use,
  1807. CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
  1808. }
  1809. ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
  1810. if (ret < 0) {
  1811. v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
  1812. goto out;
  1813. }
  1814. /* Save stream headers */
  1815. buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  1816. switch (dst_fourcc) {
  1817. case V4L2_PIX_FMT_H264:
  1818. /*
  1819. * Get SPS in the first frame and copy it to an
  1820. * intermediate buffer.
  1821. */
  1822. ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
  1823. &ctx->vpu_header[0][0],
  1824. &ctx->vpu_header_size[0]);
  1825. if (ret < 0)
  1826. goto out;
  1827. /*
  1828. * Get PPS in the first frame and copy it to an
  1829. * intermediate buffer.
  1830. */
  1831. ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
  1832. &ctx->vpu_header[1][0],
  1833. &ctx->vpu_header_size[1]);
  1834. if (ret < 0)
  1835. goto out;
  1836. /*
  1837. * Length of H.264 headers is variable and thus it might not be
  1838. * aligned for the coda to append the encoded frame. In that is
  1839. * the case a filler NAL must be added to header 2.
  1840. */
  1841. ctx->vpu_header_size[2] = coda_h264_padding(
  1842. (ctx->vpu_header_size[0] +
  1843. ctx->vpu_header_size[1]),
  1844. ctx->vpu_header[2]);
  1845. break;
  1846. case V4L2_PIX_FMT_MPEG4:
  1847. /*
  1848. * Get VOS in the first frame and copy it to an
  1849. * intermediate buffer
  1850. */
  1851. ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
  1852. &ctx->vpu_header[0][0],
  1853. &ctx->vpu_header_size[0]);
  1854. if (ret < 0)
  1855. goto out;
  1856. ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
  1857. &ctx->vpu_header[1][0],
  1858. &ctx->vpu_header_size[1]);
  1859. if (ret < 0)
  1860. goto out;
  1861. ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
  1862. &ctx->vpu_header[2][0],
  1863. &ctx->vpu_header_size[2]);
  1864. if (ret < 0)
  1865. goto out;
  1866. break;
  1867. default:
  1868. /* No more formats need to save headers at the moment */
  1869. break;
  1870. }
  1871. out:
  1872. mutex_unlock(&dev->coda_mutex);
  1873. return ret;
  1874. }
  1875. static int coda_stop_streaming(struct vb2_queue *q)
  1876. {
  1877. struct coda_ctx *ctx = vb2_get_drv_priv(q);
  1878. struct coda_dev *dev = ctx->dev;
  1879. if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
  1880. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1881. "%s: output\n", __func__);
  1882. ctx->streamon_out = 0;
  1883. ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
  1884. ctx->isequence = 0;
  1885. } else {
  1886. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  1887. "%s: capture\n", __func__);
  1888. ctx->streamon_cap = 0;
  1889. ctx->osequence = 0;
  1890. }
  1891. if (!ctx->streamon_out && !ctx->streamon_cap) {
  1892. kfifo_init(&ctx->bitstream_fifo,
  1893. ctx->bitstream.vaddr, ctx->bitstream.size);
  1894. ctx->runcounter = 0;
  1895. }
  1896. return 0;
  1897. }
  1898. static struct vb2_ops coda_qops = {
  1899. .queue_setup = coda_queue_setup,
  1900. .buf_prepare = coda_buf_prepare,
  1901. .buf_queue = coda_buf_queue,
  1902. .wait_prepare = coda_wait_prepare,
  1903. .wait_finish = coda_wait_finish,
  1904. .start_streaming = coda_start_streaming,
  1905. .stop_streaming = coda_stop_streaming,
  1906. };
  1907. static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
  1908. {
  1909. struct coda_ctx *ctx =
  1910. container_of(ctrl->handler, struct coda_ctx, ctrls);
  1911. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1912. "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
  1913. switch (ctrl->id) {
  1914. case V4L2_CID_HFLIP:
  1915. if (ctrl->val)
  1916. ctx->params.rot_mode |= CODA_MIR_HOR;
  1917. else
  1918. ctx->params.rot_mode &= ~CODA_MIR_HOR;
  1919. break;
  1920. case V4L2_CID_VFLIP:
  1921. if (ctrl->val)
  1922. ctx->params.rot_mode |= CODA_MIR_VER;
  1923. else
  1924. ctx->params.rot_mode &= ~CODA_MIR_VER;
  1925. break;
  1926. case V4L2_CID_MPEG_VIDEO_BITRATE:
  1927. ctx->params.bitrate = ctrl->val / 1000;
  1928. break;
  1929. case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
  1930. ctx->params.gop_size = ctrl->val;
  1931. break;
  1932. case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
  1933. ctx->params.h264_intra_qp = ctrl->val;
  1934. break;
  1935. case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
  1936. ctx->params.h264_inter_qp = ctrl->val;
  1937. break;
  1938. case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
  1939. ctx->params.mpeg4_intra_qp = ctrl->val;
  1940. break;
  1941. case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
  1942. ctx->params.mpeg4_inter_qp = ctrl->val;
  1943. break;
  1944. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
  1945. ctx->params.slice_mode = ctrl->val;
  1946. break;
  1947. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
  1948. ctx->params.slice_max_mb = ctrl->val;
  1949. break;
  1950. case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
  1951. ctx->params.slice_max_bits = ctrl->val * 8;
  1952. break;
  1953. case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
  1954. break;
  1955. default:
  1956. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  1957. "Invalid control, id=%d, val=%d\n",
  1958. ctrl->id, ctrl->val);
  1959. return -EINVAL;
  1960. }
  1961. return 0;
  1962. }
  1963. static struct v4l2_ctrl_ops coda_ctrl_ops = {
  1964. .s_ctrl = coda_s_ctrl,
  1965. };
  1966. static int coda_ctrls_setup(struct coda_ctx *ctx)
  1967. {
  1968. v4l2_ctrl_handler_init(&ctx->ctrls, 9);
  1969. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1970. V4L2_CID_HFLIP, 0, 1, 1, 0);
  1971. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1972. V4L2_CID_VFLIP, 0, 1, 1, 0);
  1973. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1974. V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
  1975. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1976. V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
  1977. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1978. V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
  1979. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1980. V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
  1981. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1982. V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
  1983. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1984. V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
  1985. v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
  1986. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
  1987. V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
  1988. V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
  1989. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1990. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
  1991. v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
  1992. V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
  1993. v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
  1994. V4L2_CID_MPEG_VIDEO_HEADER_MODE,
  1995. V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
  1996. (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
  1997. V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
  1998. if (ctx->ctrls.error) {
  1999. v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
  2000. ctx->ctrls.error);
  2001. return -EINVAL;
  2002. }
  2003. return v4l2_ctrl_handler_setup(&ctx->ctrls);
  2004. }
  2005. static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
  2006. struct vb2_queue *dst_vq)
  2007. {
  2008. struct coda_ctx *ctx = priv;
  2009. int ret;
  2010. src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
  2011. src_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
  2012. src_vq->drv_priv = ctx;
  2013. src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  2014. src_vq->ops = &coda_qops;
  2015. src_vq->mem_ops = &vb2_dma_contig_memops;
  2016. src_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  2017. ret = vb2_queue_init(src_vq);
  2018. if (ret)
  2019. return ret;
  2020. dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  2021. dst_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
  2022. dst_vq->drv_priv = ctx;
  2023. dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  2024. dst_vq->ops = &coda_qops;
  2025. dst_vq->mem_ops = &vb2_dma_contig_memops;
  2026. dst_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  2027. return vb2_queue_init(dst_vq);
  2028. }
  2029. static int coda_next_free_instance(struct coda_dev *dev)
  2030. {
  2031. int idx = ffz(dev->instance_mask);
  2032. if ((idx < 0) ||
  2033. (dev->devtype->product == CODA_DX6 && idx > CODADX6_MAX_INSTANCES))
  2034. return -EBUSY;
  2035. return idx;
  2036. }
  2037. static int coda_open(struct file *file)
  2038. {
  2039. struct coda_dev *dev = video_drvdata(file);
  2040. struct coda_ctx *ctx = NULL;
  2041. int ret;
  2042. int idx;
  2043. ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
  2044. if (!ctx)
  2045. return -ENOMEM;
  2046. idx = coda_next_free_instance(dev);
  2047. if (idx < 0) {
  2048. ret = idx;
  2049. goto err_coda_max;
  2050. }
  2051. set_bit(idx, &dev->instance_mask);
  2052. INIT_WORK(&ctx->skip_run, coda_skip_run);
  2053. v4l2_fh_init(&ctx->fh, video_devdata(file));
  2054. file->private_data = &ctx->fh;
  2055. v4l2_fh_add(&ctx->fh);
  2056. ctx->dev = dev;
  2057. ctx->idx = idx;
  2058. switch (dev->devtype->product) {
  2059. case CODA_7541:
  2060. ctx->reg_idx = 0;
  2061. break;
  2062. default:
  2063. ctx->reg_idx = idx;
  2064. }
  2065. ret = clk_prepare_enable(dev->clk_per);
  2066. if (ret)
  2067. goto err_clk_per;
  2068. ret = clk_prepare_enable(dev->clk_ahb);
  2069. if (ret)
  2070. goto err_clk_ahb;
  2071. set_default_params(ctx);
  2072. ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
  2073. &coda_queue_init);
  2074. if (IS_ERR(ctx->m2m_ctx)) {
  2075. ret = PTR_ERR(ctx->m2m_ctx);
  2076. v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
  2077. __func__, ret);
  2078. goto err_ctx_init;
  2079. }
  2080. ret = coda_ctrls_setup(ctx);
  2081. if (ret) {
  2082. v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
  2083. goto err_ctrls_setup;
  2084. }
  2085. ctx->fh.ctrl_handler = &ctx->ctrls;
  2086. ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE);
  2087. if (ret < 0) {
  2088. v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
  2089. goto err_dma_alloc;
  2090. }
  2091. ctx->bitstream.size = CODA_MAX_FRAME_SIZE;
  2092. ctx->bitstream.vaddr = dma_alloc_writecombine(&dev->plat_dev->dev,
  2093. ctx->bitstream.size, &ctx->bitstream.paddr, GFP_KERNEL);
  2094. if (!ctx->bitstream.vaddr) {
  2095. v4l2_err(&dev->v4l2_dev, "failed to allocate bitstream ringbuffer");
  2096. ret = -ENOMEM;
  2097. goto err_dma_writecombine;
  2098. }
  2099. kfifo_init(&ctx->bitstream_fifo,
  2100. ctx->bitstream.vaddr, ctx->bitstream.size);
  2101. mutex_init(&ctx->bitstream_mutex);
  2102. mutex_init(&ctx->buffer_mutex);
  2103. coda_lock(ctx);
  2104. list_add(&ctx->list, &dev->instances);
  2105. coda_unlock(ctx);
  2106. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
  2107. ctx->idx, ctx);
  2108. return 0;
  2109. err_dma_writecombine:
  2110. coda_free_context_buffers(ctx);
  2111. if (ctx->dev->devtype->product == CODA_DX6)
  2112. coda_free_aux_buf(dev, &ctx->workbuf);
  2113. coda_free_aux_buf(dev, &ctx->parabuf);
  2114. err_dma_alloc:
  2115. v4l2_ctrl_handler_free(&ctx->ctrls);
  2116. err_ctrls_setup:
  2117. v4l2_m2m_ctx_release(ctx->m2m_ctx);
  2118. err_ctx_init:
  2119. clk_disable_unprepare(dev->clk_ahb);
  2120. err_clk_ahb:
  2121. clk_disable_unprepare(dev->clk_per);
  2122. err_clk_per:
  2123. v4l2_fh_del(&ctx->fh);
  2124. v4l2_fh_exit(&ctx->fh);
  2125. clear_bit(ctx->idx, &dev->instance_mask);
  2126. err_coda_max:
  2127. kfree(ctx);
  2128. return ret;
  2129. }
  2130. static int coda_release(struct file *file)
  2131. {
  2132. struct coda_dev *dev = video_drvdata(file);
  2133. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  2134. v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
  2135. ctx);
  2136. /* If this instance is running, call .job_abort and wait for it to end */
  2137. v4l2_m2m_ctx_release(ctx->m2m_ctx);
  2138. /* In case the instance was not running, we still need to call SEQ_END */
  2139. mutex_lock(&dev->coda_mutex);
  2140. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2141. "%s: sent command 'SEQ_END' to coda\n", __func__);
  2142. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
  2143. v4l2_err(&dev->v4l2_dev,
  2144. "CODA_COMMAND_SEQ_END failed\n");
  2145. mutex_unlock(&dev->coda_mutex);
  2146. return -ETIMEDOUT;
  2147. }
  2148. mutex_unlock(&dev->coda_mutex);
  2149. coda_free_framebuffers(ctx);
  2150. coda_lock(ctx);
  2151. list_del(&ctx->list);
  2152. coda_unlock(ctx);
  2153. dma_free_writecombine(&dev->plat_dev->dev, ctx->bitstream.size,
  2154. ctx->bitstream.vaddr, ctx->bitstream.paddr);
  2155. coda_free_context_buffers(ctx);
  2156. if (ctx->dev->devtype->product == CODA_DX6)
  2157. coda_free_aux_buf(dev, &ctx->workbuf);
  2158. coda_free_aux_buf(dev, &ctx->parabuf);
  2159. v4l2_ctrl_handler_free(&ctx->ctrls);
  2160. clk_disable_unprepare(dev->clk_ahb);
  2161. clk_disable_unprepare(dev->clk_per);
  2162. v4l2_fh_del(&ctx->fh);
  2163. v4l2_fh_exit(&ctx->fh);
  2164. clear_bit(ctx->idx, &dev->instance_mask);
  2165. kfree(ctx);
  2166. return 0;
  2167. }
  2168. static unsigned int coda_poll(struct file *file,
  2169. struct poll_table_struct *wait)
  2170. {
  2171. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  2172. int ret;
  2173. coda_lock(ctx);
  2174. ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
  2175. coda_unlock(ctx);
  2176. return ret;
  2177. }
  2178. static int coda_mmap(struct file *file, struct vm_area_struct *vma)
  2179. {
  2180. struct coda_ctx *ctx = fh_to_ctx(file->private_data);
  2181. return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
  2182. }
  2183. static const struct v4l2_file_operations coda_fops = {
  2184. .owner = THIS_MODULE,
  2185. .open = coda_open,
  2186. .release = coda_release,
  2187. .poll = coda_poll,
  2188. .unlocked_ioctl = video_ioctl2,
  2189. .mmap = coda_mmap,
  2190. };
  2191. static void coda_finish_decode(struct coda_ctx *ctx)
  2192. {
  2193. struct coda_dev *dev = ctx->dev;
  2194. struct coda_q_data *q_data_src;
  2195. struct coda_q_data *q_data_dst;
  2196. struct vb2_buffer *dst_buf;
  2197. int width, height;
  2198. int decoded_idx;
  2199. int display_idx;
  2200. u32 src_fourcc;
  2201. int success;
  2202. u32 val;
  2203. dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
  2204. /* Update kfifo out pointer from coda bitstream read pointer */
  2205. coda_kfifo_sync_from_device(ctx);
  2206. /*
  2207. * in stream-end mode, the read pointer can overshoot the write pointer
  2208. * by up to 512 bytes
  2209. */
  2210. if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
  2211. if (coda_get_bitstream_payload(ctx) >= 0x100000 - 512)
  2212. kfifo_init(&ctx->bitstream_fifo,
  2213. ctx->bitstream.vaddr, ctx->bitstream.size);
  2214. }
  2215. q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  2216. src_fourcc = q_data_src->fourcc;
  2217. val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
  2218. if (val != 1)
  2219. pr_err("DEC_PIC_SUCCESS = %d\n", val);
  2220. success = val & 0x1;
  2221. if (!success)
  2222. v4l2_err(&dev->v4l2_dev, "decode failed\n");
  2223. if (src_fourcc == V4L2_PIX_FMT_H264) {
  2224. if (val & (1 << 3))
  2225. v4l2_err(&dev->v4l2_dev,
  2226. "insufficient PS buffer space (%d bytes)\n",
  2227. ctx->psbuf.size);
  2228. if (val & (1 << 2))
  2229. v4l2_err(&dev->v4l2_dev,
  2230. "insufficient slice buffer space (%d bytes)\n",
  2231. ctx->slicebuf.size);
  2232. }
  2233. val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
  2234. width = (val >> 16) & 0xffff;
  2235. height = val & 0xffff;
  2236. q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  2237. val = coda_read(dev, CODA_RET_DEC_PIC_TYPE);
  2238. if ((val & 0x7) == 0) {
  2239. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
  2240. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
  2241. } else {
  2242. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
  2243. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  2244. }
  2245. val = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
  2246. if (val > 0)
  2247. v4l2_err(&dev->v4l2_dev,
  2248. "errors in %d macroblocks\n", val);
  2249. if (dev->devtype->product == CODA_7541) {
  2250. val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
  2251. if (val == 0) {
  2252. /* not enough bitstream data */
  2253. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2254. "prescan failed: %d\n", val);
  2255. ctx->prescan_failed = true;
  2256. return;
  2257. }
  2258. }
  2259. ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  2260. /*
  2261. * The previous display frame was copied out by the rotator,
  2262. * now it can be overwritten again
  2263. */
  2264. if (ctx->display_idx >= 0 &&
  2265. ctx->display_idx < ctx->num_internal_frames) {
  2266. ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
  2267. coda_write(dev, ctx->frm_dis_flg,
  2268. CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  2269. }
  2270. /*
  2271. * The index of the last decoded frame, not necessarily in
  2272. * display order, and the index of the next display frame.
  2273. * The latter could have been decoded in a previous run.
  2274. */
  2275. decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
  2276. display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
  2277. if (decoded_idx == -1) {
  2278. /* no frame was decoded, but we might have a display frame */
  2279. if (display_idx < 0 && ctx->display_idx < 0)
  2280. ctx->prescan_failed = true;
  2281. } else if (decoded_idx == -2) {
  2282. /* no frame was decoded, we still return the remaining buffers */
  2283. } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
  2284. v4l2_err(&dev->v4l2_dev,
  2285. "decoded frame index out of range: %d\n", decoded_idx);
  2286. }
  2287. if (display_idx == -1) {
  2288. /*
  2289. * no more frames to be decoded, but there could still
  2290. * be rotator output to dequeue
  2291. */
  2292. ctx->prescan_failed = true;
  2293. } else if (display_idx == -3) {
  2294. /* possibly prescan failure */
  2295. } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
  2296. v4l2_err(&dev->v4l2_dev,
  2297. "presentation frame index out of range: %d\n",
  2298. display_idx);
  2299. }
  2300. /* If a frame was copied out, return it */
  2301. if (ctx->display_idx >= 0 &&
  2302. ctx->display_idx < ctx->num_internal_frames) {
  2303. dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
  2304. dst_buf->v4l2_buf.sequence = ctx->osequence++;
  2305. vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2);
  2306. v4l2_m2m_buf_done(dst_buf, success ? VB2_BUF_STATE_DONE :
  2307. VB2_BUF_STATE_ERROR);
  2308. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2309. "job finished: decoding frame (%d) (%s)\n",
  2310. dst_buf->v4l2_buf.sequence,
  2311. (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
  2312. "KEYFRAME" : "PFRAME");
  2313. } else {
  2314. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2315. "job finished: no frame decoded\n");
  2316. }
  2317. /* The rotator will copy the current display frame next time */
  2318. ctx->display_idx = display_idx;
  2319. }
  2320. static void coda_finish_encode(struct coda_ctx *ctx)
  2321. {
  2322. struct vb2_buffer *src_buf, *dst_buf;
  2323. struct coda_dev *dev = ctx->dev;
  2324. u32 wr_ptr, start_ptr;
  2325. src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
  2326. dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
  2327. /* Get results from the coda */
  2328. start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
  2329. wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
  2330. /* Calculate bytesused field */
  2331. if (dst_buf->v4l2_buf.sequence == 0) {
  2332. vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
  2333. ctx->vpu_header_size[0] +
  2334. ctx->vpu_header_size[1] +
  2335. ctx->vpu_header_size[2]);
  2336. } else {
  2337. vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
  2338. }
  2339. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
  2340. wr_ptr - start_ptr);
  2341. coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
  2342. coda_read(dev, CODA_RET_ENC_PIC_FLAG);
  2343. if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
  2344. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
  2345. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
  2346. } else {
  2347. dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
  2348. dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
  2349. }
  2350. dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
  2351. dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
  2352. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
  2353. v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
  2354. ctx->gopcounter--;
  2355. if (ctx->gopcounter < 0)
  2356. ctx->gopcounter = ctx->params.gop_size - 1;
  2357. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2358. "job finished: encoding frame (%d) (%s)\n",
  2359. dst_buf->v4l2_buf.sequence,
  2360. (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
  2361. "KEYFRAME" : "PFRAME");
  2362. }
  2363. static irqreturn_t coda_irq_handler(int irq, void *data)
  2364. {
  2365. struct coda_dev *dev = data;
  2366. struct coda_ctx *ctx;
  2367. cancel_delayed_work(&dev->timeout);
  2368. /* read status register to attend the IRQ */
  2369. coda_read(dev, CODA_REG_BIT_INT_STATUS);
  2370. coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
  2371. CODA_REG_BIT_INT_CLEAR);
  2372. ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
  2373. if (ctx == NULL) {
  2374. v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
  2375. mutex_unlock(&dev->coda_mutex);
  2376. return IRQ_HANDLED;
  2377. }
  2378. if (ctx->aborting) {
  2379. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  2380. "task has been aborted\n");
  2381. goto out;
  2382. }
  2383. if (coda_isbusy(ctx->dev)) {
  2384. v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
  2385. "coda is still busy!!!!\n");
  2386. return IRQ_NONE;
  2387. }
  2388. if (ctx->inst_type == CODA_INST_DECODER)
  2389. coda_finish_decode(ctx);
  2390. else
  2391. coda_finish_encode(ctx);
  2392. out:
  2393. if (ctx->aborting || (!ctx->streamon_cap && !ctx->streamon_out)) {
  2394. v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
  2395. "%s: sent command 'SEQ_END' to coda\n", __func__);
  2396. if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
  2397. v4l2_err(&dev->v4l2_dev,
  2398. "CODA_COMMAND_SEQ_END failed\n");
  2399. }
  2400. kfifo_init(&ctx->bitstream_fifo,
  2401. ctx->bitstream.vaddr, ctx->bitstream.size);
  2402. coda_free_framebuffers(ctx);
  2403. coda_free_context_buffers(ctx);
  2404. }
  2405. mutex_unlock(&dev->coda_mutex);
  2406. mutex_unlock(&ctx->buffer_mutex);
  2407. v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
  2408. return IRQ_HANDLED;
  2409. }
  2410. static void coda_timeout(struct work_struct *work)
  2411. {
  2412. struct coda_ctx *ctx;
  2413. struct coda_dev *dev = container_of(to_delayed_work(work),
  2414. struct coda_dev, timeout);
  2415. dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout, stopping all streams\n");
  2416. mutex_lock(&dev->dev_mutex);
  2417. list_for_each_entry(ctx, &dev->instances, list) {
  2418. if (mutex_is_locked(&ctx->buffer_mutex))
  2419. mutex_unlock(&ctx->buffer_mutex);
  2420. v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  2421. v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  2422. }
  2423. mutex_unlock(&dev->dev_mutex);
  2424. mutex_unlock(&dev->coda_mutex);
  2425. ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
  2426. v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
  2427. }
  2428. static u32 coda_supported_firmwares[] = {
  2429. CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
  2430. CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
  2431. };
  2432. static bool coda_firmware_supported(u32 vernum)
  2433. {
  2434. int i;
  2435. for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
  2436. if (vernum == coda_supported_firmwares[i])
  2437. return true;
  2438. return false;
  2439. }
  2440. static int coda_hw_init(struct coda_dev *dev)
  2441. {
  2442. u16 product, major, minor, release;
  2443. u32 data;
  2444. u16 *p;
  2445. int i, ret;
  2446. ret = clk_prepare_enable(dev->clk_per);
  2447. if (ret)
  2448. return ret;
  2449. ret = clk_prepare_enable(dev->clk_ahb);
  2450. if (ret)
  2451. goto err_clk_ahb;
  2452. /*
  2453. * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
  2454. * The 16-bit chars in the code buffer are in memory access
  2455. * order, re-sort them to CODA order for register download.
  2456. * Data in this SRAM survives a reboot.
  2457. */
  2458. p = (u16 *)dev->codebuf.vaddr;
  2459. if (dev->devtype->product == CODA_DX6) {
  2460. for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
  2461. data = CODA_DOWN_ADDRESS_SET(i) |
  2462. CODA_DOWN_DATA_SET(p[i ^ 1]);
  2463. coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
  2464. }
  2465. } else {
  2466. for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
  2467. data = CODA_DOWN_ADDRESS_SET(i) |
  2468. CODA_DOWN_DATA_SET(p[round_down(i, 4) +
  2469. 3 - (i % 4)]);
  2470. coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
  2471. }
  2472. }
  2473. /* Clear registers */
  2474. for (i = 0; i < 64; i++)
  2475. coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
  2476. /* Tell the BIT where to find everything it needs */
  2477. if (dev->devtype->product == CODA_7541) {
  2478. coda_write(dev, dev->tempbuf.paddr,
  2479. CODA_REG_BIT_TEMP_BUF_ADDR);
  2480. coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
  2481. } else {
  2482. coda_write(dev, dev->workbuf.paddr,
  2483. CODA_REG_BIT_WORK_BUF_ADDR);
  2484. }
  2485. coda_write(dev, dev->codebuf.paddr,
  2486. CODA_REG_BIT_CODE_BUF_ADDR);
  2487. coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
  2488. /* Set default values */
  2489. switch (dev->devtype->product) {
  2490. case CODA_DX6:
  2491. coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
  2492. break;
  2493. default:
  2494. coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
  2495. }
  2496. coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
  2497. if (dev->devtype->product != CODA_DX6)
  2498. coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
  2499. coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
  2500. CODA_REG_BIT_INT_ENABLE);
  2501. /* Reset VPU and start processor */
  2502. data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
  2503. data |= CODA_REG_RESET_ENABLE;
  2504. coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
  2505. udelay(10);
  2506. data &= ~CODA_REG_RESET_ENABLE;
  2507. coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
  2508. coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
  2509. /* Load firmware */
  2510. coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
  2511. coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  2512. coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
  2513. coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
  2514. coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
  2515. if (coda_wait_timeout(dev)) {
  2516. clk_disable_unprepare(dev->clk_per);
  2517. clk_disable_unprepare(dev->clk_ahb);
  2518. v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
  2519. return -EIO;
  2520. }
  2521. /* Check we are compatible with the loaded firmware */
  2522. data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
  2523. product = CODA_FIRMWARE_PRODUCT(data);
  2524. major = CODA_FIRMWARE_MAJOR(data);
  2525. minor = CODA_FIRMWARE_MINOR(data);
  2526. release = CODA_FIRMWARE_RELEASE(data);
  2527. clk_disable_unprepare(dev->clk_per);
  2528. clk_disable_unprepare(dev->clk_ahb);
  2529. if (product != dev->devtype->product) {
  2530. v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
  2531. " Version: %u.%u.%u\n",
  2532. coda_product_name(dev->devtype->product),
  2533. coda_product_name(product), major, minor, release);
  2534. return -EINVAL;
  2535. }
  2536. v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
  2537. coda_product_name(product));
  2538. if (coda_firmware_supported(data)) {
  2539. v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
  2540. major, minor, release);
  2541. } else {
  2542. v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
  2543. "%u.%u.%u\n", major, minor, release);
  2544. }
  2545. return 0;
  2546. err_clk_ahb:
  2547. clk_disable_unprepare(dev->clk_per);
  2548. return ret;
  2549. }
  2550. static void coda_fw_callback(const struct firmware *fw, void *context)
  2551. {
  2552. struct coda_dev *dev = context;
  2553. struct platform_device *pdev = dev->plat_dev;
  2554. int ret;
  2555. if (!fw) {
  2556. v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
  2557. return;
  2558. }
  2559. /* allocate auxiliary per-device code buffer for the BIT processor */
  2560. ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size);
  2561. if (ret < 0) {
  2562. dev_err(&pdev->dev, "failed to allocate code buffer\n");
  2563. return;
  2564. }
  2565. /* Copy the whole firmware image to the code buffer */
  2566. memcpy(dev->codebuf.vaddr, fw->data, fw->size);
  2567. release_firmware(fw);
  2568. ret = coda_hw_init(dev);
  2569. if (ret) {
  2570. v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
  2571. return;
  2572. }
  2573. dev->vfd.fops = &coda_fops,
  2574. dev->vfd.ioctl_ops = &coda_ioctl_ops;
  2575. dev->vfd.release = video_device_release_empty,
  2576. dev->vfd.lock = &dev->dev_mutex;
  2577. dev->vfd.v4l2_dev = &dev->v4l2_dev;
  2578. dev->vfd.vfl_dir = VFL_DIR_M2M;
  2579. snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
  2580. video_set_drvdata(&dev->vfd, dev);
  2581. dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  2582. if (IS_ERR(dev->alloc_ctx)) {
  2583. v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
  2584. return;
  2585. }
  2586. dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
  2587. if (IS_ERR(dev->m2m_dev)) {
  2588. v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
  2589. goto rel_ctx;
  2590. }
  2591. ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
  2592. if (ret) {
  2593. v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
  2594. goto rel_m2m;
  2595. }
  2596. v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
  2597. dev->vfd.num);
  2598. return;
  2599. rel_m2m:
  2600. v4l2_m2m_release(dev->m2m_dev);
  2601. rel_ctx:
  2602. vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
  2603. }
  2604. static int coda_firmware_request(struct coda_dev *dev)
  2605. {
  2606. char *fw = dev->devtype->firmware;
  2607. dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
  2608. coda_product_name(dev->devtype->product));
  2609. return request_firmware_nowait(THIS_MODULE, true,
  2610. fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
  2611. }
  2612. enum coda_platform {
  2613. CODA_IMX27,
  2614. CODA_IMX53,
  2615. };
  2616. static const struct coda_devtype coda_devdata[] = {
  2617. [CODA_IMX27] = {
  2618. .firmware = "v4l-codadx6-imx27.bin",
  2619. .product = CODA_DX6,
  2620. .codecs = codadx6_codecs,
  2621. .num_codecs = ARRAY_SIZE(codadx6_codecs),
  2622. },
  2623. [CODA_IMX53] = {
  2624. .firmware = "v4l-coda7541-imx53.bin",
  2625. .product = CODA_7541,
  2626. .codecs = coda7_codecs,
  2627. .num_codecs = ARRAY_SIZE(coda7_codecs),
  2628. },
  2629. };
  2630. static struct platform_device_id coda_platform_ids[] = {
  2631. { .name = "coda-imx27", .driver_data = CODA_IMX27 },
  2632. { .name = "coda-imx53", .driver_data = CODA_IMX53 },
  2633. { /* sentinel */ }
  2634. };
  2635. MODULE_DEVICE_TABLE(platform, coda_platform_ids);
  2636. #ifdef CONFIG_OF
  2637. static const struct of_device_id coda_dt_ids[] = {
  2638. { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
  2639. { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
  2640. { /* sentinel */ }
  2641. };
  2642. MODULE_DEVICE_TABLE(of, coda_dt_ids);
  2643. #endif
  2644. static int coda_probe(struct platform_device *pdev)
  2645. {
  2646. const struct of_device_id *of_id =
  2647. of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
  2648. const struct platform_device_id *pdev_id;
  2649. struct coda_platform_data *pdata = pdev->dev.platform_data;
  2650. struct device_node *np = pdev->dev.of_node;
  2651. struct gen_pool *pool;
  2652. struct coda_dev *dev;
  2653. struct resource *res;
  2654. int ret, irq;
  2655. dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
  2656. if (!dev) {
  2657. dev_err(&pdev->dev, "Not enough memory for %s\n",
  2658. CODA_NAME);
  2659. return -ENOMEM;
  2660. }
  2661. spin_lock_init(&dev->irqlock);
  2662. INIT_LIST_HEAD(&dev->instances);
  2663. INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
  2664. dev->plat_dev = pdev;
  2665. dev->clk_per = devm_clk_get(&pdev->dev, "per");
  2666. if (IS_ERR(dev->clk_per)) {
  2667. dev_err(&pdev->dev, "Could not get per clock\n");
  2668. return PTR_ERR(dev->clk_per);
  2669. }
  2670. dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
  2671. if (IS_ERR(dev->clk_ahb)) {
  2672. dev_err(&pdev->dev, "Could not get ahb clock\n");
  2673. return PTR_ERR(dev->clk_ahb);
  2674. }
  2675. /* Get memory for physical registers */
  2676. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  2677. dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
  2678. if (IS_ERR(dev->regs_base))
  2679. return PTR_ERR(dev->regs_base);
  2680. /* IRQ */
  2681. irq = platform_get_irq(pdev, 0);
  2682. if (irq < 0) {
  2683. dev_err(&pdev->dev, "failed to get irq resource\n");
  2684. return -ENOENT;
  2685. }
  2686. if (devm_request_threaded_irq(&pdev->dev, irq, NULL, coda_irq_handler,
  2687. IRQF_ONESHOT, CODA_NAME, dev) < 0) {
  2688. dev_err(&pdev->dev, "failed to request irq\n");
  2689. return -ENOENT;
  2690. }
  2691. /* Get IRAM pool from device tree or platform data */
  2692. pool = of_get_named_gen_pool(np, "iram", 0);
  2693. if (!pool && pdata)
  2694. pool = dev_get_gen_pool(pdata->iram_dev);
  2695. if (!pool) {
  2696. dev_err(&pdev->dev, "iram pool not available\n");
  2697. return -ENOMEM;
  2698. }
  2699. dev->iram_pool = pool;
  2700. ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
  2701. if (ret)
  2702. return ret;
  2703. mutex_init(&dev->dev_mutex);
  2704. mutex_init(&dev->coda_mutex);
  2705. pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
  2706. if (of_id) {
  2707. dev->devtype = of_id->data;
  2708. } else if (pdev_id) {
  2709. dev->devtype = &coda_devdata[pdev_id->driver_data];
  2710. } else {
  2711. v4l2_device_unregister(&dev->v4l2_dev);
  2712. return -EINVAL;
  2713. }
  2714. /* allocate auxiliary per-device buffers for the BIT processor */
  2715. switch (dev->devtype->product) {
  2716. case CODA_DX6:
  2717. ret = coda_alloc_aux_buf(dev, &dev->workbuf,
  2718. CODADX6_WORK_BUF_SIZE);
  2719. if (ret < 0) {
  2720. dev_err(&pdev->dev, "failed to allocate work buffer\n");
  2721. v4l2_device_unregister(&dev->v4l2_dev);
  2722. return ret;
  2723. }
  2724. break;
  2725. case CODA_7541:
  2726. dev->tempbuf.size = CODA7_TEMP_BUF_SIZE;
  2727. break;
  2728. }
  2729. if (dev->tempbuf.size) {
  2730. ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
  2731. dev->tempbuf.size);
  2732. if (ret < 0) {
  2733. dev_err(&pdev->dev, "failed to allocate temp buffer\n");
  2734. v4l2_device_unregister(&dev->v4l2_dev);
  2735. return ret;
  2736. }
  2737. }
  2738. switch (dev->devtype->product) {
  2739. case CODA_DX6:
  2740. dev->iram_size = CODADX6_IRAM_SIZE;
  2741. break;
  2742. case CODA_7541:
  2743. dev->iram_size = CODA7_IRAM_SIZE;
  2744. break;
  2745. }
  2746. dev->iram_vaddr = gen_pool_alloc(dev->iram_pool, dev->iram_size);
  2747. if (!dev->iram_vaddr) {
  2748. dev_err(&pdev->dev, "unable to alloc iram\n");
  2749. return -ENOMEM;
  2750. }
  2751. dev->iram_paddr = gen_pool_virt_to_phys(dev->iram_pool,
  2752. dev->iram_vaddr);
  2753. platform_set_drvdata(pdev, dev);
  2754. return coda_firmware_request(dev);
  2755. }
  2756. static int coda_remove(struct platform_device *pdev)
  2757. {
  2758. struct coda_dev *dev = platform_get_drvdata(pdev);
  2759. video_unregister_device(&dev->vfd);
  2760. if (dev->m2m_dev)
  2761. v4l2_m2m_release(dev->m2m_dev);
  2762. if (dev->alloc_ctx)
  2763. vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
  2764. v4l2_device_unregister(&dev->v4l2_dev);
  2765. if (dev->iram_vaddr)
  2766. gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
  2767. coda_free_aux_buf(dev, &dev->codebuf);
  2768. coda_free_aux_buf(dev, &dev->tempbuf);
  2769. coda_free_aux_buf(dev, &dev->workbuf);
  2770. return 0;
  2771. }
  2772. static struct platform_driver coda_driver = {
  2773. .probe = coda_probe,
  2774. .remove = coda_remove,
  2775. .driver = {
  2776. .name = CODA_NAME,
  2777. .owner = THIS_MODULE,
  2778. .of_match_table = of_match_ptr(coda_dt_ids),
  2779. },
  2780. .id_table = coda_platform_ids,
  2781. };
  2782. module_platform_driver(coda_driver);
  2783. MODULE_LICENSE("GPL");
  2784. MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
  2785. MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");