fsl_devices.h 2.7 KB

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  1. /*
  2. * include/linux/fsl_devices.h
  3. *
  4. * Definitions for any platform device related flags or structures for
  5. * Freescale processor devices
  6. *
  7. * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  8. *
  9. * Copyright 2004 Freescale Semiconductor, Inc
  10. *
  11. * This program is free software; you can redistribute it and/or modify it
  12. * under the terms of the GNU General Public License as published by the
  13. * Free Software Foundation; either version 2 of the License, or (at your
  14. * option) any later version.
  15. */
  16. #ifndef _FSL_DEVICE_H_
  17. #define _FSL_DEVICE_H_
  18. #include <linux/types.h>
  19. /*
  20. * Some conventions on how we handle peripherals on Freescale chips
  21. *
  22. * unique device: a platform_device entry in fsl_plat_devs[] plus
  23. * associated device information in its platform_data structure.
  24. *
  25. * A chip is described by a set of unique devices.
  26. *
  27. * Each sub-arch has its own master list of unique devices and
  28. * enumerates them by enum fsl_devices in a sub-arch specific header
  29. *
  30. * The platform data structure is broken into two parts. The
  31. * first is device specific information that help identify any
  32. * unique features of a peripheral. The second is any
  33. * information that may be defined by the board or how the device
  34. * is connected externally of the chip.
  35. *
  36. * naming conventions:
  37. * - platform data structures: <driver>_platform_data
  38. * - platform data device flags: FSL_<driver>_DEV_<FLAG>
  39. * - platform data board flags: FSL_<driver>_BRD_<FLAG>
  40. *
  41. */
  42. enum fsl_usb2_operating_modes {
  43. FSL_USB2_MPH_HOST,
  44. FSL_USB2_DR_HOST,
  45. FSL_USB2_DR_DEVICE,
  46. FSL_USB2_DR_OTG,
  47. };
  48. enum fsl_usb2_phy_modes {
  49. FSL_USB2_PHY_NONE,
  50. FSL_USB2_PHY_ULPI,
  51. FSL_USB2_PHY_UTMI,
  52. FSL_USB2_PHY_UTMI_WIDE,
  53. FSL_USB2_PHY_SERIAL,
  54. };
  55. struct fsl_usb2_platform_data {
  56. /* board specific information */
  57. enum fsl_usb2_operating_modes operating_mode;
  58. enum fsl_usb2_phy_modes phy_mode;
  59. unsigned int port_enables;
  60. };
  61. /* Flags in fsl_usb2_mph_platform_data */
  62. #define FSL_USB2_PORT0_ENABLED 0x00000001
  63. #define FSL_USB2_PORT1_ENABLED 0x00000002
  64. struct spi_device;
  65. struct fsl_spi_platform_data {
  66. u32 initial_spmode; /* initial SPMODE value */
  67. s16 bus_num;
  68. unsigned int flags;
  69. /* board specific information */
  70. u16 max_chipselect;
  71. void (*cs_control)(struct spi_device *spi, bool on);
  72. u32 sysclk;
  73. };
  74. struct mpc8xx_pcmcia_ops {
  75. void(*hw_ctrl)(int slot, int enable);
  76. int(*voltage_set)(int slot, int vcc, int vpp);
  77. };
  78. /* Returns non-zero if the current suspend operation would
  79. * lead to a deep sleep (i.e. power removed from the core,
  80. * instead of just the clock).
  81. */
  82. #if defined(CONFIG_PPC_83xx) && defined(CONFIG_SUSPEND)
  83. int fsl_deep_sleep(void);
  84. #else
  85. static inline int fsl_deep_sleep(void) { return 0; }
  86. #endif
  87. #endif /* _FSL_DEVICE_H_ */