hpsa.c 109 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/smp_lock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <asm/atomic.h>
  50. #include <linux/kthread.h>
  51. #include "hpsa_cmd.h"
  52. #include "hpsa.h"
  53. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  54. #define HPSA_DRIVER_VERSION "2.0.2-1"
  55. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  56. /* How long to wait (in milliseconds) for board to go into simple mode */
  57. #define MAX_CONFIG_WAIT 30000
  58. #define MAX_IOCTL_CONFIG_WAIT 1000
  59. /*define how many times we will try a command because of bus resets */
  60. #define MAX_CMD_RETRIES 3
  61. /* Embedded module documentation macros - see modules.h */
  62. MODULE_AUTHOR("Hewlett-Packard Company");
  63. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  64. HPSA_DRIVER_VERSION);
  65. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  66. MODULE_VERSION(HPSA_DRIVER_VERSION);
  67. MODULE_LICENSE("GPL");
  68. static int hpsa_allow_any;
  69. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  70. MODULE_PARM_DESC(hpsa_allow_any,
  71. "Allow hpsa driver to access unknown HP Smart Array hardware");
  72. /* define the PCI info for the cards we can control */
  73. static const struct pci_device_id hpsa_pci_device_id[] = {
  74. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  75. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  76. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  87. #define PCI_DEVICE_ID_HP_CISSF 0x333f
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x333F},
  89. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  90. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  91. {0,}
  92. };
  93. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  94. /* board_id = Subsystem Device ID & Vendor ID
  95. * product = Marketing Name for the board
  96. * access = Address of the struct of function pointers
  97. */
  98. static struct board_type products[] = {
  99. {0x3241103C, "Smart Array P212", &SA5_access},
  100. {0x3243103C, "Smart Array P410", &SA5_access},
  101. {0x3245103C, "Smart Array P410i", &SA5_access},
  102. {0x3247103C, "Smart Array P411", &SA5_access},
  103. {0x3249103C, "Smart Array P812", &SA5_access},
  104. {0x324a103C, "Smart Array P712m", &SA5_access},
  105. {0x324b103C, "Smart Array P711m", &SA5_access},
  106. {0x3233103C, "StorageWorks P1210m", &SA5_access},
  107. {0x333F103C, "StorageWorks P1210m", &SA5_access},
  108. {0x3250103C, "Smart Array", &SA5_access},
  109. {0x3250113C, "Smart Array", &SA5_access},
  110. {0x3250123C, "Smart Array", &SA5_access},
  111. {0x3250133C, "Smart Array", &SA5_access},
  112. {0x3250143C, "Smart Array", &SA5_access},
  113. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  114. };
  115. static int number_of_controllers;
  116. static irqreturn_t do_hpsa_intr(int irq, void *dev_id);
  117. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  118. static void start_io(struct ctlr_info *h);
  119. #ifdef CONFIG_COMPAT
  120. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  121. #endif
  122. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  123. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  124. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  125. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  126. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  127. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  128. int cmd_type);
  129. static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
  130. void (*done)(struct scsi_cmnd *));
  131. static void hpsa_scan_start(struct Scsi_Host *);
  132. static int hpsa_scan_finished(struct Scsi_Host *sh,
  133. unsigned long elapsed_time);
  134. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  135. int qdepth, int reason);
  136. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  137. static int hpsa_slave_alloc(struct scsi_device *sdev);
  138. static void hpsa_slave_destroy(struct scsi_device *sdev);
  139. static ssize_t raid_level_show(struct device *dev,
  140. struct device_attribute *attr, char *buf);
  141. static ssize_t lunid_show(struct device *dev,
  142. struct device_attribute *attr, char *buf);
  143. static ssize_t unique_id_show(struct device *dev,
  144. struct device_attribute *attr, char *buf);
  145. static ssize_t host_show_firmware_revision(struct device *dev,
  146. struct device_attribute *attr, char *buf);
  147. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  148. static ssize_t host_store_rescan(struct device *dev,
  149. struct device_attribute *attr, const char *buf, size_t count);
  150. static int check_for_unit_attention(struct ctlr_info *h,
  151. struct CommandList *c);
  152. static void check_ioctl_unit_attention(struct ctlr_info *h,
  153. struct CommandList *c);
  154. /* performant mode helper functions */
  155. static void calc_bucket_map(int *bucket, int num_buckets,
  156. int nsgs, int *bucket_map);
  157. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  158. static inline u32 next_command(struct ctlr_info *h);
  159. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  160. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  161. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  162. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  163. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  164. host_show_firmware_revision, NULL);
  165. static struct device_attribute *hpsa_sdev_attrs[] = {
  166. &dev_attr_raid_level,
  167. &dev_attr_lunid,
  168. &dev_attr_unique_id,
  169. NULL,
  170. };
  171. static struct device_attribute *hpsa_shost_attrs[] = {
  172. &dev_attr_rescan,
  173. &dev_attr_firmware_revision,
  174. NULL,
  175. };
  176. static struct scsi_host_template hpsa_driver_template = {
  177. .module = THIS_MODULE,
  178. .name = "hpsa",
  179. .proc_name = "hpsa",
  180. .queuecommand = hpsa_scsi_queue_command,
  181. .scan_start = hpsa_scan_start,
  182. .scan_finished = hpsa_scan_finished,
  183. .change_queue_depth = hpsa_change_queue_depth,
  184. .this_id = -1,
  185. .use_clustering = ENABLE_CLUSTERING,
  186. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  187. .ioctl = hpsa_ioctl,
  188. .slave_alloc = hpsa_slave_alloc,
  189. .slave_destroy = hpsa_slave_destroy,
  190. #ifdef CONFIG_COMPAT
  191. .compat_ioctl = hpsa_compat_ioctl,
  192. #endif
  193. .sdev_attrs = hpsa_sdev_attrs,
  194. .shost_attrs = hpsa_shost_attrs,
  195. };
  196. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  197. {
  198. unsigned long *priv = shost_priv(sdev->host);
  199. return (struct ctlr_info *) *priv;
  200. }
  201. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  202. {
  203. unsigned long *priv = shost_priv(sh);
  204. return (struct ctlr_info *) *priv;
  205. }
  206. static int check_for_unit_attention(struct ctlr_info *h,
  207. struct CommandList *c)
  208. {
  209. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  210. return 0;
  211. switch (c->err_info->SenseInfo[12]) {
  212. case STATE_CHANGED:
  213. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  214. "detected, command retried\n", h->ctlr);
  215. break;
  216. case LUN_FAILED:
  217. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  218. "detected, action required\n", h->ctlr);
  219. break;
  220. case REPORT_LUNS_CHANGED:
  221. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  222. "changed, action required\n", h->ctlr);
  223. /*
  224. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  225. */
  226. break;
  227. case POWER_OR_RESET:
  228. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  229. "or device reset detected\n", h->ctlr);
  230. break;
  231. case UNIT_ATTENTION_CLEARED:
  232. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  233. "cleared by another initiator\n", h->ctlr);
  234. break;
  235. default:
  236. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  237. "unit attention detected\n", h->ctlr);
  238. break;
  239. }
  240. return 1;
  241. }
  242. static ssize_t host_store_rescan(struct device *dev,
  243. struct device_attribute *attr,
  244. const char *buf, size_t count)
  245. {
  246. struct ctlr_info *h;
  247. struct Scsi_Host *shost = class_to_shost(dev);
  248. h = shost_to_hba(shost);
  249. hpsa_scan_start(h->scsi_host);
  250. return count;
  251. }
  252. static ssize_t host_show_firmware_revision(struct device *dev,
  253. struct device_attribute *attr, char *buf)
  254. {
  255. struct ctlr_info *h;
  256. struct Scsi_Host *shost = class_to_shost(dev);
  257. unsigned char *fwrev;
  258. h = shost_to_hba(shost);
  259. if (!h->hba_inquiry_data)
  260. return 0;
  261. fwrev = &h->hba_inquiry_data[32];
  262. return snprintf(buf, 20, "%c%c%c%c\n",
  263. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  264. }
  265. /* Enqueuing and dequeuing functions for cmdlists. */
  266. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  267. {
  268. hlist_add_head(&c->list, list);
  269. }
  270. static inline u32 next_command(struct ctlr_info *h)
  271. {
  272. u32 a;
  273. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  274. return h->access.command_completed(h);
  275. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  276. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  277. (h->reply_pool_head)++;
  278. h->commands_outstanding--;
  279. } else {
  280. a = FIFO_EMPTY;
  281. }
  282. /* Check for wraparound */
  283. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  284. h->reply_pool_head = h->reply_pool;
  285. h->reply_pool_wraparound ^= 1;
  286. }
  287. return a;
  288. }
  289. /* set_performant_mode: Modify the tag for cciss performant
  290. * set bit 0 for pull model, bits 3-1 for block fetch
  291. * register number
  292. */
  293. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  294. {
  295. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  296. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  297. }
  298. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  299. struct CommandList *c)
  300. {
  301. unsigned long flags;
  302. set_performant_mode(h, c);
  303. spin_lock_irqsave(&h->lock, flags);
  304. addQ(&h->reqQ, c);
  305. h->Qdepth++;
  306. start_io(h);
  307. spin_unlock_irqrestore(&h->lock, flags);
  308. }
  309. static inline void removeQ(struct CommandList *c)
  310. {
  311. if (WARN_ON(hlist_unhashed(&c->list)))
  312. return;
  313. hlist_del_init(&c->list);
  314. }
  315. static inline int is_hba_lunid(unsigned char scsi3addr[])
  316. {
  317. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  318. }
  319. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  320. {
  321. return (scsi3addr[3] & 0xC0) == 0x40;
  322. }
  323. static inline int is_scsi_rev_5(struct ctlr_info *h)
  324. {
  325. if (!h->hba_inquiry_data)
  326. return 0;
  327. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  328. return 1;
  329. return 0;
  330. }
  331. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  332. "UNKNOWN"
  333. };
  334. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  335. static ssize_t raid_level_show(struct device *dev,
  336. struct device_attribute *attr, char *buf)
  337. {
  338. ssize_t l = 0;
  339. unsigned char rlevel;
  340. struct ctlr_info *h;
  341. struct scsi_device *sdev;
  342. struct hpsa_scsi_dev_t *hdev;
  343. unsigned long flags;
  344. sdev = to_scsi_device(dev);
  345. h = sdev_to_hba(sdev);
  346. spin_lock_irqsave(&h->lock, flags);
  347. hdev = sdev->hostdata;
  348. if (!hdev) {
  349. spin_unlock_irqrestore(&h->lock, flags);
  350. return -ENODEV;
  351. }
  352. /* Is this even a logical drive? */
  353. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  354. spin_unlock_irqrestore(&h->lock, flags);
  355. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  356. return l;
  357. }
  358. rlevel = hdev->raid_level;
  359. spin_unlock_irqrestore(&h->lock, flags);
  360. if (rlevel > RAID_UNKNOWN)
  361. rlevel = RAID_UNKNOWN;
  362. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  363. return l;
  364. }
  365. static ssize_t lunid_show(struct device *dev,
  366. struct device_attribute *attr, char *buf)
  367. {
  368. struct ctlr_info *h;
  369. struct scsi_device *sdev;
  370. struct hpsa_scsi_dev_t *hdev;
  371. unsigned long flags;
  372. unsigned char lunid[8];
  373. sdev = to_scsi_device(dev);
  374. h = sdev_to_hba(sdev);
  375. spin_lock_irqsave(&h->lock, flags);
  376. hdev = sdev->hostdata;
  377. if (!hdev) {
  378. spin_unlock_irqrestore(&h->lock, flags);
  379. return -ENODEV;
  380. }
  381. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  382. spin_unlock_irqrestore(&h->lock, flags);
  383. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  384. lunid[0], lunid[1], lunid[2], lunid[3],
  385. lunid[4], lunid[5], lunid[6], lunid[7]);
  386. }
  387. static ssize_t unique_id_show(struct device *dev,
  388. struct device_attribute *attr, char *buf)
  389. {
  390. struct ctlr_info *h;
  391. struct scsi_device *sdev;
  392. struct hpsa_scsi_dev_t *hdev;
  393. unsigned long flags;
  394. unsigned char sn[16];
  395. sdev = to_scsi_device(dev);
  396. h = sdev_to_hba(sdev);
  397. spin_lock_irqsave(&h->lock, flags);
  398. hdev = sdev->hostdata;
  399. if (!hdev) {
  400. spin_unlock_irqrestore(&h->lock, flags);
  401. return -ENODEV;
  402. }
  403. memcpy(sn, hdev->device_id, sizeof(sn));
  404. spin_unlock_irqrestore(&h->lock, flags);
  405. return snprintf(buf, 16 * 2 + 2,
  406. "%02X%02X%02X%02X%02X%02X%02X%02X"
  407. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  408. sn[0], sn[1], sn[2], sn[3],
  409. sn[4], sn[5], sn[6], sn[7],
  410. sn[8], sn[9], sn[10], sn[11],
  411. sn[12], sn[13], sn[14], sn[15]);
  412. }
  413. static int hpsa_find_target_lun(struct ctlr_info *h,
  414. unsigned char scsi3addr[], int bus, int *target, int *lun)
  415. {
  416. /* finds an unused bus, target, lun for a new physical device
  417. * assumes h->devlock is held
  418. */
  419. int i, found = 0;
  420. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  421. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  422. for (i = 0; i < h->ndevices; i++) {
  423. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  424. set_bit(h->dev[i]->target, lun_taken);
  425. }
  426. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  427. if (!test_bit(i, lun_taken)) {
  428. /* *bus = 1; */
  429. *target = i;
  430. *lun = 0;
  431. found = 1;
  432. break;
  433. }
  434. }
  435. return !found;
  436. }
  437. /* Add an entry into h->dev[] array. */
  438. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  439. struct hpsa_scsi_dev_t *device,
  440. struct hpsa_scsi_dev_t *added[], int *nadded)
  441. {
  442. /* assumes h->devlock is held */
  443. int n = h->ndevices;
  444. int i;
  445. unsigned char addr1[8], addr2[8];
  446. struct hpsa_scsi_dev_t *sd;
  447. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  448. dev_err(&h->pdev->dev, "too many devices, some will be "
  449. "inaccessible.\n");
  450. return -1;
  451. }
  452. /* physical devices do not have lun or target assigned until now. */
  453. if (device->lun != -1)
  454. /* Logical device, lun is already assigned. */
  455. goto lun_assigned;
  456. /* If this device a non-zero lun of a multi-lun device
  457. * byte 4 of the 8-byte LUN addr will contain the logical
  458. * unit no, zero otherise.
  459. */
  460. if (device->scsi3addr[4] == 0) {
  461. /* This is not a non-zero lun of a multi-lun device */
  462. if (hpsa_find_target_lun(h, device->scsi3addr,
  463. device->bus, &device->target, &device->lun) != 0)
  464. return -1;
  465. goto lun_assigned;
  466. }
  467. /* This is a non-zero lun of a multi-lun device.
  468. * Search through our list and find the device which
  469. * has the same 8 byte LUN address, excepting byte 4.
  470. * Assign the same bus and target for this new LUN.
  471. * Use the logical unit number from the firmware.
  472. */
  473. memcpy(addr1, device->scsi3addr, 8);
  474. addr1[4] = 0;
  475. for (i = 0; i < n; i++) {
  476. sd = h->dev[i];
  477. memcpy(addr2, sd->scsi3addr, 8);
  478. addr2[4] = 0;
  479. /* differ only in byte 4? */
  480. if (memcmp(addr1, addr2, 8) == 0) {
  481. device->bus = sd->bus;
  482. device->target = sd->target;
  483. device->lun = device->scsi3addr[4];
  484. break;
  485. }
  486. }
  487. if (device->lun == -1) {
  488. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  489. " suspect firmware bug or unsupported hardware "
  490. "configuration.\n");
  491. return -1;
  492. }
  493. lun_assigned:
  494. h->dev[n] = device;
  495. h->ndevices++;
  496. added[*nadded] = device;
  497. (*nadded)++;
  498. /* initially, (before registering with scsi layer) we don't
  499. * know our hostno and we don't want to print anything first
  500. * time anyway (the scsi layer's inquiries will show that info)
  501. */
  502. /* if (hostno != -1) */
  503. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  504. scsi_device_type(device->devtype), hostno,
  505. device->bus, device->target, device->lun);
  506. return 0;
  507. }
  508. /* Replace an entry from h->dev[] array. */
  509. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  510. int entry, struct hpsa_scsi_dev_t *new_entry,
  511. struct hpsa_scsi_dev_t *added[], int *nadded,
  512. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  513. {
  514. /* assumes h->devlock is held */
  515. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  516. removed[*nremoved] = h->dev[entry];
  517. (*nremoved)++;
  518. h->dev[entry] = new_entry;
  519. added[*nadded] = new_entry;
  520. (*nadded)++;
  521. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  522. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  523. new_entry->target, new_entry->lun);
  524. }
  525. /* Remove an entry from h->dev[] array. */
  526. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  527. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  528. {
  529. /* assumes h->devlock is held */
  530. int i;
  531. struct hpsa_scsi_dev_t *sd;
  532. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  533. sd = h->dev[entry];
  534. removed[*nremoved] = h->dev[entry];
  535. (*nremoved)++;
  536. for (i = entry; i < h->ndevices-1; i++)
  537. h->dev[i] = h->dev[i+1];
  538. h->ndevices--;
  539. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  540. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  541. sd->lun);
  542. }
  543. #define SCSI3ADDR_EQ(a, b) ( \
  544. (a)[7] == (b)[7] && \
  545. (a)[6] == (b)[6] && \
  546. (a)[5] == (b)[5] && \
  547. (a)[4] == (b)[4] && \
  548. (a)[3] == (b)[3] && \
  549. (a)[2] == (b)[2] && \
  550. (a)[1] == (b)[1] && \
  551. (a)[0] == (b)[0])
  552. static void fixup_botched_add(struct ctlr_info *h,
  553. struct hpsa_scsi_dev_t *added)
  554. {
  555. /* called when scsi_add_device fails in order to re-adjust
  556. * h->dev[] to match the mid layer's view.
  557. */
  558. unsigned long flags;
  559. int i, j;
  560. spin_lock_irqsave(&h->lock, flags);
  561. for (i = 0; i < h->ndevices; i++) {
  562. if (h->dev[i] == added) {
  563. for (j = i; j < h->ndevices-1; j++)
  564. h->dev[j] = h->dev[j+1];
  565. h->ndevices--;
  566. break;
  567. }
  568. }
  569. spin_unlock_irqrestore(&h->lock, flags);
  570. kfree(added);
  571. }
  572. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  573. struct hpsa_scsi_dev_t *dev2)
  574. {
  575. if ((is_logical_dev_addr_mode(dev1->scsi3addr) ||
  576. (dev1->lun != -1 && dev2->lun != -1)) &&
  577. dev1->devtype != 0x0C)
  578. return (memcmp(dev1, dev2, sizeof(*dev1)) == 0);
  579. /* we compare everything except lun and target as these
  580. * are not yet assigned. Compare parts likely
  581. * to differ first
  582. */
  583. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  584. sizeof(dev1->scsi3addr)) != 0)
  585. return 0;
  586. if (memcmp(dev1->device_id, dev2->device_id,
  587. sizeof(dev1->device_id)) != 0)
  588. return 0;
  589. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  590. return 0;
  591. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  592. return 0;
  593. if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0)
  594. return 0;
  595. if (dev1->devtype != dev2->devtype)
  596. return 0;
  597. if (dev1->raid_level != dev2->raid_level)
  598. return 0;
  599. if (dev1->bus != dev2->bus)
  600. return 0;
  601. return 1;
  602. }
  603. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  604. * and return needle location in *index. If scsi3addr matches, but not
  605. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  606. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  607. */
  608. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  609. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  610. int *index)
  611. {
  612. int i;
  613. #define DEVICE_NOT_FOUND 0
  614. #define DEVICE_CHANGED 1
  615. #define DEVICE_SAME 2
  616. for (i = 0; i < haystack_size; i++) {
  617. if (haystack[i] == NULL) /* previously removed. */
  618. continue;
  619. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  620. *index = i;
  621. if (device_is_the_same(needle, haystack[i]))
  622. return DEVICE_SAME;
  623. else
  624. return DEVICE_CHANGED;
  625. }
  626. }
  627. *index = -1;
  628. return DEVICE_NOT_FOUND;
  629. }
  630. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  631. struct hpsa_scsi_dev_t *sd[], int nsds)
  632. {
  633. /* sd contains scsi3 addresses and devtypes, and inquiry
  634. * data. This function takes what's in sd to be the current
  635. * reality and updates h->dev[] to reflect that reality.
  636. */
  637. int i, entry, device_change, changes = 0;
  638. struct hpsa_scsi_dev_t *csd;
  639. unsigned long flags;
  640. struct hpsa_scsi_dev_t **added, **removed;
  641. int nadded, nremoved;
  642. struct Scsi_Host *sh = NULL;
  643. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  644. GFP_KERNEL);
  645. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  646. GFP_KERNEL);
  647. if (!added || !removed) {
  648. dev_warn(&h->pdev->dev, "out of memory in "
  649. "adjust_hpsa_scsi_table\n");
  650. goto free_and_out;
  651. }
  652. spin_lock_irqsave(&h->devlock, flags);
  653. /* find any devices in h->dev[] that are not in
  654. * sd[] and remove them from h->dev[], and for any
  655. * devices which have changed, remove the old device
  656. * info and add the new device info.
  657. */
  658. i = 0;
  659. nremoved = 0;
  660. nadded = 0;
  661. while (i < h->ndevices) {
  662. csd = h->dev[i];
  663. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  664. if (device_change == DEVICE_NOT_FOUND) {
  665. changes++;
  666. hpsa_scsi_remove_entry(h, hostno, i,
  667. removed, &nremoved);
  668. continue; /* remove ^^^, hence i not incremented */
  669. } else if (device_change == DEVICE_CHANGED) {
  670. changes++;
  671. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  672. added, &nadded, removed, &nremoved);
  673. /* Set it to NULL to prevent it from being freed
  674. * at the bottom of hpsa_update_scsi_devices()
  675. */
  676. sd[entry] = NULL;
  677. }
  678. i++;
  679. }
  680. /* Now, make sure every device listed in sd[] is also
  681. * listed in h->dev[], adding them if they aren't found
  682. */
  683. for (i = 0; i < nsds; i++) {
  684. if (!sd[i]) /* if already added above. */
  685. continue;
  686. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  687. h->ndevices, &entry);
  688. if (device_change == DEVICE_NOT_FOUND) {
  689. changes++;
  690. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  691. added, &nadded) != 0)
  692. break;
  693. sd[i] = NULL; /* prevent from being freed later. */
  694. } else if (device_change == DEVICE_CHANGED) {
  695. /* should never happen... */
  696. changes++;
  697. dev_warn(&h->pdev->dev,
  698. "device unexpectedly changed.\n");
  699. /* but if it does happen, we just ignore that device */
  700. }
  701. }
  702. spin_unlock_irqrestore(&h->devlock, flags);
  703. /* Don't notify scsi mid layer of any changes the first time through
  704. * (or if there are no changes) scsi_scan_host will do it later the
  705. * first time through.
  706. */
  707. if (hostno == -1 || !changes)
  708. goto free_and_out;
  709. sh = h->scsi_host;
  710. /* Notify scsi mid layer of any removed devices */
  711. for (i = 0; i < nremoved; i++) {
  712. struct scsi_device *sdev =
  713. scsi_device_lookup(sh, removed[i]->bus,
  714. removed[i]->target, removed[i]->lun);
  715. if (sdev != NULL) {
  716. scsi_remove_device(sdev);
  717. scsi_device_put(sdev);
  718. } else {
  719. /* We don't expect to get here.
  720. * future cmds to this device will get selection
  721. * timeout as if the device was gone.
  722. */
  723. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  724. " for removal.", hostno, removed[i]->bus,
  725. removed[i]->target, removed[i]->lun);
  726. }
  727. kfree(removed[i]);
  728. removed[i] = NULL;
  729. }
  730. /* Notify scsi mid layer of any added devices */
  731. for (i = 0; i < nadded; i++) {
  732. if (scsi_add_device(sh, added[i]->bus,
  733. added[i]->target, added[i]->lun) == 0)
  734. continue;
  735. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  736. "device not added.\n", hostno, added[i]->bus,
  737. added[i]->target, added[i]->lun);
  738. /* now we have to remove it from h->dev,
  739. * since it didn't get added to scsi mid layer
  740. */
  741. fixup_botched_add(h, added[i]);
  742. }
  743. free_and_out:
  744. kfree(added);
  745. kfree(removed);
  746. }
  747. /*
  748. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  749. * Assume's h->devlock is held.
  750. */
  751. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  752. int bus, int target, int lun)
  753. {
  754. int i;
  755. struct hpsa_scsi_dev_t *sd;
  756. for (i = 0; i < h->ndevices; i++) {
  757. sd = h->dev[i];
  758. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  759. return sd;
  760. }
  761. return NULL;
  762. }
  763. /* link sdev->hostdata to our per-device structure. */
  764. static int hpsa_slave_alloc(struct scsi_device *sdev)
  765. {
  766. struct hpsa_scsi_dev_t *sd;
  767. unsigned long flags;
  768. struct ctlr_info *h;
  769. h = sdev_to_hba(sdev);
  770. spin_lock_irqsave(&h->devlock, flags);
  771. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  772. sdev_id(sdev), sdev->lun);
  773. if (sd != NULL)
  774. sdev->hostdata = sd;
  775. spin_unlock_irqrestore(&h->devlock, flags);
  776. return 0;
  777. }
  778. static void hpsa_slave_destroy(struct scsi_device *sdev)
  779. {
  780. /* nothing to do. */
  781. }
  782. static void hpsa_scsi_setup(struct ctlr_info *h)
  783. {
  784. h->ndevices = 0;
  785. h->scsi_host = NULL;
  786. spin_lock_init(&h->devlock);
  787. }
  788. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  789. {
  790. int i;
  791. if (!h->cmd_sg_list)
  792. return;
  793. for (i = 0; i < h->nr_cmds; i++) {
  794. kfree(h->cmd_sg_list[i]);
  795. h->cmd_sg_list[i] = NULL;
  796. }
  797. kfree(h->cmd_sg_list);
  798. h->cmd_sg_list = NULL;
  799. }
  800. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  801. {
  802. int i;
  803. if (h->chainsize <= 0)
  804. return 0;
  805. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  806. GFP_KERNEL);
  807. if (!h->cmd_sg_list)
  808. return -ENOMEM;
  809. for (i = 0; i < h->nr_cmds; i++) {
  810. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  811. h->chainsize, GFP_KERNEL);
  812. if (!h->cmd_sg_list[i])
  813. goto clean;
  814. }
  815. return 0;
  816. clean:
  817. hpsa_free_sg_chain_blocks(h);
  818. return -ENOMEM;
  819. }
  820. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  821. struct CommandList *c)
  822. {
  823. struct SGDescriptor *chain_sg, *chain_block;
  824. u64 temp64;
  825. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  826. chain_block = h->cmd_sg_list[c->cmdindex];
  827. chain_sg->Ext = HPSA_SG_CHAIN;
  828. chain_sg->Len = sizeof(*chain_sg) *
  829. (c->Header.SGTotal - h->max_cmd_sg_entries);
  830. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  831. PCI_DMA_TODEVICE);
  832. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  833. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  834. }
  835. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  836. struct CommandList *c)
  837. {
  838. struct SGDescriptor *chain_sg;
  839. union u64bit temp64;
  840. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  841. return;
  842. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  843. temp64.val32.lower = chain_sg->Addr.lower;
  844. temp64.val32.upper = chain_sg->Addr.upper;
  845. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  846. }
  847. static void complete_scsi_command(struct CommandList *cp,
  848. int timeout, u32 tag)
  849. {
  850. struct scsi_cmnd *cmd;
  851. struct ctlr_info *h;
  852. struct ErrorInfo *ei;
  853. unsigned char sense_key;
  854. unsigned char asc; /* additional sense code */
  855. unsigned char ascq; /* additional sense code qualifier */
  856. ei = cp->err_info;
  857. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  858. h = cp->h;
  859. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  860. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  861. hpsa_unmap_sg_chain_block(h, cp);
  862. cmd->result = (DID_OK << 16); /* host byte */
  863. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  864. cmd->result |= ei->ScsiStatus;
  865. /* copy the sense data whether we need to or not. */
  866. memcpy(cmd->sense_buffer, ei->SenseInfo,
  867. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  868. SCSI_SENSE_BUFFERSIZE :
  869. ei->SenseLen);
  870. scsi_set_resid(cmd, ei->ResidualCnt);
  871. if (ei->CommandStatus == 0) {
  872. cmd->scsi_done(cmd);
  873. cmd_free(h, cp);
  874. return;
  875. }
  876. /* an error has occurred */
  877. switch (ei->CommandStatus) {
  878. case CMD_TARGET_STATUS:
  879. if (ei->ScsiStatus) {
  880. /* Get sense key */
  881. sense_key = 0xf & ei->SenseInfo[2];
  882. /* Get additional sense code */
  883. asc = ei->SenseInfo[12];
  884. /* Get addition sense code qualifier */
  885. ascq = ei->SenseInfo[13];
  886. }
  887. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  888. if (check_for_unit_attention(h, cp)) {
  889. cmd->result = DID_SOFT_ERROR << 16;
  890. break;
  891. }
  892. if (sense_key == ILLEGAL_REQUEST) {
  893. /*
  894. * SCSI REPORT_LUNS is commonly unsupported on
  895. * Smart Array. Suppress noisy complaint.
  896. */
  897. if (cp->Request.CDB[0] == REPORT_LUNS)
  898. break;
  899. /* If ASC/ASCQ indicate Logical Unit
  900. * Not Supported condition,
  901. */
  902. if ((asc == 0x25) && (ascq == 0x0)) {
  903. dev_warn(&h->pdev->dev, "cp %p "
  904. "has check condition\n", cp);
  905. break;
  906. }
  907. }
  908. if (sense_key == NOT_READY) {
  909. /* If Sense is Not Ready, Logical Unit
  910. * Not ready, Manual Intervention
  911. * required
  912. */
  913. if ((asc == 0x04) && (ascq == 0x03)) {
  914. dev_warn(&h->pdev->dev, "cp %p "
  915. "has check condition: unit "
  916. "not ready, manual "
  917. "intervention required\n", cp);
  918. break;
  919. }
  920. }
  921. if (sense_key == ABORTED_COMMAND) {
  922. /* Aborted command is retryable */
  923. dev_warn(&h->pdev->dev, "cp %p "
  924. "has check condition: aborted command: "
  925. "ASC: 0x%x, ASCQ: 0x%x\n",
  926. cp, asc, ascq);
  927. cmd->result = DID_SOFT_ERROR << 16;
  928. break;
  929. }
  930. /* Must be some other type of check condition */
  931. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  932. "unknown type: "
  933. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  934. "Returning result: 0x%x, "
  935. "cmd=[%02x %02x %02x %02x %02x "
  936. "%02x %02x %02x %02x %02x %02x "
  937. "%02x %02x %02x %02x %02x]\n",
  938. cp, sense_key, asc, ascq,
  939. cmd->result,
  940. cmd->cmnd[0], cmd->cmnd[1],
  941. cmd->cmnd[2], cmd->cmnd[3],
  942. cmd->cmnd[4], cmd->cmnd[5],
  943. cmd->cmnd[6], cmd->cmnd[7],
  944. cmd->cmnd[8], cmd->cmnd[9],
  945. cmd->cmnd[10], cmd->cmnd[11],
  946. cmd->cmnd[12], cmd->cmnd[13],
  947. cmd->cmnd[14], cmd->cmnd[15]);
  948. break;
  949. }
  950. /* Problem was not a check condition
  951. * Pass it up to the upper layers...
  952. */
  953. if (ei->ScsiStatus) {
  954. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  955. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  956. "Returning result: 0x%x\n",
  957. cp, ei->ScsiStatus,
  958. sense_key, asc, ascq,
  959. cmd->result);
  960. } else { /* scsi status is zero??? How??? */
  961. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  962. "Returning no connection.\n", cp),
  963. /* Ordinarily, this case should never happen,
  964. * but there is a bug in some released firmware
  965. * revisions that allows it to happen if, for
  966. * example, a 4100 backplane loses power and
  967. * the tape drive is in it. We assume that
  968. * it's a fatal error of some kind because we
  969. * can't show that it wasn't. We will make it
  970. * look like selection timeout since that is
  971. * the most common reason for this to occur,
  972. * and it's severe enough.
  973. */
  974. cmd->result = DID_NO_CONNECT << 16;
  975. }
  976. break;
  977. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  978. break;
  979. case CMD_DATA_OVERRUN:
  980. dev_warn(&h->pdev->dev, "cp %p has"
  981. " completed with data overrun "
  982. "reported\n", cp);
  983. break;
  984. case CMD_INVALID: {
  985. /* print_bytes(cp, sizeof(*cp), 1, 0);
  986. print_cmd(cp); */
  987. /* We get CMD_INVALID if you address a non-existent device
  988. * instead of a selection timeout (no response). You will
  989. * see this if you yank out a drive, then try to access it.
  990. * This is kind of a shame because it means that any other
  991. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  992. * missing target. */
  993. cmd->result = DID_NO_CONNECT << 16;
  994. }
  995. break;
  996. case CMD_PROTOCOL_ERR:
  997. dev_warn(&h->pdev->dev, "cp %p has "
  998. "protocol error \n", cp);
  999. break;
  1000. case CMD_HARDWARE_ERR:
  1001. cmd->result = DID_ERROR << 16;
  1002. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1003. break;
  1004. case CMD_CONNECTION_LOST:
  1005. cmd->result = DID_ERROR << 16;
  1006. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1007. break;
  1008. case CMD_ABORTED:
  1009. cmd->result = DID_ABORT << 16;
  1010. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1011. cp, ei->ScsiStatus);
  1012. break;
  1013. case CMD_ABORT_FAILED:
  1014. cmd->result = DID_ERROR << 16;
  1015. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1016. break;
  1017. case CMD_UNSOLICITED_ABORT:
  1018. cmd->result = DID_RESET << 16;
  1019. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1020. "abort\n", cp);
  1021. break;
  1022. case CMD_TIMEOUT:
  1023. cmd->result = DID_TIME_OUT << 16;
  1024. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1025. break;
  1026. default:
  1027. cmd->result = DID_ERROR << 16;
  1028. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1029. cp, ei->CommandStatus);
  1030. }
  1031. cmd->scsi_done(cmd);
  1032. cmd_free(h, cp);
  1033. }
  1034. static int hpsa_scsi_detect(struct ctlr_info *h)
  1035. {
  1036. struct Scsi_Host *sh;
  1037. int error;
  1038. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1039. if (sh == NULL)
  1040. goto fail;
  1041. sh->io_port = 0;
  1042. sh->n_io_port = 0;
  1043. sh->this_id = -1;
  1044. sh->max_channel = 3;
  1045. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1046. sh->max_lun = HPSA_MAX_LUN;
  1047. sh->max_id = HPSA_MAX_LUN;
  1048. sh->can_queue = h->nr_cmds;
  1049. sh->cmd_per_lun = h->nr_cmds;
  1050. sh->sg_tablesize = h->maxsgentries;
  1051. h->scsi_host = sh;
  1052. sh->hostdata[0] = (unsigned long) h;
  1053. sh->irq = h->intr[PERF_MODE_INT];
  1054. sh->unique_id = sh->irq;
  1055. error = scsi_add_host(sh, &h->pdev->dev);
  1056. if (error)
  1057. goto fail_host_put;
  1058. scsi_scan_host(sh);
  1059. return 0;
  1060. fail_host_put:
  1061. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1062. " failed for controller %d\n", h->ctlr);
  1063. scsi_host_put(sh);
  1064. return error;
  1065. fail:
  1066. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1067. " failed for controller %d\n", h->ctlr);
  1068. return -ENOMEM;
  1069. }
  1070. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1071. struct CommandList *c, int sg_used, int data_direction)
  1072. {
  1073. int i;
  1074. union u64bit addr64;
  1075. for (i = 0; i < sg_used; i++) {
  1076. addr64.val32.lower = c->SG[i].Addr.lower;
  1077. addr64.val32.upper = c->SG[i].Addr.upper;
  1078. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1079. data_direction);
  1080. }
  1081. }
  1082. static void hpsa_map_one(struct pci_dev *pdev,
  1083. struct CommandList *cp,
  1084. unsigned char *buf,
  1085. size_t buflen,
  1086. int data_direction)
  1087. {
  1088. u64 addr64;
  1089. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1090. cp->Header.SGList = 0;
  1091. cp->Header.SGTotal = 0;
  1092. return;
  1093. }
  1094. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1095. cp->SG[0].Addr.lower =
  1096. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1097. cp->SG[0].Addr.upper =
  1098. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1099. cp->SG[0].Len = buflen;
  1100. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1101. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1102. }
  1103. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1104. struct CommandList *c)
  1105. {
  1106. DECLARE_COMPLETION_ONSTACK(wait);
  1107. c->waiting = &wait;
  1108. enqueue_cmd_and_start_io(h, c);
  1109. wait_for_completion(&wait);
  1110. }
  1111. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1112. struct CommandList *c, int data_direction)
  1113. {
  1114. int retry_count = 0;
  1115. do {
  1116. memset(c->err_info, 0, sizeof(c->err_info));
  1117. hpsa_scsi_do_simple_cmd_core(h, c);
  1118. retry_count++;
  1119. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1120. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1121. }
  1122. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1123. {
  1124. struct ErrorInfo *ei;
  1125. struct device *d = &cp->h->pdev->dev;
  1126. ei = cp->err_info;
  1127. switch (ei->CommandStatus) {
  1128. case CMD_TARGET_STATUS:
  1129. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1130. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1131. ei->ScsiStatus);
  1132. if (ei->ScsiStatus == 0)
  1133. dev_warn(d, "SCSI status is abnormally zero. "
  1134. "(probably indicates selection timeout "
  1135. "reported incorrectly due to a known "
  1136. "firmware bug, circa July, 2001.)\n");
  1137. break;
  1138. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1139. dev_info(d, "UNDERRUN\n");
  1140. break;
  1141. case CMD_DATA_OVERRUN:
  1142. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1143. break;
  1144. case CMD_INVALID: {
  1145. /* controller unfortunately reports SCSI passthru's
  1146. * to non-existent targets as invalid commands.
  1147. */
  1148. dev_warn(d, "cp %p is reported invalid (probably means "
  1149. "target device no longer present)\n", cp);
  1150. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1151. print_cmd(cp); */
  1152. }
  1153. break;
  1154. case CMD_PROTOCOL_ERR:
  1155. dev_warn(d, "cp %p has protocol error \n", cp);
  1156. break;
  1157. case CMD_HARDWARE_ERR:
  1158. /* cmd->result = DID_ERROR << 16; */
  1159. dev_warn(d, "cp %p had hardware error\n", cp);
  1160. break;
  1161. case CMD_CONNECTION_LOST:
  1162. dev_warn(d, "cp %p had connection lost\n", cp);
  1163. break;
  1164. case CMD_ABORTED:
  1165. dev_warn(d, "cp %p was aborted\n", cp);
  1166. break;
  1167. case CMD_ABORT_FAILED:
  1168. dev_warn(d, "cp %p reports abort failed\n", cp);
  1169. break;
  1170. case CMD_UNSOLICITED_ABORT:
  1171. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1172. break;
  1173. case CMD_TIMEOUT:
  1174. dev_warn(d, "cp %p timed out\n", cp);
  1175. break;
  1176. default:
  1177. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1178. ei->CommandStatus);
  1179. }
  1180. }
  1181. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1182. unsigned char page, unsigned char *buf,
  1183. unsigned char bufsize)
  1184. {
  1185. int rc = IO_OK;
  1186. struct CommandList *c;
  1187. struct ErrorInfo *ei;
  1188. c = cmd_special_alloc(h);
  1189. if (c == NULL) { /* trouble... */
  1190. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1191. return -ENOMEM;
  1192. }
  1193. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1194. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1195. ei = c->err_info;
  1196. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1197. hpsa_scsi_interpret_error(c);
  1198. rc = -1;
  1199. }
  1200. cmd_special_free(h, c);
  1201. return rc;
  1202. }
  1203. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1204. {
  1205. int rc = IO_OK;
  1206. struct CommandList *c;
  1207. struct ErrorInfo *ei;
  1208. c = cmd_special_alloc(h);
  1209. if (c == NULL) { /* trouble... */
  1210. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1211. return -ENOMEM;
  1212. }
  1213. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1214. hpsa_scsi_do_simple_cmd_core(h, c);
  1215. /* no unmap needed here because no data xfer. */
  1216. ei = c->err_info;
  1217. if (ei->CommandStatus != 0) {
  1218. hpsa_scsi_interpret_error(c);
  1219. rc = -1;
  1220. }
  1221. cmd_special_free(h, c);
  1222. return rc;
  1223. }
  1224. static void hpsa_get_raid_level(struct ctlr_info *h,
  1225. unsigned char *scsi3addr, unsigned char *raid_level)
  1226. {
  1227. int rc;
  1228. unsigned char *buf;
  1229. *raid_level = RAID_UNKNOWN;
  1230. buf = kzalloc(64, GFP_KERNEL);
  1231. if (!buf)
  1232. return;
  1233. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1234. if (rc == 0)
  1235. *raid_level = buf[8];
  1236. if (*raid_level > RAID_UNKNOWN)
  1237. *raid_level = RAID_UNKNOWN;
  1238. kfree(buf);
  1239. return;
  1240. }
  1241. /* Get the device id from inquiry page 0x83 */
  1242. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1243. unsigned char *device_id, int buflen)
  1244. {
  1245. int rc;
  1246. unsigned char *buf;
  1247. if (buflen > 16)
  1248. buflen = 16;
  1249. buf = kzalloc(64, GFP_KERNEL);
  1250. if (!buf)
  1251. return -1;
  1252. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1253. if (rc == 0)
  1254. memcpy(device_id, &buf[8], buflen);
  1255. kfree(buf);
  1256. return rc != 0;
  1257. }
  1258. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1259. struct ReportLUNdata *buf, int bufsize,
  1260. int extended_response)
  1261. {
  1262. int rc = IO_OK;
  1263. struct CommandList *c;
  1264. unsigned char scsi3addr[8];
  1265. struct ErrorInfo *ei;
  1266. c = cmd_special_alloc(h);
  1267. if (c == NULL) { /* trouble... */
  1268. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1269. return -1;
  1270. }
  1271. /* address the controller */
  1272. memset(scsi3addr, 0, sizeof(scsi3addr));
  1273. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1274. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1275. if (extended_response)
  1276. c->Request.CDB[1] = extended_response;
  1277. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1278. ei = c->err_info;
  1279. if (ei->CommandStatus != 0 &&
  1280. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1281. hpsa_scsi_interpret_error(c);
  1282. rc = -1;
  1283. }
  1284. cmd_special_free(h, c);
  1285. return rc;
  1286. }
  1287. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1288. struct ReportLUNdata *buf,
  1289. int bufsize, int extended_response)
  1290. {
  1291. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1292. }
  1293. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1294. struct ReportLUNdata *buf, int bufsize)
  1295. {
  1296. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1297. }
  1298. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1299. int bus, int target, int lun)
  1300. {
  1301. device->bus = bus;
  1302. device->target = target;
  1303. device->lun = lun;
  1304. }
  1305. static int hpsa_update_device_info(struct ctlr_info *h,
  1306. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1307. {
  1308. #define OBDR_TAPE_INQ_SIZE 49
  1309. unsigned char *inq_buff;
  1310. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1311. if (!inq_buff)
  1312. goto bail_out;
  1313. /* Do an inquiry to the device to see what it is. */
  1314. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1315. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1316. /* Inquiry failed (msg printed already) */
  1317. dev_err(&h->pdev->dev,
  1318. "hpsa_update_device_info: inquiry failed\n");
  1319. goto bail_out;
  1320. }
  1321. this_device->devtype = (inq_buff[0] & 0x1f);
  1322. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1323. memcpy(this_device->vendor, &inq_buff[8],
  1324. sizeof(this_device->vendor));
  1325. memcpy(this_device->model, &inq_buff[16],
  1326. sizeof(this_device->model));
  1327. memcpy(this_device->revision, &inq_buff[32],
  1328. sizeof(this_device->revision));
  1329. memset(this_device->device_id, 0,
  1330. sizeof(this_device->device_id));
  1331. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1332. sizeof(this_device->device_id));
  1333. if (this_device->devtype == TYPE_DISK &&
  1334. is_logical_dev_addr_mode(scsi3addr))
  1335. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1336. else
  1337. this_device->raid_level = RAID_UNKNOWN;
  1338. kfree(inq_buff);
  1339. return 0;
  1340. bail_out:
  1341. kfree(inq_buff);
  1342. return 1;
  1343. }
  1344. static unsigned char *msa2xxx_model[] = {
  1345. "MSA2012",
  1346. "MSA2024",
  1347. "MSA2312",
  1348. "MSA2324",
  1349. NULL,
  1350. };
  1351. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1352. {
  1353. int i;
  1354. for (i = 0; msa2xxx_model[i]; i++)
  1355. if (strncmp(device->model, msa2xxx_model[i],
  1356. strlen(msa2xxx_model[i])) == 0)
  1357. return 1;
  1358. return 0;
  1359. }
  1360. /* Helper function to assign bus, target, lun mapping of devices.
  1361. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1362. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1363. * Logical drive target and lun are assigned at this time, but
  1364. * physical device lun and target assignment are deferred (assigned
  1365. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1366. */
  1367. static void figure_bus_target_lun(struct ctlr_info *h,
  1368. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1369. struct hpsa_scsi_dev_t *device)
  1370. {
  1371. u32 lunid;
  1372. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1373. /* logical device */
  1374. if (unlikely(is_scsi_rev_5(h))) {
  1375. /* p1210m, logical drives lun assignments
  1376. * match SCSI REPORT LUNS data.
  1377. */
  1378. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1379. *bus = 0;
  1380. *target = 0;
  1381. *lun = (lunid & 0x3fff) + 1;
  1382. } else {
  1383. /* not p1210m... */
  1384. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1385. if (is_msa2xxx(h, device)) {
  1386. /* msa2xxx way, put logicals on bus 1
  1387. * and match target/lun numbers box
  1388. * reports.
  1389. */
  1390. *bus = 1;
  1391. *target = (lunid >> 16) & 0x3fff;
  1392. *lun = lunid & 0x00ff;
  1393. } else {
  1394. /* Traditional smart array way. */
  1395. *bus = 0;
  1396. *lun = 0;
  1397. *target = lunid & 0x3fff;
  1398. }
  1399. }
  1400. } else {
  1401. /* physical device */
  1402. if (is_hba_lunid(lunaddrbytes))
  1403. if (unlikely(is_scsi_rev_5(h))) {
  1404. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1405. *target = 0;
  1406. *lun = 0;
  1407. return;
  1408. } else
  1409. *bus = 3; /* traditional smartarray */
  1410. else
  1411. *bus = 2; /* physical disk */
  1412. *target = -1;
  1413. *lun = -1; /* we will fill these in later. */
  1414. }
  1415. }
  1416. /*
  1417. * If there is no lun 0 on a target, linux won't find any devices.
  1418. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1419. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1420. * it for some reason. *tmpdevice is the target we're adding,
  1421. * this_device is a pointer into the current element of currentsd[]
  1422. * that we're building up in update_scsi_devices(), below.
  1423. * lunzerobits is a bitmap that tracks which targets already have a
  1424. * lun 0 assigned.
  1425. * Returns 1 if an enclosure was added, 0 if not.
  1426. */
  1427. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1428. struct hpsa_scsi_dev_t *tmpdevice,
  1429. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1430. int bus, int target, int lun, unsigned long lunzerobits[],
  1431. int *nmsa2xxx_enclosures)
  1432. {
  1433. unsigned char scsi3addr[8];
  1434. if (test_bit(target, lunzerobits))
  1435. return 0; /* There is already a lun 0 on this target. */
  1436. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1437. return 0; /* It's the logical targets that may lack lun 0. */
  1438. if (!is_msa2xxx(h, tmpdevice))
  1439. return 0; /* It's only the MSA2xxx that have this problem. */
  1440. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1441. return 0;
  1442. if (is_hba_lunid(scsi3addr))
  1443. return 0; /* Don't add the RAID controller here. */
  1444. if (is_scsi_rev_5(h))
  1445. return 0; /* p1210m doesn't need to do this. */
  1446. #define MAX_MSA2XXX_ENCLOSURES 32
  1447. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1448. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1449. "enclosures exceeded. Check your hardware "
  1450. "configuration.");
  1451. return 0;
  1452. }
  1453. memset(scsi3addr, 0, 8);
  1454. scsi3addr[3] = target;
  1455. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1456. return 0;
  1457. (*nmsa2xxx_enclosures)++;
  1458. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1459. set_bit(target, lunzerobits);
  1460. return 1;
  1461. }
  1462. /*
  1463. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1464. * logdev. The number of luns in physdev and logdev are returned in
  1465. * *nphysicals and *nlogicals, respectively.
  1466. * Returns 0 on success, -1 otherwise.
  1467. */
  1468. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1469. int reportlunsize,
  1470. struct ReportLUNdata *physdev, u32 *nphysicals,
  1471. struct ReportLUNdata *logdev, u32 *nlogicals)
  1472. {
  1473. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1474. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1475. return -1;
  1476. }
  1477. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1478. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1479. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1480. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1481. *nphysicals - HPSA_MAX_PHYS_LUN);
  1482. *nphysicals = HPSA_MAX_PHYS_LUN;
  1483. }
  1484. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1485. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1486. return -1;
  1487. }
  1488. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1489. /* Reject Logicals in excess of our max capability. */
  1490. if (*nlogicals > HPSA_MAX_LUN) {
  1491. dev_warn(&h->pdev->dev,
  1492. "maximum logical LUNs (%d) exceeded. "
  1493. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1494. *nlogicals - HPSA_MAX_LUN);
  1495. *nlogicals = HPSA_MAX_LUN;
  1496. }
  1497. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1498. dev_warn(&h->pdev->dev,
  1499. "maximum logical + physical LUNs (%d) exceeded. "
  1500. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1501. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1502. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1503. }
  1504. return 0;
  1505. }
  1506. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1507. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1508. struct ReportLUNdata *logdev_list)
  1509. {
  1510. /* Helper function, figure out where the LUN ID info is coming from
  1511. * given index i, lists of physical and logical devices, where in
  1512. * the list the raid controller is supposed to appear (first or last)
  1513. */
  1514. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1515. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1516. if (i == raid_ctlr_position)
  1517. return RAID_CTLR_LUNID;
  1518. if (i < logicals_start)
  1519. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1520. if (i < last_device)
  1521. return &logdev_list->LUN[i - nphysicals -
  1522. (raid_ctlr_position == 0)][0];
  1523. BUG();
  1524. return NULL;
  1525. }
  1526. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1527. {
  1528. /* the idea here is we could get notified
  1529. * that some devices have changed, so we do a report
  1530. * physical luns and report logical luns cmd, and adjust
  1531. * our list of devices accordingly.
  1532. *
  1533. * The scsi3addr's of devices won't change so long as the
  1534. * adapter is not reset. That means we can rescan and
  1535. * tell which devices we already know about, vs. new
  1536. * devices, vs. disappearing devices.
  1537. */
  1538. struct ReportLUNdata *physdev_list = NULL;
  1539. struct ReportLUNdata *logdev_list = NULL;
  1540. unsigned char *inq_buff = NULL;
  1541. u32 nphysicals = 0;
  1542. u32 nlogicals = 0;
  1543. u32 ndev_allocated = 0;
  1544. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1545. int ncurrent = 0;
  1546. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1547. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1548. int bus, target, lun;
  1549. int raid_ctlr_position;
  1550. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1551. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1552. GFP_KERNEL);
  1553. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1554. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1555. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1556. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1557. if (!currentsd || !physdev_list || !logdev_list ||
  1558. !inq_buff || !tmpdevice) {
  1559. dev_err(&h->pdev->dev, "out of memory\n");
  1560. goto out;
  1561. }
  1562. memset(lunzerobits, 0, sizeof(lunzerobits));
  1563. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1564. logdev_list, &nlogicals))
  1565. goto out;
  1566. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1567. * but each of them 4 times through different paths. The plus 1
  1568. * is for the RAID controller.
  1569. */
  1570. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1571. /* Allocate the per device structures */
  1572. for (i = 0; i < ndevs_to_allocate; i++) {
  1573. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1574. if (!currentsd[i]) {
  1575. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1576. __FILE__, __LINE__);
  1577. goto out;
  1578. }
  1579. ndev_allocated++;
  1580. }
  1581. if (unlikely(is_scsi_rev_5(h)))
  1582. raid_ctlr_position = 0;
  1583. else
  1584. raid_ctlr_position = nphysicals + nlogicals;
  1585. /* adjust our table of devices */
  1586. nmsa2xxx_enclosures = 0;
  1587. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1588. u8 *lunaddrbytes;
  1589. /* Figure out where the LUN ID info is coming from */
  1590. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1591. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1592. /* skip masked physical devices. */
  1593. if (lunaddrbytes[3] & 0xC0 &&
  1594. i < nphysicals + (raid_ctlr_position == 0))
  1595. continue;
  1596. /* Get device type, vendor, model, device id */
  1597. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1598. continue; /* skip it if we can't talk to it. */
  1599. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1600. tmpdevice);
  1601. this_device = currentsd[ncurrent];
  1602. /*
  1603. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1604. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1605. * is nonetheless an enclosure device there. We have to
  1606. * present that otherwise linux won't find anything if
  1607. * there is no lun 0.
  1608. */
  1609. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1610. lunaddrbytes, bus, target, lun, lunzerobits,
  1611. &nmsa2xxx_enclosures)) {
  1612. ncurrent++;
  1613. this_device = currentsd[ncurrent];
  1614. }
  1615. *this_device = *tmpdevice;
  1616. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1617. switch (this_device->devtype) {
  1618. case TYPE_ROM: {
  1619. /* We don't *really* support actual CD-ROM devices,
  1620. * just "One Button Disaster Recovery" tape drive
  1621. * which temporarily pretends to be a CD-ROM drive.
  1622. * So we check that the device is really an OBDR tape
  1623. * device by checking for "$DR-10" in bytes 43-48 of
  1624. * the inquiry data.
  1625. */
  1626. char obdr_sig[7];
  1627. #define OBDR_TAPE_SIG "$DR-10"
  1628. strncpy(obdr_sig, &inq_buff[43], 6);
  1629. obdr_sig[6] = '\0';
  1630. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1631. /* Not OBDR device, ignore it. */
  1632. break;
  1633. }
  1634. ncurrent++;
  1635. break;
  1636. case TYPE_DISK:
  1637. if (i < nphysicals)
  1638. break;
  1639. ncurrent++;
  1640. break;
  1641. case TYPE_TAPE:
  1642. case TYPE_MEDIUM_CHANGER:
  1643. ncurrent++;
  1644. break;
  1645. case TYPE_RAID:
  1646. /* Only present the Smartarray HBA as a RAID controller.
  1647. * If it's a RAID controller other than the HBA itself
  1648. * (an external RAID controller, MSA500 or similar)
  1649. * don't present it.
  1650. */
  1651. if (!is_hba_lunid(lunaddrbytes))
  1652. break;
  1653. ncurrent++;
  1654. break;
  1655. default:
  1656. break;
  1657. }
  1658. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1659. break;
  1660. }
  1661. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1662. out:
  1663. kfree(tmpdevice);
  1664. for (i = 0; i < ndev_allocated; i++)
  1665. kfree(currentsd[i]);
  1666. kfree(currentsd);
  1667. kfree(inq_buff);
  1668. kfree(physdev_list);
  1669. kfree(logdev_list);
  1670. }
  1671. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1672. * dma mapping and fills in the scatter gather entries of the
  1673. * hpsa command, cp.
  1674. */
  1675. static int hpsa_scatter_gather(struct ctlr_info *h,
  1676. struct CommandList *cp,
  1677. struct scsi_cmnd *cmd)
  1678. {
  1679. unsigned int len;
  1680. struct scatterlist *sg;
  1681. u64 addr64;
  1682. int use_sg, i, sg_index, chained;
  1683. struct SGDescriptor *curr_sg;
  1684. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1685. use_sg = scsi_dma_map(cmd);
  1686. if (use_sg < 0)
  1687. return use_sg;
  1688. if (!use_sg)
  1689. goto sglist_finished;
  1690. curr_sg = cp->SG;
  1691. chained = 0;
  1692. sg_index = 0;
  1693. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1694. if (i == h->max_cmd_sg_entries - 1 &&
  1695. use_sg > h->max_cmd_sg_entries) {
  1696. chained = 1;
  1697. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1698. sg_index = 0;
  1699. }
  1700. addr64 = (u64) sg_dma_address(sg);
  1701. len = sg_dma_len(sg);
  1702. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1703. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1704. curr_sg->Len = len;
  1705. curr_sg->Ext = 0; /* we are not chaining */
  1706. curr_sg++;
  1707. }
  1708. if (use_sg + chained > h->maxSG)
  1709. h->maxSG = use_sg + chained;
  1710. if (chained) {
  1711. cp->Header.SGList = h->max_cmd_sg_entries;
  1712. cp->Header.SGTotal = (u16) (use_sg + 1);
  1713. hpsa_map_sg_chain_block(h, cp);
  1714. return 0;
  1715. }
  1716. sglist_finished:
  1717. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1718. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1719. return 0;
  1720. }
  1721. static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
  1722. void (*done)(struct scsi_cmnd *))
  1723. {
  1724. struct ctlr_info *h;
  1725. struct hpsa_scsi_dev_t *dev;
  1726. unsigned char scsi3addr[8];
  1727. struct CommandList *c;
  1728. unsigned long flags;
  1729. /* Get the ptr to our adapter structure out of cmd->host. */
  1730. h = sdev_to_hba(cmd->device);
  1731. dev = cmd->device->hostdata;
  1732. if (!dev) {
  1733. cmd->result = DID_NO_CONNECT << 16;
  1734. done(cmd);
  1735. return 0;
  1736. }
  1737. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1738. /* Need a lock as this is being allocated from the pool */
  1739. spin_lock_irqsave(&h->lock, flags);
  1740. c = cmd_alloc(h);
  1741. spin_unlock_irqrestore(&h->lock, flags);
  1742. if (c == NULL) { /* trouble... */
  1743. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1744. return SCSI_MLQUEUE_HOST_BUSY;
  1745. }
  1746. /* Fill in the command list header */
  1747. cmd->scsi_done = done; /* save this for use by completion code */
  1748. /* save c in case we have to abort it */
  1749. cmd->host_scribble = (unsigned char *) c;
  1750. c->cmd_type = CMD_SCSI;
  1751. c->scsi_cmd = cmd;
  1752. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1753. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1754. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1755. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1756. /* Fill in the request block... */
  1757. c->Request.Timeout = 0;
  1758. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1759. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1760. c->Request.CDBLen = cmd->cmd_len;
  1761. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1762. c->Request.Type.Type = TYPE_CMD;
  1763. c->Request.Type.Attribute = ATTR_SIMPLE;
  1764. switch (cmd->sc_data_direction) {
  1765. case DMA_TO_DEVICE:
  1766. c->Request.Type.Direction = XFER_WRITE;
  1767. break;
  1768. case DMA_FROM_DEVICE:
  1769. c->Request.Type.Direction = XFER_READ;
  1770. break;
  1771. case DMA_NONE:
  1772. c->Request.Type.Direction = XFER_NONE;
  1773. break;
  1774. case DMA_BIDIRECTIONAL:
  1775. /* This can happen if a buggy application does a scsi passthru
  1776. * and sets both inlen and outlen to non-zero. ( see
  1777. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1778. */
  1779. c->Request.Type.Direction = XFER_RSVD;
  1780. /* This is technically wrong, and hpsa controllers should
  1781. * reject it with CMD_INVALID, which is the most correct
  1782. * response, but non-fibre backends appear to let it
  1783. * slide by, and give the same results as if this field
  1784. * were set correctly. Either way is acceptable for
  1785. * our purposes here.
  1786. */
  1787. break;
  1788. default:
  1789. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1790. cmd->sc_data_direction);
  1791. BUG();
  1792. break;
  1793. }
  1794. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1795. cmd_free(h, c);
  1796. return SCSI_MLQUEUE_HOST_BUSY;
  1797. }
  1798. enqueue_cmd_and_start_io(h, c);
  1799. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1800. return 0;
  1801. }
  1802. static void hpsa_scan_start(struct Scsi_Host *sh)
  1803. {
  1804. struct ctlr_info *h = shost_to_hba(sh);
  1805. unsigned long flags;
  1806. /* wait until any scan already in progress is finished. */
  1807. while (1) {
  1808. spin_lock_irqsave(&h->scan_lock, flags);
  1809. if (h->scan_finished)
  1810. break;
  1811. spin_unlock_irqrestore(&h->scan_lock, flags);
  1812. wait_event(h->scan_wait_queue, h->scan_finished);
  1813. /* Note: We don't need to worry about a race between this
  1814. * thread and driver unload because the midlayer will
  1815. * have incremented the reference count, so unload won't
  1816. * happen if we're in here.
  1817. */
  1818. }
  1819. h->scan_finished = 0; /* mark scan as in progress */
  1820. spin_unlock_irqrestore(&h->scan_lock, flags);
  1821. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1822. spin_lock_irqsave(&h->scan_lock, flags);
  1823. h->scan_finished = 1; /* mark scan as finished. */
  1824. wake_up_all(&h->scan_wait_queue);
  1825. spin_unlock_irqrestore(&h->scan_lock, flags);
  1826. }
  1827. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1828. unsigned long elapsed_time)
  1829. {
  1830. struct ctlr_info *h = shost_to_hba(sh);
  1831. unsigned long flags;
  1832. int finished;
  1833. spin_lock_irqsave(&h->scan_lock, flags);
  1834. finished = h->scan_finished;
  1835. spin_unlock_irqrestore(&h->scan_lock, flags);
  1836. return finished;
  1837. }
  1838. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1839. int qdepth, int reason)
  1840. {
  1841. struct ctlr_info *h = sdev_to_hba(sdev);
  1842. if (reason != SCSI_QDEPTH_DEFAULT)
  1843. return -ENOTSUPP;
  1844. if (qdepth < 1)
  1845. qdepth = 1;
  1846. else
  1847. if (qdepth > h->nr_cmds)
  1848. qdepth = h->nr_cmds;
  1849. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1850. return sdev->queue_depth;
  1851. }
  1852. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1853. {
  1854. /* we are being forcibly unloaded, and may not refuse. */
  1855. scsi_remove_host(h->scsi_host);
  1856. scsi_host_put(h->scsi_host);
  1857. h->scsi_host = NULL;
  1858. }
  1859. static int hpsa_register_scsi(struct ctlr_info *h)
  1860. {
  1861. int rc;
  1862. rc = hpsa_scsi_detect(h);
  1863. if (rc != 0)
  1864. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1865. " hpsa_scsi_detect(), rc is %d\n", rc);
  1866. return rc;
  1867. }
  1868. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1869. unsigned char lunaddr[])
  1870. {
  1871. int rc = 0;
  1872. int count = 0;
  1873. int waittime = 1; /* seconds */
  1874. struct CommandList *c;
  1875. c = cmd_special_alloc(h);
  1876. if (!c) {
  1877. dev_warn(&h->pdev->dev, "out of memory in "
  1878. "wait_for_device_to_become_ready.\n");
  1879. return IO_ERROR;
  1880. }
  1881. /* Send test unit ready until device ready, or give up. */
  1882. while (count < HPSA_TUR_RETRY_LIMIT) {
  1883. /* Wait for a bit. do this first, because if we send
  1884. * the TUR right away, the reset will just abort it.
  1885. */
  1886. msleep(1000 * waittime);
  1887. count++;
  1888. /* Increase wait time with each try, up to a point. */
  1889. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1890. waittime = waittime * 2;
  1891. /* Send the Test Unit Ready */
  1892. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1893. hpsa_scsi_do_simple_cmd_core(h, c);
  1894. /* no unmap needed here because no data xfer. */
  1895. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1896. break;
  1897. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1898. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1899. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1900. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1901. break;
  1902. dev_warn(&h->pdev->dev, "waiting %d secs "
  1903. "for device to become ready.\n", waittime);
  1904. rc = 1; /* device not ready. */
  1905. }
  1906. if (rc)
  1907. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1908. else
  1909. dev_warn(&h->pdev->dev, "device is ready.\n");
  1910. cmd_special_free(h, c);
  1911. return rc;
  1912. }
  1913. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1914. * complaining. Doing a host- or bus-reset can't do anything good here.
  1915. */
  1916. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1917. {
  1918. int rc;
  1919. struct ctlr_info *h;
  1920. struct hpsa_scsi_dev_t *dev;
  1921. /* find the controller to which the command to be aborted was sent */
  1922. h = sdev_to_hba(scsicmd->device);
  1923. if (h == NULL) /* paranoia */
  1924. return FAILED;
  1925. dev = scsicmd->device->hostdata;
  1926. if (!dev) {
  1927. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1928. "device lookup failed.\n");
  1929. return FAILED;
  1930. }
  1931. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1932. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1933. /* send a reset to the SCSI LUN which the command was sent to */
  1934. rc = hpsa_send_reset(h, dev->scsi3addr);
  1935. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1936. return SUCCESS;
  1937. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1938. return FAILED;
  1939. }
  1940. /*
  1941. * For operations that cannot sleep, a command block is allocated at init,
  1942. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1943. * which ones are free or in use. Lock must be held when calling this.
  1944. * cmd_free() is the complement.
  1945. */
  1946. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1947. {
  1948. struct CommandList *c;
  1949. int i;
  1950. union u64bit temp64;
  1951. dma_addr_t cmd_dma_handle, err_dma_handle;
  1952. do {
  1953. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1954. if (i == h->nr_cmds)
  1955. return NULL;
  1956. } while (test_and_set_bit
  1957. (i & (BITS_PER_LONG - 1),
  1958. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1959. c = h->cmd_pool + i;
  1960. memset(c, 0, sizeof(*c));
  1961. cmd_dma_handle = h->cmd_pool_dhandle
  1962. + i * sizeof(*c);
  1963. c->err_info = h->errinfo_pool + i;
  1964. memset(c->err_info, 0, sizeof(*c->err_info));
  1965. err_dma_handle = h->errinfo_pool_dhandle
  1966. + i * sizeof(*c->err_info);
  1967. h->nr_allocs++;
  1968. c->cmdindex = i;
  1969. INIT_HLIST_NODE(&c->list);
  1970. c->busaddr = (u32) cmd_dma_handle;
  1971. temp64.val = (u64) err_dma_handle;
  1972. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1973. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1974. c->ErrDesc.Len = sizeof(*c->err_info);
  1975. c->h = h;
  1976. return c;
  1977. }
  1978. /* For operations that can wait for kmalloc to possibly sleep,
  1979. * this routine can be called. Lock need not be held to call
  1980. * cmd_special_alloc. cmd_special_free() is the complement.
  1981. */
  1982. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  1983. {
  1984. struct CommandList *c;
  1985. union u64bit temp64;
  1986. dma_addr_t cmd_dma_handle, err_dma_handle;
  1987. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  1988. if (c == NULL)
  1989. return NULL;
  1990. memset(c, 0, sizeof(*c));
  1991. c->cmdindex = -1;
  1992. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  1993. &err_dma_handle);
  1994. if (c->err_info == NULL) {
  1995. pci_free_consistent(h->pdev,
  1996. sizeof(*c), c, cmd_dma_handle);
  1997. return NULL;
  1998. }
  1999. memset(c->err_info, 0, sizeof(*c->err_info));
  2000. INIT_HLIST_NODE(&c->list);
  2001. c->busaddr = (u32) cmd_dma_handle;
  2002. temp64.val = (u64) err_dma_handle;
  2003. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2004. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2005. c->ErrDesc.Len = sizeof(*c->err_info);
  2006. c->h = h;
  2007. return c;
  2008. }
  2009. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2010. {
  2011. int i;
  2012. i = c - h->cmd_pool;
  2013. clear_bit(i & (BITS_PER_LONG - 1),
  2014. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2015. h->nr_frees++;
  2016. }
  2017. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2018. {
  2019. union u64bit temp64;
  2020. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2021. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2022. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2023. c->err_info, (dma_addr_t) temp64.val);
  2024. pci_free_consistent(h->pdev, sizeof(*c),
  2025. c, (dma_addr_t) c->busaddr);
  2026. }
  2027. #ifdef CONFIG_COMPAT
  2028. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2029. {
  2030. IOCTL32_Command_struct __user *arg32 =
  2031. (IOCTL32_Command_struct __user *) arg;
  2032. IOCTL_Command_struct arg64;
  2033. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2034. int err;
  2035. u32 cp;
  2036. err = 0;
  2037. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2038. sizeof(arg64.LUN_info));
  2039. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2040. sizeof(arg64.Request));
  2041. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2042. sizeof(arg64.error_info));
  2043. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2044. err |= get_user(cp, &arg32->buf);
  2045. arg64.buf = compat_ptr(cp);
  2046. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2047. if (err)
  2048. return -EFAULT;
  2049. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2050. if (err)
  2051. return err;
  2052. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2053. sizeof(arg32->error_info));
  2054. if (err)
  2055. return -EFAULT;
  2056. return err;
  2057. }
  2058. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2059. int cmd, void *arg)
  2060. {
  2061. BIG_IOCTL32_Command_struct __user *arg32 =
  2062. (BIG_IOCTL32_Command_struct __user *) arg;
  2063. BIG_IOCTL_Command_struct arg64;
  2064. BIG_IOCTL_Command_struct __user *p =
  2065. compat_alloc_user_space(sizeof(arg64));
  2066. int err;
  2067. u32 cp;
  2068. err = 0;
  2069. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2070. sizeof(arg64.LUN_info));
  2071. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2072. sizeof(arg64.Request));
  2073. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2074. sizeof(arg64.error_info));
  2075. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2076. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2077. err |= get_user(cp, &arg32->buf);
  2078. arg64.buf = compat_ptr(cp);
  2079. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2080. if (err)
  2081. return -EFAULT;
  2082. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2083. if (err)
  2084. return err;
  2085. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2086. sizeof(arg32->error_info));
  2087. if (err)
  2088. return -EFAULT;
  2089. return err;
  2090. }
  2091. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2092. {
  2093. switch (cmd) {
  2094. case CCISS_GETPCIINFO:
  2095. case CCISS_GETINTINFO:
  2096. case CCISS_SETINTINFO:
  2097. case CCISS_GETNODENAME:
  2098. case CCISS_SETNODENAME:
  2099. case CCISS_GETHEARTBEAT:
  2100. case CCISS_GETBUSTYPES:
  2101. case CCISS_GETFIRMVER:
  2102. case CCISS_GETDRIVVER:
  2103. case CCISS_REVALIDVOLS:
  2104. case CCISS_DEREGDISK:
  2105. case CCISS_REGNEWDISK:
  2106. case CCISS_REGNEWD:
  2107. case CCISS_RESCANDISK:
  2108. case CCISS_GETLUNINFO:
  2109. return hpsa_ioctl(dev, cmd, arg);
  2110. case CCISS_PASSTHRU32:
  2111. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2112. case CCISS_BIG_PASSTHRU32:
  2113. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2114. default:
  2115. return -ENOIOCTLCMD;
  2116. }
  2117. }
  2118. #endif
  2119. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2120. {
  2121. struct hpsa_pci_info pciinfo;
  2122. if (!argp)
  2123. return -EINVAL;
  2124. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2125. pciinfo.bus = h->pdev->bus->number;
  2126. pciinfo.dev_fn = h->pdev->devfn;
  2127. pciinfo.board_id = h->board_id;
  2128. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2129. return -EFAULT;
  2130. return 0;
  2131. }
  2132. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2133. {
  2134. DriverVer_type DriverVer;
  2135. unsigned char vmaj, vmin, vsubmin;
  2136. int rc;
  2137. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2138. &vmaj, &vmin, &vsubmin);
  2139. if (rc != 3) {
  2140. dev_info(&h->pdev->dev, "driver version string '%s' "
  2141. "unrecognized.", HPSA_DRIVER_VERSION);
  2142. vmaj = 0;
  2143. vmin = 0;
  2144. vsubmin = 0;
  2145. }
  2146. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2147. if (!argp)
  2148. return -EINVAL;
  2149. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2150. return -EFAULT;
  2151. return 0;
  2152. }
  2153. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2154. {
  2155. IOCTL_Command_struct iocommand;
  2156. struct CommandList *c;
  2157. char *buff = NULL;
  2158. union u64bit temp64;
  2159. if (!argp)
  2160. return -EINVAL;
  2161. if (!capable(CAP_SYS_RAWIO))
  2162. return -EPERM;
  2163. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2164. return -EFAULT;
  2165. if ((iocommand.buf_size < 1) &&
  2166. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2167. return -EINVAL;
  2168. }
  2169. if (iocommand.buf_size > 0) {
  2170. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2171. if (buff == NULL)
  2172. return -EFAULT;
  2173. }
  2174. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2175. /* Copy the data into the buffer we created */
  2176. if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
  2177. kfree(buff);
  2178. return -EFAULT;
  2179. }
  2180. } else
  2181. memset(buff, 0, iocommand.buf_size);
  2182. c = cmd_special_alloc(h);
  2183. if (c == NULL) {
  2184. kfree(buff);
  2185. return -ENOMEM;
  2186. }
  2187. /* Fill in the command type */
  2188. c->cmd_type = CMD_IOCTL_PEND;
  2189. /* Fill in Command Header */
  2190. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2191. if (iocommand.buf_size > 0) { /* buffer to fill */
  2192. c->Header.SGList = 1;
  2193. c->Header.SGTotal = 1;
  2194. } else { /* no buffers to fill */
  2195. c->Header.SGList = 0;
  2196. c->Header.SGTotal = 0;
  2197. }
  2198. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2199. /* use the kernel address the cmd block for tag */
  2200. c->Header.Tag.lower = c->busaddr;
  2201. /* Fill in Request block */
  2202. memcpy(&c->Request, &iocommand.Request,
  2203. sizeof(c->Request));
  2204. /* Fill in the scatter gather information */
  2205. if (iocommand.buf_size > 0) {
  2206. temp64.val = pci_map_single(h->pdev, buff,
  2207. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2208. c->SG[0].Addr.lower = temp64.val32.lower;
  2209. c->SG[0].Addr.upper = temp64.val32.upper;
  2210. c->SG[0].Len = iocommand.buf_size;
  2211. c->SG[0].Ext = 0; /* we are not chaining*/
  2212. }
  2213. hpsa_scsi_do_simple_cmd_core(h, c);
  2214. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2215. check_ioctl_unit_attention(h, c);
  2216. /* Copy the error information out */
  2217. memcpy(&iocommand.error_info, c->err_info,
  2218. sizeof(iocommand.error_info));
  2219. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2220. kfree(buff);
  2221. cmd_special_free(h, c);
  2222. return -EFAULT;
  2223. }
  2224. if (iocommand.Request.Type.Direction == XFER_READ) {
  2225. /* Copy the data out of the buffer we created */
  2226. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2227. kfree(buff);
  2228. cmd_special_free(h, c);
  2229. return -EFAULT;
  2230. }
  2231. }
  2232. kfree(buff);
  2233. cmd_special_free(h, c);
  2234. return 0;
  2235. }
  2236. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2237. {
  2238. BIG_IOCTL_Command_struct *ioc;
  2239. struct CommandList *c;
  2240. unsigned char **buff = NULL;
  2241. int *buff_size = NULL;
  2242. union u64bit temp64;
  2243. BYTE sg_used = 0;
  2244. int status = 0;
  2245. int i;
  2246. u32 left;
  2247. u32 sz;
  2248. BYTE __user *data_ptr;
  2249. if (!argp)
  2250. return -EINVAL;
  2251. if (!capable(CAP_SYS_RAWIO))
  2252. return -EPERM;
  2253. ioc = (BIG_IOCTL_Command_struct *)
  2254. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2255. if (!ioc) {
  2256. status = -ENOMEM;
  2257. goto cleanup1;
  2258. }
  2259. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2260. status = -EFAULT;
  2261. goto cleanup1;
  2262. }
  2263. if ((ioc->buf_size < 1) &&
  2264. (ioc->Request.Type.Direction != XFER_NONE)) {
  2265. status = -EINVAL;
  2266. goto cleanup1;
  2267. }
  2268. /* Check kmalloc limits using all SGs */
  2269. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2270. status = -EINVAL;
  2271. goto cleanup1;
  2272. }
  2273. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2274. status = -EINVAL;
  2275. goto cleanup1;
  2276. }
  2277. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2278. if (!buff) {
  2279. status = -ENOMEM;
  2280. goto cleanup1;
  2281. }
  2282. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2283. if (!buff_size) {
  2284. status = -ENOMEM;
  2285. goto cleanup1;
  2286. }
  2287. left = ioc->buf_size;
  2288. data_ptr = ioc->buf;
  2289. while (left) {
  2290. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2291. buff_size[sg_used] = sz;
  2292. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2293. if (buff[sg_used] == NULL) {
  2294. status = -ENOMEM;
  2295. goto cleanup1;
  2296. }
  2297. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2298. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2299. status = -ENOMEM;
  2300. goto cleanup1;
  2301. }
  2302. } else
  2303. memset(buff[sg_used], 0, sz);
  2304. left -= sz;
  2305. data_ptr += sz;
  2306. sg_used++;
  2307. }
  2308. c = cmd_special_alloc(h);
  2309. if (c == NULL) {
  2310. status = -ENOMEM;
  2311. goto cleanup1;
  2312. }
  2313. c->cmd_type = CMD_IOCTL_PEND;
  2314. c->Header.ReplyQueue = 0;
  2315. if (ioc->buf_size > 0) {
  2316. c->Header.SGList = sg_used;
  2317. c->Header.SGTotal = sg_used;
  2318. } else {
  2319. c->Header.SGList = 0;
  2320. c->Header.SGTotal = 0;
  2321. }
  2322. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2323. c->Header.Tag.lower = c->busaddr;
  2324. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2325. if (ioc->buf_size > 0) {
  2326. int i;
  2327. for (i = 0; i < sg_used; i++) {
  2328. temp64.val = pci_map_single(h->pdev, buff[i],
  2329. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2330. c->SG[i].Addr.lower = temp64.val32.lower;
  2331. c->SG[i].Addr.upper = temp64.val32.upper;
  2332. c->SG[i].Len = buff_size[i];
  2333. /* we are not chaining */
  2334. c->SG[i].Ext = 0;
  2335. }
  2336. }
  2337. hpsa_scsi_do_simple_cmd_core(h, c);
  2338. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2339. check_ioctl_unit_attention(h, c);
  2340. /* Copy the error information out */
  2341. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2342. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2343. cmd_special_free(h, c);
  2344. status = -EFAULT;
  2345. goto cleanup1;
  2346. }
  2347. if (ioc->Request.Type.Direction == XFER_READ) {
  2348. /* Copy the data out of the buffer we created */
  2349. BYTE __user *ptr = ioc->buf;
  2350. for (i = 0; i < sg_used; i++) {
  2351. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2352. cmd_special_free(h, c);
  2353. status = -EFAULT;
  2354. goto cleanup1;
  2355. }
  2356. ptr += buff_size[i];
  2357. }
  2358. }
  2359. cmd_special_free(h, c);
  2360. status = 0;
  2361. cleanup1:
  2362. if (buff) {
  2363. for (i = 0; i < sg_used; i++)
  2364. kfree(buff[i]);
  2365. kfree(buff);
  2366. }
  2367. kfree(buff_size);
  2368. kfree(ioc);
  2369. return status;
  2370. }
  2371. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2372. struct CommandList *c)
  2373. {
  2374. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2375. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2376. (void) check_for_unit_attention(h, c);
  2377. }
  2378. /*
  2379. * ioctl
  2380. */
  2381. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2382. {
  2383. struct ctlr_info *h;
  2384. void __user *argp = (void __user *)arg;
  2385. h = sdev_to_hba(dev);
  2386. switch (cmd) {
  2387. case CCISS_DEREGDISK:
  2388. case CCISS_REGNEWDISK:
  2389. case CCISS_REGNEWD:
  2390. hpsa_scan_start(h->scsi_host);
  2391. return 0;
  2392. case CCISS_GETPCIINFO:
  2393. return hpsa_getpciinfo_ioctl(h, argp);
  2394. case CCISS_GETDRIVVER:
  2395. return hpsa_getdrivver_ioctl(h, argp);
  2396. case CCISS_PASSTHRU:
  2397. return hpsa_passthru_ioctl(h, argp);
  2398. case CCISS_BIG_PASSTHRU:
  2399. return hpsa_big_passthru_ioctl(h, argp);
  2400. default:
  2401. return -ENOTTY;
  2402. }
  2403. }
  2404. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2405. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2406. int cmd_type)
  2407. {
  2408. int pci_dir = XFER_NONE;
  2409. c->cmd_type = CMD_IOCTL_PEND;
  2410. c->Header.ReplyQueue = 0;
  2411. if (buff != NULL && size > 0) {
  2412. c->Header.SGList = 1;
  2413. c->Header.SGTotal = 1;
  2414. } else {
  2415. c->Header.SGList = 0;
  2416. c->Header.SGTotal = 0;
  2417. }
  2418. c->Header.Tag.lower = c->busaddr;
  2419. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2420. c->Request.Type.Type = cmd_type;
  2421. if (cmd_type == TYPE_CMD) {
  2422. switch (cmd) {
  2423. case HPSA_INQUIRY:
  2424. /* are we trying to read a vital product page */
  2425. if (page_code != 0) {
  2426. c->Request.CDB[1] = 0x01;
  2427. c->Request.CDB[2] = page_code;
  2428. }
  2429. c->Request.CDBLen = 6;
  2430. c->Request.Type.Attribute = ATTR_SIMPLE;
  2431. c->Request.Type.Direction = XFER_READ;
  2432. c->Request.Timeout = 0;
  2433. c->Request.CDB[0] = HPSA_INQUIRY;
  2434. c->Request.CDB[4] = size & 0xFF;
  2435. break;
  2436. case HPSA_REPORT_LOG:
  2437. case HPSA_REPORT_PHYS:
  2438. /* Talking to controller so It's a physical command
  2439. mode = 00 target = 0. Nothing to write.
  2440. */
  2441. c->Request.CDBLen = 12;
  2442. c->Request.Type.Attribute = ATTR_SIMPLE;
  2443. c->Request.Type.Direction = XFER_READ;
  2444. c->Request.Timeout = 0;
  2445. c->Request.CDB[0] = cmd;
  2446. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2447. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2448. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2449. c->Request.CDB[9] = size & 0xFF;
  2450. break;
  2451. case HPSA_CACHE_FLUSH:
  2452. c->Request.CDBLen = 12;
  2453. c->Request.Type.Attribute = ATTR_SIMPLE;
  2454. c->Request.Type.Direction = XFER_WRITE;
  2455. c->Request.Timeout = 0;
  2456. c->Request.CDB[0] = BMIC_WRITE;
  2457. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2458. break;
  2459. case TEST_UNIT_READY:
  2460. c->Request.CDBLen = 6;
  2461. c->Request.Type.Attribute = ATTR_SIMPLE;
  2462. c->Request.Type.Direction = XFER_NONE;
  2463. c->Request.Timeout = 0;
  2464. break;
  2465. default:
  2466. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2467. BUG();
  2468. return;
  2469. }
  2470. } else if (cmd_type == TYPE_MSG) {
  2471. switch (cmd) {
  2472. case HPSA_DEVICE_RESET_MSG:
  2473. c->Request.CDBLen = 16;
  2474. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2475. c->Request.Type.Attribute = ATTR_SIMPLE;
  2476. c->Request.Type.Direction = XFER_NONE;
  2477. c->Request.Timeout = 0; /* Don't time out */
  2478. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2479. c->Request.CDB[1] = 0x03; /* Reset target above */
  2480. /* If bytes 4-7 are zero, it means reset the */
  2481. /* LunID device */
  2482. c->Request.CDB[4] = 0x00;
  2483. c->Request.CDB[5] = 0x00;
  2484. c->Request.CDB[6] = 0x00;
  2485. c->Request.CDB[7] = 0x00;
  2486. break;
  2487. default:
  2488. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2489. cmd);
  2490. BUG();
  2491. }
  2492. } else {
  2493. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2494. BUG();
  2495. }
  2496. switch (c->Request.Type.Direction) {
  2497. case XFER_READ:
  2498. pci_dir = PCI_DMA_FROMDEVICE;
  2499. break;
  2500. case XFER_WRITE:
  2501. pci_dir = PCI_DMA_TODEVICE;
  2502. break;
  2503. case XFER_NONE:
  2504. pci_dir = PCI_DMA_NONE;
  2505. break;
  2506. default:
  2507. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2508. }
  2509. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2510. return;
  2511. }
  2512. /*
  2513. * Map (physical) PCI mem into (virtual) kernel space
  2514. */
  2515. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2516. {
  2517. ulong page_base = ((ulong) base) & PAGE_MASK;
  2518. ulong page_offs = ((ulong) base) - page_base;
  2519. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2520. return page_remapped ? (page_remapped + page_offs) : NULL;
  2521. }
  2522. /* Takes cmds off the submission queue and sends them to the hardware,
  2523. * then puts them on the queue of cmds waiting for completion.
  2524. */
  2525. static void start_io(struct ctlr_info *h)
  2526. {
  2527. struct CommandList *c;
  2528. while (!hlist_empty(&h->reqQ)) {
  2529. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2530. /* can't do anything if fifo is full */
  2531. if ((h->access.fifo_full(h))) {
  2532. dev_warn(&h->pdev->dev, "fifo full\n");
  2533. break;
  2534. }
  2535. /* Get the first entry from the Request Q */
  2536. removeQ(c);
  2537. h->Qdepth--;
  2538. /* Tell the controller execute command */
  2539. h->access.submit_command(h, c);
  2540. /* Put job onto the completed Q */
  2541. addQ(&h->cmpQ, c);
  2542. }
  2543. }
  2544. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2545. {
  2546. return h->access.command_completed(h);
  2547. }
  2548. static inline bool interrupt_pending(struct ctlr_info *h)
  2549. {
  2550. return h->access.intr_pending(h);
  2551. }
  2552. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2553. {
  2554. return !(h->msi_vector || h->msix_vector) &&
  2555. ((h->access.intr_pending(h) == 0) ||
  2556. (h->interrupts_enabled == 0));
  2557. }
  2558. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2559. u32 raw_tag)
  2560. {
  2561. if (unlikely(tag_index >= h->nr_cmds)) {
  2562. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2563. return 1;
  2564. }
  2565. return 0;
  2566. }
  2567. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2568. {
  2569. removeQ(c);
  2570. if (likely(c->cmd_type == CMD_SCSI))
  2571. complete_scsi_command(c, 0, raw_tag);
  2572. else if (c->cmd_type == CMD_IOCTL_PEND)
  2573. complete(c->waiting);
  2574. }
  2575. static inline u32 hpsa_tag_contains_index(u32 tag)
  2576. {
  2577. #define DIRECT_LOOKUP_BIT 0x10
  2578. return tag & DIRECT_LOOKUP_BIT;
  2579. }
  2580. static inline u32 hpsa_tag_to_index(u32 tag)
  2581. {
  2582. #define DIRECT_LOOKUP_SHIFT 5
  2583. return tag >> DIRECT_LOOKUP_SHIFT;
  2584. }
  2585. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2586. {
  2587. #define HPSA_ERROR_BITS 0x03
  2588. return tag & ~HPSA_ERROR_BITS;
  2589. }
  2590. /* process completion of an indexed ("direct lookup") command */
  2591. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2592. u32 raw_tag)
  2593. {
  2594. u32 tag_index;
  2595. struct CommandList *c;
  2596. tag_index = hpsa_tag_to_index(raw_tag);
  2597. if (bad_tag(h, tag_index, raw_tag))
  2598. return next_command(h);
  2599. c = h->cmd_pool + tag_index;
  2600. finish_cmd(c, raw_tag);
  2601. return next_command(h);
  2602. }
  2603. /* process completion of a non-indexed command */
  2604. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2605. u32 raw_tag)
  2606. {
  2607. u32 tag;
  2608. struct CommandList *c = NULL;
  2609. struct hlist_node *tmp;
  2610. tag = hpsa_tag_discard_error_bits(raw_tag);
  2611. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2612. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2613. finish_cmd(c, raw_tag);
  2614. return next_command(h);
  2615. }
  2616. }
  2617. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2618. return next_command(h);
  2619. }
  2620. static irqreturn_t do_hpsa_intr(int irq, void *dev_id)
  2621. {
  2622. struct ctlr_info *h = dev_id;
  2623. unsigned long flags;
  2624. u32 raw_tag;
  2625. if (interrupt_not_for_us(h))
  2626. return IRQ_NONE;
  2627. spin_lock_irqsave(&h->lock, flags);
  2628. raw_tag = get_next_completion(h);
  2629. while (raw_tag != FIFO_EMPTY) {
  2630. if (hpsa_tag_contains_index(raw_tag))
  2631. raw_tag = process_indexed_cmd(h, raw_tag);
  2632. else
  2633. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2634. }
  2635. spin_unlock_irqrestore(&h->lock, flags);
  2636. return IRQ_HANDLED;
  2637. }
  2638. /* Send a message CDB to the firmware. */
  2639. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2640. unsigned char type)
  2641. {
  2642. struct Command {
  2643. struct CommandListHeader CommandHeader;
  2644. struct RequestBlock Request;
  2645. struct ErrDescriptor ErrorDescriptor;
  2646. };
  2647. struct Command *cmd;
  2648. static const size_t cmd_sz = sizeof(*cmd) +
  2649. sizeof(cmd->ErrorDescriptor);
  2650. dma_addr_t paddr64;
  2651. uint32_t paddr32, tag;
  2652. void __iomem *vaddr;
  2653. int i, err;
  2654. vaddr = pci_ioremap_bar(pdev, 0);
  2655. if (vaddr == NULL)
  2656. return -ENOMEM;
  2657. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2658. * CCISS commands, so they must be allocated from the lower 4GiB of
  2659. * memory.
  2660. */
  2661. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2662. if (err) {
  2663. iounmap(vaddr);
  2664. return -ENOMEM;
  2665. }
  2666. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2667. if (cmd == NULL) {
  2668. iounmap(vaddr);
  2669. return -ENOMEM;
  2670. }
  2671. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2672. * although there's no guarantee, we assume that the address is at
  2673. * least 4-byte aligned (most likely, it's page-aligned).
  2674. */
  2675. paddr32 = paddr64;
  2676. cmd->CommandHeader.ReplyQueue = 0;
  2677. cmd->CommandHeader.SGList = 0;
  2678. cmd->CommandHeader.SGTotal = 0;
  2679. cmd->CommandHeader.Tag.lower = paddr32;
  2680. cmd->CommandHeader.Tag.upper = 0;
  2681. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2682. cmd->Request.CDBLen = 16;
  2683. cmd->Request.Type.Type = TYPE_MSG;
  2684. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2685. cmd->Request.Type.Direction = XFER_NONE;
  2686. cmd->Request.Timeout = 0; /* Don't time out */
  2687. cmd->Request.CDB[0] = opcode;
  2688. cmd->Request.CDB[1] = type;
  2689. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2690. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2691. cmd->ErrorDescriptor.Addr.upper = 0;
  2692. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2693. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2694. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2695. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2696. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2697. break;
  2698. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2699. }
  2700. iounmap(vaddr);
  2701. /* we leak the DMA buffer here ... no choice since the controller could
  2702. * still complete the command.
  2703. */
  2704. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2705. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2706. opcode, type);
  2707. return -ETIMEDOUT;
  2708. }
  2709. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2710. if (tag & HPSA_ERROR_BIT) {
  2711. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2712. opcode, type);
  2713. return -EIO;
  2714. }
  2715. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2716. opcode, type);
  2717. return 0;
  2718. }
  2719. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2720. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2721. static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
  2722. {
  2723. /* the #defines are stolen from drivers/pci/msi.h. */
  2724. #define msi_control_reg(base) (base + PCI_MSI_FLAGS)
  2725. #define PCI_MSIX_FLAGS_ENABLE (1 << 15)
  2726. int pos;
  2727. u16 control = 0;
  2728. pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
  2729. if (pos) {
  2730. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2731. if (control & PCI_MSI_FLAGS_ENABLE) {
  2732. dev_info(&pdev->dev, "resetting MSI\n");
  2733. pci_write_config_word(pdev, msi_control_reg(pos),
  2734. control & ~PCI_MSI_FLAGS_ENABLE);
  2735. }
  2736. }
  2737. pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
  2738. if (pos) {
  2739. pci_read_config_word(pdev, msi_control_reg(pos), &control);
  2740. if (control & PCI_MSIX_FLAGS_ENABLE) {
  2741. dev_info(&pdev->dev, "resetting MSI-X\n");
  2742. pci_write_config_word(pdev, msi_control_reg(pos),
  2743. control & ~PCI_MSIX_FLAGS_ENABLE);
  2744. }
  2745. }
  2746. return 0;
  2747. }
  2748. /* This does a hard reset of the controller using PCI power management
  2749. * states.
  2750. */
  2751. static __devinit int hpsa_hard_reset_controller(struct pci_dev *pdev)
  2752. {
  2753. u16 pmcsr, saved_config_space[32];
  2754. int i, pos;
  2755. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2756. /* This is very nearly the same thing as
  2757. *
  2758. * pci_save_state(pci_dev);
  2759. * pci_set_power_state(pci_dev, PCI_D3hot);
  2760. * pci_set_power_state(pci_dev, PCI_D0);
  2761. * pci_restore_state(pci_dev);
  2762. *
  2763. * but we can't use these nice canned kernel routines on
  2764. * kexec, because they also check the MSI/MSI-X state in PCI
  2765. * configuration space and do the wrong thing when it is
  2766. * set/cleared. Also, the pci_save/restore_state functions
  2767. * violate the ordering requirements for restoring the
  2768. * configuration space from the CCISS document (see the
  2769. * comment below). So we roll our own ....
  2770. */
  2771. for (i = 0; i < 32; i++)
  2772. pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
  2773. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2774. if (pos == 0) {
  2775. dev_err(&pdev->dev,
  2776. "hpsa_reset_controller: PCI PM not supported\n");
  2777. return -ENODEV;
  2778. }
  2779. /* Quoting from the Open CISS Specification: "The Power
  2780. * Management Control/Status Register (CSR) controls the power
  2781. * state of the device. The normal operating state is D0,
  2782. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2783. * the controller, place the interface device in D3 then to
  2784. * D0, this causes a secondary PCI reset which will reset the
  2785. * controller."
  2786. */
  2787. /* enter the D3hot power management state */
  2788. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2789. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2790. pmcsr |= PCI_D3hot;
  2791. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2792. msleep(500);
  2793. /* enter the D0 power management state */
  2794. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2795. pmcsr |= PCI_D0;
  2796. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2797. msleep(500);
  2798. /* Restore the PCI configuration space. The Open CISS
  2799. * Specification says, "Restore the PCI Configuration
  2800. * Registers, offsets 00h through 60h. It is important to
  2801. * restore the command register, 16-bits at offset 04h,
  2802. * last. Do not restore the configuration status register,
  2803. * 16-bits at offset 06h." Note that the offset is 2*i.
  2804. */
  2805. for (i = 0; i < 32; i++) {
  2806. if (i == 2 || i == 3)
  2807. continue;
  2808. pci_write_config_word(pdev, 2*i, saved_config_space[i]);
  2809. }
  2810. wmb();
  2811. pci_write_config_word(pdev, 4, saved_config_space[2]);
  2812. return 0;
  2813. }
  2814. /*
  2815. * We cannot read the structure directly, for portability we must use
  2816. * the io functions.
  2817. * This is for debug only.
  2818. */
  2819. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2820. {
  2821. #ifdef HPSA_DEBUG
  2822. int i;
  2823. char temp_name[17];
  2824. dev_info(dev, "Controller Configuration information\n");
  2825. dev_info(dev, "------------------------------------\n");
  2826. for (i = 0; i < 4; i++)
  2827. temp_name[i] = readb(&(tb->Signature[i]));
  2828. temp_name[4] = '\0';
  2829. dev_info(dev, " Signature = %s\n", temp_name);
  2830. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2831. dev_info(dev, " Transport methods supported = 0x%x\n",
  2832. readl(&(tb->TransportSupport)));
  2833. dev_info(dev, " Transport methods active = 0x%x\n",
  2834. readl(&(tb->TransportActive)));
  2835. dev_info(dev, " Requested transport Method = 0x%x\n",
  2836. readl(&(tb->HostWrite.TransportRequest)));
  2837. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2838. readl(&(tb->HostWrite.CoalIntDelay)));
  2839. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2840. readl(&(tb->HostWrite.CoalIntCount)));
  2841. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2842. readl(&(tb->CmdsOutMax)));
  2843. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2844. for (i = 0; i < 16; i++)
  2845. temp_name[i] = readb(&(tb->ServerName[i]));
  2846. temp_name[16] = '\0';
  2847. dev_info(dev, " Server Name = %s\n", temp_name);
  2848. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2849. readl(&(tb->HeartBeat)));
  2850. #endif /* HPSA_DEBUG */
  2851. }
  2852. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2853. {
  2854. int i, offset, mem_type, bar_type;
  2855. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2856. return 0;
  2857. offset = 0;
  2858. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2859. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2860. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2861. offset += 4;
  2862. else {
  2863. mem_type = pci_resource_flags(pdev, i) &
  2864. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2865. switch (mem_type) {
  2866. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2867. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2868. offset += 4; /* 32 bit */
  2869. break;
  2870. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2871. offset += 8;
  2872. break;
  2873. default: /* reserved in PCI 2.2 */
  2874. dev_warn(&pdev->dev,
  2875. "base address is invalid\n");
  2876. return -1;
  2877. break;
  2878. }
  2879. }
  2880. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2881. return i + 1;
  2882. }
  2883. return -1;
  2884. }
  2885. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  2886. * controllers that are capable. If not, we use IO-APIC mode.
  2887. */
  2888. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  2889. {
  2890. #ifdef CONFIG_PCI_MSI
  2891. int err;
  2892. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  2893. {0, 2}, {0, 3}
  2894. };
  2895. /* Some boards advertise MSI but don't really support it */
  2896. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  2897. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  2898. goto default_int_mode;
  2899. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  2900. dev_info(&h->pdev->dev, "MSIX\n");
  2901. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  2902. if (!err) {
  2903. h->intr[0] = hpsa_msix_entries[0].vector;
  2904. h->intr[1] = hpsa_msix_entries[1].vector;
  2905. h->intr[2] = hpsa_msix_entries[2].vector;
  2906. h->intr[3] = hpsa_msix_entries[3].vector;
  2907. h->msix_vector = 1;
  2908. return;
  2909. }
  2910. if (err > 0) {
  2911. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  2912. "available\n", err);
  2913. goto default_int_mode;
  2914. } else {
  2915. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  2916. err);
  2917. goto default_int_mode;
  2918. }
  2919. }
  2920. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  2921. dev_info(&h->pdev->dev, "MSI\n");
  2922. if (!pci_enable_msi(h->pdev))
  2923. h->msi_vector = 1;
  2924. else
  2925. dev_warn(&h->pdev->dev, "MSI init failed\n");
  2926. }
  2927. default_int_mode:
  2928. #endif /* CONFIG_PCI_MSI */
  2929. /* if we get here we're going to use the default interrupt mode */
  2930. h->intr[PERF_MODE_INT] = h->pdev->irq;
  2931. }
  2932. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  2933. {
  2934. int i;
  2935. u32 subsystem_vendor_id, subsystem_device_id;
  2936. subsystem_vendor_id = pdev->subsystem_vendor;
  2937. subsystem_device_id = pdev->subsystem_device;
  2938. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  2939. subsystem_vendor_id;
  2940. for (i = 0; i < ARRAY_SIZE(products); i++)
  2941. if (*board_id == products[i].board_id)
  2942. return i;
  2943. if (subsystem_vendor_id != PCI_VENDOR_ID_HP || !hpsa_allow_any) {
  2944. dev_warn(&pdev->dev, "unrecognized board ID: "
  2945. "0x%08x, ignoring.\n", *board_id);
  2946. return -ENODEV;
  2947. }
  2948. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  2949. }
  2950. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  2951. {
  2952. u16 command;
  2953. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  2954. return ((command & PCI_COMMAND_MEMORY) == 0);
  2955. }
  2956. static int __devinit hpsa_pci_find_memory_BAR(struct ctlr_info *h,
  2957. unsigned long *memory_bar)
  2958. {
  2959. int i;
  2960. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  2961. if (pci_resource_flags(h->pdev, i) & IORESOURCE_MEM) {
  2962. /* addressing mode bits already removed */
  2963. *memory_bar = pci_resource_start(h->pdev, i);
  2964. dev_dbg(&h->pdev->dev, "memory BAR = %lx\n",
  2965. *memory_bar);
  2966. return 0;
  2967. }
  2968. dev_warn(&h->pdev->dev, "no memory BAR found\n");
  2969. return -ENODEV;
  2970. }
  2971. static int __devinit hpsa_wait_for_board_ready(struct ctlr_info *h)
  2972. {
  2973. int i;
  2974. u32 scratchpad;
  2975. for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
  2976. scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  2977. if (scratchpad == HPSA_FIRMWARE_READY)
  2978. return 0;
  2979. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  2980. }
  2981. dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
  2982. return -ENODEV;
  2983. }
  2984. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  2985. {
  2986. u64 cfg_offset;
  2987. u32 cfg_base_addr;
  2988. u64 cfg_base_addr_index;
  2989. u32 trans_offset;
  2990. /* get the address index number */
  2991. cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET);
  2992. cfg_base_addr &= (u32) 0x0000ffff;
  2993. cfg_base_addr_index = find_PCI_BAR_index(h->pdev, cfg_base_addr);
  2994. if (cfg_base_addr_index == -1) {
  2995. dev_warn(&h->pdev->dev, "cannot find cfg_base_addr_index\n");
  2996. return -ENODEV;
  2997. }
  2998. cfg_offset = readl(h->vaddr + SA5_CTMEM_OFFSET);
  2999. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3000. cfg_base_addr_index) + cfg_offset,
  3001. sizeof(h->cfgtable));
  3002. if (!h->cfgtable)
  3003. return -ENOMEM;
  3004. /* Find performant mode table. */
  3005. trans_offset = readl(&(h->cfgtable->TransMethodOffset));
  3006. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3007. cfg_base_addr_index)+cfg_offset+trans_offset,
  3008. sizeof(*h->transtable));
  3009. if (!h->transtable)
  3010. return -ENOMEM;
  3011. return 0;
  3012. }
  3013. /* Interrogate the hardware for some limits:
  3014. * max commands, max SG elements without chaining, and with chaining,
  3015. * SG chain block size, etc.
  3016. */
  3017. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3018. {
  3019. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3020. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3021. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3022. /*
  3023. * Limit in-command s/g elements to 32 save dma'able memory.
  3024. * Howvever spec says if 0, use 31
  3025. */
  3026. h->max_cmd_sg_entries = 31;
  3027. if (h->maxsgentries > 512) {
  3028. h->max_cmd_sg_entries = 32;
  3029. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3030. h->maxsgentries--; /* save one for chain pointer */
  3031. } else {
  3032. h->maxsgentries = 31; /* default to traditional values */
  3033. h->chainsize = 0;
  3034. }
  3035. }
  3036. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3037. {
  3038. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3039. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3040. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3041. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3042. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3043. return false;
  3044. }
  3045. return true;
  3046. }
  3047. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3048. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3049. {
  3050. #ifdef CONFIG_X86
  3051. u32 prefetch;
  3052. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3053. prefetch |= 0x100;
  3054. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3055. #endif
  3056. }
  3057. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3058. * in a prefetch beyond physical memory.
  3059. */
  3060. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3061. {
  3062. u32 dma_prefetch;
  3063. if (h->board_id != 0x3225103C)
  3064. return;
  3065. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3066. dma_prefetch |= 0x8000;
  3067. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3068. }
  3069. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3070. {
  3071. int i;
  3072. /* under certain very rare conditions, this can take awhile.
  3073. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3074. * as we enter this code.)
  3075. */
  3076. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3077. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3078. break;
  3079. /* delay and try again */
  3080. msleep(10);
  3081. }
  3082. }
  3083. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3084. {
  3085. u32 trans_support;
  3086. trans_support = readl(&(h->cfgtable->TransportSupport));
  3087. if (!(trans_support & SIMPLE_MODE))
  3088. return -ENOTSUPP;
  3089. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3090. /* Update the field, and then ring the doorbell */
  3091. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3092. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3093. hpsa_wait_for_mode_change_ack(h);
  3094. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3095. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3096. dev_warn(&h->pdev->dev,
  3097. "unable to get board into simple mode\n");
  3098. return -ENODEV;
  3099. }
  3100. return 0;
  3101. }
  3102. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3103. {
  3104. int prod_index, err;
  3105. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3106. if (prod_index < 0)
  3107. return -ENODEV;
  3108. h->product_name = products[prod_index].product_name;
  3109. h->access = *(products[prod_index].access);
  3110. if (hpsa_board_disabled(h->pdev)) {
  3111. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3112. return -ENODEV;
  3113. }
  3114. err = pci_enable_device(h->pdev);
  3115. if (err) {
  3116. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3117. return err;
  3118. }
  3119. err = pci_request_regions(h->pdev, "hpsa");
  3120. if (err) {
  3121. dev_err(&h->pdev->dev,
  3122. "cannot obtain PCI resources, aborting\n");
  3123. return err;
  3124. }
  3125. hpsa_interrupt_mode(h);
  3126. err = hpsa_pci_find_memory_BAR(h, &h->paddr);
  3127. if (err)
  3128. goto err_out_free_res;
  3129. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3130. if (!h->vaddr) {
  3131. err = -ENOMEM;
  3132. goto err_out_free_res;
  3133. }
  3134. err = hpsa_wait_for_board_ready(h);
  3135. if (err)
  3136. goto err_out_free_res;
  3137. err = hpsa_find_cfgtables(h);
  3138. if (err)
  3139. goto err_out_free_res;
  3140. hpsa_find_board_params(h);
  3141. if (!hpsa_CISS_signature_present(h)) {
  3142. err = -ENODEV;
  3143. goto err_out_free_res;
  3144. }
  3145. hpsa_enable_scsi_prefetch(h);
  3146. hpsa_p600_dma_prefetch_quirk(h);
  3147. err = hpsa_enter_simple_mode(h);
  3148. if (err)
  3149. goto err_out_free_res;
  3150. return 0;
  3151. err_out_free_res:
  3152. if (h->transtable)
  3153. iounmap(h->transtable);
  3154. if (h->cfgtable)
  3155. iounmap(h->cfgtable);
  3156. if (h->vaddr)
  3157. iounmap(h->vaddr);
  3158. /*
  3159. * Deliberately omit pci_disable_device(): it does something nasty to
  3160. * Smart Array controllers that pci_enable_device does not undo
  3161. */
  3162. pci_release_regions(h->pdev);
  3163. return err;
  3164. }
  3165. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3166. {
  3167. int rc;
  3168. #define HBA_INQUIRY_BYTE_COUNT 64
  3169. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3170. if (!h->hba_inquiry_data)
  3171. return;
  3172. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3173. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3174. if (rc != 0) {
  3175. kfree(h->hba_inquiry_data);
  3176. h->hba_inquiry_data = NULL;
  3177. }
  3178. }
  3179. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3180. const struct pci_device_id *ent)
  3181. {
  3182. int i, rc;
  3183. int dac;
  3184. struct ctlr_info *h;
  3185. if (number_of_controllers == 0)
  3186. printk(KERN_INFO DRIVER_NAME "\n");
  3187. if (reset_devices) {
  3188. /* Reset the controller with a PCI power-cycle */
  3189. if (hpsa_hard_reset_controller(pdev) || hpsa_reset_msi(pdev))
  3190. return -ENODEV;
  3191. /* Some devices (notably the HP Smart Array 5i Controller)
  3192. need a little pause here */
  3193. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3194. /* Now try to get the controller to respond to a no-op */
  3195. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3196. if (hpsa_noop(pdev) == 0)
  3197. break;
  3198. else
  3199. dev_warn(&pdev->dev, "no-op failed%s\n",
  3200. (i < 11 ? "; re-trying" : ""));
  3201. }
  3202. }
  3203. /* Command structures must be aligned on a 32-byte boundary because
  3204. * the 5 lower bits of the address are used by the hardware. and by
  3205. * the driver. See comments in hpsa.h for more info.
  3206. */
  3207. #define COMMANDLIST_ALIGNMENT 32
  3208. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3209. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3210. if (!h)
  3211. return -ENOMEM;
  3212. h->pdev = pdev;
  3213. h->busy_initializing = 1;
  3214. INIT_HLIST_HEAD(&h->cmpQ);
  3215. INIT_HLIST_HEAD(&h->reqQ);
  3216. rc = hpsa_pci_init(h);
  3217. if (rc != 0)
  3218. goto clean1;
  3219. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3220. h->ctlr = number_of_controllers;
  3221. number_of_controllers++;
  3222. /* configure PCI DMA stuff */
  3223. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3224. if (rc == 0) {
  3225. dac = 1;
  3226. } else {
  3227. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3228. if (rc == 0) {
  3229. dac = 0;
  3230. } else {
  3231. dev_err(&pdev->dev, "no suitable DMA available\n");
  3232. goto clean1;
  3233. }
  3234. }
  3235. /* make sure the board interrupts are off */
  3236. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3237. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr,
  3238. IRQF_DISABLED, h->devname, h);
  3239. if (rc) {
  3240. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3241. h->intr[PERF_MODE_INT], h->devname);
  3242. goto clean2;
  3243. }
  3244. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3245. h->devname, pdev->device,
  3246. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3247. h->cmd_pool_bits =
  3248. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3249. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3250. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3251. h->nr_cmds * sizeof(*h->cmd_pool),
  3252. &(h->cmd_pool_dhandle));
  3253. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3254. h->nr_cmds * sizeof(*h->errinfo_pool),
  3255. &(h->errinfo_pool_dhandle));
  3256. if ((h->cmd_pool_bits == NULL)
  3257. || (h->cmd_pool == NULL)
  3258. || (h->errinfo_pool == NULL)) {
  3259. dev_err(&pdev->dev, "out of memory");
  3260. rc = -ENOMEM;
  3261. goto clean4;
  3262. }
  3263. if (hpsa_allocate_sg_chain_blocks(h))
  3264. goto clean4;
  3265. spin_lock_init(&h->lock);
  3266. spin_lock_init(&h->scan_lock);
  3267. init_waitqueue_head(&h->scan_wait_queue);
  3268. h->scan_finished = 1; /* no scan currently in progress */
  3269. pci_set_drvdata(pdev, h);
  3270. memset(h->cmd_pool_bits, 0,
  3271. ((h->nr_cmds + BITS_PER_LONG -
  3272. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3273. hpsa_scsi_setup(h);
  3274. /* Turn the interrupts on so we can service requests */
  3275. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3276. hpsa_put_ctlr_into_performant_mode(h);
  3277. hpsa_hba_inquiry(h);
  3278. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3279. h->busy_initializing = 0;
  3280. return 1;
  3281. clean4:
  3282. hpsa_free_sg_chain_blocks(h);
  3283. kfree(h->cmd_pool_bits);
  3284. if (h->cmd_pool)
  3285. pci_free_consistent(h->pdev,
  3286. h->nr_cmds * sizeof(struct CommandList),
  3287. h->cmd_pool, h->cmd_pool_dhandle);
  3288. if (h->errinfo_pool)
  3289. pci_free_consistent(h->pdev,
  3290. h->nr_cmds * sizeof(struct ErrorInfo),
  3291. h->errinfo_pool,
  3292. h->errinfo_pool_dhandle);
  3293. free_irq(h->intr[PERF_MODE_INT], h);
  3294. clean2:
  3295. clean1:
  3296. h->busy_initializing = 0;
  3297. kfree(h);
  3298. return rc;
  3299. }
  3300. static void hpsa_flush_cache(struct ctlr_info *h)
  3301. {
  3302. char *flush_buf;
  3303. struct CommandList *c;
  3304. flush_buf = kzalloc(4, GFP_KERNEL);
  3305. if (!flush_buf)
  3306. return;
  3307. c = cmd_special_alloc(h);
  3308. if (!c) {
  3309. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3310. goto out_of_memory;
  3311. }
  3312. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3313. RAID_CTLR_LUNID, TYPE_CMD);
  3314. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3315. if (c->err_info->CommandStatus != 0)
  3316. dev_warn(&h->pdev->dev,
  3317. "error flushing cache on controller\n");
  3318. cmd_special_free(h, c);
  3319. out_of_memory:
  3320. kfree(flush_buf);
  3321. }
  3322. static void hpsa_shutdown(struct pci_dev *pdev)
  3323. {
  3324. struct ctlr_info *h;
  3325. h = pci_get_drvdata(pdev);
  3326. /* Turn board interrupts off and send the flush cache command
  3327. * sendcmd will turn off interrupt, and send the flush...
  3328. * To write all data in the battery backed cache to disks
  3329. */
  3330. hpsa_flush_cache(h);
  3331. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3332. free_irq(h->intr[PERF_MODE_INT], h);
  3333. #ifdef CONFIG_PCI_MSI
  3334. if (h->msix_vector)
  3335. pci_disable_msix(h->pdev);
  3336. else if (h->msi_vector)
  3337. pci_disable_msi(h->pdev);
  3338. #endif /* CONFIG_PCI_MSI */
  3339. }
  3340. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3341. {
  3342. struct ctlr_info *h;
  3343. if (pci_get_drvdata(pdev) == NULL) {
  3344. dev_err(&pdev->dev, "unable to remove device \n");
  3345. return;
  3346. }
  3347. h = pci_get_drvdata(pdev);
  3348. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3349. hpsa_shutdown(pdev);
  3350. iounmap(h->vaddr);
  3351. iounmap(h->transtable);
  3352. iounmap(h->cfgtable);
  3353. hpsa_free_sg_chain_blocks(h);
  3354. pci_free_consistent(h->pdev,
  3355. h->nr_cmds * sizeof(struct CommandList),
  3356. h->cmd_pool, h->cmd_pool_dhandle);
  3357. pci_free_consistent(h->pdev,
  3358. h->nr_cmds * sizeof(struct ErrorInfo),
  3359. h->errinfo_pool, h->errinfo_pool_dhandle);
  3360. pci_free_consistent(h->pdev, h->reply_pool_size,
  3361. h->reply_pool, h->reply_pool_dhandle);
  3362. kfree(h->cmd_pool_bits);
  3363. kfree(h->blockFetchTable);
  3364. kfree(h->hba_inquiry_data);
  3365. /*
  3366. * Deliberately omit pci_disable_device(): it does something nasty to
  3367. * Smart Array controllers that pci_enable_device does not undo
  3368. */
  3369. pci_release_regions(pdev);
  3370. pci_set_drvdata(pdev, NULL);
  3371. kfree(h);
  3372. }
  3373. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3374. __attribute__((unused)) pm_message_t state)
  3375. {
  3376. return -ENOSYS;
  3377. }
  3378. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3379. {
  3380. return -ENOSYS;
  3381. }
  3382. static struct pci_driver hpsa_pci_driver = {
  3383. .name = "hpsa",
  3384. .probe = hpsa_init_one,
  3385. .remove = __devexit_p(hpsa_remove_one),
  3386. .id_table = hpsa_pci_device_id, /* id_table */
  3387. .shutdown = hpsa_shutdown,
  3388. .suspend = hpsa_suspend,
  3389. .resume = hpsa_resume,
  3390. };
  3391. /* Fill in bucket_map[], given nsgs (the max number of
  3392. * scatter gather elements supported) and bucket[],
  3393. * which is an array of 8 integers. The bucket[] array
  3394. * contains 8 different DMA transfer sizes (in 16
  3395. * byte increments) which the controller uses to fetch
  3396. * commands. This function fills in bucket_map[], which
  3397. * maps a given number of scatter gather elements to one of
  3398. * the 8 DMA transfer sizes. The point of it is to allow the
  3399. * controller to only do as much DMA as needed to fetch the
  3400. * command, with the DMA transfer size encoded in the lower
  3401. * bits of the command address.
  3402. */
  3403. static void calc_bucket_map(int bucket[], int num_buckets,
  3404. int nsgs, int *bucket_map)
  3405. {
  3406. int i, j, b, size;
  3407. /* even a command with 0 SGs requires 4 blocks */
  3408. #define MINIMUM_TRANSFER_BLOCKS 4
  3409. #define NUM_BUCKETS 8
  3410. /* Note, bucket_map must have nsgs+1 entries. */
  3411. for (i = 0; i <= nsgs; i++) {
  3412. /* Compute size of a command with i SG entries */
  3413. size = i + MINIMUM_TRANSFER_BLOCKS;
  3414. b = num_buckets; /* Assume the biggest bucket */
  3415. /* Find the bucket that is just big enough */
  3416. for (j = 0; j < 8; j++) {
  3417. if (bucket[j] >= size) {
  3418. b = j;
  3419. break;
  3420. }
  3421. }
  3422. /* for a command with i SG entries, use bucket b. */
  3423. bucket_map[i] = b;
  3424. }
  3425. }
  3426. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
  3427. {
  3428. int i;
  3429. unsigned long register_value;
  3430. /* This is a bit complicated. There are 8 registers on
  3431. * the controller which we write to to tell it 8 different
  3432. * sizes of commands which there may be. It's a way of
  3433. * reducing the DMA done to fetch each command. Encoded into
  3434. * each command's tag are 3 bits which communicate to the controller
  3435. * which of the eight sizes that command fits within. The size of
  3436. * each command depends on how many scatter gather entries there are.
  3437. * Each SG entry requires 16 bytes. The eight registers are programmed
  3438. * with the number of 16-byte blocks a command of that size requires.
  3439. * The smallest command possible requires 5 such 16 byte blocks.
  3440. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3441. * blocks. Note, this only extends to the SG entries contained
  3442. * within the command block, and does not extend to chained blocks
  3443. * of SG elements. bft[] contains the eight values we write to
  3444. * the registers. They are not evenly distributed, but have more
  3445. * sizes for small commands, and fewer sizes for larger commands.
  3446. */
  3447. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3448. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3449. /* 5 = 1 s/g entry or 4k
  3450. * 6 = 2 s/g entry or 8k
  3451. * 8 = 4 s/g entry or 16k
  3452. * 10 = 6 s/g entry or 24k
  3453. */
  3454. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3455. /* Controller spec: zero out this buffer. */
  3456. memset(h->reply_pool, 0, h->reply_pool_size);
  3457. h->reply_pool_head = h->reply_pool;
  3458. bft[7] = h->max_sg_entries + 4;
  3459. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3460. for (i = 0; i < 8; i++)
  3461. writel(bft[i], &h->transtable->BlockFetch[i]);
  3462. /* size of controller ring buffer */
  3463. writel(h->max_commands, &h->transtable->RepQSize);
  3464. writel(1, &h->transtable->RepQCount);
  3465. writel(0, &h->transtable->RepQCtrAddrLow32);
  3466. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3467. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3468. writel(0, &h->transtable->RepQAddr0High32);
  3469. writel(CFGTBL_Trans_Performant,
  3470. &(h->cfgtable->HostWrite.TransportRequest));
  3471. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3472. hpsa_wait_for_mode_change_ack(h);
  3473. register_value = readl(&(h->cfgtable->TransportActive));
  3474. if (!(register_value & CFGTBL_Trans_Performant)) {
  3475. dev_warn(&h->pdev->dev, "unable to get board into"
  3476. " performant mode\n");
  3477. return;
  3478. }
  3479. }
  3480. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3481. {
  3482. u32 trans_support;
  3483. trans_support = readl(&(h->cfgtable->TransportSupport));
  3484. if (!(trans_support & PERFORMANT_MODE))
  3485. return;
  3486. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3487. h->max_sg_entries = 32;
  3488. /* Performant mode ring buffer and supporting data structures */
  3489. h->reply_pool_size = h->max_commands * sizeof(u64);
  3490. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3491. &(h->reply_pool_dhandle));
  3492. /* Need a block fetch table for performant mode */
  3493. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3494. sizeof(u32)), GFP_KERNEL);
  3495. if ((h->reply_pool == NULL)
  3496. || (h->blockFetchTable == NULL))
  3497. goto clean_up;
  3498. hpsa_enter_performant_mode(h);
  3499. /* Change the access methods to the performant access methods */
  3500. h->access = SA5_performant_access;
  3501. h->transMethod = CFGTBL_Trans_Performant;
  3502. return;
  3503. clean_up:
  3504. if (h->reply_pool)
  3505. pci_free_consistent(h->pdev, h->reply_pool_size,
  3506. h->reply_pool, h->reply_pool_dhandle);
  3507. kfree(h->blockFetchTable);
  3508. }
  3509. /*
  3510. * This is it. Register the PCI driver information for the cards we control
  3511. * the OS will call our registered routines when it finds one of our cards.
  3512. */
  3513. static int __init hpsa_init(void)
  3514. {
  3515. return pci_register_driver(&hpsa_pci_driver);
  3516. }
  3517. static void __exit hpsa_cleanup(void)
  3518. {
  3519. pci_unregister_driver(&hpsa_pci_driver);
  3520. }
  3521. module_init(hpsa_init);
  3522. module_exit(hpsa_cleanup);