rtl8187_dev.c 24 KB

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  1. /*
  2. * Linux device driver for RTL8187
  3. *
  4. * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
  5. * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
  6. *
  7. * Based on the r8187 driver, which is:
  8. * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  9. *
  10. * Magic delays and register offsets below are taken from the original
  11. * r8187 driver sources. Thanks to Realtek for their support!
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. */
  17. #include <linux/init.h>
  18. #include <linux/usb.h>
  19. #include <linux/delay.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/eeprom_93cx6.h>
  22. #include <net/mac80211.h>
  23. #include "rtl8187.h"
  24. #include "rtl8187_rtl8225.h"
  25. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  26. MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  27. MODULE_DESCRIPTION("RTL8187 USB wireless driver");
  28. MODULE_LICENSE("GPL");
  29. static struct usb_device_id rtl8187_table[] __devinitdata = {
  30. /* Realtek */
  31. {USB_DEVICE(0x0bda, 0x8187)},
  32. /* Netgear */
  33. {USB_DEVICE(0x0846, 0x6100)},
  34. {USB_DEVICE(0x0846, 0x6a00)},
  35. /* HP */
  36. {USB_DEVICE(0x03f0, 0xca02)},
  37. /* Sitecom */
  38. {USB_DEVICE(0x0df6, 0x000d)},
  39. {}
  40. };
  41. MODULE_DEVICE_TABLE(usb, rtl8187_table);
  42. static const struct ieee80211_rate rtl818x_rates[] = {
  43. { .bitrate = 10, .hw_value = 0, },
  44. { .bitrate = 20, .hw_value = 1, },
  45. { .bitrate = 55, .hw_value = 2, },
  46. { .bitrate = 110, .hw_value = 3, },
  47. { .bitrate = 60, .hw_value = 4, },
  48. { .bitrate = 90, .hw_value = 5, },
  49. { .bitrate = 120, .hw_value = 6, },
  50. { .bitrate = 180, .hw_value = 7, },
  51. { .bitrate = 240, .hw_value = 8, },
  52. { .bitrate = 360, .hw_value = 9, },
  53. { .bitrate = 480, .hw_value = 10, },
  54. { .bitrate = 540, .hw_value = 11, },
  55. };
  56. static const struct ieee80211_channel rtl818x_channels[] = {
  57. { .center_freq = 2412 },
  58. { .center_freq = 2417 },
  59. { .center_freq = 2422 },
  60. { .center_freq = 2427 },
  61. { .center_freq = 2432 },
  62. { .center_freq = 2437 },
  63. { .center_freq = 2442 },
  64. { .center_freq = 2447 },
  65. { .center_freq = 2452 },
  66. { .center_freq = 2457 },
  67. { .center_freq = 2462 },
  68. { .center_freq = 2467 },
  69. { .center_freq = 2472 },
  70. { .center_freq = 2484 },
  71. };
  72. static void rtl8187_iowrite_async_cb(struct urb *urb)
  73. {
  74. kfree(urb->context);
  75. usb_free_urb(urb);
  76. }
  77. static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  78. void *data, u16 len)
  79. {
  80. struct usb_ctrlrequest *dr;
  81. struct urb *urb;
  82. struct rtl8187_async_write_data {
  83. u8 data[4];
  84. struct usb_ctrlrequest dr;
  85. } *buf;
  86. buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
  87. if (!buf)
  88. return;
  89. urb = usb_alloc_urb(0, GFP_ATOMIC);
  90. if (!urb) {
  91. kfree(buf);
  92. return;
  93. }
  94. dr = &buf->dr;
  95. dr->bRequestType = RTL8187_REQT_WRITE;
  96. dr->bRequest = RTL8187_REQ_SET_REG;
  97. dr->wValue = addr;
  98. dr->wIndex = 0;
  99. dr->wLength = cpu_to_le16(len);
  100. memcpy(buf, data, len);
  101. usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
  102. (unsigned char *)dr, buf, len,
  103. rtl8187_iowrite_async_cb, buf);
  104. usb_submit_urb(urb, GFP_ATOMIC);
  105. }
  106. static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
  107. __le32 *addr, u32 val)
  108. {
  109. __le32 buf = cpu_to_le32(val);
  110. rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
  111. &buf, sizeof(buf));
  112. }
  113. void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  114. {
  115. struct rtl8187_priv *priv = dev->priv;
  116. data <<= 8;
  117. data |= addr | 0x80;
  118. rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
  119. rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
  120. rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
  121. rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
  122. msleep(1);
  123. }
  124. static void rtl8187_tx_cb(struct urb *urb)
  125. {
  126. struct ieee80211_tx_status status;
  127. struct sk_buff *skb = (struct sk_buff *)urb->context;
  128. struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb;
  129. memset(&status, 0, sizeof(status));
  130. usb_free_urb(info->urb);
  131. if (info->control)
  132. memcpy(&status.control, info->control, sizeof(status.control));
  133. kfree(info->control);
  134. skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
  135. status.flags |= IEEE80211_TX_STATUS_ACK;
  136. ieee80211_tx_status_irqsafe(info->dev, skb, &status);
  137. }
  138. static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
  139. struct ieee80211_tx_control *control)
  140. {
  141. struct rtl8187_priv *priv = dev->priv;
  142. struct rtl8187_tx_hdr *hdr;
  143. struct rtl8187_tx_info *info;
  144. struct urb *urb;
  145. __le16 rts_dur = 0;
  146. u32 flags;
  147. urb = usb_alloc_urb(0, GFP_ATOMIC);
  148. if (!urb) {
  149. kfree_skb(skb);
  150. return 0;
  151. }
  152. flags = skb->len;
  153. flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
  154. flags |= ieee80211_get_tx_rate(dev, control)->hw_value << 24;
  155. if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data))
  156. flags |= RTL8187_TX_FLAG_MORE_FRAG;
  157. if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  158. flags |= RTL8187_TX_FLAG_RTS;
  159. flags |= ieee80211_get_rts_cts_rate(dev, control)->hw_value << 19;
  160. rts_dur = ieee80211_rts_duration(dev, priv->vif,
  161. skb->len, control);
  162. } else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  163. flags |= RTL8187_TX_FLAG_CTS;
  164. flags |= ieee80211_get_rts_cts_rate(dev, control)->hw_value << 19;
  165. }
  166. hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
  167. hdr->flags = cpu_to_le32(flags);
  168. hdr->len = 0;
  169. hdr->rts_duration = rts_dur;
  170. hdr->retry = cpu_to_le32(control->retry_limit << 8);
  171. info = (struct rtl8187_tx_info *)skb->cb;
  172. info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC);
  173. info->urb = urb;
  174. info->dev = dev;
  175. usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
  176. hdr, skb->len, rtl8187_tx_cb, skb);
  177. usb_submit_urb(urb, GFP_ATOMIC);
  178. return 0;
  179. }
  180. static void rtl8187_rx_cb(struct urb *urb)
  181. {
  182. struct sk_buff *skb = (struct sk_buff *)urb->context;
  183. struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
  184. struct ieee80211_hw *dev = info->dev;
  185. struct rtl8187_priv *priv = dev->priv;
  186. struct rtl8187_rx_hdr *hdr;
  187. struct ieee80211_rx_status rx_status = { 0 };
  188. int rate, signal;
  189. u32 flags;
  190. spin_lock(&priv->rx_queue.lock);
  191. if (skb->next)
  192. __skb_unlink(skb, &priv->rx_queue);
  193. else {
  194. spin_unlock(&priv->rx_queue.lock);
  195. return;
  196. }
  197. spin_unlock(&priv->rx_queue.lock);
  198. if (unlikely(urb->status)) {
  199. usb_free_urb(urb);
  200. dev_kfree_skb_irq(skb);
  201. return;
  202. }
  203. skb_put(skb, urb->actual_length);
  204. hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
  205. flags = le32_to_cpu(hdr->flags);
  206. skb_trim(skb, flags & 0x0FFF);
  207. signal = hdr->agc >> 1;
  208. rate = (flags >> 20) & 0xF;
  209. if (rate > 3) { /* OFDM rate */
  210. if (signal > 90)
  211. signal = 90;
  212. else if (signal < 25)
  213. signal = 25;
  214. signal = 90 - signal;
  215. } else { /* CCK rate */
  216. if (signal > 95)
  217. signal = 95;
  218. else if (signal < 30)
  219. signal = 30;
  220. signal = 95 - signal;
  221. }
  222. rx_status.antenna = (hdr->signal >> 7) & 1;
  223. rx_status.qual = 64 - min(hdr->noise, (u8)64);
  224. rx_status.signal = signal;
  225. rx_status.rate_idx = rate;
  226. rx_status.freq = dev->conf.channel->center_freq;
  227. rx_status.band = dev->conf.channel->band;
  228. rx_status.mactime = le64_to_cpu(hdr->mac_time);
  229. rx_status.flag |= RX_FLAG_TSFT;
  230. if (flags & (1 << 13))
  231. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  232. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  233. skb = dev_alloc_skb(RTL8187_MAX_RX);
  234. if (unlikely(!skb)) {
  235. usb_free_urb(urb);
  236. /* TODO check rx queue length and refill *somewhere* */
  237. return;
  238. }
  239. info = (struct rtl8187_rx_info *)skb->cb;
  240. info->urb = urb;
  241. info->dev = dev;
  242. urb->transfer_buffer = skb_tail_pointer(skb);
  243. urb->context = skb;
  244. skb_queue_tail(&priv->rx_queue, skb);
  245. usb_submit_urb(urb, GFP_ATOMIC);
  246. }
  247. static int rtl8187_init_urbs(struct ieee80211_hw *dev)
  248. {
  249. struct rtl8187_priv *priv = dev->priv;
  250. struct urb *entry;
  251. struct sk_buff *skb;
  252. struct rtl8187_rx_info *info;
  253. while (skb_queue_len(&priv->rx_queue) < 8) {
  254. skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
  255. if (!skb)
  256. break;
  257. entry = usb_alloc_urb(0, GFP_KERNEL);
  258. if (!entry) {
  259. kfree_skb(skb);
  260. break;
  261. }
  262. usb_fill_bulk_urb(entry, priv->udev,
  263. usb_rcvbulkpipe(priv->udev, 1),
  264. skb_tail_pointer(skb),
  265. RTL8187_MAX_RX, rtl8187_rx_cb, skb);
  266. info = (struct rtl8187_rx_info *)skb->cb;
  267. info->urb = entry;
  268. info->dev = dev;
  269. skb_queue_tail(&priv->rx_queue, skb);
  270. usb_submit_urb(entry, GFP_KERNEL);
  271. }
  272. return 0;
  273. }
  274. static int rtl8187_init_hw(struct ieee80211_hw *dev)
  275. {
  276. struct rtl8187_priv *priv = dev->priv;
  277. u8 reg;
  278. int i;
  279. /* reset */
  280. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  281. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  282. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  283. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
  284. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
  285. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  286. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  287. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  288. msleep(200);
  289. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
  290. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
  291. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
  292. msleep(200);
  293. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  294. reg &= (1 << 1);
  295. reg |= RTL818X_CMD_RESET;
  296. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  297. i = 10;
  298. do {
  299. msleep(2);
  300. if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
  301. RTL818X_CMD_RESET))
  302. break;
  303. } while (--i);
  304. if (!i) {
  305. printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
  306. return -ETIMEDOUT;
  307. }
  308. /* reload registers from eeprom */
  309. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
  310. i = 10;
  311. do {
  312. msleep(4);
  313. if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
  314. RTL818X_EEPROM_CMD_CONFIG))
  315. break;
  316. } while (--i);
  317. if (!i) {
  318. printk(KERN_ERR "%s: eeprom reset timeout!\n",
  319. wiphy_name(dev->wiphy));
  320. return -ETIMEDOUT;
  321. }
  322. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  323. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  324. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  325. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
  326. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
  327. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  328. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  329. /* setup card */
  330. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  331. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  332. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  333. rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
  334. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  335. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  336. rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
  337. reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
  338. reg &= 0x3F;
  339. reg |= 0x80;
  340. rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
  341. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  342. rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
  343. rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
  344. rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
  345. // TODO: set RESP_RATE and BRSR properly
  346. rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
  347. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  348. /* host_usb_init */
  349. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  350. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  351. reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
  352. rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
  353. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  354. rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
  355. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  356. rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
  357. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
  358. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
  359. msleep(100);
  360. rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
  361. rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
  362. rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
  363. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  364. rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
  365. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  366. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
  367. msleep(100);
  368. priv->rf->init(dev);
  369. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  370. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  371. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  372. rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
  373. rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
  374. rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
  375. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  376. return 0;
  377. }
  378. static int rtl8187_start(struct ieee80211_hw *dev)
  379. {
  380. struct rtl8187_priv *priv = dev->priv;
  381. u32 reg;
  382. int ret;
  383. ret = rtl8187_init_hw(dev);
  384. if (ret)
  385. return ret;
  386. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
  387. rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
  388. rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
  389. rtl8187_init_urbs(dev);
  390. reg = RTL818X_RX_CONF_ONLYERLPKT |
  391. RTL818X_RX_CONF_RX_AUTORESETPHY |
  392. RTL818X_RX_CONF_BSSID |
  393. RTL818X_RX_CONF_MGMT |
  394. RTL818X_RX_CONF_DATA |
  395. (7 << 13 /* RX FIFO threshold NONE */) |
  396. (7 << 10 /* MAX RX DMA */) |
  397. RTL818X_RX_CONF_BROADCAST |
  398. RTL818X_RX_CONF_NICMAC;
  399. priv->rx_conf = reg;
  400. rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
  401. reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
  402. reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
  403. reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
  404. rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
  405. reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
  406. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
  407. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
  408. reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
  409. rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
  410. reg = RTL818X_TX_CONF_CW_MIN |
  411. (7 << 21 /* MAX TX DMA */) |
  412. RTL818X_TX_CONF_NO_ICV;
  413. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  414. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  415. reg |= RTL818X_CMD_TX_ENABLE;
  416. reg |= RTL818X_CMD_RX_ENABLE;
  417. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  418. return 0;
  419. }
  420. static void rtl8187_stop(struct ieee80211_hw *dev)
  421. {
  422. struct rtl8187_priv *priv = dev->priv;
  423. struct rtl8187_rx_info *info;
  424. struct sk_buff *skb;
  425. u32 reg;
  426. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  427. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  428. reg &= ~RTL818X_CMD_TX_ENABLE;
  429. reg &= ~RTL818X_CMD_RX_ENABLE;
  430. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  431. priv->rf->stop(dev);
  432. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  433. reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
  434. rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
  435. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  436. while ((skb = skb_dequeue(&priv->rx_queue))) {
  437. info = (struct rtl8187_rx_info *)skb->cb;
  438. usb_kill_urb(info->urb);
  439. kfree_skb(skb);
  440. }
  441. return;
  442. }
  443. static int rtl8187_add_interface(struct ieee80211_hw *dev,
  444. struct ieee80211_if_init_conf *conf)
  445. {
  446. struct rtl8187_priv *priv = dev->priv;
  447. int i;
  448. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  449. return -EOPNOTSUPP;
  450. switch (conf->type) {
  451. case IEEE80211_IF_TYPE_STA:
  452. priv->mode = conf->type;
  453. break;
  454. default:
  455. return -EOPNOTSUPP;
  456. }
  457. priv->vif = conf->vif;
  458. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  459. for (i = 0; i < ETH_ALEN; i++)
  460. rtl818x_iowrite8(priv, &priv->map->MAC[i],
  461. ((u8 *)conf->mac_addr)[i]);
  462. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  463. return 0;
  464. }
  465. static void rtl8187_remove_interface(struct ieee80211_hw *dev,
  466. struct ieee80211_if_init_conf *conf)
  467. {
  468. struct rtl8187_priv *priv = dev->priv;
  469. priv->mode = IEEE80211_IF_TYPE_MNTR;
  470. priv->vif = NULL;
  471. }
  472. static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  473. {
  474. struct rtl8187_priv *priv = dev->priv;
  475. u32 reg;
  476. reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  477. /* Enable TX loopback on MAC level to avoid TX during channel
  478. * changes, as this has be seen to causes problems and the
  479. * card will stop work until next reset
  480. */
  481. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  482. reg | RTL818X_TX_CONF_LOOPBACK_MAC);
  483. msleep(10);
  484. priv->rf->set_chan(dev, conf);
  485. msleep(10);
  486. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  487. rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
  488. if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  489. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
  490. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
  491. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
  492. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
  493. } else {
  494. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
  495. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
  496. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
  497. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
  498. }
  499. rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
  500. rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
  501. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
  502. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
  503. return 0;
  504. }
  505. static int rtl8187_config_interface(struct ieee80211_hw *dev,
  506. struct ieee80211_vif *vif,
  507. struct ieee80211_if_conf *conf)
  508. {
  509. struct rtl8187_priv *priv = dev->priv;
  510. int i;
  511. for (i = 0; i < ETH_ALEN; i++)
  512. rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
  513. if (is_valid_ether_addr(conf->bssid))
  514. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
  515. else
  516. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
  517. return 0;
  518. }
  519. static void rtl8187_configure_filter(struct ieee80211_hw *dev,
  520. unsigned int changed_flags,
  521. unsigned int *total_flags,
  522. int mc_count, struct dev_addr_list *mclist)
  523. {
  524. struct rtl8187_priv *priv = dev->priv;
  525. if (changed_flags & FIF_FCSFAIL)
  526. priv->rx_conf ^= RTL818X_RX_CONF_FCS;
  527. if (changed_flags & FIF_CONTROL)
  528. priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
  529. if (changed_flags & FIF_OTHER_BSS)
  530. priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
  531. if (*total_flags & FIF_ALLMULTI || mc_count > 0)
  532. priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
  533. else
  534. priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
  535. *total_flags = 0;
  536. if (priv->rx_conf & RTL818X_RX_CONF_FCS)
  537. *total_flags |= FIF_FCSFAIL;
  538. if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
  539. *total_flags |= FIF_CONTROL;
  540. if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
  541. *total_flags |= FIF_OTHER_BSS;
  542. if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
  543. *total_flags |= FIF_ALLMULTI;
  544. rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
  545. }
  546. static const struct ieee80211_ops rtl8187_ops = {
  547. .tx = rtl8187_tx,
  548. .start = rtl8187_start,
  549. .stop = rtl8187_stop,
  550. .add_interface = rtl8187_add_interface,
  551. .remove_interface = rtl8187_remove_interface,
  552. .config = rtl8187_config,
  553. .config_interface = rtl8187_config_interface,
  554. .configure_filter = rtl8187_configure_filter,
  555. };
  556. static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
  557. {
  558. struct ieee80211_hw *dev = eeprom->data;
  559. struct rtl8187_priv *priv = dev->priv;
  560. u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
  561. eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
  562. eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
  563. eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
  564. eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
  565. }
  566. static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
  567. {
  568. struct ieee80211_hw *dev = eeprom->data;
  569. struct rtl8187_priv *priv = dev->priv;
  570. u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
  571. if (eeprom->reg_data_in)
  572. reg |= RTL818X_EEPROM_CMD_WRITE;
  573. if (eeprom->reg_data_out)
  574. reg |= RTL818X_EEPROM_CMD_READ;
  575. if (eeprom->reg_data_clock)
  576. reg |= RTL818X_EEPROM_CMD_CK;
  577. if (eeprom->reg_chip_select)
  578. reg |= RTL818X_EEPROM_CMD_CS;
  579. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
  580. udelay(10);
  581. }
  582. static int __devinit rtl8187_probe(struct usb_interface *intf,
  583. const struct usb_device_id *id)
  584. {
  585. struct usb_device *udev = interface_to_usbdev(intf);
  586. struct ieee80211_hw *dev;
  587. struct rtl8187_priv *priv;
  588. struct eeprom_93cx6 eeprom;
  589. struct ieee80211_channel *channel;
  590. u16 txpwr, reg;
  591. int err, i;
  592. DECLARE_MAC_BUF(mac);
  593. dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
  594. if (!dev) {
  595. printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
  596. return -ENOMEM;
  597. }
  598. priv = dev->priv;
  599. SET_IEEE80211_DEV(dev, &intf->dev);
  600. usb_set_intfdata(intf, dev);
  601. priv->udev = udev;
  602. usb_get_dev(udev);
  603. skb_queue_head_init(&priv->rx_queue);
  604. BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
  605. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
  606. memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
  607. memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
  608. priv->map = (struct rtl818x_csr *)0xFF00;
  609. priv->band.band = IEEE80211_BAND_2GHZ;
  610. priv->band.channels = priv->channels;
  611. priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
  612. priv->band.bitrates = priv->rates;
  613. priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
  614. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  615. priv->mode = IEEE80211_IF_TYPE_MNTR;
  616. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
  617. IEEE80211_HW_RX_INCLUDES_FCS |
  618. IEEE80211_HW_SIGNAL_UNSPEC;
  619. dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
  620. dev->queues = 1;
  621. dev->max_signal = 65;
  622. eeprom.data = dev;
  623. eeprom.register_read = rtl8187_eeprom_register_read;
  624. eeprom.register_write = rtl8187_eeprom_register_write;
  625. if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
  626. eeprom.width = PCI_EEPROM_WIDTH_93C66;
  627. else
  628. eeprom.width = PCI_EEPROM_WIDTH_93C46;
  629. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  630. udelay(10);
  631. eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
  632. (__le16 __force *)dev->wiphy->perm_addr, 3);
  633. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  634. printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
  635. "generated MAC address\n");
  636. random_ether_addr(dev->wiphy->perm_addr);
  637. }
  638. channel = priv->channels;
  639. for (i = 0; i < 3; i++) {
  640. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
  641. &txpwr);
  642. (*channel++).hw_value = txpwr & 0xFF;
  643. (*channel++).hw_value = txpwr >> 8;
  644. }
  645. for (i = 0; i < 2; i++) {
  646. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
  647. &txpwr);
  648. (*channel++).hw_value = txpwr & 0xFF;
  649. (*channel++).hw_value = txpwr >> 8;
  650. }
  651. for (i = 0; i < 2; i++) {
  652. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
  653. &txpwr);
  654. (*channel++).hw_value = txpwr & 0xFF;
  655. (*channel++).hw_value = txpwr >> 8;
  656. }
  657. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
  658. &priv->txpwr_base);
  659. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  660. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  661. /* 0 means asic B-cut, we should use SW 3 wire
  662. * bit-by-bit banging for radio. 1 means we can use
  663. * USB specific request to write radio registers */
  664. priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
  665. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  666. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  667. priv->rf = rtl8187_detect_rf(dev);
  668. err = ieee80211_register_hw(dev);
  669. if (err) {
  670. printk(KERN_ERR "rtl8187: Cannot register device\n");
  671. goto err_free_dev;
  672. }
  673. printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
  674. wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
  675. priv->asic_rev, priv->rf->name);
  676. return 0;
  677. err_free_dev:
  678. ieee80211_free_hw(dev);
  679. usb_set_intfdata(intf, NULL);
  680. usb_put_dev(udev);
  681. return err;
  682. }
  683. static void __devexit rtl8187_disconnect(struct usb_interface *intf)
  684. {
  685. struct ieee80211_hw *dev = usb_get_intfdata(intf);
  686. struct rtl8187_priv *priv;
  687. if (!dev)
  688. return;
  689. ieee80211_unregister_hw(dev);
  690. priv = dev->priv;
  691. usb_put_dev(interface_to_usbdev(intf));
  692. ieee80211_free_hw(dev);
  693. }
  694. static struct usb_driver rtl8187_driver = {
  695. .name = KBUILD_MODNAME,
  696. .id_table = rtl8187_table,
  697. .probe = rtl8187_probe,
  698. .disconnect = rtl8187_disconnect,
  699. };
  700. static int __init rtl8187_init(void)
  701. {
  702. return usb_register(&rtl8187_driver);
  703. }
  704. static void __exit rtl8187_exit(void)
  705. {
  706. usb_deregister(&rtl8187_driver);
  707. }
  708. module_init(rtl8187_init);
  709. module_exit(rtl8187_exit);