nsp32.c 90 KB

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  1. /*
  2. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  3. * Copyright (C) 2001, 2002, 2003
  4. * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  5. * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. *
  18. * Revision History:
  19. * 1.0: Initial Release.
  20. * 1.1: Add /proc SDTR status.
  21. * Remove obsolete error handler nsp32_reset.
  22. * Some clean up.
  23. * 1.2: PowerPC (big endian) support.
  24. */
  25. #include <linux/version.h>
  26. #include <linux/module.h>
  27. #include <linux/init.h>
  28. #include <linux/kernel.h>
  29. #include <linux/slab.h>
  30. #include <linux/string.h>
  31. #include <linux/timer.h>
  32. #include <linux/ioport.h>
  33. #include <linux/major.h>
  34. #include <linux/blkdev.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/pci.h>
  37. #include <linux/delay.h>
  38. #include <linux/ctype.h>
  39. #include <linux/dma-mapping.h>
  40. #include <asm/dma.h>
  41. #include <asm/system.h>
  42. #include <asm/io.h>
  43. #include <scsi/scsi.h>
  44. #include <scsi/scsi_cmnd.h>
  45. #include <scsi/scsi_device.h>
  46. #include <scsi/scsi_host.h>
  47. #include <scsi/scsi_ioctl.h>
  48. #include "nsp32.h"
  49. /***********************************************************************
  50. * Module parameters
  51. */
  52. static int trans_mode = 0; /* default: BIOS */
  53. module_param (trans_mode, int, 0);
  54. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  55. #define ASYNC_MODE 1
  56. #define ULTRA20M_MODE 2
  57. static int auto_param = 0; /* default: ON */
  58. module_param (auto_param, bool, 0);
  59. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  60. static int disc_priv = 1; /* default: OFF */
  61. module_param (disc_priv, bool, 0);
  62. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  63. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  64. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  65. MODULE_LICENSE("GPL");
  66. static const char *nsp32_release_version = "1.2";
  67. /****************************************************************************
  68. * Supported hardware
  69. */
  70. static struct pci_device_id nsp32_pci_table[] __devinitdata = {
  71. {
  72. .vendor = PCI_VENDOR_ID_IODATA,
  73. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  74. .subvendor = PCI_ANY_ID,
  75. .subdevice = PCI_ANY_ID,
  76. .driver_data = MODEL_IODATA,
  77. },
  78. {
  79. .vendor = PCI_VENDOR_ID_WORKBIT,
  80. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  81. .subvendor = PCI_ANY_ID,
  82. .subdevice = PCI_ANY_ID,
  83. .driver_data = MODEL_KME,
  84. },
  85. {
  86. .vendor = PCI_VENDOR_ID_WORKBIT,
  87. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  88. .subvendor = PCI_ANY_ID,
  89. .subdevice = PCI_ANY_ID,
  90. .driver_data = MODEL_WORKBIT,
  91. },
  92. {
  93. .vendor = PCI_VENDOR_ID_WORKBIT,
  94. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  95. .subvendor = PCI_ANY_ID,
  96. .subdevice = PCI_ANY_ID,
  97. .driver_data = MODEL_PCI_WORKBIT,
  98. },
  99. {
  100. .vendor = PCI_VENDOR_ID_WORKBIT,
  101. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  102. .subvendor = PCI_ANY_ID,
  103. .subdevice = PCI_ANY_ID,
  104. .driver_data = MODEL_LOGITEC,
  105. },
  106. {
  107. .vendor = PCI_VENDOR_ID_WORKBIT,
  108. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  109. .subvendor = PCI_ANY_ID,
  110. .subdevice = PCI_ANY_ID,
  111. .driver_data = MODEL_PCI_LOGITEC,
  112. },
  113. {
  114. .vendor = PCI_VENDOR_ID_WORKBIT,
  115. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  116. .subvendor = PCI_ANY_ID,
  117. .subdevice = PCI_ANY_ID,
  118. .driver_data = MODEL_PCI_MELCO,
  119. },
  120. {
  121. .vendor = PCI_VENDOR_ID_WORKBIT,
  122. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  123. .subvendor = PCI_ANY_ID,
  124. .subdevice = PCI_ANY_ID,
  125. .driver_data = MODEL_PCI_MELCO,
  126. },
  127. {0,0,},
  128. };
  129. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  130. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  131. /*
  132. * Period/AckWidth speed conversion table
  133. *
  134. * Note: This period/ackwidth speed table must be in descending order.
  135. */
  136. static nsp32_sync_table nsp32_sync_table_40M[] = {
  137. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  138. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  139. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  140. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  141. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  142. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  143. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  144. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  145. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  146. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  147. };
  148. static nsp32_sync_table nsp32_sync_table_20M[] = {
  149. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  150. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  151. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  152. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  153. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  154. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  155. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  156. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  157. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  158. };
  159. static nsp32_sync_table nsp32_sync_table_pci[] = {
  160. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  161. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  162. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  163. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  164. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  165. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  166. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  167. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  168. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  169. };
  170. /*
  171. * function declaration
  172. */
  173. /* module entry point */
  174. static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  175. static void __devexit nsp32_remove(struct pci_dev *);
  176. static int __init init_nsp32 (void);
  177. static void __exit exit_nsp32 (void);
  178. /* struct struct scsi_host_template */
  179. static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
  180. static int nsp32_detect (struct pci_dev *pdev);
  181. static int nsp32_queuecommand(struct scsi_cmnd *,
  182. void (*done)(struct scsi_cmnd *));
  183. static const char *nsp32_info (struct Scsi_Host *);
  184. static int nsp32_release (struct Scsi_Host *);
  185. /* SCSI error handler */
  186. static int nsp32_eh_abort (struct scsi_cmnd *);
  187. static int nsp32_eh_bus_reset (struct scsi_cmnd *);
  188. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  189. /* generate SCSI message */
  190. static void nsp32_build_identify(struct scsi_cmnd *);
  191. static void nsp32_build_nop (struct scsi_cmnd *);
  192. static void nsp32_build_reject (struct scsi_cmnd *);
  193. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
  194. /* SCSI message handler */
  195. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  196. static void nsp32_msgout_occur (struct scsi_cmnd *);
  197. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
  198. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  199. static int nsp32_selection_autopara(struct scsi_cmnd *);
  200. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  201. static void nsp32_scsi_done (struct scsi_cmnd *);
  202. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  203. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  204. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  205. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  206. /* SCSI SDTR */
  207. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  208. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
  209. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  210. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
  211. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
  212. /* SCSI bus status handler */
  213. static void nsp32_wait_req (nsp32_hw_data *, int);
  214. static void nsp32_wait_sack (nsp32_hw_data *, int);
  215. static void nsp32_sack_assert (nsp32_hw_data *);
  216. static void nsp32_sack_negate (nsp32_hw_data *);
  217. static void nsp32_do_bus_reset(nsp32_hw_data *);
  218. /* hardware interrupt handler */
  219. static irqreturn_t do_nsp32_isr(int, void *);
  220. /* initialize hardware */
  221. static int nsp32hw_init(nsp32_hw_data *);
  222. /* EEPROM handler */
  223. static int nsp32_getprom_param (nsp32_hw_data *);
  224. static int nsp32_getprom_at24 (nsp32_hw_data *);
  225. static int nsp32_getprom_c16 (nsp32_hw_data *);
  226. static void nsp32_prom_start (nsp32_hw_data *);
  227. static void nsp32_prom_stop (nsp32_hw_data *);
  228. static int nsp32_prom_read (nsp32_hw_data *, int);
  229. static int nsp32_prom_read_bit (nsp32_hw_data *);
  230. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  231. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  232. static int nsp32_prom_get (nsp32_hw_data *, int);
  233. /* debug/warning/info message */
  234. static void nsp32_message (const char *, int, char *, char *, ...);
  235. #ifdef NSP32_DEBUG
  236. static void nsp32_dmessage(const char *, int, int, char *, ...);
  237. #endif
  238. /*
  239. * max_sectors is currently limited up to 128.
  240. */
  241. static struct scsi_host_template nsp32_template = {
  242. .proc_name = "nsp32",
  243. .name = "Workbit NinjaSCSI-32Bi/UDE",
  244. .proc_info = nsp32_proc_info,
  245. .info = nsp32_info,
  246. .queuecommand = nsp32_queuecommand,
  247. .can_queue = 1,
  248. .sg_tablesize = NSP32_SG_SIZE,
  249. .max_sectors = 128,
  250. .cmd_per_lun = 1,
  251. .this_id = NSP32_HOST_SCSIID,
  252. .use_clustering = DISABLE_CLUSTERING,
  253. .eh_abort_handler = nsp32_eh_abort,
  254. .eh_bus_reset_handler = nsp32_eh_bus_reset,
  255. .eh_host_reset_handler = nsp32_eh_host_reset,
  256. /* .highmem_io = 1, */
  257. };
  258. #include "nsp32_io.h"
  259. /***********************************************************************
  260. * debug, error print
  261. */
  262. #ifndef NSP32_DEBUG
  263. # define NSP32_DEBUG_MASK 0x000000
  264. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  265. # define nsp32_dbg(mask, args...) /* */
  266. #else
  267. # define NSP32_DEBUG_MASK 0xffffff
  268. # define nsp32_msg(type, args...) \
  269. nsp32_message (__FUNCTION__, __LINE__, (type), args)
  270. # define nsp32_dbg(mask, args...) \
  271. nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args)
  272. #endif
  273. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  274. #define NSP32_DEBUG_REGISTER BIT(1)
  275. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  276. #define NSP32_DEBUG_INTR BIT(3)
  277. #define NSP32_DEBUG_SGLIST BIT(4)
  278. #define NSP32_DEBUG_BUSFREE BIT(5)
  279. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  280. #define NSP32_DEBUG_RESELECTION BIT(7)
  281. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  282. #define NSP32_DEBUG_EEPROM BIT(9)
  283. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  284. #define NSP32_DEBUG_BUSRESET BIT(11)
  285. #define NSP32_DEBUG_RESTART BIT(12)
  286. #define NSP32_DEBUG_SYNC BIT(13)
  287. #define NSP32_DEBUG_WAIT BIT(14)
  288. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  289. #define NSP32_DEBUG_PROC BIT(16)
  290. #define NSP32_DEBUG_INIT BIT(17)
  291. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  292. #define NSP32_DEBUG_BUF_LEN 100
  293. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  294. {
  295. va_list args;
  296. char buf[NSP32_DEBUG_BUF_LEN];
  297. va_start(args, fmt);
  298. vsnprintf(buf, sizeof(buf), fmt, args);
  299. va_end(args);
  300. #ifndef NSP32_DEBUG
  301. printk("%snsp32: %s\n", type, buf);
  302. #else
  303. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  304. #endif
  305. }
  306. #ifdef NSP32_DEBUG
  307. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  308. {
  309. va_list args;
  310. char buf[NSP32_DEBUG_BUF_LEN];
  311. va_start(args, fmt);
  312. vsnprintf(buf, sizeof(buf), fmt, args);
  313. va_end(args);
  314. if (mask & NSP32_DEBUG_MASK) {
  315. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  316. }
  317. }
  318. #endif
  319. #ifdef NSP32_DEBUG
  320. # include "nsp32_debug.c"
  321. #else
  322. # define show_command(arg) /* */
  323. # define show_busphase(arg) /* */
  324. # define show_autophase(arg) /* */
  325. #endif
  326. /*
  327. * IDENTIFY Message
  328. */
  329. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  330. {
  331. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  332. int pos = data->msgout_len;
  333. int mode = FALSE;
  334. /* XXX: Auto DiscPriv detection is progressing... */
  335. if (disc_priv == 0) {
  336. /* mode = TRUE; */
  337. }
  338. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  339. data->msgout_len = pos;
  340. }
  341. /*
  342. * SDTR Message Routine
  343. */
  344. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  345. unsigned char period,
  346. unsigned char offset)
  347. {
  348. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  349. int pos = data->msgout_len;
  350. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  351. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  352. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  353. data->msgoutbuf[pos] = period; pos++;
  354. data->msgoutbuf[pos] = offset; pos++;
  355. data->msgout_len = pos;
  356. }
  357. /*
  358. * No Operation Message
  359. */
  360. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  361. {
  362. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  363. int pos = data->msgout_len;
  364. if (pos != 0) {
  365. nsp32_msg(KERN_WARNING,
  366. "Some messages are already contained!");
  367. return;
  368. }
  369. data->msgoutbuf[pos] = NOP; pos++;
  370. data->msgout_len = pos;
  371. }
  372. /*
  373. * Reject Message
  374. */
  375. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  376. {
  377. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  378. int pos = data->msgout_len;
  379. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  380. data->msgout_len = pos;
  381. }
  382. /*
  383. * timer
  384. */
  385. #if 0
  386. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  387. {
  388. unsigned int base = SCpnt->host->io_port;
  389. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  390. if (time & (~TIMER_CNT_MASK)) {
  391. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  392. }
  393. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  394. }
  395. #endif
  396. /*
  397. * set SCSI command and other parameter to asic, and start selection phase
  398. */
  399. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  400. {
  401. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  402. unsigned int base = SCpnt->device->host->io_port;
  403. unsigned int host_id = SCpnt->device->host->this_id;
  404. unsigned char target = scmd_id(SCpnt);
  405. nsp32_autoparam *param = data->autoparam;
  406. unsigned char phase;
  407. int i, ret;
  408. unsigned int msgout;
  409. u16_le s;
  410. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  411. /*
  412. * check bus free
  413. */
  414. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  415. if (phase != BUSMON_BUS_FREE) {
  416. nsp32_msg(KERN_WARNING, "bus busy");
  417. show_busphase(phase & BUSMON_PHASE_MASK);
  418. SCpnt->result = DID_BUS_BUSY << 16;
  419. return FALSE;
  420. }
  421. /*
  422. * message out
  423. *
  424. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  425. * over 3 messages needs another routine.
  426. */
  427. if (data->msgout_len == 0) {
  428. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  429. SCpnt->result = DID_ERROR << 16;
  430. return FALSE;
  431. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  432. msgout = 0;
  433. for (i = 0; i < data->msgout_len; i++) {
  434. /*
  435. * the sending order of the message is:
  436. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  437. * MCNT 2: MSG#1 -> MSG#2
  438. * MCNT 1: MSG#2
  439. */
  440. msgout >>= 8;
  441. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  442. }
  443. msgout |= MV_VALID; /* MV valid */
  444. msgout |= (unsigned int)data->msgout_len; /* len */
  445. } else {
  446. /* data->msgout_len > 3 */
  447. msgout = 0;
  448. }
  449. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
  450. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  451. /*
  452. * setup asic parameter
  453. */
  454. memset(param, 0, sizeof(nsp32_autoparam));
  455. /* cdb */
  456. for (i = 0; i < SCpnt->cmd_len; i++) {
  457. param->cdb[4 * i] = SCpnt->cmnd[i];
  458. }
  459. /* outgoing messages */
  460. param->msgout = cpu_to_le32(msgout);
  461. /* syncreg, ackwidth, target id, SREQ sampling rate */
  462. param->syncreg = data->cur_target->syncreg;
  463. param->ackwidth = data->cur_target->ackwidth;
  464. param->target_id = BIT(host_id) | BIT(target);
  465. param->sample_reg = data->cur_target->sample_reg;
  466. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  467. /* command control */
  468. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  469. AUTOSCSI_START |
  470. AUTO_MSGIN_00_OR_04 |
  471. AUTO_MSGIN_02 |
  472. AUTO_ATN );
  473. /* transfer control */
  474. s = 0;
  475. switch (data->trans_method) {
  476. case NSP32_TRANSFER_BUSMASTER:
  477. s |= BM_START;
  478. break;
  479. case NSP32_TRANSFER_MMIO:
  480. s |= CB_MMIO_MODE;
  481. break;
  482. case NSP32_TRANSFER_PIO:
  483. s |= CB_IO_MODE;
  484. break;
  485. default:
  486. nsp32_msg(KERN_ERR, "unknown trans_method");
  487. break;
  488. }
  489. /*
  490. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  491. * For bus master transfer, it's taken off.
  492. */
  493. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  494. param->transfer_control = cpu_to_le16(s);
  495. /* sg table addr */
  496. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  497. /*
  498. * transfer parameter to ASIC
  499. */
  500. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  501. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
  502. AUTO_PARAMETER );
  503. /*
  504. * Check arbitration
  505. */
  506. ret = nsp32_arbitration(SCpnt, base);
  507. return ret;
  508. }
  509. /*
  510. * Selection with AUTO SCSI (without AUTO PARAMETER)
  511. */
  512. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  513. {
  514. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  515. unsigned int base = SCpnt->device->host->io_port;
  516. unsigned int host_id = SCpnt->device->host->this_id;
  517. unsigned char target = scmd_id(SCpnt);
  518. unsigned char phase;
  519. int status;
  520. unsigned short command = 0;
  521. unsigned int msgout = 0;
  522. unsigned short execph;
  523. int i;
  524. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  525. /*
  526. * IRQ disable
  527. */
  528. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  529. /*
  530. * check bus line
  531. */
  532. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  533. if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
  534. nsp32_msg(KERN_WARNING, "bus busy");
  535. SCpnt->result = DID_BUS_BUSY << 16;
  536. status = 1;
  537. goto out;
  538. }
  539. /*
  540. * clear execph
  541. */
  542. execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  543. /*
  544. * clear FIFO counter to set CDBs
  545. */
  546. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  547. /*
  548. * set CDB0 - CDB15
  549. */
  550. for (i = 0; i < SCpnt->cmd_len; i++) {
  551. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  552. }
  553. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  554. /*
  555. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  556. */
  557. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
  558. /*
  559. * set SCSI MSGOUT REG
  560. *
  561. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  562. * over 3 messages needs another routine.
  563. */
  564. if (data->msgout_len == 0) {
  565. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  566. SCpnt->result = DID_ERROR << 16;
  567. status = 1;
  568. goto out;
  569. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  570. msgout = 0;
  571. for (i = 0; i < data->msgout_len; i++) {
  572. /*
  573. * the sending order of the message is:
  574. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  575. * MCNT 2: MSG#1 -> MSG#2
  576. * MCNT 1: MSG#2
  577. */
  578. msgout >>= 8;
  579. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  580. }
  581. msgout |= MV_VALID; /* MV valid */
  582. msgout |= (unsigned int)data->msgout_len; /* len */
  583. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  584. } else {
  585. /* data->msgout_len > 3 */
  586. nsp32_write4(base, SCSI_MSG_OUT, 0);
  587. }
  588. /*
  589. * set selection timeout(= 250ms)
  590. */
  591. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  592. /*
  593. * set SREQ hazard killer sampling rate
  594. *
  595. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  596. * check other internal clock!
  597. */
  598. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  599. /*
  600. * clear Arbit
  601. */
  602. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  603. /*
  604. * set SYNCREG
  605. * Don't set BM_START_ADR before setting this register.
  606. */
  607. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  608. /*
  609. * set ACKWIDTH
  610. */
  611. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  612. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  613. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  614. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  615. nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  616. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  617. data->msgout_len, msgout);
  618. /*
  619. * set SGT ADDR (physical address)
  620. */
  621. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  622. /*
  623. * set TRANSFER CONTROL REG
  624. */
  625. command = 0;
  626. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  627. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  628. if (scsi_bufflen(SCpnt) > 0) {
  629. command |= BM_START;
  630. }
  631. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  632. command |= CB_MMIO_MODE;
  633. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  634. command |= CB_IO_MODE;
  635. }
  636. nsp32_write2(base, TRANSFER_CONTROL, command);
  637. /*
  638. * start AUTO SCSI, kick off arbitration
  639. */
  640. command = (CLEAR_CDB_FIFO_POINTER |
  641. AUTOSCSI_START |
  642. AUTO_MSGIN_00_OR_04 |
  643. AUTO_MSGIN_02 |
  644. AUTO_ATN );
  645. nsp32_write2(base, COMMAND_CONTROL, command);
  646. /*
  647. * Check arbitration
  648. */
  649. status = nsp32_arbitration(SCpnt, base);
  650. out:
  651. /*
  652. * IRQ enable
  653. */
  654. nsp32_write2(base, IRQ_CONTROL, 0);
  655. return status;
  656. }
  657. /*
  658. * Arbitration Status Check
  659. *
  660. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  661. * Using udelay(1) consumes CPU time and system time, but
  662. * arbitration delay time is defined minimal 2.4us in SCSI
  663. * specification, thus udelay works as coarse grained wait timer.
  664. */
  665. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  666. {
  667. unsigned char arbit;
  668. int status = TRUE;
  669. int time = 0;
  670. do {
  671. arbit = nsp32_read1(base, ARBIT_STATUS);
  672. time++;
  673. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  674. (time <= ARBIT_TIMEOUT_TIME));
  675. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  676. "arbit: 0x%x, delay time: %d", arbit, time);
  677. if (arbit & ARBIT_WIN) {
  678. /* Arbitration succeeded */
  679. SCpnt->result = DID_OK << 16;
  680. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  681. } else if (arbit & ARBIT_FAIL) {
  682. /* Arbitration failed */
  683. SCpnt->result = DID_BUS_BUSY << 16;
  684. status = FALSE;
  685. } else {
  686. /*
  687. * unknown error or ARBIT_GO timeout,
  688. * something lock up! guess no connection.
  689. */
  690. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  691. SCpnt->result = DID_NO_CONNECT << 16;
  692. status = FALSE;
  693. }
  694. /*
  695. * clear Arbit
  696. */
  697. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  698. return status;
  699. }
  700. /*
  701. * reselection
  702. *
  703. * Note: This reselection routine is called from msgin_occur,
  704. * reselection target id&lun must be already set.
  705. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  706. */
  707. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  708. {
  709. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  710. unsigned int host_id = SCpnt->device->host->this_id;
  711. unsigned int base = SCpnt->device->host->io_port;
  712. unsigned char tmpid, newid;
  713. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  714. /*
  715. * calculate reselected SCSI ID
  716. */
  717. tmpid = nsp32_read1(base, RESELECT_ID);
  718. tmpid &= (~BIT(host_id));
  719. newid = 0;
  720. while (tmpid) {
  721. if (tmpid & 1) {
  722. break;
  723. }
  724. tmpid >>= 1;
  725. newid++;
  726. }
  727. /*
  728. * If reselected New ID:LUN is not existed
  729. * or current nexus is not existed, unexpected
  730. * reselection is occurred. Send reject message.
  731. */
  732. if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
  733. nsp32_msg(KERN_WARNING, "unknown id/lun");
  734. return FALSE;
  735. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  736. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  737. return FALSE;
  738. }
  739. data->cur_id = newid;
  740. data->cur_lun = newlun;
  741. data->cur_target = &(data->target[newid]);
  742. data->cur_lunt = &(data->lunt[newid][newlun]);
  743. /* reset SACK/SavedACK counter (or ALL clear?) */
  744. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  745. return TRUE;
  746. }
  747. /*
  748. * nsp32_setup_sg_table - build scatter gather list for transfer data
  749. * with bus master.
  750. *
  751. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  752. */
  753. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  754. {
  755. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  756. struct scatterlist *sg;
  757. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  758. int num, i;
  759. u32_le l;
  760. if (sgt == NULL) {
  761. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  762. return FALSE;
  763. }
  764. num = scsi_dma_map(SCpnt);
  765. if (!num)
  766. return TRUE;
  767. else if (num < 0)
  768. return FALSE;
  769. else {
  770. scsi_for_each_sg(SCpnt, sg, num, i) {
  771. /*
  772. * Build nsp32_sglist, substitute sg dma addresses.
  773. */
  774. sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
  775. sgt[i].len = cpu_to_le32(sg_dma_len(sg));
  776. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  777. nsp32_msg(KERN_ERR,
  778. "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
  779. return FALSE;
  780. }
  781. nsp32_dbg(NSP32_DEBUG_SGLIST,
  782. "num 0x%x : addr 0x%lx len 0x%lx",
  783. i,
  784. le32_to_cpu(sgt[i].addr),
  785. le32_to_cpu(sgt[i].len ));
  786. }
  787. /* set end mark */
  788. l = le32_to_cpu(sgt[num-1].len);
  789. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  790. }
  791. return TRUE;
  792. }
  793. static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  794. {
  795. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  796. nsp32_target *target;
  797. nsp32_lunt *cur_lunt;
  798. int ret;
  799. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  800. "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
  801. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  802. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
  803. scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
  804. if (data->CurrentSC != NULL) {
  805. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  806. data->CurrentSC = NULL;
  807. SCpnt->result = DID_NO_CONNECT << 16;
  808. done(SCpnt);
  809. return 0;
  810. }
  811. /* check target ID is not same as this initiator ID */
  812. if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
  813. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
  814. SCpnt->result = DID_BAD_TARGET << 16;
  815. done(SCpnt);
  816. return 0;
  817. }
  818. /* check target LUN is allowable value */
  819. if (SCpnt->device->lun >= MAX_LUN) {
  820. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  821. SCpnt->result = DID_BAD_TARGET << 16;
  822. done(SCpnt);
  823. return 0;
  824. }
  825. show_command(SCpnt);
  826. SCpnt->scsi_done = done;
  827. data->CurrentSC = SCpnt;
  828. SCpnt->SCp.Status = CHECK_CONDITION;
  829. SCpnt->SCp.Message = 0;
  830. scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
  831. SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
  832. SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
  833. SCpnt->SCp.buffer = NULL;
  834. SCpnt->SCp.buffers_residual = 0;
  835. /* initialize data */
  836. data->msgout_len = 0;
  837. data->msgin_len = 0;
  838. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  839. cur_lunt->SCpnt = SCpnt;
  840. cur_lunt->save_datp = 0;
  841. cur_lunt->msgin03 = FALSE;
  842. data->cur_lunt = cur_lunt;
  843. data->cur_id = SCpnt->device->id;
  844. data->cur_lun = SCpnt->device->lun;
  845. ret = nsp32_setup_sg_table(SCpnt);
  846. if (ret == FALSE) {
  847. nsp32_msg(KERN_ERR, "SGT fail");
  848. SCpnt->result = DID_ERROR << 16;
  849. nsp32_scsi_done(SCpnt);
  850. return 0;
  851. }
  852. /* Build IDENTIFY */
  853. nsp32_build_identify(SCpnt);
  854. /*
  855. * If target is the first time to transfer after the reset
  856. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  857. * message SDTR is needed to do synchronous transfer.
  858. */
  859. target = &data->target[scmd_id(SCpnt)];
  860. data->cur_target = target;
  861. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  862. unsigned char period, offset;
  863. if (trans_mode != ASYNC_MODE) {
  864. nsp32_set_max_sync(data, target, &period, &offset);
  865. nsp32_build_sdtr(SCpnt, period, offset);
  866. target->sync_flag |= SDTR_INITIATOR;
  867. } else {
  868. nsp32_set_async(data, target);
  869. target->sync_flag |= SDTR_DONE;
  870. }
  871. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  872. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  873. target->limit_entry, period, offset);
  874. } else if (target->sync_flag & SDTR_INITIATOR) {
  875. /*
  876. * It was negotiating SDTR with target, sending from the
  877. * initiator, but there are no chance to remove this flag.
  878. * Set async because we don't get proper negotiation.
  879. */
  880. nsp32_set_async(data, target);
  881. target->sync_flag &= ~SDTR_INITIATOR;
  882. target->sync_flag |= SDTR_DONE;
  883. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  884. "SDTR_INITIATOR: fall back to async");
  885. } else if (target->sync_flag & SDTR_TARGET) {
  886. /*
  887. * It was negotiating SDTR with target, sending from target,
  888. * but there are no chance to remove this flag. Set async
  889. * because we don't get proper negotiation.
  890. */
  891. nsp32_set_async(data, target);
  892. target->sync_flag &= ~SDTR_TARGET;
  893. target->sync_flag |= SDTR_DONE;
  894. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  895. "Unknown SDTR from target is reached, fall back to async.");
  896. }
  897. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  898. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  899. SCpnt->device->id, target->sync_flag, target->syncreg,
  900. target->ackwidth);
  901. /* Selection */
  902. if (auto_param == 0) {
  903. ret = nsp32_selection_autopara(SCpnt);
  904. } else {
  905. ret = nsp32_selection_autoscsi(SCpnt);
  906. }
  907. if (ret != TRUE) {
  908. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  909. nsp32_scsi_done(SCpnt);
  910. }
  911. return 0;
  912. }
  913. /* initialize asic */
  914. static int nsp32hw_init(nsp32_hw_data *data)
  915. {
  916. unsigned int base = data->BaseAddress;
  917. unsigned short irq_stat;
  918. unsigned long lc_reg;
  919. unsigned char power;
  920. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  921. if ((lc_reg & 0xff00) == 0) {
  922. lc_reg |= (0x20 << 8);
  923. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  924. }
  925. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  926. nsp32_write2(base, TRANSFER_CONTROL, 0);
  927. nsp32_write4(base, BM_CNT, 0);
  928. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  929. do {
  930. irq_stat = nsp32_read2(base, IRQ_STATUS);
  931. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  932. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  933. /*
  934. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  935. * designated by specification.
  936. */
  937. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  938. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  939. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  940. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  941. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  942. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  943. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  944. } else {
  945. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  946. }
  947. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  948. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  949. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  950. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  951. nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  952. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  953. /*
  954. * initialize MISC_WRRD register
  955. *
  956. * Note: Designated parameters is obeyed as following:
  957. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  958. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  959. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  960. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  961. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  962. * MISC_DELAYED_BMSTART: It's selected for safety.
  963. *
  964. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  965. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  966. * appropriate value before restarting bus master transfer.
  967. */
  968. nsp32_index_write2(base, MISC_WR,
  969. (SCSI_DIRECTION_DETECTOR_SELECT |
  970. DELAYED_BMSTART |
  971. MASTER_TERMINATION_SELECT |
  972. BMREQ_NEGATE_TIMING_SEL |
  973. AUTOSEL_TIMING_SEL |
  974. BMSTOP_CHANGE2_NONDATA_PHASE));
  975. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  976. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  977. if (!(power & SENSE)) {
  978. nsp32_msg(KERN_INFO, "term power on");
  979. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  980. }
  981. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  982. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  983. nsp32_write1(base, SYNC_REG, 0);
  984. nsp32_write1(base, ACK_WIDTH, 0);
  985. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  986. /*
  987. * enable to select designated IRQ (except for
  988. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  989. */
  990. nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
  991. IRQSELECT_SCSIRESET_IRQ |
  992. IRQSELECT_FIFO_SHLD_IRQ |
  993. IRQSELECT_RESELECT_IRQ |
  994. IRQSELECT_PHASE_CHANGE_IRQ |
  995. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  996. // IRQSELECT_BMCNTERR_IRQ |
  997. IRQSELECT_TARGET_ABORT_IRQ |
  998. IRQSELECT_MASTER_ABORT_IRQ );
  999. nsp32_write2(base, IRQ_CONTROL, 0);
  1000. /* PCI LED off */
  1001. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  1002. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  1003. return TRUE;
  1004. }
  1005. /* interrupt routine */
  1006. static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
  1007. {
  1008. nsp32_hw_data *data = dev_id;
  1009. unsigned int base = data->BaseAddress;
  1010. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1011. unsigned short auto_stat, irq_stat, trans_stat;
  1012. unsigned char busmon, busphase;
  1013. unsigned long flags;
  1014. int ret;
  1015. int handled = 0;
  1016. struct Scsi_Host *host = data->Host;
  1017. spin_lock_irqsave(host->host_lock, flags);
  1018. /*
  1019. * IRQ check, then enable IRQ mask
  1020. */
  1021. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1022. nsp32_dbg(NSP32_DEBUG_INTR,
  1023. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1024. /* is this interrupt comes from Ninja asic? */
  1025. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1026. nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
  1027. goto out2;
  1028. }
  1029. handled = 1;
  1030. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1031. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1032. busphase = busmon & BUSMON_PHASE_MASK;
  1033. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1034. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1035. nsp32_msg(KERN_INFO, "card disconnect");
  1036. if (data->CurrentSC != NULL) {
  1037. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1038. SCpnt->result = DID_BAD_TARGET << 16;
  1039. nsp32_scsi_done(SCpnt);
  1040. }
  1041. goto out;
  1042. }
  1043. /* Timer IRQ */
  1044. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1045. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1046. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1047. goto out;
  1048. }
  1049. /* SCSI reset */
  1050. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1051. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1052. nsp32_do_bus_reset(data);
  1053. if (SCpnt != NULL) {
  1054. SCpnt->result = DID_RESET << 16;
  1055. nsp32_scsi_done(SCpnt);
  1056. }
  1057. goto out;
  1058. }
  1059. if (SCpnt == NULL) {
  1060. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1061. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1062. goto out;
  1063. }
  1064. /*
  1065. * AutoSCSI Interrupt.
  1066. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1067. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1068. * recorded when AutoSCSI sequencer has been processed.
  1069. */
  1070. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1071. /* getting SCSI executed phase */
  1072. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1073. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1074. /* Selection Timeout, go busfree phase. */
  1075. if (auto_stat & SELECTION_TIMEOUT) {
  1076. nsp32_dbg(NSP32_DEBUG_INTR,
  1077. "selection timeout occurred");
  1078. SCpnt->result = DID_TIME_OUT << 16;
  1079. nsp32_scsi_done(SCpnt);
  1080. goto out;
  1081. }
  1082. if (auto_stat & MSGOUT_PHASE) {
  1083. /*
  1084. * MsgOut phase was processed.
  1085. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1086. * completed. Thus, msgout_len must reset. Otherwise,
  1087. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1088. * then we will encounter the condition and check.
  1089. */
  1090. if (!(auto_stat & MSG_IN_OCCUER) &&
  1091. (data->msgout_len <= 3)) {
  1092. /*
  1093. * !MSG_IN_OCCUER && msgout_len <=3
  1094. * ---> AutoSCSI with MSGOUTreg is processed.
  1095. */
  1096. data->msgout_len = 0;
  1097. };
  1098. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1099. }
  1100. if ((auto_stat & DATA_IN_PHASE) &&
  1101. (scsi_get_resid(SCpnt) > 0) &&
  1102. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1103. printk( "auto+fifo\n");
  1104. //nsp32_pio_read(SCpnt);
  1105. }
  1106. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1107. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1108. nsp32_dbg(NSP32_DEBUG_INTR,
  1109. "Data in/out phase processed");
  1110. /* read BMCNT, SGT pointer addr */
  1111. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1112. nsp32_read4(base, BM_CNT));
  1113. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1114. nsp32_read4(base, SGT_ADR));
  1115. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1116. nsp32_read4(base, SACK_CNT));
  1117. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1118. nsp32_read4(base, SAVED_SACK_CNT));
  1119. scsi_set_resid(SCpnt, 0); /* all data transfered! */
  1120. }
  1121. /*
  1122. * MsgIn Occur
  1123. */
  1124. if (auto_stat & MSG_IN_OCCUER) {
  1125. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1126. }
  1127. /*
  1128. * MsgOut Occur
  1129. */
  1130. if (auto_stat & MSG_OUT_OCCUER) {
  1131. nsp32_msgout_occur(SCpnt);
  1132. }
  1133. /*
  1134. * Bus Free Occur
  1135. */
  1136. if (auto_stat & BUS_FREE_OCCUER) {
  1137. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1138. if (ret == TRUE) {
  1139. goto out;
  1140. }
  1141. }
  1142. if (auto_stat & STATUS_PHASE) {
  1143. /*
  1144. * Read CSB and substitute CSB for SCpnt->result
  1145. * to save status phase stutas byte.
  1146. * scsi error handler checks host_byte (DID_*:
  1147. * low level driver to indicate status), then checks
  1148. * status_byte (SCSI status byte).
  1149. */
  1150. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1151. }
  1152. if (auto_stat & ILLEGAL_PHASE) {
  1153. /* Illegal phase is detected. SACK is not back. */
  1154. nsp32_msg(KERN_WARNING,
  1155. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1156. /* TODO: currently we don't have any action... bus reset? */
  1157. /*
  1158. * To send back SACK, assert, wait, and negate.
  1159. */
  1160. nsp32_sack_assert(data);
  1161. nsp32_wait_req(data, NEGATE);
  1162. nsp32_sack_negate(data);
  1163. }
  1164. if (auto_stat & COMMAND_PHASE) {
  1165. /* nothing to do */
  1166. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1167. }
  1168. if (auto_stat & AUTOSCSI_BUSY) {
  1169. /* AutoSCSI is running */
  1170. }
  1171. show_autophase(auto_stat);
  1172. }
  1173. /* FIFO_SHLD_IRQ */
  1174. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1175. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1176. switch(busphase) {
  1177. case BUSPHASE_DATA_OUT:
  1178. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1179. //nsp32_pio_write(SCpnt);
  1180. break;
  1181. case BUSPHASE_DATA_IN:
  1182. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1183. //nsp32_pio_read(SCpnt);
  1184. break;
  1185. case BUSPHASE_STATUS:
  1186. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1187. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1188. break;
  1189. default:
  1190. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1191. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1192. show_busphase(busphase);
  1193. break;
  1194. }
  1195. goto out;
  1196. }
  1197. /* Phase Change IRQ */
  1198. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1199. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1200. switch(busphase) {
  1201. case BUSPHASE_MESSAGE_IN:
  1202. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1203. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1204. break;
  1205. default:
  1206. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1207. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1208. irq_stat, trans_stat);
  1209. show_busphase(busphase);
  1210. break;
  1211. }
  1212. goto out;
  1213. }
  1214. /* PCI_IRQ */
  1215. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1216. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1217. /* Do nothing */
  1218. }
  1219. /* BMCNTERR_IRQ */
  1220. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1221. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1222. /*
  1223. * TODO: To be implemented improving bus master
  1224. * transfer reliablity when BMCNTERR is occurred in
  1225. * AutoSCSI phase described in specification.
  1226. */
  1227. }
  1228. #if 0
  1229. nsp32_dbg(NSP32_DEBUG_INTR,
  1230. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1231. show_busphase(busphase);
  1232. #endif
  1233. out:
  1234. /* disable IRQ mask */
  1235. nsp32_write2(base, IRQ_CONTROL, 0);
  1236. out2:
  1237. spin_unlock_irqrestore(host->host_lock, flags);
  1238. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1239. return IRQ_RETVAL(handled);
  1240. }
  1241. #undef SPRINTF
  1242. #define SPRINTF(args...) \
  1243. do { \
  1244. if(length > (pos - buffer)) { \
  1245. pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
  1246. nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
  1247. } \
  1248. } while(0)
  1249. static int nsp32_proc_info(struct Scsi_Host *host, char *buffer, char **start,
  1250. off_t offset, int length, int inout)
  1251. {
  1252. char *pos = buffer;
  1253. int thislength;
  1254. unsigned long flags;
  1255. nsp32_hw_data *data;
  1256. int hostno;
  1257. unsigned int base;
  1258. unsigned char mode_reg;
  1259. int id, speed;
  1260. long model;
  1261. /* Write is not supported, just return. */
  1262. if (inout == TRUE) {
  1263. return -EINVAL;
  1264. }
  1265. hostno = host->host_no;
  1266. data = (nsp32_hw_data *)host->hostdata;
  1267. base = host->io_port;
  1268. SPRINTF("NinjaSCSI-32 status\n\n");
  1269. SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
  1270. SPRINTF("SCSI host No.: %d\n", hostno);
  1271. SPRINTF("IRQ: %d\n", host->irq);
  1272. SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
  1273. SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
  1274. SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
  1275. SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1276. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1277. model = data->pci_devid->driver_data;
  1278. #ifdef CONFIG_PM
  1279. SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
  1280. #endif
  1281. SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1282. spin_lock_irqsave(&(data->Lock), flags);
  1283. SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
  1284. spin_unlock_irqrestore(&(data->Lock), flags);
  1285. SPRINTF("SDTR status\n");
  1286. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1287. SPRINTF("id %d: ", id);
  1288. if (id == host->this_id) {
  1289. SPRINTF("----- NinjaSCSI-32 host adapter\n");
  1290. continue;
  1291. }
  1292. if (data->target[id].sync_flag == SDTR_DONE) {
  1293. if (data->target[id].period == 0 &&
  1294. data->target[id].offset == ASYNC_OFFSET ) {
  1295. SPRINTF("async");
  1296. } else {
  1297. SPRINTF(" sync");
  1298. }
  1299. } else {
  1300. SPRINTF(" none");
  1301. }
  1302. if (data->target[id].period != 0) {
  1303. speed = 1000000 / (data->target[id].period * 4);
  1304. SPRINTF(" transfer %d.%dMB/s, offset %d",
  1305. speed / 1000,
  1306. speed % 1000,
  1307. data->target[id].offset
  1308. );
  1309. }
  1310. SPRINTF("\n");
  1311. }
  1312. thislength = pos - (buffer + offset);
  1313. if(thislength < 0) {
  1314. *start = NULL;
  1315. return 0;
  1316. }
  1317. thislength = min(thislength, length);
  1318. *start = buffer + offset;
  1319. return thislength;
  1320. }
  1321. #undef SPRINTF
  1322. /*
  1323. * Reset parameters and call scsi_done for data->cur_lunt.
  1324. * Be careful setting SCpnt->result = DID_* before calling this function.
  1325. */
  1326. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1327. {
  1328. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1329. unsigned int base = SCpnt->device->host->io_port;
  1330. scsi_dma_unmap(SCpnt);
  1331. /*
  1332. * clear TRANSFERCONTROL_BM_START
  1333. */
  1334. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1335. nsp32_write4(base, BM_CNT, 0);
  1336. /*
  1337. * call scsi_done
  1338. */
  1339. (*SCpnt->scsi_done)(SCpnt);
  1340. /*
  1341. * reset parameters
  1342. */
  1343. data->cur_lunt->SCpnt = NULL;
  1344. data->cur_lunt = NULL;
  1345. data->cur_target = NULL;
  1346. data->CurrentSC = NULL;
  1347. }
  1348. /*
  1349. * Bus Free Occur
  1350. *
  1351. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1352. * with ACK reply when below condition is matched:
  1353. * MsgIn 00: Command Complete.
  1354. * MsgIn 02: Save Data Pointer.
  1355. * MsgIn 04: Diconnect.
  1356. * In other case, unexpected BUSFREE is detected.
  1357. */
  1358. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1359. {
  1360. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1361. unsigned int base = SCpnt->device->host->io_port;
  1362. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1363. show_autophase(execph);
  1364. nsp32_write4(base, BM_CNT, 0);
  1365. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1366. /*
  1367. * MsgIn 02: Save Data Pointer
  1368. *
  1369. * VALID:
  1370. * Save Data Pointer is received. Adjust pointer.
  1371. *
  1372. * NO-VALID:
  1373. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1374. * processing and we can't adjust any SCSI data pointer in next data
  1375. * phase.
  1376. */
  1377. if (execph & MSGIN_02_VALID) {
  1378. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1379. /*
  1380. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1381. * needed.
  1382. */
  1383. if (!(execph & MSGIN_00_VALID) &&
  1384. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1385. unsigned int sacklen, s_sacklen;
  1386. /*
  1387. * Read SACK count and SAVEDSACK count, then compare.
  1388. */
  1389. sacklen = nsp32_read4(base, SACK_CNT );
  1390. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1391. /*
  1392. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1393. * come after data transfering.
  1394. */
  1395. if (s_sacklen > 0) {
  1396. /*
  1397. * Comparing between sack and savedsack to
  1398. * check the condition of AutoMsgIn03.
  1399. *
  1400. * If they are same, set msgin03 == TRUE,
  1401. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1402. * reselection. On the other hand, if they
  1403. * aren't same, set msgin03 == FALSE, and
  1404. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1405. * reselection.
  1406. */
  1407. if (sacklen != s_sacklen) {
  1408. data->cur_lunt->msgin03 = FALSE;
  1409. } else {
  1410. data->cur_lunt->msgin03 = TRUE;
  1411. }
  1412. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1413. }
  1414. }
  1415. /* This value has not substitude with valid value yet... */
  1416. //data->cur_lunt->save_datp = data->cur_datp;
  1417. } else {
  1418. /*
  1419. * no processing.
  1420. */
  1421. }
  1422. if (execph & MSGIN_03_VALID) {
  1423. /* MsgIn03 was valid to be processed. No need processing. */
  1424. }
  1425. /*
  1426. * target SDTR check
  1427. */
  1428. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1429. /*
  1430. * SDTR negotiation pulled by the initiator has not
  1431. * finished yet. Fall back to ASYNC mode.
  1432. */
  1433. nsp32_set_async(data, data->cur_target);
  1434. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1435. data->cur_target->sync_flag |= SDTR_DONE;
  1436. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1437. /*
  1438. * SDTR negotiation pulled by the target has been
  1439. * negotiating.
  1440. */
  1441. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1442. /*
  1443. * If valid message is received, then
  1444. * negotiation is succeeded.
  1445. */
  1446. } else {
  1447. /*
  1448. * On the contrary, if unexpected bus free is
  1449. * occurred, then negotiation is failed. Fall
  1450. * back to ASYNC mode.
  1451. */
  1452. nsp32_set_async(data, data->cur_target);
  1453. }
  1454. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1455. data->cur_target->sync_flag |= SDTR_DONE;
  1456. }
  1457. /*
  1458. * It is always ensured by SCSI standard that initiator
  1459. * switches into Bus Free Phase after
  1460. * receiving message 00 (Command Complete), 04 (Disconnect).
  1461. * It's the reason that processing here is valid.
  1462. */
  1463. if (execph & MSGIN_00_VALID) {
  1464. /* MsgIn 00: Command Complete */
  1465. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1466. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1467. SCpnt->SCp.Message = 0;
  1468. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1469. "normal end stat=0x%x resid=0x%x\n",
  1470. SCpnt->SCp.Status, scsi_get_resid(SCpnt));
  1471. SCpnt->result = (DID_OK << 16) |
  1472. (SCpnt->SCp.Message << 8) |
  1473. (SCpnt->SCp.Status << 0);
  1474. nsp32_scsi_done(SCpnt);
  1475. /* All operation is done */
  1476. return TRUE;
  1477. } else if (execph & MSGIN_04_VALID) {
  1478. /* MsgIn 04: Disconnect */
  1479. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1480. SCpnt->SCp.Message = 4;
  1481. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1482. return TRUE;
  1483. } else {
  1484. /* Unexpected bus free */
  1485. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1486. /* DID_ERROR? */
  1487. //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
  1488. SCpnt->result = DID_ERROR << 16;
  1489. nsp32_scsi_done(SCpnt);
  1490. return TRUE;
  1491. }
  1492. return FALSE;
  1493. }
  1494. /*
  1495. * nsp32_adjust_busfree - adjusting SG table
  1496. *
  1497. * Note: This driver adjust the SG table using SCSI ACK
  1498. * counter instead of BMCNT counter!
  1499. */
  1500. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1501. {
  1502. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1503. int old_entry = data->cur_entry;
  1504. int new_entry;
  1505. int sg_num = data->cur_lunt->sg_num;
  1506. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1507. unsigned int restlen, sentlen;
  1508. u32_le len, addr;
  1509. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
  1510. /* adjust saved SACK count with 4 byte start address boundary */
  1511. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1512. /*
  1513. * calculate new_entry from sack count and each sgt[].len
  1514. * calculate the byte which is intent to send
  1515. */
  1516. sentlen = 0;
  1517. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1518. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1519. if (sentlen > s_sacklen) {
  1520. break;
  1521. }
  1522. }
  1523. /* all sgt is processed */
  1524. if (new_entry == sg_num) {
  1525. goto last;
  1526. }
  1527. if (sentlen == s_sacklen) {
  1528. /* XXX: confirm it's ok or not */
  1529. /* In this case, it's ok because we are at
  1530. the head element of the sg. restlen is correctly calculated. */
  1531. }
  1532. /* calculate the rest length for transfering */
  1533. restlen = sentlen - s_sacklen;
  1534. /* update adjusting current SG table entry */
  1535. len = le32_to_cpu(sgt[new_entry].len);
  1536. addr = le32_to_cpu(sgt[new_entry].addr);
  1537. addr += (len - restlen);
  1538. sgt[new_entry].addr = cpu_to_le32(addr);
  1539. sgt[new_entry].len = cpu_to_le32(restlen);
  1540. /* set cur_entry with new_entry */
  1541. data->cur_entry = new_entry;
  1542. return;
  1543. last:
  1544. if (scsi_get_resid(SCpnt) < sentlen) {
  1545. nsp32_msg(KERN_ERR, "resid underflow");
  1546. }
  1547. scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
  1548. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
  1549. /* update hostdata and lun */
  1550. return;
  1551. }
  1552. /*
  1553. * It's called MsgOut phase occur.
  1554. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1555. * message out phase. It, however, has more than 3 messages,
  1556. * HBA creates the interrupt and we have to process by hand.
  1557. */
  1558. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1559. {
  1560. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1561. unsigned int base = SCpnt->device->host->io_port;
  1562. //unsigned short command;
  1563. long new_sgtp;
  1564. int i;
  1565. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1566. "enter: msgout_len: 0x%x", data->msgout_len);
  1567. /*
  1568. * If MsgOut phase is occurred without having any
  1569. * message, then No_Operation is sent (SCSI-2).
  1570. */
  1571. if (data->msgout_len == 0) {
  1572. nsp32_build_nop(SCpnt);
  1573. }
  1574. /*
  1575. * Set SGTP ADDR current entry for restarting AUTOSCSI,
  1576. * because SGTP is incremented next point.
  1577. * There is few statement in the specification...
  1578. */
  1579. new_sgtp = data->cur_lunt->sglun_paddr +
  1580. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1581. /*
  1582. * send messages
  1583. */
  1584. for (i = 0; i < data->msgout_len; i++) {
  1585. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1586. "%d : 0x%x", i, data->msgoutbuf[i]);
  1587. /*
  1588. * Check REQ is asserted.
  1589. */
  1590. nsp32_wait_req(data, ASSERT);
  1591. if (i == (data->msgout_len - 1)) {
  1592. /*
  1593. * If the last message, set the AutoSCSI restart
  1594. * before send back the ack message. AutoSCSI
  1595. * restart automatically negate ATN signal.
  1596. */
  1597. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1598. //nsp32_restart_autoscsi(SCpnt, command);
  1599. nsp32_write2(base, COMMAND_CONTROL,
  1600. (CLEAR_CDB_FIFO_POINTER |
  1601. AUTO_COMMAND_PHASE |
  1602. AUTOSCSI_RESTART |
  1603. AUTO_MSGIN_00_OR_04 |
  1604. AUTO_MSGIN_02 ));
  1605. }
  1606. /*
  1607. * Write data with SACK, then wait sack is
  1608. * automatically negated.
  1609. */
  1610. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1611. nsp32_wait_sack(data, NEGATE);
  1612. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1613. nsp32_read1(base, SCSI_BUS_MONITOR));
  1614. };
  1615. data->msgout_len = 0;
  1616. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1617. }
  1618. /*
  1619. * Restart AutoSCSI
  1620. *
  1621. * Note: Restarting AutoSCSI needs set:
  1622. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1623. */
  1624. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1625. {
  1626. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1627. unsigned int base = data->BaseAddress;
  1628. unsigned short transfer = 0;
  1629. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1630. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1631. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1632. }
  1633. /*
  1634. * set SYNC_REG
  1635. * Don't set BM_START_ADR before setting this register.
  1636. */
  1637. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1638. /*
  1639. * set ACKWIDTH
  1640. */
  1641. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1642. /*
  1643. * set SREQ hazard killer sampling rate
  1644. */
  1645. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1646. /*
  1647. * set SGT ADDR (physical address)
  1648. */
  1649. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1650. /*
  1651. * set TRANSFER CONTROL REG
  1652. */
  1653. transfer = 0;
  1654. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1655. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1656. if (scsi_bufflen(SCpnt) > 0) {
  1657. transfer |= BM_START;
  1658. }
  1659. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1660. transfer |= CB_MMIO_MODE;
  1661. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1662. transfer |= CB_IO_MODE;
  1663. }
  1664. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1665. /*
  1666. * restart AutoSCSI
  1667. *
  1668. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1669. */
  1670. command |= (CLEAR_CDB_FIFO_POINTER |
  1671. AUTO_COMMAND_PHASE |
  1672. AUTOSCSI_RESTART );
  1673. nsp32_write2(base, COMMAND_CONTROL, command);
  1674. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1675. }
  1676. /*
  1677. * cannot run automatically message in occur
  1678. */
  1679. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1680. unsigned long irq_status,
  1681. unsigned short execph)
  1682. {
  1683. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1684. unsigned int base = SCpnt->device->host->io_port;
  1685. unsigned char msg;
  1686. unsigned char msgtype;
  1687. unsigned char newlun;
  1688. unsigned short command = 0;
  1689. int msgclear = TRUE;
  1690. long new_sgtp;
  1691. int ret;
  1692. /*
  1693. * read first message
  1694. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1695. * of Message-In have to be processed before sending back SCSI ACK.
  1696. */
  1697. msg = nsp32_read1(base, SCSI_DATA_IN);
  1698. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1699. msgtype = data->msginbuf[0];
  1700. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1701. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1702. data->msgin_len, msg, msgtype);
  1703. /*
  1704. * TODO: We need checking whether bus phase is message in?
  1705. */
  1706. /*
  1707. * assert SCSI ACK
  1708. */
  1709. nsp32_sack_assert(data);
  1710. /*
  1711. * processing IDENTIFY
  1712. */
  1713. if (msgtype & 0x80) {
  1714. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1715. /* Invalid (non reselect) phase */
  1716. goto reject;
  1717. }
  1718. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1719. ret = nsp32_reselection(SCpnt, newlun);
  1720. if (ret == TRUE) {
  1721. goto restart;
  1722. } else {
  1723. goto reject;
  1724. }
  1725. }
  1726. /*
  1727. * processing messages except for IDENTIFY
  1728. *
  1729. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1730. */
  1731. switch (msgtype) {
  1732. /*
  1733. * 1-byte message
  1734. */
  1735. case COMMAND_COMPLETE:
  1736. case DISCONNECT:
  1737. /*
  1738. * These messages should not be occurred.
  1739. * They should be processed on AutoSCSI sequencer.
  1740. */
  1741. nsp32_msg(KERN_WARNING,
  1742. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1743. break;
  1744. case RESTORE_POINTERS:
  1745. /*
  1746. * AutoMsgIn03 is disabled, and HBA gets this message.
  1747. */
  1748. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1749. unsigned int s_sacklen;
  1750. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1751. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1752. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1753. } else {
  1754. /* No need to rewrite SGT */
  1755. }
  1756. }
  1757. data->cur_lunt->msgin03 = FALSE;
  1758. /* Update with the new value */
  1759. /* reset SACK/SavedACK counter (or ALL clear?) */
  1760. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1761. /*
  1762. * set new sg pointer
  1763. */
  1764. new_sgtp = data->cur_lunt->sglun_paddr +
  1765. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1766. nsp32_write4(base, SGT_ADR, new_sgtp);
  1767. break;
  1768. case SAVE_POINTERS:
  1769. /*
  1770. * These messages should not be occurred.
  1771. * They should be processed on AutoSCSI sequencer.
  1772. */
  1773. nsp32_msg (KERN_WARNING,
  1774. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1775. break;
  1776. case MESSAGE_REJECT:
  1777. /* If previous message_out is sending SDTR, and get
  1778. message_reject from target, SDTR negotiation is failed */
  1779. if (data->cur_target->sync_flag &
  1780. (SDTR_INITIATOR | SDTR_TARGET)) {
  1781. /*
  1782. * Current target is negotiating SDTR, but it's
  1783. * failed. Fall back to async transfer mode, and set
  1784. * SDTR_DONE.
  1785. */
  1786. nsp32_set_async(data, data->cur_target);
  1787. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1788. data->cur_target->sync_flag |= SDTR_DONE;
  1789. }
  1790. break;
  1791. case LINKED_CMD_COMPLETE:
  1792. case LINKED_FLG_CMD_COMPLETE:
  1793. /* queue tag is not supported currently */
  1794. nsp32_msg (KERN_WARNING,
  1795. "unsupported message: 0x%x", msgtype);
  1796. break;
  1797. case INITIATE_RECOVERY:
  1798. /* staring ECA (Extended Contingent Allegiance) state. */
  1799. /* This message is declined in SPI2 or later. */
  1800. goto reject;
  1801. /*
  1802. * 2-byte message
  1803. */
  1804. case SIMPLE_QUEUE_TAG:
  1805. case 0x23:
  1806. /*
  1807. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1808. * No support is needed.
  1809. */
  1810. if (data->msgin_len >= 1) {
  1811. goto reject;
  1812. }
  1813. /* current position is 1-byte of 2 byte */
  1814. msgclear = FALSE;
  1815. break;
  1816. /*
  1817. * extended message
  1818. */
  1819. case EXTENDED_MESSAGE:
  1820. if (data->msgin_len < 1) {
  1821. /*
  1822. * Current position does not reach 2-byte
  1823. * (2-byte is extended message length).
  1824. */
  1825. msgclear = FALSE;
  1826. break;
  1827. }
  1828. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1829. /*
  1830. * Current extended message has msginbuf[1] + 2
  1831. * (msgin_len starts counting from 0, so buf[1] + 1).
  1832. * If current message position is not finished,
  1833. * continue receiving message.
  1834. */
  1835. msgclear = FALSE;
  1836. break;
  1837. }
  1838. /*
  1839. * Reach here means regular length of each type of
  1840. * extended messages.
  1841. */
  1842. switch (data->msginbuf[2]) {
  1843. case EXTENDED_MODIFY_DATA_POINTER:
  1844. /* TODO */
  1845. goto reject; /* not implemented yet */
  1846. break;
  1847. case EXTENDED_SDTR:
  1848. /*
  1849. * Exchange this message between initiator and target.
  1850. */
  1851. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1852. /*
  1853. * received inappropriate message.
  1854. */
  1855. goto reject;
  1856. break;
  1857. }
  1858. nsp32_analyze_sdtr(SCpnt);
  1859. break;
  1860. case EXTENDED_EXTENDED_IDENTIFY:
  1861. /* SCSI-I only, not supported. */
  1862. goto reject; /* not implemented yet */
  1863. break;
  1864. case EXTENDED_WDTR:
  1865. goto reject; /* not implemented yet */
  1866. break;
  1867. default:
  1868. goto reject;
  1869. }
  1870. break;
  1871. default:
  1872. goto reject;
  1873. }
  1874. restart:
  1875. if (msgclear == TRUE) {
  1876. data->msgin_len = 0;
  1877. /*
  1878. * If restarting AutoSCSI, but there are some message to out
  1879. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1880. * (MV_VALID = 0). When commandcontrol is written with
  1881. * AutoSCSI restart, at the same time MsgOutOccur should be
  1882. * happened (however, such situation is really possible...?).
  1883. */
  1884. if (data->msgout_len > 0) {
  1885. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1886. command |= AUTO_ATN;
  1887. }
  1888. /*
  1889. * restart AutoSCSI
  1890. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1891. */
  1892. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1893. /*
  1894. * If current msgin03 is TRUE, then flag on.
  1895. */
  1896. if (data->cur_lunt->msgin03 == TRUE) {
  1897. command |= AUTO_MSGIN_03;
  1898. }
  1899. data->cur_lunt->msgin03 = FALSE;
  1900. } else {
  1901. data->msgin_len++;
  1902. }
  1903. /*
  1904. * restart AutoSCSI
  1905. */
  1906. nsp32_restart_autoscsi(SCpnt, command);
  1907. /*
  1908. * wait SCSI REQ negate for REQ-ACK handshake
  1909. */
  1910. nsp32_wait_req(data, NEGATE);
  1911. /*
  1912. * negate SCSI ACK
  1913. */
  1914. nsp32_sack_negate(data);
  1915. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1916. return;
  1917. reject:
  1918. nsp32_msg(KERN_WARNING,
  1919. "invalid or unsupported MessageIn, rejected. "
  1920. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  1921. msg, data->msgin_len, msgtype);
  1922. nsp32_build_reject(SCpnt);
  1923. data->msgin_len = 0;
  1924. goto restart;
  1925. }
  1926. /*
  1927. *
  1928. */
  1929. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  1930. {
  1931. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1932. nsp32_target *target = data->cur_target;
  1933. nsp32_sync_table *synct;
  1934. unsigned char get_period = data->msginbuf[3];
  1935. unsigned char get_offset = data->msginbuf[4];
  1936. int entry;
  1937. int syncnum;
  1938. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  1939. synct = data->synct;
  1940. syncnum = data->syncnum;
  1941. /*
  1942. * If this inititor sent the SDTR message, then target responds SDTR,
  1943. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  1944. * Messages are not appropriate, then send back reject message.
  1945. * If initiator did not send the SDTR, but target sends SDTR,
  1946. * initiator calculator the appropriate parameter and send back SDTR.
  1947. */
  1948. if (target->sync_flag & SDTR_INITIATOR) {
  1949. /*
  1950. * Initiator sent SDTR, the target responds and
  1951. * send back negotiation SDTR.
  1952. */
  1953. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  1954. target->sync_flag &= ~SDTR_INITIATOR;
  1955. target->sync_flag |= SDTR_DONE;
  1956. /*
  1957. * offset:
  1958. */
  1959. if (get_offset > SYNC_OFFSET) {
  1960. /*
  1961. * Negotiation is failed, the target send back
  1962. * unexpected offset value.
  1963. */
  1964. goto reject;
  1965. }
  1966. if (get_offset == ASYNC_OFFSET) {
  1967. /*
  1968. * Negotiation is succeeded, the target want
  1969. * to fall back into asynchronous transfer mode.
  1970. */
  1971. goto async;
  1972. }
  1973. /*
  1974. * period:
  1975. * Check whether sync period is too short. If too short,
  1976. * fall back to async mode. If it's ok, then investigate
  1977. * the received sync period. If sync period is acceptable
  1978. * between sync table start_period and end_period, then
  1979. * set this I_T nexus as sent offset and period.
  1980. * If it's not acceptable, send back reject and fall back
  1981. * to async mode.
  1982. */
  1983. if (get_period < data->synct[0].period_num) {
  1984. /*
  1985. * Negotiation is failed, the target send back
  1986. * unexpected period value.
  1987. */
  1988. goto reject;
  1989. }
  1990. entry = nsp32_search_period_entry(data, target, get_period);
  1991. if (entry < 0) {
  1992. /*
  1993. * Target want to use long period which is not
  1994. * acceptable NinjaSCSI-32Bi/UDE.
  1995. */
  1996. goto reject;
  1997. }
  1998. /*
  1999. * Set new sync table and offset in this I_T nexus.
  2000. */
  2001. nsp32_set_sync_entry(data, target, entry, get_offset);
  2002. } else {
  2003. /* Target send SDTR to initiator. */
  2004. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  2005. target->sync_flag |= SDTR_INITIATOR;
  2006. /* offset: */
  2007. if (get_offset > SYNC_OFFSET) {
  2008. /* send back as SYNC_OFFSET */
  2009. get_offset = SYNC_OFFSET;
  2010. }
  2011. /* period: */
  2012. if (get_period < data->synct[0].period_num) {
  2013. get_period = data->synct[0].period_num;
  2014. }
  2015. entry = nsp32_search_period_entry(data, target, get_period);
  2016. if (get_offset == ASYNC_OFFSET || entry < 0) {
  2017. nsp32_set_async(data, target);
  2018. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  2019. } else {
  2020. nsp32_set_sync_entry(data, target, entry, get_offset);
  2021. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  2022. }
  2023. }
  2024. target->period = get_period;
  2025. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  2026. return;
  2027. reject:
  2028. /*
  2029. * If the current message is unacceptable, send back to the target
  2030. * with reject message.
  2031. */
  2032. nsp32_build_reject(SCpnt);
  2033. async:
  2034. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  2035. target->period = 0;
  2036. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2037. return;
  2038. }
  2039. /*
  2040. * Search config entry number matched in sync_table from given
  2041. * target and speed period value. If failed to search, return negative value.
  2042. */
  2043. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2044. nsp32_target *target,
  2045. unsigned char period)
  2046. {
  2047. int i;
  2048. if (target->limit_entry >= data->syncnum) {
  2049. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2050. target->limit_entry = 0;
  2051. }
  2052. for (i = target->limit_entry; i < data->syncnum; i++) {
  2053. if (period >= data->synct[i].start_period &&
  2054. period <= data->synct[i].end_period) {
  2055. break;
  2056. }
  2057. }
  2058. /*
  2059. * Check given period value is over the sync_table value.
  2060. * If so, return max value.
  2061. */
  2062. if (i == data->syncnum) {
  2063. i = -1;
  2064. }
  2065. return i;
  2066. }
  2067. /*
  2068. * target <-> initiator use ASYNC transfer
  2069. */
  2070. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2071. {
  2072. unsigned char period = data->synct[target->limit_entry].period_num;
  2073. target->offset = ASYNC_OFFSET;
  2074. target->period = 0;
  2075. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2076. target->ackwidth = 0;
  2077. target->sample_reg = 0;
  2078. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2079. }
  2080. /*
  2081. * target <-> initiator use maximum SYNC transfer
  2082. */
  2083. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2084. nsp32_target *target,
  2085. unsigned char *period,
  2086. unsigned char *offset)
  2087. {
  2088. unsigned char period_num, ackwidth;
  2089. period_num = data->synct[target->limit_entry].period_num;
  2090. *period = data->synct[target->limit_entry].start_period;
  2091. ackwidth = data->synct[target->limit_entry].ackwidth;
  2092. *offset = SYNC_OFFSET;
  2093. target->syncreg = TO_SYNCREG(period_num, *offset);
  2094. target->ackwidth = ackwidth;
  2095. target->offset = *offset;
  2096. target->sample_reg = 0; /* disable SREQ sampling */
  2097. }
  2098. /*
  2099. * target <-> initiator use entry number speed
  2100. */
  2101. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2102. nsp32_target *target,
  2103. int entry,
  2104. unsigned char offset)
  2105. {
  2106. unsigned char period, ackwidth, sample_rate;
  2107. period = data->synct[entry].period_num;
  2108. ackwidth = data->synct[entry].ackwidth;
  2109. offset = offset;
  2110. sample_rate = data->synct[entry].sample_rate;
  2111. target->syncreg = TO_SYNCREG(period, offset);
  2112. target->ackwidth = ackwidth;
  2113. target->offset = offset;
  2114. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2115. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2116. }
  2117. /*
  2118. * It waits until SCSI REQ becomes assertion or negation state.
  2119. *
  2120. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2121. * connected target responds SCSI REQ negation. We have to wait
  2122. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2123. * REQ-ACK handshake.
  2124. */
  2125. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2126. {
  2127. unsigned int base = data->BaseAddress;
  2128. int wait_time = 0;
  2129. unsigned char bus, req_bit;
  2130. if (!((state == ASSERT) || (state == NEGATE))) {
  2131. nsp32_msg(KERN_ERR, "unknown state designation");
  2132. }
  2133. /* REQ is BIT(5) */
  2134. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2135. do {
  2136. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2137. if ((bus & BUSMON_REQ) == req_bit) {
  2138. nsp32_dbg(NSP32_DEBUG_WAIT,
  2139. "wait_time: %d", wait_time);
  2140. return;
  2141. }
  2142. udelay(1);
  2143. wait_time++;
  2144. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2145. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2146. }
  2147. /*
  2148. * It waits until SCSI SACK becomes assertion or negation state.
  2149. */
  2150. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2151. {
  2152. unsigned int base = data->BaseAddress;
  2153. int wait_time = 0;
  2154. unsigned char bus, ack_bit;
  2155. if (!((state == ASSERT) || (state == NEGATE))) {
  2156. nsp32_msg(KERN_ERR, "unknown state designation");
  2157. }
  2158. /* ACK is BIT(4) */
  2159. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2160. do {
  2161. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2162. if ((bus & BUSMON_ACK) == ack_bit) {
  2163. nsp32_dbg(NSP32_DEBUG_WAIT,
  2164. "wait_time: %d", wait_time);
  2165. return;
  2166. }
  2167. udelay(1);
  2168. wait_time++;
  2169. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2170. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2171. }
  2172. /*
  2173. * assert SCSI ACK
  2174. *
  2175. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2176. */
  2177. static void nsp32_sack_assert(nsp32_hw_data *data)
  2178. {
  2179. unsigned int base = data->BaseAddress;
  2180. unsigned char busctrl;
  2181. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2182. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2183. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2184. }
  2185. /*
  2186. * negate SCSI ACK
  2187. */
  2188. static void nsp32_sack_negate(nsp32_hw_data *data)
  2189. {
  2190. unsigned int base = data->BaseAddress;
  2191. unsigned char busctrl;
  2192. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2193. busctrl &= ~BUSCTL_ACK;
  2194. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2195. }
  2196. /*
  2197. * Note: n_io_port is defined as 0x7f because I/O register port is
  2198. * assigned as:
  2199. * 0x800-0x8ff: memory mapped I/O port
  2200. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2201. * 0xc00-0xfff: CardBus status registers
  2202. */
  2203. static int nsp32_detect(struct pci_dev *pdev)
  2204. {
  2205. struct Scsi_Host *host; /* registered host structure */
  2206. struct resource *res;
  2207. nsp32_hw_data *data;
  2208. int ret;
  2209. int i, j;
  2210. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2211. /*
  2212. * register this HBA as SCSI device
  2213. */
  2214. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2215. if (host == NULL) {
  2216. nsp32_msg (KERN_ERR, "failed to scsi register");
  2217. goto err;
  2218. }
  2219. /*
  2220. * set nsp32_hw_data
  2221. */
  2222. data = (nsp32_hw_data *)host->hostdata;
  2223. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2224. host->irq = data->IrqNumber;
  2225. host->io_port = data->BaseAddress;
  2226. host->unique_id = data->BaseAddress;
  2227. host->n_io_port = data->NumAddress;
  2228. host->base = (unsigned long)data->MmioAddress;
  2229. data->Host = host;
  2230. spin_lock_init(&(data->Lock));
  2231. data->cur_lunt = NULL;
  2232. data->cur_target = NULL;
  2233. /*
  2234. * Bus master transfer mode is supported currently.
  2235. */
  2236. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2237. /*
  2238. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2239. * dividing * 100ns/4).
  2240. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2241. */
  2242. data->clock = CLOCK_4;
  2243. /*
  2244. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2245. */
  2246. switch (data->clock) {
  2247. case CLOCK_4:
  2248. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2249. data->synct = nsp32_sync_table_40M;
  2250. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2251. break;
  2252. case CLOCK_2:
  2253. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2254. data->synct = nsp32_sync_table_20M;
  2255. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2256. break;
  2257. case PCICLK:
  2258. /* If data->clock is PCICLK, then select pci sync table. */
  2259. data->synct = nsp32_sync_table_pci;
  2260. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2261. break;
  2262. default:
  2263. nsp32_msg(KERN_WARNING,
  2264. "Invalid clock div is selected, set CLOCK_4.");
  2265. /* Use default value CLOCK_4 */
  2266. data->clock = CLOCK_4;
  2267. data->synct = nsp32_sync_table_40M;
  2268. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2269. }
  2270. /*
  2271. * setup nsp32_lunt
  2272. */
  2273. /*
  2274. * setup DMA
  2275. */
  2276. if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0) {
  2277. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2278. goto scsi_unregister;
  2279. }
  2280. /*
  2281. * allocate autoparam DMA resource.
  2282. */
  2283. data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr));
  2284. if (data->autoparam == NULL) {
  2285. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2286. goto scsi_unregister;
  2287. }
  2288. /*
  2289. * allocate scatter-gather DMA resource.
  2290. */
  2291. data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2292. &(data->sg_paddr));
  2293. if (data->sg_list == NULL) {
  2294. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2295. goto free_autoparam;
  2296. }
  2297. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2298. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2299. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2300. nsp32_lunt tmp = {
  2301. .SCpnt = NULL,
  2302. .save_datp = 0,
  2303. .msgin03 = FALSE,
  2304. .sg_num = 0,
  2305. .cur_entry = 0,
  2306. .sglun = &(data->sg_list[offset]),
  2307. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2308. };
  2309. data->lunt[i][j] = tmp;
  2310. }
  2311. }
  2312. /*
  2313. * setup target
  2314. */
  2315. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2316. nsp32_target *target = &(data->target[i]);
  2317. target->limit_entry = 0;
  2318. target->sync_flag = 0;
  2319. nsp32_set_async(data, target);
  2320. }
  2321. /*
  2322. * EEPROM check
  2323. */
  2324. ret = nsp32_getprom_param(data);
  2325. if (ret == FALSE) {
  2326. data->resettime = 3; /* default 3 */
  2327. }
  2328. /*
  2329. * setup HBA
  2330. */
  2331. nsp32hw_init(data);
  2332. snprintf(data->info_str, sizeof(data->info_str),
  2333. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2334. host->irq, host->io_port, host->n_io_port);
  2335. /*
  2336. * SCSI bus reset
  2337. *
  2338. * Note: It's important to reset SCSI bus in initialization phase.
  2339. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2340. * system is coming up, so SCSI devices connected to HBA is set as
  2341. * un-asynchronous mode. It brings the merit that this HBA is
  2342. * ready to start synchronous transfer without any preparation,
  2343. * but we are difficult to control transfer speed. In addition,
  2344. * it prevents device transfer speed from effecting EEPROM start-up
  2345. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2346. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2347. * connected same or more than 4 devices. It should be avoided
  2348. * depending on this specification. Thus, resetting the SCSI bus
  2349. * restores all connected SCSI devices to asynchronous mode, then
  2350. * this driver set SDTR safely later, and we can control all SCSI
  2351. * device transfer mode.
  2352. */
  2353. nsp32_do_bus_reset(data);
  2354. ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
  2355. if (ret < 0) {
  2356. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2357. "SCSI PCI controller. Interrupt: %d", host->irq);
  2358. goto free_sg_list;
  2359. }
  2360. /*
  2361. * PCI IO register
  2362. */
  2363. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2364. if (res == NULL) {
  2365. nsp32_msg(KERN_ERR,
  2366. "I/O region 0x%lx+0x%lx is already used",
  2367. data->BaseAddress, data->NumAddress);
  2368. goto free_irq;
  2369. }
  2370. ret = scsi_add_host(host, &pdev->dev);
  2371. if (ret) {
  2372. nsp32_msg(KERN_ERR, "failed to add scsi host");
  2373. goto free_region;
  2374. }
  2375. scsi_scan_host(host);
  2376. pci_set_drvdata(pdev, host);
  2377. return 0;
  2378. free_region:
  2379. release_region(host->io_port, host->n_io_port);
  2380. free_irq:
  2381. free_irq(host->irq, data);
  2382. free_sg_list:
  2383. pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE,
  2384. data->sg_list, data->sg_paddr);
  2385. free_autoparam:
  2386. pci_free_consistent(pdev, sizeof(nsp32_autoparam),
  2387. data->autoparam, data->auto_paddr);
  2388. scsi_unregister:
  2389. scsi_host_put(host);
  2390. err:
  2391. return 1;
  2392. }
  2393. static int nsp32_release(struct Scsi_Host *host)
  2394. {
  2395. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2396. if (data->autoparam) {
  2397. pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
  2398. data->autoparam, data->auto_paddr);
  2399. }
  2400. if (data->sg_list) {
  2401. pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
  2402. data->sg_list, data->sg_paddr);
  2403. }
  2404. if (host->irq) {
  2405. free_irq(host->irq, data);
  2406. }
  2407. if (host->io_port && host->n_io_port) {
  2408. release_region(host->io_port, host->n_io_port);
  2409. }
  2410. if (data->MmioAddress) {
  2411. iounmap(data->MmioAddress);
  2412. }
  2413. return 0;
  2414. }
  2415. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2416. {
  2417. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2418. return data->info_str;
  2419. }
  2420. /****************************************************************************
  2421. * error handler
  2422. */
  2423. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2424. {
  2425. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2426. unsigned int base = SCpnt->device->host->io_port;
  2427. nsp32_msg(KERN_WARNING, "abort");
  2428. if (data->cur_lunt->SCpnt == NULL) {
  2429. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2430. return FAILED;
  2431. }
  2432. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2433. /* reset SDTR negotiation */
  2434. data->cur_target->sync_flag = 0;
  2435. nsp32_set_async(data, data->cur_target);
  2436. }
  2437. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2438. nsp32_write2(base, BM_CNT, 0);
  2439. SCpnt->result = DID_ABORT << 16;
  2440. nsp32_scsi_done(SCpnt);
  2441. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2442. return SUCCESS;
  2443. }
  2444. static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
  2445. {
  2446. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2447. unsigned int base = SCpnt->device->host->io_port;
  2448. spin_lock_irq(SCpnt->device->host->host_lock);
  2449. nsp32_msg(KERN_INFO, "Bus Reset");
  2450. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2451. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2452. nsp32_do_bus_reset(data);
  2453. nsp32_write2(base, IRQ_CONTROL, 0);
  2454. spin_unlock_irq(SCpnt->device->host->host_lock);
  2455. return SUCCESS; /* SCSI bus reset is succeeded at any time. */
  2456. }
  2457. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2458. {
  2459. unsigned int base = data->BaseAddress;
  2460. unsigned short intrdat;
  2461. int i;
  2462. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2463. /*
  2464. * stop all transfer
  2465. * clear TRANSFERCONTROL_BM_START
  2466. * clear counter
  2467. */
  2468. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2469. nsp32_write4(base, BM_CNT, 0);
  2470. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2471. /*
  2472. * fall back to asynchronous transfer mode
  2473. * initialize SDTR negotiation flag
  2474. */
  2475. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2476. nsp32_target *target = &data->target[i];
  2477. target->sync_flag = 0;
  2478. nsp32_set_async(data, target);
  2479. }
  2480. /*
  2481. * reset SCSI bus
  2482. */
  2483. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2484. udelay(RESET_HOLD_TIME);
  2485. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2486. for(i = 0; i < 5; i++) {
  2487. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2488. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2489. }
  2490. data->CurrentSC = NULL;
  2491. }
  2492. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2493. {
  2494. struct Scsi_Host *host = SCpnt->device->host;
  2495. unsigned int base = SCpnt->device->host->io_port;
  2496. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2497. nsp32_msg(KERN_INFO, "Host Reset");
  2498. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2499. spin_lock_irq(SCpnt->device->host->host_lock);
  2500. nsp32hw_init(data);
  2501. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2502. nsp32_do_bus_reset(data);
  2503. nsp32_write2(base, IRQ_CONTROL, 0);
  2504. spin_unlock_irq(SCpnt->device->host->host_lock);
  2505. return SUCCESS; /* Host reset is succeeded at any time. */
  2506. }
  2507. /**************************************************************************
  2508. * EEPROM handler
  2509. */
  2510. /*
  2511. * getting EEPROM parameter
  2512. */
  2513. static int nsp32_getprom_param(nsp32_hw_data *data)
  2514. {
  2515. int vendor = data->pci_devid->vendor;
  2516. int device = data->pci_devid->device;
  2517. int ret, val, i;
  2518. /*
  2519. * EEPROM checking.
  2520. */
  2521. ret = nsp32_prom_read(data, 0x7e);
  2522. if (ret != 0x55) {
  2523. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2524. return FALSE;
  2525. }
  2526. ret = nsp32_prom_read(data, 0x7f);
  2527. if (ret != 0xaa) {
  2528. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2529. return FALSE;
  2530. }
  2531. /*
  2532. * check EEPROM type
  2533. */
  2534. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2535. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2536. ret = nsp32_getprom_c16(data);
  2537. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2538. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2539. ret = nsp32_getprom_at24(data);
  2540. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2541. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2542. ret = nsp32_getprom_at24(data);
  2543. } else {
  2544. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2545. ret = FALSE;
  2546. }
  2547. /* for debug : SPROM data full checking */
  2548. for (i = 0; i <= 0x1f; i++) {
  2549. val = nsp32_prom_read(data, i);
  2550. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2551. "rom address 0x%x : 0x%x", i, val);
  2552. }
  2553. return ret;
  2554. }
  2555. /*
  2556. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2557. *
  2558. * ROMADDR
  2559. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2560. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2561. * 0x07 : HBA Synchronous Transfer Period
  2562. * Value 0: AutoSync, 1: Manual Setting
  2563. * 0x08 - 0x0f : Not Used? (0x0)
  2564. * 0x10 : Bus Termination
  2565. * Value 0: Auto[ON], 1: ON, 2: OFF
  2566. * 0x11 : Not Used? (0)
  2567. * 0x12 : Bus Reset Delay Time (0x03)
  2568. * 0x13 : Bootable CD Support
  2569. * Value 0: Disable, 1: Enable
  2570. * 0x14 : Device Scan
  2571. * Bit 7 6 5 4 3 2 1 0
  2572. * | <----------------->
  2573. * | SCSI ID: Value 0: Skip, 1: YES
  2574. * |-> Value 0: ALL scan, Value 1: Manual
  2575. * 0x15 - 0x1b : Not Used? (0)
  2576. * 0x1c : Constant? (0x01) (clock div?)
  2577. * 0x1d - 0x7c : Not Used (0xff)
  2578. * 0x7d : Not Used? (0xff)
  2579. * 0x7e : Constant (0x55), Validity signature
  2580. * 0x7f : Constant (0xaa), Validity signature
  2581. */
  2582. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2583. {
  2584. int ret, i;
  2585. int auto_sync;
  2586. nsp32_target *target;
  2587. int entry;
  2588. /*
  2589. * Reset time which is designated by EEPROM.
  2590. *
  2591. * TODO: Not used yet.
  2592. */
  2593. data->resettime = nsp32_prom_read(data, 0x12);
  2594. /*
  2595. * HBA Synchronous Transfer Period
  2596. *
  2597. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2598. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2599. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2600. * On the contrary if connected SCSI devices are same or higher
  2601. * than 4, then transfer speed is set as FAST-10M.
  2602. *
  2603. * I break this rule. The number of connected SCSI devices are
  2604. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2605. * forced as ULTRA-20M.
  2606. */
  2607. ret = nsp32_prom_read(data, 0x07);
  2608. switch (ret) {
  2609. case 0:
  2610. auto_sync = TRUE;
  2611. break;
  2612. case 1:
  2613. auto_sync = FALSE;
  2614. break;
  2615. default:
  2616. nsp32_msg(KERN_WARNING,
  2617. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2618. auto_sync = TRUE;
  2619. }
  2620. if (trans_mode == ULTRA20M_MODE) {
  2621. auto_sync = TRUE;
  2622. }
  2623. /*
  2624. * each device Synchronous Transfer Period
  2625. */
  2626. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2627. target = &data->target[i];
  2628. if (auto_sync == TRUE) {
  2629. target->limit_entry = 0; /* set as ULTRA20M */
  2630. } else {
  2631. ret = nsp32_prom_read(data, i);
  2632. entry = nsp32_search_period_entry(data, target, ret);
  2633. if (entry < 0) {
  2634. /* search failed... set maximum speed */
  2635. entry = 0;
  2636. }
  2637. target->limit_entry = entry;
  2638. }
  2639. }
  2640. return TRUE;
  2641. }
  2642. /*
  2643. * C16 110 (I-O Data: SC-NBD) data map:
  2644. *
  2645. * ROMADDR
  2646. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2647. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2648. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2649. * 0x08 - 0x0f : Not Used? (0x0)
  2650. * 0x10 : Transfer Mode
  2651. * Value 0: PIO, 1: Busmater
  2652. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2653. * 0x12 : Bus Termination
  2654. * Value 0: Disable, 1: Enable
  2655. * 0x13 - 0x19 : Disconnection
  2656. * Value 0: Disable, 1: Enable
  2657. * 0x1a - 0x7c : Not Used? (0)
  2658. * 0x7d : Not Used? (0xf8)
  2659. * 0x7e : Constant (0x55), Validity signature
  2660. * 0x7f : Constant (0xaa), Validity signature
  2661. */
  2662. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2663. {
  2664. int ret, i;
  2665. nsp32_target *target;
  2666. int entry, val;
  2667. /*
  2668. * Reset time which is designated by EEPROM.
  2669. *
  2670. * TODO: Not used yet.
  2671. */
  2672. data->resettime = nsp32_prom_read(data, 0x11);
  2673. /*
  2674. * each device Synchronous Transfer Period
  2675. */
  2676. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2677. target = &data->target[i];
  2678. ret = nsp32_prom_read(data, i);
  2679. switch (ret) {
  2680. case 0: /* 20MB/s */
  2681. val = 0x0c;
  2682. break;
  2683. case 1: /* 10MB/s */
  2684. val = 0x19;
  2685. break;
  2686. case 2: /* 5MB/s */
  2687. val = 0x32;
  2688. break;
  2689. case 3: /* ASYNC */
  2690. val = 0x00;
  2691. break;
  2692. default: /* default 20MB/s */
  2693. val = 0x0c;
  2694. break;
  2695. }
  2696. entry = nsp32_search_period_entry(data, target, val);
  2697. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2698. /* search failed... set maximum speed */
  2699. entry = 0;
  2700. }
  2701. target->limit_entry = entry;
  2702. }
  2703. return TRUE;
  2704. }
  2705. /*
  2706. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2707. */
  2708. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2709. {
  2710. int i, val;
  2711. /* start condition */
  2712. nsp32_prom_start(data);
  2713. /* device address */
  2714. nsp32_prom_write_bit(data, 1); /* 1 */
  2715. nsp32_prom_write_bit(data, 0); /* 0 */
  2716. nsp32_prom_write_bit(data, 1); /* 1 */
  2717. nsp32_prom_write_bit(data, 0); /* 0 */
  2718. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2719. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2720. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2721. /* R/W: W for dummy write */
  2722. nsp32_prom_write_bit(data, 0);
  2723. /* ack */
  2724. nsp32_prom_write_bit(data, 0);
  2725. /* word address */
  2726. for (i = 7; i >= 0; i--) {
  2727. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2728. }
  2729. /* ack */
  2730. nsp32_prom_write_bit(data, 0);
  2731. /* start condition */
  2732. nsp32_prom_start(data);
  2733. /* device address */
  2734. nsp32_prom_write_bit(data, 1); /* 1 */
  2735. nsp32_prom_write_bit(data, 0); /* 0 */
  2736. nsp32_prom_write_bit(data, 1); /* 1 */
  2737. nsp32_prom_write_bit(data, 0); /* 0 */
  2738. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2739. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2740. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2741. /* R/W: R */
  2742. nsp32_prom_write_bit(data, 1);
  2743. /* ack */
  2744. nsp32_prom_write_bit(data, 0);
  2745. /* data... */
  2746. val = 0;
  2747. for (i = 7; i >= 0; i--) {
  2748. val += (nsp32_prom_read_bit(data) << i);
  2749. }
  2750. /* no ack */
  2751. nsp32_prom_write_bit(data, 1);
  2752. /* stop condition */
  2753. nsp32_prom_stop(data);
  2754. return val;
  2755. }
  2756. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2757. {
  2758. int base = data->BaseAddress;
  2759. int tmp;
  2760. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2761. if (val == 0) {
  2762. tmp &= ~bit;
  2763. } else {
  2764. tmp |= bit;
  2765. }
  2766. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2767. udelay(10);
  2768. }
  2769. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2770. {
  2771. int base = data->BaseAddress;
  2772. int tmp, ret;
  2773. if (bit != SDA) {
  2774. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2775. return 0;
  2776. }
  2777. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2778. if (tmp == 0) {
  2779. ret = 0;
  2780. } else {
  2781. ret = 1;
  2782. }
  2783. udelay(10);
  2784. return ret;
  2785. }
  2786. static void nsp32_prom_start (nsp32_hw_data *data)
  2787. {
  2788. /* start condition */
  2789. nsp32_prom_set(data, SCL, 1);
  2790. nsp32_prom_set(data, SDA, 1);
  2791. nsp32_prom_set(data, ENA, 1); /* output mode */
  2792. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2793. * SDA 1->0 is start condition */
  2794. nsp32_prom_set(data, SCL, 0);
  2795. }
  2796. static void nsp32_prom_stop (nsp32_hw_data *data)
  2797. {
  2798. /* stop condition */
  2799. nsp32_prom_set(data, SCL, 1);
  2800. nsp32_prom_set(data, SDA, 0);
  2801. nsp32_prom_set(data, ENA, 1); /* output mode */
  2802. nsp32_prom_set(data, SDA, 1);
  2803. nsp32_prom_set(data, SCL, 0);
  2804. }
  2805. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2806. {
  2807. /* write */
  2808. nsp32_prom_set(data, SDA, val);
  2809. nsp32_prom_set(data, SCL, 1 );
  2810. nsp32_prom_set(data, SCL, 0 );
  2811. }
  2812. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2813. {
  2814. int val;
  2815. /* read */
  2816. nsp32_prom_set(data, ENA, 0); /* input mode */
  2817. nsp32_prom_set(data, SCL, 1);
  2818. val = nsp32_prom_get(data, SDA);
  2819. nsp32_prom_set(data, SCL, 0);
  2820. nsp32_prom_set(data, ENA, 1); /* output mode */
  2821. return val;
  2822. }
  2823. /**************************************************************************
  2824. * Power Management
  2825. */
  2826. #ifdef CONFIG_PM
  2827. /* Device suspended */
  2828. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2829. {
  2830. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2831. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
  2832. pci_save_state (pdev);
  2833. pci_disable_device (pdev);
  2834. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2835. return 0;
  2836. }
  2837. /* Device woken up */
  2838. static int nsp32_resume(struct pci_dev *pdev)
  2839. {
  2840. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2841. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2842. unsigned short reg;
  2843. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
  2844. pci_set_power_state(pdev, PCI_D0);
  2845. pci_enable_wake (pdev, PCI_D0, 0);
  2846. pci_restore_state (pdev);
  2847. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2848. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2849. if (reg == 0xffff) {
  2850. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2851. return 0;
  2852. }
  2853. nsp32hw_init (data);
  2854. nsp32_do_bus_reset(data);
  2855. nsp32_msg(KERN_INFO, "resume success");
  2856. return 0;
  2857. }
  2858. /* Enable wake event */
  2859. static int nsp32_enable_wake(struct pci_dev *pdev, pci_power_t state, int enable)
  2860. {
  2861. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2862. nsp32_msg(KERN_INFO, "pci-enable_wake: stub, pdev=0x%p, enable=%d, slot=%s, host=0x%p", pdev, enable, pci_name(pdev), host);
  2863. return 0;
  2864. }
  2865. #endif
  2866. /************************************************************************
  2867. * PCI/Cardbus probe/remove routine
  2868. */
  2869. static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2870. {
  2871. int ret;
  2872. nsp32_hw_data *data = &nsp32_data_base;
  2873. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2874. ret = pci_enable_device(pdev);
  2875. if (ret) {
  2876. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2877. return ret;
  2878. }
  2879. data->Pci = pdev;
  2880. data->pci_devid = id;
  2881. data->IrqNumber = pdev->irq;
  2882. data->BaseAddress = pci_resource_start(pdev, 0);
  2883. data->NumAddress = pci_resource_len (pdev, 0);
  2884. data->MmioAddress = ioremap_nocache(pci_resource_start(pdev, 1),
  2885. pci_resource_len (pdev, 1));
  2886. data->MmioLength = pci_resource_len (pdev, 1);
  2887. pci_set_master(pdev);
  2888. ret = nsp32_detect(pdev);
  2889. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2890. pdev->irq,
  2891. data->MmioAddress, data->MmioLength,
  2892. pci_name(pdev),
  2893. nsp32_model[id->driver_data]);
  2894. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2895. return ret;
  2896. }
  2897. static void __devexit nsp32_remove(struct pci_dev *pdev)
  2898. {
  2899. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2900. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2901. scsi_remove_host(host);
  2902. nsp32_release(host);
  2903. scsi_host_put(host);
  2904. }
  2905. static struct pci_driver nsp32_driver = {
  2906. .name = "nsp32",
  2907. .id_table = nsp32_pci_table,
  2908. .probe = nsp32_probe,
  2909. .remove = __devexit_p(nsp32_remove),
  2910. #ifdef CONFIG_PM
  2911. .suspend = nsp32_suspend,
  2912. .resume = nsp32_resume,
  2913. .enable_wake = nsp32_enable_wake,
  2914. #endif
  2915. };
  2916. /*********************************************************************
  2917. * Moule entry point
  2918. */
  2919. static int __init init_nsp32(void) {
  2920. nsp32_msg(KERN_INFO, "loading...");
  2921. return pci_register_driver(&nsp32_driver);
  2922. }
  2923. static void __exit exit_nsp32(void) {
  2924. nsp32_msg(KERN_INFO, "unloading...");
  2925. pci_unregister_driver(&nsp32_driver);
  2926. }
  2927. module_init(init_nsp32);
  2928. module_exit(exit_nsp32);
  2929. /* end */