geode.h 4.6 KB

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  1. /*
  2. * AMD Geode definitions
  3. * Copyright (C) 2006, Advanced Micro Devices, Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of version 2 of the GNU General Public License
  7. * as published by the Free Software Foundation.
  8. */
  9. #ifndef _ASM_X86_GEODE_H
  10. #define _ASM_X86_GEODE_H
  11. #include <asm/processor.h>
  12. #include <linux/io.h>
  13. #include <linux/cs5535.h>
  14. /* Generic southbridge functions */
  15. #define GEODE_DEV_PMS 0
  16. #define GEODE_DEV_ACPI 1
  17. #define GEODE_DEV_GPIO 2
  18. #define GEODE_DEV_MFGPT 3
  19. extern int geode_get_dev_base(unsigned int dev);
  20. /* Useful macros */
  21. #define geode_pms_base() geode_get_dev_base(GEODE_DEV_PMS)
  22. #define geode_acpi_base() geode_get_dev_base(GEODE_DEV_ACPI)
  23. #define geode_gpio_base() geode_get_dev_base(GEODE_DEV_GPIO)
  24. #define geode_mfgpt_base() geode_get_dev_base(GEODE_DEV_MFGPT)
  25. /* MSRS */
  26. #define MSR_GLIU_P2D_RO0 0x10000029
  27. #define MSR_LX_GLD_MSR_CONFIG 0x48002001
  28. #define MSR_LX_MSR_PADSEL 0x48002011 /* NOT 0x48000011; the data
  29. * sheet has the wrong value */
  30. #define MSR_GLCP_SYS_RSTPLL 0x4C000014
  31. #define MSR_GLCP_DOTPLL 0x4C000015
  32. #define MSR_LBAR_SMB 0x5140000B
  33. #define MSR_LBAR_GPIO 0x5140000C
  34. #define MSR_LBAR_MFGPT 0x5140000D
  35. #define MSR_LBAR_ACPI 0x5140000E
  36. #define MSR_LBAR_PMS 0x5140000F
  37. #define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */
  38. #define MSR_GX_GLD_MSR_CONFIG 0xC0002001
  39. #define MSR_GX_MSR_PADSEL 0xC0002011
  40. /* Resource Sizes */
  41. #define LBAR_GPIO_SIZE 0xFF
  42. #define LBAR_MFGPT_SIZE 0x40
  43. #define LBAR_ACPI_SIZE 0x40
  44. #define LBAR_PMS_SIZE 0x80
  45. /* ACPI registers (PMS block) */
  46. /*
  47. * PM1_EN is only valid when VSA is enabled for 16 bit reads.
  48. * When VSA is not enabled, *always* read both PM1_STS and PM1_EN
  49. * with a 32 bit read at offset 0x0
  50. */
  51. #define PM1_STS 0x00
  52. #define PM1_EN 0x02
  53. #define PM1_CNT 0x08
  54. #define PM2_CNT 0x0C
  55. #define PM_TMR 0x10
  56. #define PM_GPE0_STS 0x18
  57. #define PM_GPE0_EN 0x1C
  58. /* PMC registers (PMS block) */
  59. #define PM_SSD 0x00
  60. #define PM_SCXA 0x04
  61. #define PM_SCYA 0x08
  62. #define PM_OUT_SLPCTL 0x0C
  63. #define PM_SCLK 0x10
  64. #define PM_SED 0x1
  65. #define PM_SCXD 0x18
  66. #define PM_SCYD 0x1C
  67. #define PM_IN_SLPCTL 0x20
  68. #define PM_WKD 0x30
  69. #define PM_WKXD 0x34
  70. #define PM_RD 0x38
  71. #define PM_WKXA 0x3C
  72. #define PM_FSD 0x40
  73. #define PM_TSD 0x44
  74. #define PM_PSD 0x48
  75. #define PM_NWKD 0x4C
  76. #define PM_AWKD 0x50
  77. #define PM_SSC 0x54
  78. /* VSA2 magic values */
  79. #define VSA_VRC_INDEX 0xAC1C
  80. #define VSA_VRC_DATA 0xAC1E
  81. #define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */
  82. #define VSA_VR_SIGNATURE 0x0003
  83. #define VSA_VR_MEM_SIZE 0x0200
  84. #define AMD_VSA_SIG 0x4132 /* signature is ascii 'VSA2' */
  85. #define GSW_VSA_SIG 0x534d /* General Software signature */
  86. static inline u32 geode_gpio(unsigned int nr)
  87. {
  88. BUG_ON(nr > 28);
  89. return 1 << nr;
  90. }
  91. extern void geode_gpio_set(u32, unsigned int);
  92. extern void geode_gpio_clear(u32, unsigned int);
  93. extern int geode_gpio_isset(u32, unsigned int);
  94. extern void geode_gpio_setup_event(unsigned int, int, int);
  95. extern void geode_gpio_set_irq(unsigned int, unsigned int);
  96. static inline void geode_gpio_event_irq(unsigned int gpio, int pair)
  97. {
  98. geode_gpio_setup_event(gpio, pair, 0);
  99. }
  100. static inline void geode_gpio_event_pme(unsigned int gpio, int pair)
  101. {
  102. geode_gpio_setup_event(gpio, pair, 1);
  103. }
  104. /* Specific geode tests */
  105. static inline int is_geode_gx(void)
  106. {
  107. return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) &&
  108. (boot_cpu_data.x86 == 5) &&
  109. (boot_cpu_data.x86_model == 5));
  110. }
  111. static inline int is_geode_lx(void)
  112. {
  113. return ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
  114. (boot_cpu_data.x86 == 5) &&
  115. (boot_cpu_data.x86_model == 10));
  116. }
  117. static inline int is_geode(void)
  118. {
  119. return (is_geode_gx() || is_geode_lx());
  120. }
  121. #ifdef CONFIG_MGEODE_LX
  122. extern int geode_has_vsa2(void);
  123. #else
  124. static inline int geode_has_vsa2(void)
  125. {
  126. return 0;
  127. }
  128. #endif
  129. static inline void geode_mfgpt_write(int timer, u16 reg, u16 value)
  130. {
  131. u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
  132. outw(value, base + reg + (timer * 8));
  133. }
  134. static inline u16 geode_mfgpt_read(int timer, u16 reg)
  135. {
  136. u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
  137. return inw(base + reg + (timer * 8));
  138. }
  139. extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable);
  140. extern int geode_mfgpt_set_irq(int timer, int cmp, int *irq, int enable);
  141. extern int geode_mfgpt_alloc_timer(int timer, int domain);
  142. #define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
  143. #define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0)
  144. #ifdef CONFIG_GEODE_MFGPT_TIMER
  145. extern int __init mfgpt_timer_setup(void);
  146. #else
  147. static inline int mfgpt_timer_setup(void) { return 0; }
  148. #endif
  149. #endif /* _ASM_X86_GEODE_H */